litmus-rt.git/arch/arm/mach-msm/include, branch wip-default-clustering

msm: mmc: Add msm prefix to platform data structure

2010-08-09T22:48:23+00:00

Rename mmc_platform_data to msm_mmc_platform_data as it is used
only by MSM platform.

Signed-off-by: Sahitya Tummala 
Signed-off-by: Daniel Walker

msm: trout: Remove extern declaration from source file

2010-08-09T22:46:31+00:00

Add msm_add_sdcc() prototype to mach/board.h to fix the
checkpatch warning.

Signed-off-by: Sahitya Tummala 
Signed-off-by: Daniel Walker

Add GPIO support for HTC Dream.

2010-06-15T20:19:43+00:00

Signed-off-by: Pavel Machek 
[dwalker@codeaurora.org: renamed to trout, checkpatch cleanup]
Signed-off-by: Daniel Walker

Merge branch 'msm-mmc_sdcc' of git://codeaurora.org/quic/kernel/dwalker/linux-msm

2010-05-21T21:38:35+00:00

* 'msm-mmc_sdcc' of git://codeaurora.org/quic/kernel/dwalker/linux-msm:
  drivers: mmc: msm_sdcc: Add EMBEDDED_SDIO support
  mmc: msm_sdcc: Fix issue where clocks could be disabled mid transaction
  mmc: msm_sdcc: Fix the dma exec function to use the proper delays
  mmc: msm_sdcc: Don't set host->curr.mrq until after we're sure the busclk timer won't fire
  mmc: msm_sdcc: Enable busclk idle timer for power savings
  mmc: msm_sdcc: Don't disable interrupts while suspending
  mmc: msm_sdcc: Fix issue where we might not end a sucessfull request
  mmc: msm_sdcc: Featurize busclock power save and disable it by default
  mmc: msm_sdcc: Fix bug where busclk expiry timer was not properly disabled
  mmc: msm_sdcc: Reduce command timeouts and improve reliability.
  mmc: msm_sdcc: Schedule clock disable after probe
  mmc: msm_sdcc: Wrap readl/writel calls with appropriate clk delays
  mmc: msm_sdcc: Driver clocking/irq improvements
  msm: Add 'execute' datamover callback
  mmc: msm_sdcc: Snoop SDIO_CCCR_ABORT register
  mmc: msm_sdcc: Clean up clock management and add a 10us delay after enabling clocks

msm: physical offset for MSM7X30

2010-05-13T23:08:51+00:00

The MSM7x30 does not have a separate bank of memory for shared
memory communication with the radio CPU.  Set the kernel base
address 2MB in, to use this first 2MB for this purpose.

Signed-off-by: Daniel Walker 
Signed-off-by: David Brown 
Signed-off-by: Gregory Bean 
Signed-off-by: Abhijeet Dharmapurikar 
Signed-off-by: Stepan Moskovchenko

msm: io: add io support for 7x30

2010-05-13T23:08:49+00:00

Signed-off-by: Daniel Walker 
Signed-off-by: David Brown 
Signed-off-by: Gregory Bean 
Signed-off-by: Abhijeet Dharmapurikar 
Signed-off-by: Stepan Moskovchenko

msm: dma: add 7x30 security domain abstraction

2010-05-13T23:08:46+00:00

The MSM SOC's DMA controller contains several security domains.
On the MSM7x00, only security domain 3 is accessible to our CPU.
The 7x30, however, uses security domain 2.  Fix up the register
definition macros to select this appropriately, based on
configured target.

Signed-off-by: Daniel Walker 
Signed-off-by: David Brown 
Signed-off-by: Gregory Bean 
Signed-off-by: Abhijeet Dharmapurikar 
Signed-off-by: Stepan Moskovchenko

msm: add msm_iomap-7x30.h for MSM7x30 support

2010-05-13T23:08:41+00:00

Add a header describing the io regions for MSM7x30.

Signed-off-by: Daniel Walker 
Signed-off-by: David Brown 
Signed-off-by: Gregory Bean 
Signed-off-by: Abhijeet Dharmapurikar 
Signed-off-by: Stepan Moskovchenko

msm: irqs: add irqs-7x30.h for MSM7x30 support

2010-05-13T23:08:40+00:00

Signed-off-by: Daniel Walker 
Signed-off-by: David Brown 
Signed-off-by: Gregory Bean 
Signed-off-by: Abhijeet Dharmapurikar 
Signed-off-by: Stepan Moskovchenko

msm: physical offset for QSD8x50

2010-05-13T23:08:37+00:00

Support different RAM base addresses used by Qualcomm SOCs, with
QSD8x50 as the first addtional one.

Signed-off-by: Daniel Walker 
Signed-off-by: David Brown 
Signed-off-by: Gregory Bean 
Signed-off-by: Abhijeet Dharmapurikar 
Signed-off-by: Stepan Moskovchenko