litmus-rt.git/arch/arm/include/asm/mach, branch v2.6.34-rc6

ARM: remove old RTC support

2010-02-15T21:39:12+00:00

All RTC drivers have been converted to rtclib, so the old code
providing the set_rtc function pointer, save_time_delta() and
restore_time_delta() functions is obsolete.  Remove it.

Signed-off-by: Russell King

genirq: Convert irq_desc.lock to raw_spinlock

2009-12-14T22:55:33+00:00

Convert locks which cannot be sleeping locks in preempt-rt to
raw_spinlocks.

Signed-off-by: Thomas Gleixner 
Acked-by: Peter Zijlstra 
Acked-by: Ingo Molnar

ARM: 5720/1: Move MMCI header to amba include dir

2009-09-22T19:49:04+00:00

This moves the mmci platform data definition struct away from
arch/arm/include/asm/mach/mmc.h into the more proper place among
the other primecells in include/linux/amba/mmci.h and at the same
time renames it to "mmci.h", and also the struct in this file
confusingly named mmc_platform_data has been renamed
mmci_platform_data for clarity.

Cc: Catalin Marinas 
Signed-off-by: Linus Walleij 
Signed-off-by: Russell King

ARM: 5698/1: MMCI pass capabilities in platform data

2009-09-15T21:11:06+00:00

This makes it possible to pass down the host controller
capabilities for the MMCI driver using the platform data. It
also provides the capabilties for the U300 implementation as an
example, and makes sure the 4bit wide mode is set if this is
requested by the ios() now that we can actually set that
capability for a platform.

Signed-off-by: Linus Walleij 
Signed-off-by: Russell King

MMC: MMCI: allow GPIOs to be passed

2009-07-09T14:15:12+00:00

Add and initialize the gpio_wp and gpio_cd members.  We need to
ensure that all users are covered, because GPIO 0 may be valid.

Signed-off-by: Russell King 
Acked-by: Linus Walleij

omap iommu: simple virtual address space management

2009-05-19T05:23:49+00:00

This patch provides a device drivers, which has a omap iommu, with
address mapping APIs between device virtual address(iommu), physical
address and MPU virtual address.

There are 4 possible patterns for iommu virtual address(iova/da) mapping.

    |iova/			  mapping		iommu_		page
    | da	pa	va	(d)-(p)-(v)		function	type
  ---------------------------------------------------------------------------
  1 | c		c	c	 1 - 1 - 1	  _kmap() / _kunmap()	s
  2 | c		c,a	c	 1 - 1 - 1	_kmalloc()/ _kfree()	s
  3 | c		d	c	 1 - n - 1	  _vmap() / _vunmap()	s
  4 | c		d,a	c	 1 - n - 1	_vmalloc()/ _vfree()	n*

    'iova':	device iommu virtual address
    'da':	alias of 'iova'
    'pa':	physical address
    'va':	mpu virtual address

    'c':	contiguous memory area
    'd':	dicontiguous memory area
    'a':	anonymous memory allocation
    '()':	optional feature

    'n':	a normal page(4KB) size is used.
    's':	multiple iommu superpage(16MB, 1MB, 64KB, 4KB) size is used.

    '*':	not yet, but feasible.

Signed-off-by: Hiroshi DOYU

[ARM] 5422/1: ARM: MMU: add a Non-cacheable Normal executable memory type

2009-03-12T19:25:02+00:00

This patch adds a Non-cacheable Normal ARM executable memory type,
MT_MEMORY_NONCACHED.

On OMAP3, this is used for rapid dynamic voltage/frequency scaling in
the VDD2 voltage domain. OMAP3's SDRAM controller (SDRC) is in the
VDD2 voltage domain, and its clock frequency must change along with
voltage. The SDRC clock change code cannot run from SDRAM itself,
since SDRAM accesses are paused during the clock change. So the
current implementation of the DVFS code executes from OMAP on-chip
SRAM, aka "OCM RAM."

If the OCM RAM pages are marked as Cacheable, the ARM cache controller
will attempt to flush dirty cache lines to the SDRC, so it can fill
those lines with OCM RAM instruction code. The problem is that the
SDRC is paused during DVFS, and so any SDRAM access causes the ARM MPU
subsystem to hang.

TI's original solution to this problem was to mark the OCM RAM
sections as Strongly Ordered memory, thus preventing caching. This is
overkill: since the memory is marked as non-bufferable, OCM RAM writes
become needlessly slow. The idea of "Strongly Ordered SRAM" is also
conceptually disturbing. Previous LAKML list discussion is here:

http://www.spinics.net/lists/arm-kernel/msg54312.html

This memory type MT_MEMORY_NONCACHED is used for OCM RAM by a future
patch.

Cc: Richard Woodruff 
Signed-off-by: Paul Walmsley 
Signed-off-by: Russell King

Merge branch 'dma' into devel

2009-02-21T21:42:50+00:00

Conflicts:

	arch/arm/plat-mxc/dma-mx1-mx2.c

[ARM] dma: move IOMD and floppy DMA structures to RiscPC DMA code

2009-02-21T21:36:22+00:00

There's no point these being in a generic include file when they're
only used in arch/arm/mach-rpc/dma.c.

Signed-off-by: Russell King

PCI: arm: use generic INTx swizzle from PCI core

2009-01-07T19:13:13+00:00

Use the generic pci_common_swizzle() instead of arch-specific code.

Signed-off-by: Bjorn Helgaas 
Signed-off-by: Jesse Barnes