litmus-rt.git/arch/arc, branch test

arc: fix use of uninitialized arc_pmu

2015-07-21T17:10:03+00:00

commit 7002f77541f877a5590615ceb3da32b114f14b62 upstream.

static arc_pmu in the arch/arc/kernel/perf_event.c is not initialized as
it's shadowed by a local variable of the same name in the
arc_pmu_device_probe.

Signed-off-by: Max Filippov 
Fixes: 03c94fcf954d "ARC: perf: make @arc_pmu static global"
Signed-off-by: Vineet Gupta 
Signed-off-by: Greg Kroah-Hartman

ARC: add compiler barrier to LLSC based cmpxchg

2015-07-21T17:10:03+00:00

commit d57f727264f1425a94689bafc7e99e502cb135b5 upstream.

When auditing cmpxchg call sites, Chuck noted that gcc was optimizing
away some of the desired LDs.

|	do {
|		new = old = *ipi_data_ptr;
|		new |= 1U << msg;
|	} while (cmpxchg(ipi_data_ptr, old, new) != old);

was generating to below

| 8015cef8:	ld         r2,[r4,0]  <-- First LD
| 8015cefc:	bset       r1,r2,r1
|
| 8015cf00:	llock      r3,[r4]  <-- atomic op
| 8015cf04:	brne       r3,r2,8015cf10
| 8015cf08:	scond      r1,[r4]
| 8015cf0c:	bnz        8015cf00
|
| 8015cf10:	brne       r3,r2,8015cf00  <-- Branch doesn't go to orig LD

Although this was fixed by adding a ACCESS_ONCE in this call site, it
seems safer (for now at least) to add compiler barrier to LLSC based
cmpxchg

Reported-by: Chuck Jordan 
Acked-by: Peter Zijlstra (Intel) 
Signed-off-by: Vineet Gupta 
Signed-off-by: Greg Kroah-Hartman

ARC: add smp barriers around atomics per Documentation/atomic_ops.txt

2015-07-21T17:10:02+00:00

commit 2576c28e3f623ed401db7e6197241865328620ef upstream.

 - arch_spin_lock/unlock were lacking the ACQUIRE/RELEASE barriers
   Since ARCv2 only provides load/load, store/store and all/all, we need
   the full barrier

 - LLOCK/SCOND based atomics, bitops, cmpxchg, which return modified
   values were lacking the explicit smp barriers.

 - Non LLOCK/SCOND varaints don't need the explicit barriers since that
   is implicity provided by the spin locks used to implement the
   critical section (the spin lock barriers in turn are also fixed in
   this commit as explained above

Cc: Paul E. McKenney 
Acked-by: Peter Zijlstra (Intel) 
Signed-off-by: Vineet Gupta 
Signed-off-by: Greg Kroah-Hartman

ARC: inline cache flush toggle helpers

2015-05-11T05:51:41+00:00

Signed-off-by: Vineet Gupta

ARC: With earlycon in use, retire EARLY_PRINTK

2015-05-11T05:50:21+00:00

Signed-off-by: Vineet Gupta

ARC: unbork !LLSC build

2015-05-10T06:36:57+00:00

Fixes: f7d11e93ee97a locking,arch,arc: Fold atomic_ops
Cc:  # 3.18
Signed-off-by: Vineet Gupta

Merge tag 'arc-4.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc

2015-04-24T14:55:54+00:00

Pull ARC updates from Vineet Gupta:

 - perf fixes/improvements

 - misc cleanups

* tag 'arc-4.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
  ARC: perf: don't add code for impossible case
  ARC: perf: Rename DT binding to not confuse with power mgmt
  ARC: perf: add user space attribution in callchains
  ARC: perf: Add kernel callchain support
  ARC: perf: support cache hit/miss ratio
  ARC: perf: Add some comments/debug stuff
  ARC: perf: make @arc_pmu static global
  ARC: mem init spring cleaning - No functional changes
  ARC: Fix RTT boot printing
  ARC: fold __builtin_constant_p() into test_bit()
  ARC: rename unhandled exception handler
  ARC: cosmetic: Remove unused ECR bitfield masks
  ARC: Fix WRITE_BCR
  ARC: [nsimosci] Update defconfig
  arc: copy_thread(): rename 'arg' argument to 'kthread_arg'

ARC: perf: don't add code for impossible case

2015-04-20T12:57:55+00:00

Signed-off-by: Vineet Gupta

ARC: perf: Rename DT binding to not confuse with power mgmt

2015-04-20T12:57:36+00:00

Signed-off-by: Vineet Gupta

ARC: perf: add user space attribution in callchains

2015-04-20T12:57:35+00:00

The actual user space unwinding is more involved, so simply capture the
user space PC

Signed-off-by: Vineet Gupta