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* | [POWERPC] 86xx: Fix definition of global-utilites structureTimur Tabi2007-09-14
| | | | | | | | | | | | | | | | | | The current definition of struct ccsr_guts in immap_86xx.h was for 85xx. This patch fixes that and replaces the vague integer types with sized types of the correct endianness. The unused struct ccsr_pci is also deleted. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | [POWERPC] add clrsetbits macrosTimur Tabi2007-09-14
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the clrsetbits_xxx() macros, which are used to set and clear multiple bits in a single read-modify-write operation. Specify the bits to clear in the 'clear' parameter and the bits to set in the 'set' parameter. These macros can also be used to set a multiple-bit bit pattern using a mask, by specifying the mask in the 'clear' parameter and the new bit pattern in the 'set' parameter. There are big-endian and little-endian versions for 8, 16, 32, and 64 bits. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | [POWERPC] QE: extern par_io_config_pin and par_io_data_set funcsAnton Vorontsov2007-09-14
| | | | | | | | | | | | | | This is needed to configure and control QE pario pins from the kernel. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | [POWERPC] Fix modpost warnings from head*.S on ppc32Kumar Gala2007-09-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We get warnings like the following from the various ppc32 head*.S files: WARNING: vmlinux.o(.text+0x358): Section mismatch: reference to .init.text:early_init (between 'skpinv' and 'interrupt_base') WARNING: vmlinux.o(.text+0x380): Section mismatch: reference to .init.text:machine_init (between 'skpinv' and 'interrupt_base') WARNING: vmlinux.o(.text+0x384): Section mismatch: reference to .init.text:MMU_init (between 'skpinv' and 'interrupt_base') WARNING: vmlinux.o(.text+0x3aa): Section mismatch: reference to .init.text:start_kernel (between 'skpinv' and 'interrupt_base') WARNING: vmlinux.o(.text+0x3ae): Section mismatch: reference to .init.text:start_kernel (between 'skpinv' and 'interrupt_base') Added a .text.head section simliar to what other architectures do since modpost already excludes this from its warnings. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | [POWERPC] Add cpu feature for SPE handlingKumar Gala2007-09-14
| | | | | | | | | | | | | | | | Make it so that SPE support can be determined at runtime. This is similiar to how we handle AltiVec. This allows us to have SPE support built in and work on processors with and without SPE. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | [POWERPC] PS3: Add new LV1 error codesGeert Uytterhoeven2007-09-13
| | | | | | | | | | | | | | | | Add new error codes that may be returned by the LV1 hypervisor Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Add workaround for MPICs with broken register readsOlof Johansson2007-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | Some versions of PWRficient 1682M have an interrupt controller in which the first register in each pair for interrupt sources doesn't always read with the right polarity/sense values. To work around this, keep a software copy of the register instead. Since it's not modified from the mpic itself, it's a feasible solution. Still, keep it under a config option to avoid wasting memory on other platforms. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Move lowlevel runlatch calls under cpu feature controlOlof Johansson2007-09-13
| | | | | | | | | | | | | | | | There's no need to call the runlatch on functions on processors that don't implement them (CPU_FTR_CTRL). Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] pasemi: Export more SPRs to sysfs when CONFIG_DEBUG_KERNEL=yOlof Johansson2007-09-13
| | | | | | | | | | | | | | | | Export some of the implementation-specific registers via sysfs. Useful when debugging, etc. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Add an optional device_node pointer to the irq_hostMichael Ellerman2007-09-13
| | | | | | | | | | | | | | | | | | | | The majority of irq_host implementations (3 out of 4) are associated with a device_node, and need to stash it somewhere. Rather than having it somewhere different for each host, add an optional device_node pointer to the irq_host structure. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | Merge branch 'linux-2.6' into for-2.6.24Paul Mackerras2007-09-13
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| * [POWERPC] cell/PS3: Fix a bug that causes the PS3 to hang on the SPU Class 0 ↵Masato Noguchi2007-09-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | interrupt. The Cell BE Architecture spec states that the SPU MFC Class 0 interrupt is edge-triggered. The current spu interrupt handler assumes this behavior and does not clear the interrupt status. The PS3 hypervisor visualizes all SPU interrupts as level, and on return from the interrupt handler the hypervisor will deliver a new virtual interrupt for any unmasked interrupts which for which the status has not been cleared. This fix clears the interrupt status in the interrupt handler. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | Merge branch 'linux-2.6' into for-2.6.24Paul Mackerras2007-08-28
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| * [POWERPC] Fix FSL BookE machine check reportingBecky Bruce2007-08-17
| | | | | | | | | | | | | | | | | | | | Reserved MCSR bits on FSL BookE parts may have spurious values when mcheck occurs. Mask these off when printing the MCSR to avoid confusion. Also, get rid of the MCSR_GL_CI bit defined for e500 - this bit doesn't actually have any meaning. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | [POWERPC] Copy over headers from arch/ppc to arch/powerpc that we needKumar Gala2007-08-22
| | | | | | | | | | | | | | | | | | | | | | To build arch/powerpc without including asm-ppc/ we need these files in asm-powerpc/ Moved some headers under arch/powerpc/platforms if they were only used by platform or driver files and fixed up the source file includes to match the new locations Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | [POWERPC] Split out iSeries specific exception macrosStephen Rothwell2007-08-22
| | | | | | | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Move the exception macros into a header fileStephen Rothwell2007-08-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It makes head_64.S a bit more readable and will allow us to move the iSeries exceptions elsewhere. This also removes the last line of the comment: * The following macros define the code that appears as * the prologue to each of the exception handlers. They * are split into two parts to allow a single kernel binary * to be used for pSeries and iSeries. * LOL. One day... - paulus Anything is possible. :-) Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Move iSeries startup code out of head_64.SStephen Rothwell2007-08-22
| | | | | | | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Use strcasecmp() rather than strncasecmp() when determining device ↵Scott Wood2007-08-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | node compatibility The current code assumes "foo-bar" must always be compatible with a node compatible with "foo", which breaks device trees where this is not so. The "case" part is also wrong according to Open Firmware, but it's more likely to have drivers and/or device trees depending on it, and thus needs to be handled more carefully. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Add clrbits8 and setbits8Scott Wood2007-08-22
| | | | | | | | | | Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] iSeries: Clean up lparmap messStephen Rothwell2007-08-22
| | | | | | | | | | | | | | | | | | | | We need to have xLparMap in head_64.S so that it is at a fixed address (because the linker will not resolve (address & 0xffffffff) for us). But the assembler miscalculates the KERNEL_VSID() expressions. So put the confusing expressions into asm-offsets.c. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] 40x decrementer fixesJosh Boyer2007-08-20
| | | | | | | | | | | | | | | | Allow generic_calibrate_decr to work for 40x platforms. Given that the hardware behavior is identical, this also changes the set_dec function to reload the PIT on 40x to match the behavior 44x currently has. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* | [POWERPC] 40x MMUJosh Boyer2007-08-20
| | | | | | | | | | | | | | Add MMU definitions for 40x platforms. Also fixes two warnings in 40x_mmu.c. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: David Gibson <david@gibson.dropbear.id.au>
* | [POWERPC] Tidy up CONFIG_PPC_MM_SLICES codeStephen Rothwell2007-08-16
| | | | | | | | | | | | | | This removes some of the #ifdefs from .c files. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Remove get_property and device_is_compatibleStephen Rothwell2007-08-16
| | | | | | | | | | | | | | | | | | They were only needed for backwards compatibility and all in tree uses have now been changed. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Update lmb.h include protection to ASM_POWERPCBecky Bruce2007-08-16
| | | | | | | | | | | | | | | | | | This file was protected by _PPC64_LMB_H, which is confusing, as the 32-bit code also uses the lmb these days. Changed to _ASM_POWERPC_LMB_H. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Implement atomic{, 64}_{read, write}() without volatileSegher Boessenkool2007-08-16
| | | | | | | | | | | | | | | | | | | | | | | | Instead, use asm() like all other atomic operations already do. Also use inline functions instead of macros; this actually improves code generation (some code becomes a little smaller, probably because of improved alias information -- just a few hundred bytes total on a default kernel build, nothing shocking). Signed-off-by: Segher Boessenkool <segher@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] pseries: Eliminate global error_log_cnt variableLinas Vepstas2007-08-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Eliminate the use of error_log_cnt as a global var shared across different directories. Pass it as a parameter instead. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> ---- Respin of earlier patch, with the CONFIG_PSERIES junk removed from the header file. arch/powerpc/kernel/nvram_64.c | 10 +++++----- arch/powerpc/platforms/pseries/rtasd.c | 7 ++++--- include/asm-powerpc/nvram.h | 6 ++++-- 3 files changed, 13 insertions(+), 10 deletions(-) Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [POWERPC] Replace a few #defines with empty inline functionsSegher Boessenkool2007-08-16
|/ | | | | | | | ...so that GCC doesn't complain about unused variables in the callers of these. Signed-off-by: Segher Boessenkool <segher@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Fix initialization and usage of dma_maskBenjamin Herrenschmidt2007-08-10
| | | | | | | | | | | | | | | powerpc has a couple of bugs in the usage of dma_masks that tend to break when drivers explicitly try to set a 32-bit mask for example. First, the code that generates the pci devices from the OF device-tree doesn't initialize the mask properly, then our implementation of set_dma_mask() was trying to validate the -previous- mask value, not the one passed in as an argument. This fixes these problems. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: Move SPU affinity init to spu_management_of_opsAndre Detsch2007-08-10
| | | | | | | | | | | | | This patch moves affinity initialization code from spu_base.c to a new spu_management_of_ops function (init_affinity), which is empty in the case of PS3. This fixes a linking problem that was happening when compiling for PS3. Also, some small code style changes were made. Signed-off-by: Andre Detsch <adetsch@br.ibm.com> Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Fixes for the SLB shadow buffer codeMichael Neuling2007-08-03
| | | | | | | | | | | | | | On a machine with hardware 64kB pages and a kernel configured for a 64kB base page size, we need to change the vmalloc segment from 64kB pages to 4kB pages if some driver creates a non-cacheable mapping in the vmalloc area. However, we never updated with SLB shadow buffer. This fixes it. Thanks to paulus for finding this. Also added some write barriers to ensure the shadow buffer contents are always consistent. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Expand RPN field to 34 bits when using 64k pagesPaul Mackerras2007-08-03
| | | | | | | | | The real page number field in our PTEs when configured for 64kB pages is currently 32 bits, which turns out to be not quite enough for the resources that the eHCA driver wants to map. This expands the RPN field to include 2 adjacent, previously-unused bits. Signed-off-by: Paul Mackerras <paulus@samba.org> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Fix WARN_ON() on bitfield opsLinus Torvalds2007-08-01
| | | | | | | | | | | | | | | | | | | | | | | | | | Alexey Dobriyan noticed that the new WARN_ON() semantics that were introduced by commit 684f978347deb42d180373ac4c427f82ef963171 (to also return the value to be warned on) didn't compile when given a bitfield, because the typeof doesn't work for bitfields. So instead of the typeof trick, use an "int" variable together with a "!!(x)" expression, as suggested by Al Viro. To make matters more interesting, Paul Mackerras points out that that is sub-optimal on Power, but the old asm-coded comparison seems to be buggy anyway on 32-bit Power if the conditional was 64-bit, so I think there are more problems there. Regardless, the new WARN_ON() semantics may have been a bad idea. But this at least avoids the more serious complications. Cc: Alexey Dobriyan <adobriyan@sw.ru> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: Paul Mackerras <paulus@samba.org> Cc: Al Viro <viro@ftp.linux.org.uk> Cc: Ingo Molnar <mingo@elte.hu> Cc: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* remove unused TIF_NOTIFY_RESUME flagStephane Eranian2007-07-31
| | | | | | | | | | | | Remove unused TIF_NOTIFY_RESUME flag for all processor architectures. The flag was not used excecpt on IA-64 where the patch replaces it with TIF_PERFMON_WORK. Signed-off-by: stephane eranian <eranian@hpl.hp.com> Cc: <linux-arch@vger.kernel.org> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'merge' of ↵Linus Torvalds2007-07-26
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (21 commits) [POWERPC] spusched: Fix initial timeslice calculation [POWERPC] spufs: Fix incorrect initialization of cbe_spu_info.spus [POWERPC] Fix Maple platform ISA bus [POWERPC] Make pci_iounmap actually unmap things [POWERPC] Add function to check if address is an IO port [POWERPC] Fix Pegasos keyboard detection [POWERPC] iSeries: Fix section mismatch warning in lpevents [POWERPC] iSeries: Fix section mismatch warnings [POWERPC] iSeries: We need vio_enable_interrupts [POWERPC] Fix RTC and device tree on linkstation machines [POWERPC] Add of_register_i2c_devices() [POWERPC] Fix loop with unsigned long counter variable [POWERPC] Fix register labels on show_regs() message for 4xx/Book-E [POWERPC] Only allow building of BootX text support on PPC_MULTIPLATFORM [POWERPC] Fix the ability to reset on MPC8544 DS and MPC8568 MDS boards [POWERPC] Fix mpc7448hpc2 tsi108 device_type bug [POWREPC] Fixup a number of modpost warnings on ppc32 [POWERPC] Fix ethernet PHY support on MPC8544 DS [POWERPC] Don't try to allocate resources for a Freescale POWERPC PHB Revert "[POWERPC] Don't complain if size-cells == 0 in prom_parse()" ...
| * [POWERPC] Add function to check if address is an IO portBenjamin Herrenschmidt2007-07-26
| | | | | | | | | | | | | | | | | | This adds a function that tells you if a given kernel virtual address is hitting a PCI or ISA IO port permanent mapping or not. This is to be used in the next patch to fix iomap APIs to properly unmap things. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] iSeries: Fix section mismatch warningsStephen Rothwell2007-07-26
| | | | | | | | | | | | | | | | WARNING: vmlinux.o(.text+0x8124): Section mismatch: reference to .init.text:.iSeries_early_setup (between '.__start_initialization_iSeries' and '.__mmu_off') WARNING: vmlinux.o(.text+0x8128): Section mismatch: reference to .init.text:.early_setup (between '.__start_initialization_iSeries' and '.__mmu_off') Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] iSeries: We need vio_enable_interruptsStephen Rothwell2007-07-26
| | | | | | | | | | | | | | | | | | Commit 3d0e91f7ace12499c4b00088e9a6b1361e1bb0ca introduced a requirement for vio_enable_interrupts which iSeires has never needed. So create a dummy one. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | fix 'dynreloc miscount' link error on PowerpcSam Ravnborg2007-07-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Nathan Lynch <ntl@pobox.com> reported: 2.6.23-rc1 breaks the build for 64-bit powerpc for me (using maple_defconfig): LD vmlinux.o powerpc64-unknown-linux-gnu-ld: dynreloc miscount for kernel/built-in.o, section .opd powerpc64-unknown-linux-gnu-ld: can not edit opd Bad value make: *** [vmlinux.o] Error 1 However, I see a possibly related binutils patch: http://article.gmane.org/gmane.comp.gnu.binutils/33650 It was tracked down to be caused by the weak prototype declaration in mm.h: __attribute__((weak)) const char *arch_vma_name(struct vm_area_struct *vma); But there is no need to make the declaration weak - only the definition needs to be marked weak. So drop the weak declaration. And in the process drop the duplicate definition in page.h for powerpc. Note: the arch_vma_name fix for x86_64 needs to be applied first to avoid breaking x86_64 Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Nathan Lynch <ntl@pobox.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | make powerpc BUG_ON() OK with pointers and bitwiseAl Viro2007-07-26
|/ | | | | | | | Since powerpc insists on printing the _value_ of condition and on casting it to long... At least let's make it a force-cast. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [POWERPC] Provide ability to setup P2P bridge registers from struct resourceKumar Gala2007-07-23
| | | | | | | We need the ability to set P2P bridge registers to properly setup the virtual P2P bridges that exist in PCIe controllers for some of the embedded setups. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Make endianess of cfg_addr for indirect pci ops runtimeKumar Gala2007-07-23
| | | | | | | | Make it so we do a runtime check to know if we need to write cfg_addr as big or little endian. This is needed if we want to allow 86xx support to co-exist in the same kernel as other 6xx PPCs. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Removed setup_indirect_pci_nomapKumar Gala2007-07-23
| | | | | | | We don't use setup_indirect_pci_nomap in arch/powerpc and it appears the users that needed it from arch/ppc are now using setup_indirect_pci. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Added indirect quirk to handle PCIe PHB that have issue w/no linkKumar Gala2007-07-23
| | | | | | | | | Added PPC_INDIRECT_TYPE_NO_PCIE_LINK flag to the indirect pci handling code to ensure that we don't talk to any device other than the PHB if we don't have PCIe link. Some controllers will lockup if they try to do a config cycle to any device on the bus except the PHB. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Add the ability to find PCI capabilities early onKumar Gala2007-07-23
| | | | | | | | Added early_find_capability that wraps pci_bus_find_capability and uses fake_pci_bus() to allow us to call it before we've fully setup the pci_controller. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] MPIC protected sourcesBenjamin Herrenschmidt2007-07-22
| | | | | | | | | | | | | | | | | | Some HW platforms, such as the new cell blades, requires some MPIC sources to be left alone by the operating system. This implements support for a "protected-sources" property in the mpic controller node containing a list of source numbers to be protected against operating system interference. For those interested in the gory details, the MPIC on the southbridge of those blades has some of the processor outputs routed to the cell, and at least one routed as a GPIO to the service processor. It will be used in the GA product for routing some of the southbridge error interrupts to the service processor which implements some of the RAS stuff, such as checkstopping when fatal errors occurs before they can propagate. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] of_detach_node()'s device node argument cannot be constSegher Boessenkool2007-07-22
| | | | | | | ...since it modifies it (when it sets the OF_DETACHED flag). Signed-off-by: Segher Boessenkool <segher@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [CELL] spufs: rework list management and associated lockingChristoph Hellwig2007-07-20
| | | | | | | | | | | | | | | | | | This sorts out the various lists and related locks in the spu code. In detail: - the per-node free_spus and active_list are gone. Instead struct spu gained an alloc_state member telling whether the spu is free or not - the per-node spus array is now locked by a per-node mutex, which takes over from the global spu_lock and the per-node active_mutex - the spu_alloc* and spu_free function are gone as the state change is now done inline in the spufs code. This allows some more sharing of code for the affinity vs normal case and more efficient locking - some little refactoring in the affinity code for this locking scheme Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] oprofile: add support to OProfile for profiling CELL BE SPUsBob Nelson2007-07-20
| | | | | | | | | | | | | | | | | | | | | | | From: Maynard Johnson <mpjohn@us.ibm.com> This patch updates the existing arch/powerpc/oprofile/op_model_cell.c to add in the SPU profiling capabilities. In addition, a 'cell' subdirectory was added to arch/powerpc/oprofile to hold Cell-specific SPU profiling code. Exports spu_set_profile_private_kref and spu_get_profile_private_kref which are used by OProfile to store private profile information in spufs data structures. Also incorporated several fixes from other patches (rrn). Check pointer returned from kzalloc. Eliminated unnecessary cast. Better error handling and cleanup in the related area. 64-bit unsigned long parameter was being demoted to 32-bit unsigned int and eventually promoted back to unsigned long. Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com> Signed-off-by: Bob Nelson <rrnelson@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Acked-by: Paul Mackerras <paulus@samba.org>
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