| Commit message (Collapse) | Author | Age |
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The s3c6410 sdhci controller does not support the 'End' attribute and NOP
attribute in the same 8-Byte ADMA descriptor. This patch adds a new quirk
to identify sdhci host contollers with such behaviour. In addition to
this, for controllers using the new quirk, the last entry in the ADMA
descritor table is marked with the 'End' attribute (instead of using a NOP
descriptor with 'End' attribute).
Signed-off-by: Maurus Cuelenaere <mcuelenaere@gmail.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Unfortunately some architectures #define their read{b,w,l} and
write{b,w,l} I/O accessors which makes the SDHCI I/O accessor functions of
the same names subject to preprocessing. This leads to the following
compiler error,
In file included from drivers/mmc/host/sdhci.c:26:
drivers/mmc/host/sdhci.h:318:35: error: macro "writel" passed 3 arguments, but takes just 2
Rename the SDHCI I/O functions so that CONFIG_MMC_SDHCI_IO_ACCESSORS can
be enabled for architectures that implement their read{b,w,l} and
write{b,w,l} functions with macros.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Cc: Zhangfei Gao <zgao6@marvell.com>
Acked-by: Anton Vorontsov <cbouatmailru@gmail.com>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Signed-off-by: Zhangfei Gao <zgao6@marvell.com>
Reviewed-by: Matt Fleming <matt@console-pimps.org>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Atmel-mci support for SDIO interrupts. This adds the enable_sdio_irq()
function and the configuration of sdio irq mask per slot. With this irq
mask information, we keep the idea of multiple slot per sd/mmc host (not
only A and B). MMC_CAP_SDIO_IRQ is added according to slot configuration.
A new little function is added to run mmc_signal_sdio_irq() during
interrupt handling routine.
Signed-off-by: Anders Grahn <anders.grahn@hd-wireless.se>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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MMCIF is the MMC Host Interface in SuperH.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Cc: Ben Hutchings <ben@decadent.org.uk>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Enable high speed support for atmel-mci driver. This support is dependent
of the revision of the IP and, of course, the capacity of the SD card
used.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Maciej Sosnowski <maciej.sosnowski@intel.com>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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The clearing of mrq via a memset at the top of the for loop in
mmc_wait_for_app_cmd() is not required as mrq is not used and there is
another clearing of mrq just below. We remove the first memset since if
the initial tests in the for loop fail the memset is not required.
Signed-off-by: Mark Asselstine <asselsm@gmail.com>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Improve the suspend and resume callbacks in DaVinci MMC host controller
driver. Modify the reset status of the contorller and clock during
suspend and resume. Also migrate the power management callbacks from
platform driver to dev_pm_ops structure.
Tested on DA850/OMAP-L138 EVM.
[akpm@linux-foundation.org: coding-style fixes]
Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Vipin Bhandari <vipin.bhandari@ti.com>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Add a helper function which will aid in changing the reset
status of the controller.
Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Vipin Bhandari <vipin.bhandari@ti.com>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Some hosts have an extended SDHCI iomem size, so the driver should
only print errors if the iomem size is less than 0x100.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Richard Röjfors <richard.rojfors@pelagicore.com>
Cc: David Vrabel <david.vrabel@csr.com>
Cc: Pierre Ossman <pierre@ossman.eu>
Cc: Ben Dooks <ben@simtec.co.uk>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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This includes platform ops, quirks and (de)initialization callbacks.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Cc: Richard Röjfors <richard.rojfors@pelagicore.com>
Cc: David Vrabel <david.vrabel@csr.com>
Cc: Pierre Ossman <pierre@ossman.eu>
Cc: Ben Dooks <ben@simtec.co.uk>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Some hosts (e.g. as found in CNS3xxx SOCs) report wrong value in
CLOCK_BASE capability field, and currently there is no way to force the
SDHCI core to use the platform-provided base clock value.
This patch implements CAP_CLOCK_BASE_BROKEN quirk. When enabled, the
SDHCI core will always use base clock frequency provided by the platform.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Cc: Richard Röjfors <richard.rojfors@pelagicore.com>
Cc: David Vrabel <david.vrabel@csr.com>
Cc: Pierre Ossman <pierre@ossman.eu>
Cc: Ben Dooks <ben@simtec.co.uk>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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The omap850 and omap730 use 16-bit registers instead of 32-bit, requiring
a modification of the register addresses in the mmc-omap driver. To
resolve this, a bit shift is performed on base register addresses, either
by 1 or 2 bits depending on the CPU in use. This yields the correct
registers for each CPU.
Signed-off-by: Marek Belisko <marek.belisko@open-nandra.com>
Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cc: Ladislav Michl <ladis@linux-mips.org>
Cc: Ben Dooks <ben@fluff.org>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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On some platforms like DM355, the number of EDMA parameter slots available
for EDMA_SLOT_ANY usage are few. In such cases, if MMC/SD uses 16 slots
for each instance of MMC controller, then the number of slots available
for other modules will be very few.
By passing the number of EDMA slots to be used in MMC driver from platform
data, EDMA slots available for other purposes can be controlled.
Most of the platforms will not use this platform data variable. But on
DM355, as the number of EDMA resources available is limited, the number of
scatter- gather segments used inside the MMC driver can be 8 (passed as
platform data) instead of 16. On DM355, when the number of scatter-gather
segments was reduced to 8, I saw a performance difference of about
0.25-0.4 Mbytes/sec during write. Read performance variations were
negligible.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (103 commits)
ARM: 6141/1: Add audio support part in arch/arm/mach-w90x900
ARM: 5939/1: ARM: Add option CMDLINE_FORCE to force usage of the in-kernel cmdline
ARM: 6140/1: silence a bogus sparse warning in unwind.c
ARM: mach-at91: duplicated include
ARM: arch/arm/nwfpe/fpsr.h: Checkpatch cleanup
ARM: arch/arm/mach-shark/pci.c: Checkpatch cleanup
ARM: arch/arm/nwfpe/ChangeLog: Checkpatch cleanup
ARM: arch/arm/mach-sa1100/leds.c: Checkpatch cleanup
ARM: arch/arm/mach-h720x/common.h: Checkpatch cleanup
ARM: arch/arm/mach-footbridge/ebsa285-pci.c: Checkpatch cleanup
ARM: arch/arm/mach-clps711x/Makefile.boot: Checkpatch cleanup
ARM: arch/arm/boot/bootp/bootp.lds: Checkpatch cleanup
ARM: SPEAR6xx: remove duplicated #include
ARM: s3c6400_defconfig: Add NAND driver
ARM: s3c6400_defconfig: enable sound as modules
ARM: s3c6400_defconfig: enable power management
ARM: s5pv210_defconfig: Update s5pv210_defconfig to v2.6.34
ARM: s5pc110_defconfig: Update s5pc110_defconfig to v2.6.34
ARM: s5p6442_defconfig: Update s5p6442_defconfig to v2.6.34
ARM: s5p6440_defconfig: Update s5p6440_defconfig to v2.6.34
...
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devel-stable
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From cefcdab08d1c9636c4a7290bc2bbe937d051bce4 Mon Sep 17 00:00:00 2001
From: Volker Ernst <volker.ernst@txtr.com>
Date: Mon, 26 Apr 2010 22:51:07 +0200
Subject: [PATCH] ARM: mx3: Fix a race condition in mxcmmc
This fixes a race condition regarding interrupt bits in the SDHC
controller driver code.
In case of PIO-transfer it does not clear SDHC-status bit#11/12
in the INT-handler anymore. INT-handler might be called during
an ongoing PIO-data-transfer (with some other INT-flag set) and
PIO-transfer depends on these bits being set to detect the end
of the data-transfer. This also means that at the end of PIO-
transfer that PIO-software has to clear these bits itself.
However in case of DMA-transfer these bits have to be cleared
in the INT-handler, because they are used to generate INTs then.
Works solid, no more problems here, can transfer big files.
Signed-off-by: Volker Ernst <volker.ernst@txtr.com>
Acked-by: Daniel Mack <daniel@caiaq.de>
Cc: Andy Green <andy@warmcat.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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MX3 SoCs have a silicon bug which corrupts CRC calculation of
multi-block transfers when connected SDIO peripheral doesn't drive the
BUSY line as required by the specs.
One way to prevent this is to only allow 1-bit transfers.
Another way is playing tricks with the DMA engine, but this isn't
mainline yet. So for now, we live with the performance drawback of 1-bit
transfers until a nicer solution is found.
This patch introduces a new host controller callback 'init_card' which
is for now only called from mmc_sdio_init_card().
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Volker Ernst <volker.ernst@txtr.com>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Michał Mirosław <mirqus@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Successfully tested on MX31 hardware using libertas SDIO peripherals.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Volker Ernst <volker.ernst@txtr.com>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Michał Mirosław <mirqus@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Be more verbose on error messages and add one debug message.
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Volker Ernst <volker.ernst@txtr.com>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Michał Mirosław <mirqus@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (25 commits)
sh: fix up sh7785lcr_32bit_defconfig.
arch/sh/lib/strlen.S: Checkpatch cleanup
sh: fix up sh7786 dmaengine build.
sh: guard cookie consistency across termination in the DMA driver
sh: prevent the DMA driver from unloading, while in use
sh: fix Oops in the serial SCI driver
sh: allow platforms to specify SD-card supported voltages
mmc: let MFD's provide supported Vdd card voltages to tmio_mmc
sh: disable SD-card write-protection detection on kfr2r09
mfd: pass platform flags down to the tmio_mmc driver
tmio: add a platform flag to disable card write-protection detection
sh: Add SDHI DMA support to migor
sh: Add SDHI DMA support to kfr2r09
sh: Add SDHI DMA support to ms7724se
sh: Add SDHI DMA support to ecovec
mmc: add DMA support to tmio_mmc driver, when used on SuperH
sh: prepare the SDHI MFD driver to pass DMA configuration to tmio_mmc.c
mmc: prepare tmio_mmc for passing of DMA configuration from the MFD cell
sh: add DMA slave definitions to sh7724
sh: add DMA slaves for two SDHI controllers to sh7722
...
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Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Ian Molton <ian@mnementh.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Write-protection status is not always available, e.g., micro-SD cards do not
have a write-protection switch at all. This patch adds a flag to let platforms
force tmio_mmc to consider the card writable.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Ian Molton <ian@mnementh.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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SDHI controllers on SuperH, served by the tmio_mmc driver, can use slave DMA
for data transfer. This patch adds support for the dmaengine API to the
tmio_mmc driver.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Ian Molton <ian@mnementh.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Merging in current state of Linus' tree to deal with merge conflicts and
build failures in vio.c after merge.
Conflicts:
drivers/i2c/busses/i2c-cpm.c
drivers/i2c/busses/i2c-mpc.c
drivers/net/gianfar.c
Also fixed up one line in arch/powerpc/kernel/vio.c to use the
correct node pointer.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:
DMAENGINE: extend the control command to include an arg
async_tx: trim dma_async_tx_descriptor in 'no channel switch' case
DMAENGINE: DMA40 fix for allocation of logical channel 0
DMAENGINE: DMA40 support paused channel status
dmaengine: mpc512x: Use resource_size
DMA ENGINE: Do not reset 'private' of channel
ioat: Remove duplicated devm_kzalloc() calls for ioatdma_device
ioat3: disable cacheline-unaligned transfers for raid operations
ioat2,3: convert to producer/consumer locking
ioat: convert to circ_buf
DMAENGINE: Support for ST-Ericssons DMA40 block v3
async_tx: use of kzalloc/kfree requires the include of slab.h
dmaengine: provide helper for setting txstate
DMAENGINE: generic channel status v2
DMAENGINE: generic slave control v2
dma: timb-dma: Update comment and fix compiler warning
dma: Add timb-dma
DMAENGINE: COH 901 318 fix bytesleft
DMAENGINE: COH 901 318 rename confusing vars
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This adds an argument to the DMAengine control function, so that
we can later provide control commands that need some external data
passed in through an argument akin to the ioctl() operation
prototype.
[dan.j.williams@intel.com: fix up some missed conversions]
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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Convert the device_terminate_all() operation on the
DMA engine to a generic device_control() operation
which can now optionally support also pausing and
resuming DMA on a certain channel. Implemented for the
COH 901 318 DMAC as an example.
[dan.j.williams@intel.com: update for timberdale]
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Maciej Sosnowski <maciej.sosnowski@intel.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Li Yang <leoli@freescale.com>
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Magnus Damm <damm@opensource.se>
Cc: Liam Girdwood <lrg@slimlogic.co.uk>
Cc: Joe Perches <joe@perches.com>
Cc: Roland Dreier <rdreier@cisco.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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git://codeaurora.org/quic/kernel/dwalker/linux-msm
* 'msm-mmc_sdcc' of git://codeaurora.org/quic/kernel/dwalker/linux-msm:
drivers: mmc: msm_sdcc: Add EMBEDDED_SDIO support
mmc: msm_sdcc: Fix issue where clocks could be disabled mid transaction
mmc: msm_sdcc: Fix the dma exec function to use the proper delays
mmc: msm_sdcc: Don't set host->curr.mrq until after we're sure the busclk timer won't fire
mmc: msm_sdcc: Enable busclk idle timer for power savings
mmc: msm_sdcc: Don't disable interrupts while suspending
mmc: msm_sdcc: Fix issue where we might not end a sucessfull request
mmc: msm_sdcc: Featurize busclock power save and disable it by default
mmc: msm_sdcc: Fix bug where busclk expiry timer was not properly disabled
mmc: msm_sdcc: Reduce command timeouts and improve reliability.
mmc: msm_sdcc: Schedule clock disable after probe
mmc: msm_sdcc: Wrap readl/writel calls with appropriate clk delays
mmc: msm_sdcc: Driver clocking/irq improvements
msm: Add 'execute' datamover callback
mmc: msm_sdcc: Snoop SDIO_CCCR_ABORT register
mmc: msm_sdcc: Clean up clock management and add a 10us delay after enabling clocks
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Signed-off-by: Dmitry Shmidt <dimitrysh@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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msmsdcc_enable_clocks() was incorrectly being called depending on
the state of host->clks_on. This means the busclk idle timer was never
being deleted if the clock was already on.. Bogus.
Also fixes a possible double clk disable if the call to
del_timer_sync() in msmsdcc_disable_clocks() raced with
the busclk timer.
Signed-off-by: San Mehat <san@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Signed-off-by: San Mehat <san@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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timer won't fire
Signed-off-by: San Mehat <san@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Signed-off-by: San Mehat <san@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Signed-off-by: San Mehat <san@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Signed-off-by: San Mehat <san@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Signed-off-by: San Mehat <san@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Signed-off-by: San Mehat <san@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Based on an original patch by Brent DeGraaf:
"Previous versions of the SD driver were beset with excessive command
timeouts. These timeouts were silent by default, but happened
frequently, especially during heavy system activity and concurrent
access of two or more SD devices. Worst case, these timeouts would
occasionally hit at the end of a successful write, resulting in false
failures that could adversely affect journaling file systems if timing
was unfortunate. This update tightens the association and timing between
dma transfers and the commands that trigger them by utilizing a new api
implemented in the datamover. In addition, it also fixes a dma cache
coherency issue that was exposed during testing of this fix that
occasionally resulted in card corruption. Processing of results in the
interrupt status routine was modified to process command results prior to
data because overwritten command results were observed during testing
since the data section can result in command issuances of its own.
This change also eliminates the software command timeout, relying entirely
on the hardware version, since the software timeout was found to cause
problems of its own after extensive testing (having hardware timer and
software timers addressing the same issue was found to cause a race
condition under heavy system load)."
This change originally added PROG_DONE handling, which has been split out
into a separate patch. Also on our platform, the data mover driver maintains
coherency to ensure API reliability, so the above mentioned cache corruption
issue was not an issue for us.
Signed-off-by: San Mehat <san@google.com>
Cc: Brian Swetland <swetland@google.com>
Change-Id: Ifbf17cfafb858106d73bf49af52b5161a265a484
Signed-off-by: San Mehat <san@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Signed-off-by: San Mehat <san@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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As it turns out, all sdcc register writes must be delayed by at
least 3 core clock cycles for the writes to take effect. *sigh*
Also removes the 30us constant delay on clock enable in favor
of a 3 core clock delay.
Signed-off-by: San Mehat <san@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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- Clocks are now disabled after 1 second of inactivity
- Fixed issue which was causing us to loop through our ISR twice
- Bump core clock enable delay to 30us
Signed-off-by: San Mehat <san@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Based on a patch from Brent DeGraaf:
"The datamover supports channels which can be shared amongst devices.
As a result, the actual data transfer may occur some time after the
request is queued up. Some devices such as mmc host controllers
will timeout if a command is issued too far in advance of the actual
transfer, so if dma to other devices on the same channel is already
in progress or queued up, the added delay can cause pending transfers
to fail before they start. This change extends the api to allow a
user callback to be invoked just before the actual transfer takes
place, thus allowing actions directly associated with the dma
transfer, such as device commands, to be invoked with precise timing.
Without this mechanism, there is no way for a driver to realize
this timing. Also adds a user pointer to the command structure for use
by the caller to reference information that may be needed by the
callback routine for proper identification and processing associated
with that specific request. This change is necessary to fix problems
associated with excessive command timeouts and race conditions in the
mmc driver."
This patch also fixes all the callers of msm_dmov_enqueue_cmd() to
ensure their callback function is NULL.
Signed-off-by: San Mehat <san@google.com>
Cc: Brent DeGraaf <bdegraaf@quicinc.com>
Cc: Brian Swetland <swetland@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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Signed-off-by: San Mehat <san@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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clocks
It appears that in some cases there may be a delay on the ARM9 in enabling our clock.
As a result, we may put the controller into a bad state. Delay 10us after enabling
clocks to let the peripheral settle. Note - this is all imperical.
Also ensure set_ios() callback grabs the host lock.
Signed-off-by: San Mehat <san@google.com>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
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* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (224 commits)
ARM: remove 'select GENERIC_TIME'
ARM: 6136/1: ARCH_REQUIRE_GPIOLIB selects GENERIC_GPIO
ARM: 6074/1: oprofile: convert from sysdev to platform device
ARM: 6073/1: oprofile: remove old files and update KConfig
ARM: 6072/1: oprofile: use perf-events framework as backend
ARM: 6071/1: perf-events: allow modules to query the number of hardware counters
ARM: 6070/1: perf-events: add support for xscale PMUs
ARM: 6069/1: perf-events: use numeric ID to identify PMU
ARM: 6064/1: pmu: register IRQs at runtime
ARM: Optionally allow ARMv6 to use 'normal, bufferable' memory for DMA
ARM: 6134/1: Handle instruction cache maintenance fault properly
ARM: nwfpe: allow debugging output to be configured at runtime
ARM: rename mach_cpu_disable() to platform_cpu_disable()
ARM: 6132/1: PL330: Add common core driver
ARM: 6094/1: Extend cache-l2x0 to support the 16-way PL310
ARM: Move memory mapping into mmu.c
ARM: Ensure meminfo is sorted prior to sanity_check_meminfo
ARM: Remove useless linux/bootmem.h includes
ARM: convert /proc/cpu/aligment to seq_file
arm: use asm-generic/scatterlist.h
...
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Conflicts:
arch/arm/Kconfig
arch/arm/include/asm/system.h
arch/arm/mm/Kconfig
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delay_detect in HZ is confusing, convert it to be millisecond based. And
thus remove those unnecessary call to msecs_to_jiffies() at runtime for
this field. Other constants are converted assuming HZ == 100, which are
basically true for those platforms.
The assignment in csb726.c was incorrect, and is fixed in this patch as
a result.
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Marc Zyngier <maz@misterjones.org>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Mike Rapoport <mike@compulab.co.il>
Acked-by: Daniel Mack <daniel@caiaq.de>
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This introduce the field f_max into the mmci_platform_data,
making it possible to pass in a desired block clocking frequency
from a board configuration. This is often more desirable than
using a module parameter. We keep the module parameter as a
fallback as well as the default frequency specified for this
parameter if a parameter is not provided.
This also adds some kerneldoc style documentation to the
platform data struct in mmci.h.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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