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* arch/tile: support 4KB page size as well as 64KBChris Metcalf2011-03-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | The Tilera architecture traditionally supports 64KB page sizes to improve TLB utilization and improve performance when the hardware is being used primarily to run a single application. For more generic server scenarios, it can be beneficial to run with 4KB page sizes, so this commit allows that to be specified (by modifying the arch/tile/include/hv/pagesize.h header). As part of this change, we also re-worked the PTE management slightly so that PTE writes all go through a __set_pte() function where we can do some additional validation. The set_pte_order() function was eliminated since the "order" argument wasn't being used. One bug uncovered was in the PCI DMA code, which wasn't properly flushing the specified range. This was benign with 64KB pages, but with 4KB pages we were getting some larger flushes wrong. The per-cpu memory reservation code also needed updating to conform with the newer percpu stuff; before it always chose 64KB, and that was always correct, but with 4KB granularity we now have to pay closer attention and reserve the amount of memory that will be requested when the percpu code starts allocating. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: fix some comments and whitespaceChris Metcalf2011-03-10
| | | | | | | | This is a grab bag of changes with no actual change to generated code. This includes whitespace and comment typos, plus a couple of stale comments being removed. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: stop disabling INTCTRL_1 interrupts during hypervisor downcallsChris Metcalf2011-03-01
| | | | | | | | | | | | | | | | | | | The problem was that this could lead to IPIs being disabled during the softirq processing after a hypervisor downcall (e.g. for I/O), since both IPI and device interrupts use the INCTRL_1 downcall mechanism. When this happened at the wrong time, it could lead to deadlock. Luckily, we were already maintaining the per-interrupt state we need, and using it in the proper way in the hypervisor, so all we had to do was to change Linux to stop blocking downcall interrupts for the entire length of the downcall. (Now they're blocked while we're executing the downcall routine itself, but not while we're executing any subsequent softirq routines.) The hypervisor is doing a very small amount of work it no longer needs to do (masking INTCTRL_1 on entry to the client interrupt routine), but doing so means that older versions of Tile Linux will continue to work with a current hypervisor, so that seems reasonable. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: handle rt_sigreturn() more cleanlyChris Metcalf2010-12-17
| | | | | | | | | | | | | | | | | | | | | | | | | The current tile rt_sigreturn() syscall pattern uses the common idiom of loading up pt_regs with all the saved registers from the time of the signal, then anticipating the fact that we will clobber the ABI "return value" register (r0) as we return from the syscall by setting the rt_sigreturn return value to whatever random value was in the pt_regs for r0. However, this breaks in our 64-bit kernel when running "compat" tasks, since we always sign-extend the "return value" register to properly handle returned pointers that are in the upper 2GB of the 32-bit compat address space. Doing this to the sigreturn path then causes occasional random corruption of the 64-bit r0 register. Instead, we stop doing the crazy "load the return-value register" hack in sigreturn. We already have some sigreturn-specific assembly code that we use to pass the pt_regs pointer to C code. We extend that code to also set the link register to point to a spot a few instructions after the usual syscall return address so we don't clobber the saved r0. Now it no longer matters what the rt_sigreturn syscall returns, and the pt_regs structure can be cleanly and completely reloaded. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: enable single-step support for TILE-GxChris Metcalf2010-10-15
| | | | | | | | | This is not quite the complete support, since we're not yet shipping intvec_64.S, but it is the support relevant to the set of files we are currently shipping, and makes it easier to track changes between our internal sources and our public GIT repository. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: parameterize system PLs to support KVM portChris Metcalf2010-10-15
| | | | | | | | | While not a port to KVM (yet), this change modifies the kernel to be able to build either at PL1 or at PL2 with a suitable config switch. Pushing up this change avoids handling branch merge issues going forward with the KVM work. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: change lower bound on syscall error return to -4095Chris Metcalf2010-10-14
| | | | | | | | | Previously we were using -1023, which is fine for normal syscall error returns, but the common value in use for other platforms is -4095, and one Tilera-specific driver does use values in the -1100 range, so tickled this bug. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: update some comments to clarify register usage.Chris Metcalf2010-10-14
| | | | Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: Use <asm-generic/syscalls.h>Chris Metcalf2010-10-14
| | | | | | | | | | | | | | With this change we now include <asm-generic/syscalls.h> into the "tile" version of the header. To take full advantage of the prototypes there, we also change our naming convention for "struct pt_regs *" syscalls so that, e.g., _sys_execve() is the "true" syscall entry, which sets the appropriate register to point to the pt_regs before calling sys_execve(). While doing this I realized I no longer needed the fork and vfork entry point stubs, since those functions aren't in the generic syscall ABI, so I removed them as well. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: remove dead code from intvec_32.SChris Metcalf2010-09-24
| | | | | | | | | | | | | | | | This "bpt_code" instruction was killed off in our development line a while ago (the actual definition of bpt_code that is used is in kernel/traps.c) but I didn't push it for 2.6.36 because it seemed harmless and I didn't want to try to push more than absolutely necessary. However, we recently fixed a bug in our gcc that had been causing "-gdwarf2" not to be passed to the assembler, and passing this flag causes an erroneous assembler failure in the presence of code in a data section, sometimes. While we'd like to track down the bug in the assembler, we'd also like to make sure 2.6.36 builds with the current toolchain, so I'm removing this dead code as well. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: extend syscall ABI to set r1 on return as well.Chris Metcalf2010-08-13
| | | | | | | | | | | | | | | | | | Until now, the tile architecture ABI for syscall return has just been that r0 holds the return value, and an error is only signalled like it is for kernel code, with a negative small number. However, this means that in multiple places in userspace we end up writing the same three-cycle idiom that tests for a small negative number for error. It seems cleaner to instead move that code into the kernel, and set r1 to hold zero on success or errno on failure; previously, r1 was just zeroed on return from the kernel (to avoid leaking kernel state). This way a single conditional branch after the syscall is sufficient to test for the failure case. The number of cycles taken is the same, but the error-checking code is in just one place, so total code size is smaller, and random userspace syscall code is easier to understand. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: Add driver to enable access to the user dynamic network.Chris Metcalf2010-07-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This network (the "UDN") connects all the cpus on the chip in a wormhole-routed dynamic network. Subrectangles of the chip can be allocated by a "create" ioctl on /dev/hardwall, and then to access the UDN in that rectangle, tasks must perform an "activate" ioctl on that same file object after affinitizing themselves to a single cpu in the region. Sending a wormhole-routed message that tries to leave that subrectangle causes all activated tasks to receive a SIGILL (just as they would if they tried to access the UDN without first activating themselves to a hardwall rectangle). The original submission of this code to LKML had the driver instantiated under /proc/tile/hardwall. Now we just use a character device for this, conventionally /dev/hardwall. Some futures planning for the TILE-Gx chip suggests that we may want to have other types of devices that share the general model of "bind a task to a cpu, then 'activate' a file descriptor on a pseudo-device that gives access to some hardware resource". As such, we are using a device rather than, for example, a syscall, to set up and activate this code. As part of this change, the compat_ptr() declaration was fixed and used to pass the compat_ioctl argument to the normal ioctl. So far we limit compat code to 2GB, so the difference between zero-extend and sign-extend (the latter being correct, eventually) had been overlooked. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* arch/tile: core support for Tilera 32-bit chips.Chris Metcalf2010-06-04
This change is the core kernel support for TILEPro and TILE64 chips. No driver support (except the console driver) is included yet. This includes the relevant Linux headers in asm/; the low-level low-level "Tile architecture" headers in arch/, which are shared with the hypervisor, etc., and are build-system agnostic; and the relevant hypervisor headers in hv/. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Reviewed-by: Paul Mundt <lethal@linux-sh.org>