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* | | | | sh: Fix up clockevents broadcasting.Paul Mundt2009-08-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes up the clockevents broadcasting code as detailed in commit ee348d5a1d810bc9958cabb7c27302aab235d36e ("[ARM] realview: fix broadcast tick support"). This saves us from having to do strange ordering things with the broadcast clockevent device, relying on the rating instead. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | | Merge branch 'master' into sh/cachetlbPaul Mundt2009-08-18
|\| | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/sh/kernel/Makefile_64
| * | | | sh: clkfwk: Support additional IFC divisor on SH7724.Kuninori Morimoto2009-08-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the FRQCRA.IFC divisor values for SH7724. Despite not being initially documented, the / 3 mode is also support for the IFC division. Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: Add a few missing irqflags tracing markers.Matt Fleming2009-08-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | save_regs contains an SR modification without an irqflags annotation, which resulted in a missing TRACE_IRQS_OFF in the interrupt exception path on SH-3/SH4. I've also moved the TRACE_IRQS_OFF/ON annotation when returning from the interrupt to just before we call __restore_all. This seems like the most logical place to put this because the annotation is for when we restore the SR register so we should delay the annotation until as last as possible. We were also missing a TRACE_IRQS_OFF in resume_kernel when CONFIG_PREEMPT is enabled. The end result is that this fixes up the lockdep engine debugging support with CONFIG_PREEMPT enabled on all SH-3/4 parts. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: SuperH Mobile Software Standby support for cpuidleMagnus Damm2009-08-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds "SuperH Mobile Standby Mode [SF]" to the list of cpuidle sleep modes. If the software latency requirements from cpuidle are met together with fulfilled hardware requirements then deep sleep modes can be entered. Tested on sh7722 and sh7724 with "Sleep Mode", "Sleep Mode + SF" and "Software Standby Mode + SF" together with a multimedia work load and flood ping without packet drop. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | | sh: rework SuperH Mobile sleep code exception handlingMagnus Damm2009-08-17
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the exception handling in the sleep code for SuperH Mobile. With the patch applied the sleep code always rewrites the VBR and resumes from the exception vector, re-initializes hardware and jumps straight to the original interrupt vector. Tested on sh7722 and sh7724 with "Sleep Mode", "Sleep Mode + SF" and "Software Standby Mode + SF" with CONFIG_SUSPEND. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | Merge branch 'sh/stable-updates'Paul Mundt2009-08-14
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| | * | | sh: sh7724 ddr self-refresh changesMagnus Damm2009-08-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the SuperH Mobile sleep assembly code with support for DBSC memory controller found in the sh7724 processor. Without this fix the memory hooked up to the sh7724 processor will never enter self-refresh mode before suspending to ram. The effect of this is that the memory contents most likeley will be lost upon resume which may or may not be what you want. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| | * | | sh: convert processor device setup functions to arch_initcall()Magnus Damm2009-08-12
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the processor platform device setup functions from __initcall() and sometimes device_initcall() to arch_initcall(). This makes sure that the platform devices are registered a bit earlier so the devices are available when drivers register using initcall levels earlier than device_initcall(). A good example is platform devices needed by i2c-sh_mobile.c which registers a bit earlier using subsys_initcall(). Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | sh: delay slot future proofing via EXPMASK on SH-4A parts.Paul Mundt2009-08-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implements EXPMASK initialization code for SH-4A parts, where it is possible to disable compat features that will go away in newer cores. Presently this includes disabling support for non-nop instructions in the rte delay slot, as well as a sleep instruction being placed in a delay slot (neither of which the kernel does any longer). As a result of this, any future offenders will have illegal slot exceptions generated for them. Associative writes for the memory-mapped cache array are still left enabled, until such a point that special cache operations for SH-4A are provided to move off of the current (and rather dated) SH-4 versions. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | sh: Make sure rte delay slots are nopped out on all parts.Paul Mundt2009-08-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Future SH parts do not support any instruction but a nop in the rte delay slot, so make the change for all offending parts. SH-5 is excluded from this, and already has its own set of restrictions with regards to rte delay slot handling. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | sh: Kill off the unhandled pvr case in SH-4 CPU probing.Paul Mundt2009-08-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is superfluous, as the default CPU type and family are already established by the initial cpuinfo definition. Given that we are still able to probe for the CPU family even if we are not able to detect the subtype, it's preferable to let the probing code fill out what it can and leave the rest. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | sh: Track the CPU family in sh_cpuinfo.Paul Mundt2009-08-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a family member to struct sh_cpuinfo, which allows us to fall back more on the probe routines to work out what sort of subtype we are running on. This will be used by the CPU cache initialization code in order to first do family-level initialization, followed by subtype-level optimizations. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | sh: rework nommu for generic cache.c use.Paul Mundt2009-08-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This does a bit of reorganizing for allowing nommu to use the new and generic cache.c, no functional changes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | Merge branch 'master' into sh/cachetlbPaul Mundt2009-08-14
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| * | | sh: Setup the frame register in asm codeMatt Fleming2009-08-13
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | In order to use DWARF unwinder info the frame register has to contain a valid value. Whilst GCC takes care of this for C code, we have to do it ourselves for assembly. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | sh: clean up MSTPCRn register definitionsMagnus Damm2009-08-04
| | | | | | | | | | | | | | | | | | | | | | | | This patch removes the unused MSTPCRn register definitions from the SuperH Mobile code for sh7722, sh7723 and sh7724. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | sh: hwblk support for sh7724Magnus Damm2009-08-04
| | | | | | | | | | | | | | | | | | | | | This patch adds hwblk support for the sh7724 processor. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | sh: convert processor device setup functions to arch_initcall()Magnus Damm2009-07-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the processor platform device setup functions from __initcall() and sometimes device_initcall() to arch_initcall(). This makes sure that the platform devices are registered a bit earlier so the devices are available when drivers register using initcall levels earlier than device_initcall(). A good example is platform devices needed by i2c-sh_mobile.c which registers a bit earlier using subsys_initcall(). Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | usb: m66592-udc platform data on_chip supportMagnus Damm2009-07-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the m66592-udc driver to use the on_chip flag from platform data to enable on chip behaviour instead of relying on CONFIG_SUPERH_BUILT_IN_M66592 ugliness. This makes the code cleaner and also allows us to support both external and internal m66592 with the same kernel. It also makes the Kconfig part more future proof since we with this patch can add support for new processors with on-chip m66592 without modifying the Kconfig. The patch adds a m66592 header file for platform data and ties in platform data to the existing m66592 devices. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | sh: TLB fast path optimizations for load/store exceptions.Paul Mundt2009-08-14
| | | | | | | | | | | | | | | | | | | | | | | | This only bothers with the TLB entry flush in the case of the initial page write exception, as it is unecessary in the case of the load/store exceptions. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | sh: TLB protection violation exception optimizations.Paul Mundt2009-08-14
|/ / | | | | | | | | | | | | | | | | | | This adds a bit of rework to have the TLB protection violations skip the TLB miss fastpath and go directly in to do_page_fault(), as these require slow path handling. Based on an earlier patch by SUGIOKA Toshinobu. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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*-. \ Merge branches 'sh/hwblk' and 'sh/platform-updates'Paul Mundt2009-07-19
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| | * | usb: r8a66597-hcd platform data on_chip supportMagnus Damm2009-07-19
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the r8a66597-hcd driver to use the on_chip flag from platform data to enable on chip behaviour instead of relying on CONFIG_SUPERH_ON_CHIP_R8A66597 ugliness. This makes the code cleaner and also allows us to support both external and internal r8a66597 with the same kernel. It also makes the Kconfig part more future proof since we with this patch can add support for new processors with on-chip r8a66597 without modifying the Kconfig. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | sh: hwblk support for sh7723Magnus Damm2009-07-19
| | | | | | | | | | | | | | | | | | | | | This patch adds hwblk support for the sh7723 processor. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | sh: Add support for multiple hwblk countersMagnus Damm2009-07-19
| | | | | | | | | | | | | | | | | | | | | | | | Extend the SuperH hwblk code to support more than one counter. Contains ground work for the future Runtime PM implementation. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | sh: cpuidle for SuperH Mobile using hwblkMagnus Damm2009-07-04
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds cpuidle support for SuperH Mobile. The sleep mode selected by cpuidle is compared with the mode selected by the hwblk sleep code and the best allowed mode is entered. At this point "Sleep mode" and "Sleep mode + SF" are supported. This code can easily be extended to support "Software suspend mode", but the assembly code must first be updated to avoid loosing interrupts. Also, update the code to only copy the assembly snippet into internal memory once at bootup. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: hwblk for sh7722Magnus Damm2009-07-04
| | | | | | | | | | | | | | | | | | | | | | | | This patch contains the sh7722 specific hwblk implementation. Hwblk ids are added to the processor specific header file, module stop bits and areas are kept track of as hwblks, clocks are converted to make use of the shared hwblk code. Code to determine allowed sleep modes is also added. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: hwblk base implementationMagnus Damm2009-07-04
|/ | | | | | | | | | | | | | | | | | | This patch is the hwblk base implementation, containing structures and shared functions dealing with hardware blocks. A each processor model should provide a list of hwblks and describe which module stop bit that is associated with each hwblck and how the hwblks are grouped together into areas. The shared code keeps track of the usage count for each hwblk and the areas. Fallback implementations for processor specific code are also kept as weak symbols. The clock framework, the runtime pm code and cpuidle will all tie into this hwblk implementation. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: SH7786 SMP support.Paul Mundt2009-06-23
| | | | | | | | | SH7786 is roughly identical to SH-X3 proto SMP, though there are only 2 CPUs. This just wraps in to the existing SH-X3 SMP code with some minor changes for SH7786, including wiring up the IPIs properly, enabling IRQ_PER_CPU, and so forth. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
*---. Merge branches 'sh/pci-express-integration', 'sh/rsk-updates', ↵Paul Mundt2009-06-17
|\ \ \ | | | | | | | | | | | | 'sh/platform-updates' and 'sh/perf_counter'
| | | * sh: add platform data for r8a66597-hcd in setup-sh7723Yoshihiro Shimoda2009-06-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | and remove redundant parameter for r8a66597-hcd. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| | | * sh: add platform data for r8a66597-hcd in setup-sh7366Yoshihiro Shimoda2009-06-17
| | |/ | | | | | | | | | | | | | | | | | | and remove redundant parameter for r8a66597-hcd. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | / sh: use kzalloc() for cpg clocksMagnus Damm2009-06-17
|/ / | | | | | | | | | | | | | | | | Convert the shared clock cpg code from bootmem to slab. Without this patch the current bootmem code triggers WARN_ON() because the slab is available. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* / cpumask: Use accessors for cpu_*_mask: shRusty Russell2009-06-14
|/ | | | | | | | | Use the accessors rather than frobbing bits directly (the new versions are const). Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Mike Travis <travis@sgi.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Tie sparseirq in to Kconfig.Paul Mundt2009-06-11
| | | | | | | | | Now that the dependent patches are merged, we are ready to enable sparseirq support. This simply adds the Kconfig option, and then converts from the _cpu to the _node allocation routines to follow the upstream sparseirq API changes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh7724: Add JPU supportKuninori Morimoto2009-06-11
| | | | | | Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Acked-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh7724: INTC setting updateKuninori Morimoto2009-06-11
| | | | | | | This patch follows Rev 0.50 manual Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh7722 clock framework rewriteMagnus Damm2009-06-11
| | | | | | | | | | | | | | This patch rewrites the sh7722 clock framework code. The new code makes use of the recently merged div4, div6 and mstp32 helper code. Both extal and dll are supported as input clocks to the pll. While at it, now when all SuperH Mobile processors are converted, fix CONFIG_SH_CLK_CPG_LEGACY to depend on CONFIG_ARCH_SHMOBILE. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh7366 clock framework rewriteMagnus Damm2009-06-11
| | | | | | | | | | This patch rewrites the sh7366 clock framework code. The new code makes use of the recently merged div4, div6 and mstp32 helper code. Both extal and dll are supported as input clocks to the pll. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh7343 clock framework rewriteMagnus Damm2009-06-11
| | | | | | | | | | This patch rewrites the sh7343 clock framework code. The new code makes use of the recently merged div4, div6 and mstp32 helper code. Both extal and dll are supported as input clocks to the pll. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh7724 clock framework rewrite V3Magnus Damm2009-06-11
| | | | | | | | | | | This patch contains V3 of the sh7724 clock framework rewrite. The new code makes use of the recently merged div4, div6 and mstp32 helper code. Both extal and fll are supported as input clocks to the pll. The div6 clocks are fed through a divide-by-3 block. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh7723 clock framework rewrite V2Magnus Damm2009-06-11
| | | | | | | | | | This patch contains V2 of the sh7723 clock framework rewrite. The new code makes use of the recently merged div4, div6 and mstp32 helper code. Both extal and dll are supported as input clocks to the pll. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: add enable()/disable()/set_rate() to div6 codeMagnus Damm2009-06-11
| | | | | | | | | | This patch updates the div6 clock helper code to add support for enable(), disable() and set_rate() callbacks. Needed by the camera clock enabling board code on Migo-R. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: rework mode pin codeMagnus Damm2009-06-11
| | | | | | | | | | | | | This patch reworks the mode pin code to keep the pin definitions in one place. The mode pins values are now the value of the bit instead of bit number. With this patch in place the sh7785 header file contains mode pin comments. The sh7785 clock code and the sh7785lcr board code are updated to reflect the new shared mode pins. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: clock div6 helper codeMagnus Damm2009-06-11
| | | | | | | | | | | | This patch adds div6 clock helper code. The div6 clocks are simply 6-bit divide-by-n modules where n is 1 to 64. Needed for vclk on sh7722, sh7723, sh7343 and sh7366. sh7724 needs this even more for vclk, fclka, fclkb, irdaclk and spuclk. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: clock div4 frequency table offset fixMagnus Damm2009-06-11
| | | | | | | | | This patch fixes the per clock offset calculation in sh_clk_div4_register(). Without this patch the offset to the frequency table for each clock is incorrect. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh7723: L2 cache initialization.Kuninori Morimoto2009-06-01
| | | | | Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh7724: L2 cache initialization.Kuninori Morimoto2009-06-01
| | | | | Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: add weak l2_cache_init function.Kuninori Morimoto2009-06-01
| | | | | Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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