Commit message (Collapse) | Author | Age | |
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* | MIPS: Octeon: Update register definitions for CN63XX chips | David Daney | 2010-10-29 |
| | | | | | | | | | | | The CN63XX is a new 6-CPU SOC based on the new OCTEON II CPU cores. Join some lines back together. This makes some of them exceed 80 columns, but they are uninteresting and this unclutters things. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1668/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> | ||
* | MIPS: Octeon: Add hardware RNG platform device. | David Daney | 2009-09-17 |
Add a platform device for the Octeon Random Number Generator (RNG). Signed-off-by: David Daney <ddaney@caviumnetworks.com> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |