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* ARM: perf: add PMUv2 common event definitionsWill Deacon2011-07-07
| | | | | | | | | | | The PMUv2 specification reserves a number of event encodings for common events. This patch adds these events to the common event enumeration in preparation for PMUv2 cores, such as Cortex-A15. Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
* ARM: perf: remove confusing comment from v7 perf events backendWill Deacon2011-07-07
| | | | | | | | | | The comment about measuring TLB misses and refills in the ARMv7 perf backend makes little sense and refers loosely to raw counters that should be used instead. This patch removes the comments to avoid any confusion. Signed-off-by: Will Deacon <will.deacon@arm.com>
* ARM: proc: add proc info for Cortex-A15MP using classic page tablesWill Deacon2011-07-07
| | | | | | | | | | | | Multicore implementations of the Cortex-A15 require bit 6 of the auxiliary control register to be set in order for cache and TLB maintenance operations to be broadcast between CPUs. This patch adds a new proc_info structure for Cortex-A15, which enables the SMP bit during setup and includes the new HWCAP for integer division. Signed-off-by: Will Deacon <will.deacon@arm.com>
* ARM: proc: add Cortex-A5 proc infoPawel Moll2011-07-07
| | | | | | | | This patch adds processor info for ARM Ltd. Cortex A5, which has SCU initialisation procedure identical to A9. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
* ARM: proc: convert v7 proc infos into a common macroPawel Moll2011-07-07
| | | | | | | | | As most of the proc info content is common across all v7 processors, this patch converts existing A9 and generic v7 descriptions into a macro (allowing extra flags in future). Signed-off-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
* ARM: vfp: add VFPv4 capability detection and populate elf_hwcapWill Deacon2011-07-07
| | | | | | | | | | | | The presence of VFPv4 cannot be detected simply by looking at the FPSID subarchitecture field, as a value >= 2 signifies the architecture as VFPv3 or later. This patch reads from MVFR1 to check whether or not the fused multiply accumulate instructions are supported. Since these are introduced with VFPv4, this tells us what we need to know. Signed-off-by: Will Deacon <will.deacon@arm.com>
* ARM: hwcaps: add new HWCAP defines for ARMv7-AWill Deacon2011-07-07
| | | | | | | | | | | | | | | | | | | | | | Modern ARMv7-A cores can optionally implement these new hardware features: - VFPv4: The latest version of the ARMv7 vector floating-point extensions, including hardware support for fused multiple accumulate. D16 or D32 variants may be implemented. - Integer divide: The SDIV and UDIV instructions provide signed and unsigned integer division in hardware. When implemented, these instructions may be available in either both Thumb and ARM, or Thumb only. This patch adds new HWCAP defines to describe these new features. The integer divide capabilities are split into two bits for ARM and Thumb respectively. Whilst HWCAP_IDIVA should never be set if HWCAP_IDIVT is clear, separating the bits makes it easier to interpret from userspace. Signed-off-by: Will Deacon <will.deacon@arm.com>
* ARM: hwcaps: use shifts instead of hardcoded constantsWill Deacon2011-07-07
| | | | | | | | | | The HWCAP numbers are defined as constants, each one being a power of 2. This has become slightly unwieldy now that we have reached 32k. This patch changes the HWCAP defines to use (1 << n) instead of coding the constant directly. The values remain unchanged. Signed-off-by: Will Deacon <will.deacon@arm.com>
* ARM: mm: tlb-v7: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: tlb-v6: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: tlb-v4wbi: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: tlb-v4wb: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: tlb-v4: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: tlb-v3: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: tlb-fa: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-xscale: Use new generic struct definition macrosDave Martin2011-07-07
| | | | | | | | | | | Without this patch, xscale_80200_A0_A1 is missing the icache_flush_all entry, which would result in the wrong functions being called at run-time. This patch re-uses xscale_icache_flush_all for xscale_80200_A0_A1_cache_fns. Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-xsc3: Use new generic struct definition macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-v7: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-v6: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-sa1100: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-sa110: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-mohawk: Use the new processor struct macrosDave Martin2011-07-07
| | | | | | | | | This patch also defines a suitable flush_icache_all implementation which would otherwise be missing, resulting in a link failure. Thanks to Nicolas Pitre for suggesting the code for this. Signed-off-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
* ARM: mm: proc-feroceon: Use the new processor struct macrosDave Martin2011-07-07
| | | | | Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
* ARM: mm: proc-fa526: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-arm9tdmi: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-arm946: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-arm940: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-arm926: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-arm925: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-arm922: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-arm920: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-arm7tdmi: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-arm740: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-arm720: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-arm6_7: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-arm1026: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-arm1022: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-arm1020e: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: proc-arm1020: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: cache-v7: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: cache-v6: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: cache-v4wt: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: cache-v4wb: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: cache-v4: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: cache-v3: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: mm: cache-fa: Use the new processor struct macrosDave Martin2011-07-07
| | | | Signed-off-by: Dave Martin <dave.martin@linaro.org>
* ARM: assembler.h: Add string declaration macroDave Martin2011-07-07
| | | | | | | | | | | | Declaring strings in assembler source involves a certain amount of tedious boilerplate code in order to annotate the resulting symbol correctly. Encapsulating this boilerplate in a macro should help to avoid some duplication and the occasional mistake. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
* ARM: mm: proc-macros: Add generic proc/cache/tlb struct definition macrosDave Martin2011-07-07
| | | | | | | | | | | This patch adds some generic macros to reduce boilerplate when declaring certain common structures in arch/arm/mm/*.S Thanks to Russell King for outlining what the define_processor_functions macro could look like. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
* Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-06-27
|\ | | | | | | | | | | | | | | | | | | | | | | * 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm: ARM: pm: ensure ARMv7 CPUs save and restore the TLS register ARM: pm: proc-v7: fix missing struct processor pointers for suspend code ARM: 6969/1: plat-iop: fix build error ARM: 6961/1: zImage: Add build-time check for correctly-sized proc_type entries ARM: SMP: wait for CPU to be marked active ARM: 6963/1: Thumb-2: Relax relocation requirements for non-function symbols ARM: 6962/1: mach-h720x: fix build error ARM: 6959/1: SMP build fix for entry-macro-multi.S
| * ARM: pm: ensure ARMv7 CPUs save and restore the TLS registerRussell King2011-06-24
| | | | | | | | | | | | | | | | | | Ensure that the TLS register is saved and restored over a suspend cycle, so that userspace programs don't see a corrupted TLS value. Tested-by: Kevin Hilman <khilman@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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