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* ARM: OMAP2+: kconfig: Enable devicetree by default for OMAP2+ systemsBenoit Cousson2011-12-16
| | | | | | | | | | | devicetree will become the mandatory boot method for OMAP2+. In order to avoid cluttering the OMAP code with #ifdef CONFIG_OF, select USE_OF by default for every OMAP2+ systems. Enable PROC_DEVICETREE as well. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* arm/dts: OMAP: Remove bootargs node from board filesBenoit Cousson2011-12-13
| | | | | | | | | | | | Since 3.2, the CONFIG_ARM_ATAG_DTB_COMPAT config allows an old bootloader to still use ATAG to provide cmdline. Remove chosen/bootargs from the DTS board files. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: OMAP2+: board-generic: Add missing handle_irq callbacksBenoit Cousson2011-12-07
| | | | | | | | | | | | | | | The following commit: 6b2f55d7851aa358d3a99cff344c560c4967f042, is adding the support for the CONFIG_MULTI_IRQ_HANDLER but did not update all the machine descriptors supported in the DT board-generic.c file. It thus break the DT boot on OMAP3 and OMAP4 boards. Add the proper handle_irq callbacks for OMAP3 and OMAP4 generic machine descriptors. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: 7194/1: OMAP: Fix build after a merge between v3.2-rc4 and ARM restart ↵Tony Lindgren2011-12-06
| | | | | | | | | | | changes ARM restart changes needed changes to common.h to make it local. This conflicted with v3.2-rc4 DSS related hwmod changes that git mergetool was not able to handle. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7192/1: OMAP: Fix build error for omap1_defconfigTony Lindgren2011-12-06
| | | | | | | | | | | Otherwise we get the following error: In function 'omap_init_consistent_dma_size': error: implicit declaration of function 'init_consistent_dma_size' Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'vmalloc' of git://git.linaro.org/people/nico/linux into ↵Russell King2011-12-05
|\ | | | | | | devel-stable
| * ARM: move VMALLOC_END down temporarily for shmobileNicolas Pitre2011-11-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | THIS IS A TEMPORARY HACK. The purpose of this is _only_ to avoid a regression on an existing machine while a better fix is implemented. On shmobile the consistent DMA memory area was set to 158MB in commit 28f0721a79 with no explanation. The documented size for this area should vary between 2MB and 14MB, and none of the other ARM targets exceed that. The included #warning is therefore meant to be noisy on purpose to get shmobile maintainers attention and this commit reverted once this consistent DMA size conflict is resolved. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: Magnus Damm <damm@opensource.se> Cc: Paul Mundt <lethal@linux-sh.org>
| * ARM: big removal of now unused vmalloc.h filesNicolas Pitre2011-11-26
| | | | | | | | Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * ARM: add generic ioremap optimization by reusing static mappingsNicolas Pitre2011-11-26
| | | | | | | | | | | | | | | | | | | | | | | | Now that we have all the static mappings from iotable_init() located in the vmalloc area, it is trivial to optimize ioremap by reusing those static mappings when the requested physical area fits in one of them, and so in a generic way for all platforms. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Stephen Warren <swarren@nvidia.com> Tested-by: Kevin Hilman <khilman@ti.com> Tested-by: Jamie Iles <jamie@jamieiles.com>
| * ARM: simplify __iounmap() when dealing with section based mappingNicolas Pitre2011-11-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Firstly, there is no need to have a double pointer here as we're only walking the vmlist and not modifying it. Secondly, for the same reason, we don't need a write lock but only a read lock here, since the lock only protects the coherency of the list nothing else. Lastly, the reason for holding a lock is not what the comment says, so let's remove that misleading piece of information. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * ARM: move iotable mappings within the vmalloc regionNicolas Pitre2011-11-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to remove the build time variation between different SOCs with regards to VMALLOC_END, the iotable mappings are now allocated inside the vmalloc region. This allows for VMALLOC_END to be identical across all machines. The value for VMALLOC_END is now set to 0xff000000 which is right where the consistent DMA area starts. To accommodate all static mappings on machines with possible highmem usage, the default vmalloc area size is changed to 240 MB so that VMALLOC_START is no higher than 0xf0000000 by default. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Stephen Warren <swarren@nvidia.com> Tested-by: Kevin Hilman <khilman@ti.com> Tested-by: Jamie Iles <jamie@jamieiles.com>
| * ARM: move initialization of the high_memory variable earlierNicolas Pitre2011-11-18
| | | | | | | | | | | | | | | | | | | | | | Some upcoming changes must know the VMALLOC_START value, which is based on high_memory, before bootmem_init() is called. The best location to set it is in sanity_check_meminfo() where the needed computation is already done, and in the non MMU case it is trivial to do now that the meminfo array is already sorted at that point. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * ARM: sort the meminfo array earlierNicolas Pitre2011-11-18
| | | | | | | | | | | | | | | | | | | | | | | | | | The meminfo array has to be sorted before sanity_check_meminfo() in arch/arm/mm/mmu.c is called for it to work properly. This also allows for a simpler find_limits() in arch/arm/mm/init.c. The sort is moved to arch/arm/kernel/setup.c because that's where the meminfo array is populated. Eventually this should be improved upon to make the memory bank parser a bit more robust against problems such as overlapping memory ranges. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * ARM: realview-eb11mp: fix map_desc alignmentRob Herring2011-11-18
| | | | | | | | | | | | | | | | | | REALVIEW_EB11MP_GIC_CPU_BASE is not 4KB aligned which causes an overlapping mapping. Use REALVIEW_EB11MP_SCU_BASE instead which is aligned. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * ARM: realview: fix map_desc alignmentRob Herring2011-11-18
| | | | | | | | | | | | | | | | | | REALVIEW_PBX_TILE_GIC_CPU_BASE is not 4KB aligned which causes an overlapping mapping. Use REALVIEW_PBX_TILE_SCU_BASE instead which is aligned. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * ARM: versatile: remove overlapping map_desc entryRob Herring2011-11-18
| | | | | | | | | | | | | | | | The map_desc for VERSATILE_GPIO0_BASE overlaps with VERSATILE_SCTL_BASE. The overlapping entry can be removed. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * ARM: plat-iop: remove arch specific special handling for ioremapNicolas Pitre2011-11-18
| | | | | | | | | | | | A generic version should replace this later. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * ARM: mach-ixp23xx: remove arch specific special handling for ioremapNicolas Pitre2011-11-18
| | | | | | | | | | | | | | A generic version should replace this later. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Deepak Saxena <dsaxena@linaro.org>
| * ARM: mach-kirkwood: remove arch specific special handling for ioremapNicolas Pitre2011-11-18
| | | | | | | | | | | | A generic version should replace this later. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * ARM: mach-orion5x: remove arch specific special handling for ioremapNicolas Pitre2011-11-18
| | | | | | | | | | | | A generic version should replace this later. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * ARM: mach-bcmring: use proper constant to identify DMA memory areaNicolas Pitre2011-11-18
| | | | | | | | | | | | | | Using VMALLOC_END implies a presumption about the layout which is best avoided, even if in practice this would not change much. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * ARM: plat-omap: remove arch specific special handling for ioremapNicolas Pitre2011-11-18
| | | | | | | | | | | | | | | | | | | | A generic version should replace this later. As io.c has become nearly empty, omap_init_consistent_dma_size() is moved into common.c so that io.c can be removed entirely. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Kevin Hilman <khilman@ti.com>
| * ARM: mach-tegra: remove arch specific special handling for ioremapNicolas Pitre2011-11-16
| | | | | | | | | | | | | | A generic version should replace this later. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Stephen Warren <swarren@nvidia.com>
| * ARM: mach-davinci: remove arch specific special handling for ioremapNicolas Pitre2011-11-15
| | | | | | | | | | | | A generic version should replace this later. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * ARM: mach-at91: remove arch specific special handling for ioremapNicolas Pitre2011-11-15
| | | | | | | | | | | | A generic version should replace this later. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * ARM: plat-mxc: remove inclusion of <mach/vmalloc.h>Nicolas Pitre2011-11-15
| | | | | | | | Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
| * ARM: mach-prima2: don't define SIRFSOC_VA in terms of VMALLOC_ENDNicolas Pitre2011-11-15
| | | | | | | | | | | | | | ... since it is going to change. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by: Barry Song <baohua.song@csr.com>
| * ARM: mach-dove: remove inclusion of <mach/vmalloc.h>Nicolas Pitre2011-11-15
| | | | | | | | | | | | This include is unnecessary. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
* | Merge branch 'for-rmk' of ↵Russell King2011-12-05
|\ \ | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable Conflicts: arch/arm/common/gic.c arch/arm/plat-omap/include/plat/common.h
| | \
| | \
| *-. \ Merge branches 'perf/event-nos', 'perf/updates' and 'perf/omap4' into for-rmkWill Deacon2011-12-02
| |\ \ \
| | | * | arm: pmu: allow platform specific irq enable/disable handlingMing Lei2011-12-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces .enable_irq and .disable_irq into struct arm_pmu_platdata, so platform specific irq enablement can be handled after request_irq, and platform specific irq disablement can be handled before free_irq. This patch is for support of pmu irq routed from CTI on omap4. Acked-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Ming Lei <ming.lei@canonical.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| | | * | arm: introduce cross trigger interface helpersMing Lei2011-12-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4 uses cross trigger interface(CTI) to route performance monitor irq to GIC, so introduce cti helpers to make access for cti easily. Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Ming Lei <ming.lei@canonical.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| | * | | ARM: perf: remove unused armpmu_get_max_eventsWill Deacon2011-12-02
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | armpmu_get_max_events is only called from perf_num_counters, so we can inline it there. It existed as a separate entity as a hangover from the original perf-based oprofile implementation. Signed-off-by: Will Deacon <will.deacon@arm.com>
| * | | ARM: perf: add support for stalled cycle ABI eventsWill Deacon2011-12-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8f622422 ("perf events: Add generic front-end and back-end stalled cycle event definitions") added two new ABI events for counting stalled cycles. This patch adds support for these new events to the ARM perf implementation. Cc: Jamie Iles <jamie@jamieiles.com> Cc: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| * | | ARM: perf: clean and update ARMv7 event numbersWill Deacon2011-12-02
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the ARMv7 perf event numbers so that: (1) A consistent naming scheme is used between different CPUs. (2) Only events actually used by Linux are described. (3) Where possible, architected events are used in preference to CPU-specific events. This results in the removal of a load of unused, hardcoded data and makes it more clear as to which events are supported on each PMU. Cc: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| * | Merge branch 'fixes' of ↵Linus Torvalds2011-12-01
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm * 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: ARM: 7182/1: ARM cpu topology: fix warning ARM: 7181/1: Restrict kprobes probing SWP instructions to ARMv5 and below ARM: 7180/1: Change kprobes testcase with unpredictable STRD instruction ARM: 7177/1: GIC: avoid skipping non-existent PPIs in irq_start calculation ARM: 7176/1: cpu_pm: register GIC PM notifier only once ARM: 7175/1: add subname parameter to mfp_set_groupg callers ARM: 7174/1: Fix build error in kprobes test code on Thumb2 kernels ARM: 7172/1: dma: Drop GFP_COMP for DMA memory allocations ARM: 7171/1: unwind: add unwind directives to bitops assembly macros ARM: 7170/2: fix compilation breakage in entry-armv.S ARM: 7168/1: use cache type functions for arch_get_unmapped_area ARM: perf: check that we have a platform device when reserving PMU ARM: 7166/1: Use PMD_SHIFT instead of PGDIR_SHIFT in dma-consistent.c ARM: 7165/2: PL330: Fix typo in _prepare_ccr() ARM: 7163/2: PL330: Only register usable channels ARM: 7162/1: errata: tidy up Kconfig options for PL310 errata workarounds ARM: 7161/1: errata: no automatic store buffer drain ARM: perf: initialise used_mask for fake PMU during validation ARM: PMU: remove pmu_init declaration ARM: PMU: re-export release_pmu symbol to modules
| | * | ARM: 7182/1: ARM cpu topology: fix warningVincent Guittot2011-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | kernel/sched.c:7354:2: warning: initialization from incompatible pointer type Align cpu_coregroup_mask prototype interface with sched_domain_mask_f typedef use int cpu instead of unsigned int cpu Cc: <stable@vger.kernel.org> Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7181/1: Restrict kprobes probing SWP instructions to ARMv5 and belowJon Medhurst (Tixy)2011-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SWP instruction is deprecated on ARMv6 and with ARMv7 it will be UNDEFINED when CONFIG_SWP_EMULATE is selected. In this case, probing a SWP instruction will cause an oops when the kprobes emulation code executes an undefined instruction. As the SWP instruction should be rare or non-existent in kernels for ARMv6 and later, we can simply avoid these problems by not allowing probing of these. Reported-by: Leif Lindholm <leif.lindholm@arm.com> Tested-by: Leif Lindholm <leif.lindholm@arm.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7180/1: Change kprobes testcase with unpredictable STRD instructionJon Medhurst (Tixy)2011-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a kprobes testcase for the instruction "strd r2, [r3], r4". This has unpredictable behaviour as it uses r3 for register writeback addressing and also stores it to memory. On a cortex A9, this testcase would fail because the instruction writes the updated value of r3 to memory, whereas the kprobes emulation code writes the original value. Fix this by changing testcase to used r5 instead of r3. Reported-by: Leif Lindholm <leif.lindholm@arm.com> Tested-by: Leif Lindholm <leif.lindholm@arm.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7177/1: GIC: avoid skipping non-existent PPIs in irq_start calculationWill Deacon2011-11-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 4294f8baa ("ARM: gic: add irq_domain support") defines irq_start as irq_start = (irq_start & ~31) + 16; On a platform with a GIC and a CPU without PPIs, this results in irq_start being off by 16. This patch fixes gic_init so that we only carve out a PPI space when PPIs exist for the GIC being initialised. Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7176/1: cpu_pm: register GIC PM notifier only onceMarc Zyngier2011-11-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When multiple GICs exist on a platform (RealView PB1176/11MP), we must make sure the PM notifier block is only registered once, otherwise we end up corrupting the PM notifier list. The fix is to only register the notifier when initializing the first GIC, as the power management functions seem to iterate over all the registered GICs. Tested on PB11MP and PB1176. Reported-by: Will Deacon <will.deacon@arm.com> Tested-by: Will Deacon <will.deacon@arm.com> Cc: Colin Cross <ccross@android.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7174/1: Fix build error in kprobes test code on Thumb2 kernelsJon Medhurst2011-11-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When compiling kprobes-test-thumb.c an error like below may occur: /tmp/ccKcuJcG.s:19179: Error: offset out of range This is caused by the compiler underestimating the size of the inline assembler instructions containing ".space 0x1000" and failing to spill the literal pool in time to prevent the generation of PC relative load instruction with invalid offsets. The fix implemented by this patch is to replace a single large .space directive by a number of 4 byte .space's. This requires splitting the macros which generate test cases for branch instructions into two forms: one with, and one without support for inserting extra code between branch and target. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Jon Medhurst <jon.medhurst@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7172/1: dma: Drop GFP_COMP for DMA memory allocationsSumit Bhattacharya2011-11-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dma_alloc_coherent wants to split pages after allocation in order to reduce the memory footprint. This does not work well with GFP_COMP pages, so drop this flag before allocation. This patch is ported from arch/avr32 (commit 3611553ef985ef7c5863c8a94641738addd04cff). [swarren: s/HUGETLB_PAGE/HUGETLBFS/ in comment, minor comment cleanup] Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7171/1: unwind: add unwind directives to bitops assembly macrosWill Deacon2011-11-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bitops functions (e.g. _test_and_set_bit) on ARM do not have unwind annotations and therefore the kernel cannot backtrace out of them on a fatal error (for example, NULL pointer dereference). This patch annotates the bitops assembly macros with UNWIND annotations so that we can produce a meaningful backtrace on error. Callers of the macros are modified to pass their function name as a macro parameter, enforcing that the macros are used as standalone function implementations. Acked-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7170/2: fix compilation breakage in entry-armv.SGuennadi Liakhovetski2011-11-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix compilation failure, when Thumb support is not enabled: arch/arm/kernel/entry-armv.S: Assembler messages: arch/arm/kernel/entry-armv.S:501: Error: backward ref to unknown label "2:" arch/arm/kernel/entry-armv.S:502: Error: backward ref to unknown label "3:" make[2]: *** [arch/arm/kernel/entry-armv.o] Error 1 Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Reviewed-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 7168/1: use cache type functions for arch_get_unmapped_areaRob Herring2011-11-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are already cache type decoding functions, so use those instead of custom decode code which only works for ARMv6. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | Merge branch 'for-rmk' of ↵Russell King2011-11-22
| | |\ \ | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into fixes
| | | * | ARM: perf: check that we have a platform device when reserving PMUWill Deacon2011-11-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Attempting to use a hardware counter on a platform with a supported PMU but where the platform_device (defining the interrupts) has not been registered results in a NULL pointer dereference. This patch fixes the problem by checking that we actually have a platform device registered before attempting to grab the interrupts. Reported-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| | | * | ARM: perf: initialise used_mask for fake PMU during validationWill Deacon2011-11-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When validating an event group, we call pmu->get_event_idx for each group member in order to check that the group can be scheduled as a unit on an empty PMU. As a result of 3fc2c830 ("ARM: perf: remove event limit from pmu_hw_events"), the used_mask member of struct cpu_hw_events must be setup explicitly, something which we don't do for the fake cpu_hw_events used for validation. This patch sets up an empty used_mask for the fake validation cpu_hw_events, preventing NULL deferences when trying to get the event index. Reported-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
| | | * | ARM: PMU: remove pmu_init declarationWill Deacon2011-11-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pmu_init no longer exists, so don't declare it in asm/pmu.h. Reported-by: Pawel Moll <Pawel.Moll@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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