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* [ARM] 5431/1: scoop: completely drop old-style SCOOP GPIO accessorsDmitry Baryshkov2009-03-25
| | | | | | | | Now, as all places that use Scoop GPIO have been converted to use GPIO API, drop old-style accessors completely. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5430/1: collie_pm: use new GPIO API to control chargerDmitry Baryshkov2009-03-25
| | | | | Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5429/1: collie: start scoop converton to new apiDmitry Baryshkov2009-03-25
| | | | | | | | Start converting scoop gpio access to new API instead of old deprecated one. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge git://git.marvell.com/orion into develRussell King2009-03-25
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| * [ARM] orion5x: update of FPGA ID's for the TS-78xxAlexander Clouter2009-03-23
| | | | | | | | | | | | | | | | | | | | Received official word finally from Technological Systems on which FPGA ID's they have released unto the world. Also an additional of a dummy entry matching the FPGA ID of the Verilog template on our wiki. Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] Kirkwood: Add support for QNAP TS-119/TS-219 Turbo NASMartin Michlmayr2009-03-23
| | | | | | | | | | | | | | Add support for the QNAP TS-119 and TS-219 Turbo NAS devices. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] update mach-typesNicolas Pitre2009-03-23
| | | | | | | | Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] Kirkwood: More consistency regarding MPP namingMartin Michlmayr2009-03-23
| | | | | | | | | | | | | | With the exception of UART0, all MPP names are uppercase. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * [ARM] Kirkwood: Hook up I2CMartin Michlmayr2009-03-23
| | | | | | | | | | | | | | | | Hook up I2C on Marvell Kirkwood. Tested on a QNAP TS-219 which has RTC connected through I2C. Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
* | Merge branch 'highmem' into develRussell King2009-03-24
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| * | [ARM] add CONFIG_HIGHMEM optionNicolas Pitre2009-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Here it is... HIGHMEM for the ARM architecture. :-) If you don't have enough ram for highmem pages to be allocated and still want to test this, then the cmdline option "vmalloc=" can be used with a value large enough to force the highmem threshold down. Successfully tested on a Marvell DB-78x00-BP Development Board with 2 GB of RAM. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] ignore high memory with VIPT aliasing cachesNicolas Pitre2009-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | VIPT aliasing caches have issues of their own which are not yet handled. Usage of discard_old_kernel_data() in copypage-v6.c is not highmem ready, kmap/fixmap stuff doesn't take account of cache colouring, etc. If/when those issues are handled then this could be reverted. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] xsc3: add highmem support to L2 cache handling codeNicolas Pitre2009-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On xsc3, L2 cache ops are possible only on virtual addresses. The code is rearranged so to have a linear progression requiring the least amount of pte setups in the highmem case. To protect the virtual mapping so created, interrupts must be disabled currently up to a page worth of address range. The interrupt disabling is done in a way to minimize the overhead within the inner loop. The alternative would consist in separate code for the highmem and non highmem compilation which is less preferable. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] Feroceon: add highmem support to L2 cache handling codeNicolas Pitre2009-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The choice is between looping over the physical range and performing single cache line operations, or to map highmem pages somewhere, as cache range ops are possible only on virtual addresses. Because L2 range ops are much faster, we go with the later by factoring the physical-to-virtual address conversion and use a fixmap entry for it in the HIGHMEM case. Possible future optimizations to avoid the pte setup cost: - do the pte setup for highmem pages only - determine a threshold for doing a line-by-line processing on physical addresses when the range is small Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] make page_to_dma() highmem awareNicolas Pitre2009-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a machine class has a custom __virt_to_bus() implementation then it must provide a __arch_page_to_dma() implementation as well which is _not_ based on page_address() to support highmem. This patch fixes existing __arch_page_to_dma() and provide a default implementation otherwise. The default implementation for highmem is based on __pfn_to_bus() which is defined only when no custom __virt_to_bus() is provided by the machine class. That leaves only ebsa110 and footbridge which cannot support highmem until they provide their own __arch_page_to_dma() implementation. But highmem support on those legacy platforms with limited memory is certainly not a priority. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] introduce dma_cache_maint_page()Nicolas Pitre2009-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a helper to be used by the DMA mapping API to handle cache maintenance for memory identified by a page structure instead of a virtual address. Those pages may or may not be highmem pages, and when they're highmem pages, they may or may not be virtually mapped. When they're not mapped then there is no L1 cache to worry about. But even in that case the L2 cache must be processed since unmapped highmem pages can still be L2 cached. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] mem_init(): make highmem pages available for useNicolas Pitre2009-03-15
| | | | | | | | | | | | Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] kmap supportNicolas Pitre2009-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kmap virtual area borrows a 2MB range at the top of the 16MB area below PAGE_OFFSET currently reserved for kernel modules and/or the XIP kernel. This 2MB corresponds to the range covered by 2 consecutive second-level page tables, or a single pmd entry as seen by the Linux page table abstraction. Because XIP kernels are unlikely to be seen on systems needing highmem support, there shouldn't be any shortage of VM space for modules (14 MB for modules is still way more than twice the typical usage). Because the virtual mapping of highmem pages can go away at any moment after kunmap() is called on them, we need to bypass the delayed cache flushing provided by flush_dcache_page() in that case. The atomic kmap versions are based on fixmaps, and __cpuc_flush_dcache_page() is used directly in that case. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] fixmap supportNicolas Pitre2009-03-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the minimum fixmap interface expected to be implemented by architectures supporting highmem. We have a second level page table already allocated and covering 0xfff00000-0xffffffff because the exception vector page is located at 0xffff0000, and various cache tricks already use some entries above 0xffff0000. Therefore the PTEs covering 0xfff00000-0xfffeffff are free to be used. However the XScale cache flushing code already uses virtual addresses between 0xfffe0000 and 0xfffeffff. So this reserves the 0xfff00000-0xfffdffff range for fixmap stuff. The Documentation/arm/memory.txt information is updated accordingly, including the information about the actual top of DMA memory mapping region which didn't match the code. Signed-off-by: Nicolas Pitre <nico@marvell.com>
| * | [ARM] Fix virtual to physical translation macro corner casesRussell King2009-03-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current use of these macros works well when the conversion is entirely linear. In this case, we can be assured that the following holds true: __va(p + s) - s = __va(p) However, this is not always the case, especially when there is a non-linear conversion (eg, when there is a 3.5GB hole in memory.) In this case, if 's' is the size of the region (eg, PAGE_SIZE) and 'p' is the final page, the above is most definitely not true. So, we must ensure that __va() and __pa() are only used with valid kernel direct mapped RAM addresses. This patch tweaks the code to achieve this. Tested-by: Charles Moschel <fred99@carolina.rr.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge branch 'devel' of ↵root2009-03-24
|\ \ \ | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel
| * | | [ARM] pxa: add defconfig for pxa910-based platformsEric Miao2009-03-22
| | | | | | | | | | | | | | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: add defconfig for pxa168-based platformsEric Miao2009-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of having various pieces of defconfig files for different platforms, let's group them into a single one. Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: add base support for pxa910-based TTC_DKBEric Miao2009-03-22
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Bin Yang <bin.yang@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: add base support for pxa910-based TavorEVBEric Miao2009-03-22
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Bin Yang <bin.yang@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: add base support for Marvell PXA910Eric Miao2009-03-22
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Bin Yang <bin.yang@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa/aspenite: add support for debug ethernetEric Miao2009-03-22
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Zhangfei Gao <zhangfei.gao@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa/aspenite: add support for console uartEric Miao2009-03-22
| | | | | | | | | | | | | | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: add MFP support for pxa168Eric Miao2009-03-22
| | | | | | | | | | | | | | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: add GPIO support for pxa168Eric Miao2009-03-22
| | | | | | | | | | | | | | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: add iWMMXt support for pxa168Eric Miao2009-03-22
| | | | | | | | | | | | | | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: add base support for Marvell's PXA168 processor lineEric Miao2009-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | """The Marvell® PXA168 processor is the first in a family of application processors targeted at mass market opportunities in computing and consumer devices. It balances high computing and multimedia performance with low power consumption to support extended battery life, and includes a wealth of integrated peripherals to reduce overall BOM cost .... """ See http://www.marvell.com/featured/pxa168.jsp for more information. 1. Marvell Mohawk core is a hybrid of xscale3 and its own ARM core, there are many enhancements like instructions for flushing the whole D-cache, and so on 2. Clock reuses Russell's common clkdev, and added the basic support for UART1/2. 3. Devices are a bit different from the 'mach-pxa' way, the platform devices are now dynamically allocated only when necessary (i.e. when pxa_register_device() is called). Description for each device are stored in an array of 'struct pxa_device_desc'. Now that: a. this array of device description is marked with __initdata and can be freed up system is fully up b. which means board code has to add all needed devices early in his initializing function c. platform specific data can now be marked as __initdata since they are allocated and copied by platform_device_add_data() 4. only the basic UART1/2/3 are added, more devices will come later. Signed-off-by: Jason Chagas <chagas@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: move common MFP handling code into plat-pxaEric Miao2009-03-22
| | | | | | | | | | | | | | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: move common GPIO handling code into plat-pxaEric Miao2009-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. add common GPIO handling code into [arch/arm/plat-pxa] 2. common code in <mach/gpio.h> moved into <plat/gpio.h>, new processors should implement its own <mach/gpio.h>, provide the following required definitions and '#include <plat/gpio.h>' in the end: - GPIO_REGS_VIRT for mapped virtual address of the GPIO registers' physical I/O memory - macros of GPLR(), GPSR(), GPDR() for constant optimization for functions gpio_{set,get}_value() (so that bit-bang code can still have tolerable performance) - NR_BUILTIN_GPIO for the number of onchip GPIO - definitions of __gpio_is_inverted() and __gpio_is_occupied(), they can be either macros or inlined functions Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: introduce plat-pxa for PXA common code and add DMA supportEric Miao2009-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. introduce folder of 'arch/arm/plat-pxa' for common code across different PXA processor families 2. initially moved DMA code into plat-pxa 3. common code in <mach/dma.h> moved into <plat/dma.h>, new processors should implement its own <mach/dma.h>, provide the following required definitions and '#include <plat/dma.h>' in the end: - DMAC_REGS_VIRT for mapped virtual address of the DMA registers' physical I/O memory Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: AC97 pin functions for Colibri PXA310/320Daniel Mack2009-03-22
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: Matthias Meier <matthias.j.meier@gmx.net> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: Add Colibri LCD functionsDaniel Mack2009-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds LCD functions for Colibri PXA300 and Colibri PXA320 and configures a LQ043T3DX02 panel. Original-code-by: Matthias Meier <matthias.j.meier@gmx.net> Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: Colibri PXA320 module basicsDaniel Mack2009-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds basic support for Colibri PXA320 modules. The file colibri-320.c only contains settings specific to this module, such as the Ethernet interface. Cc: Matthias Meier <matthias.j.meier@gmx.net> Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: Refactor Colibri board support codeDaniel Mack2009-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Move common function for all Colibri PXA3xx boards to the newly added colibri-pxa3xx.c - Drop some unnecessary defines from colibri.h - Make Kconfig reflect the fact that code for colibri 300 module does also work for the 310 model - Give up on the huge pin config table which was messed up with lots of #ifdefs and switch over to locally defined tables for configured functions Cc: Matthias Meier <matthias.j.meier@gmx.net> Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: Fix Colibri AX88796 configurationDaniel Mack2009-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Broaden the AX88796 register mask to allow access to the reset register. Remove unnecessary value definitions and the second resource block. Diagnosed-by: Matthias Meier <matthias.j.meier@gmx.net> Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: add colibri PXA300 defconfigDaniel Mack2009-03-22
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: rename and update Colibri PXA270 defconfigDaniel Mack2009-03-22
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: add USB support for Colibri PXA300Daniel Mack2009-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for USB OHCI for Toradex' Colibri PXA300 modules as connected on the evaluation board. Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: add MMC support for Colibri PXA300Daniel Mack2009-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Added MMC support for Toradex' Colibri PXA300 module. Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: add basic support for Colibri PXA300 moduleDaniel Mack2009-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add basic support for Toradex' Colibri PXA300 module. Ethernet is enabled conditionally, depdending on CONFIG_AX88796. Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | [ARM] pxa: rename colibri.c to colibri-pxa270.cDaniel Mack2009-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Namespace cleanup: rename colibri.c to colibri-pxa270.c and change some names in colibri.h. Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| * | | Merge branch 'fix' of ↵Eric Miao2009-03-22
| |\ \ \ | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git into devel
| | * | | [ARM] pxa: add pxa320 missing pin function for CS2 on GPIO3Daniel Mack2009-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | | [ARM] pxa: make second argument of clk_add_alias a name instead of the deviceDmitry Eremin-Solenikov2009-03-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk_add_alias is commonly called for platform devices that are not yet registered in the device tree. Thus the clock alias is associated with NULL device name. Fix this by passing the device name instead of just device pointer. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
| | * | | [ARM] pxa: add missing pin function for CS2 on GPIO1Daniel Mack2009-03-19
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.miao@marvell.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-19 17:49:14 -0400