aboutsummaryrefslogtreecommitdiffstats
path: root/sound/soc/fsl/imx-mc13783.c
diff options
context:
space:
mode:
Diffstat (limited to 'sound/soc/fsl/imx-mc13783.c')
-rw-r--r--sound/soc/fsl/imx-mc13783.c49
1 files changed, 33 insertions, 16 deletions
diff --git a/sound/soc/fsl/imx-mc13783.c b/sound/soc/fsl/imx-mc13783.c
index f59c3494366..549b31fdc9d 100644
--- a/sound/soc/fsl/imx-mc13783.c
+++ b/sound/soc/fsl/imx-mc13783.c
@@ -111,22 +111,39 @@ static int __devinit imx_mc13783_probe(struct platform_device *pdev)
111 return ret; 111 return ret;
112 } 112 }
113 113
114 imx_audmux_v2_configure_port(MX31_AUDMUX_PORT4_SSI_PINS_4, 114 if (machine_is_mx31_3ds()) {
115 IMX_AUDMUX_V2_PTCR_SYN, 115 imx_audmux_v2_configure_port(MX31_AUDMUX_PORT4_SSI_PINS_4,
116 IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT1_SSI0) | 116 IMX_AUDMUX_V2_PTCR_SYN,
117 IMX_AUDMUX_V2_PDCR_MODE(1) | 117 IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT1_SSI0) |
118 IMX_AUDMUX_V2_PDCR_INMMASK(0xfc)); 118 IMX_AUDMUX_V2_PDCR_MODE(1) |
119 imx_audmux_v2_configure_port(MX31_AUDMUX_PORT1_SSI0, 119 IMX_AUDMUX_V2_PDCR_INMMASK(0xfc));
120 IMX_AUDMUX_V2_PTCR_SYN | 120 imx_audmux_v2_configure_port(MX31_AUDMUX_PORT1_SSI0,
121 IMX_AUDMUX_V2_PTCR_TFSDIR | 121 IMX_AUDMUX_V2_PTCR_SYN |
122 IMX_AUDMUX_V2_PTCR_TFSEL(MX31_AUDMUX_PORT4_SSI_PINS_4) | 122 IMX_AUDMUX_V2_PTCR_TFSDIR |
123 IMX_AUDMUX_V2_PTCR_TCLKDIR | 123 IMX_AUDMUX_V2_PTCR_TFSEL(MX31_AUDMUX_PORT4_SSI_PINS_4) |
124 IMX_AUDMUX_V2_PTCR_TCSEL(MX31_AUDMUX_PORT4_SSI_PINS_4) | 124 IMX_AUDMUX_V2_PTCR_TCLKDIR |
125 IMX_AUDMUX_V2_PTCR_RFSDIR | 125 IMX_AUDMUX_V2_PTCR_TCSEL(MX31_AUDMUX_PORT4_SSI_PINS_4) |
126 IMX_AUDMUX_V2_PTCR_RFSEL(MX31_AUDMUX_PORT4_SSI_PINS_4) | 126 IMX_AUDMUX_V2_PTCR_RFSDIR |
127 IMX_AUDMUX_V2_PTCR_RCLKDIR | 127 IMX_AUDMUX_V2_PTCR_RFSEL(MX31_AUDMUX_PORT4_SSI_PINS_4) |
128 IMX_AUDMUX_V2_PTCR_RCSEL(MX31_AUDMUX_PORT4_SSI_PINS_4), 128 IMX_AUDMUX_V2_PTCR_RCLKDIR |
129 IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT4_SSI_PINS_4)); 129 IMX_AUDMUX_V2_PTCR_RCSEL(MX31_AUDMUX_PORT4_SSI_PINS_4),
130 IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT4_SSI_PINS_4));
131 } else if (machine_is_mx27_3ds()) {
132 imx_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
133 IMX_AUDMUX_V1_PCR_SYN |
134 IMX_AUDMUX_V1_PCR_TFSDIR |
135 IMX_AUDMUX_V1_PCR_TCLKDIR |
136 IMX_AUDMUX_V1_PCR_RFSDIR |
137 IMX_AUDMUX_V1_PCR_RCLKDIR |
138 IMX_AUDMUX_V1_PCR_TFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) |
139 IMX_AUDMUX_V1_PCR_RFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) |
140 IMX_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4)
141 );
142 imx_audmux_v1_configure_port(MX27_AUDMUX_HPCR3_SSI_PINS_4,
143 IMX_AUDMUX_V1_PCR_SYN |
144 IMX_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR1_SSI0)
145 );
146 }
130 147
131 return ret; 148 return ret;
132} 149}