diff options
Diffstat (limited to 'sound/soc/codecs/wm8962.c')
-rw-r--r-- | sound/soc/codecs/wm8962.c | 213 |
1 files changed, 126 insertions, 87 deletions
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index 5e05eed96c3..c6106753090 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c | |||
@@ -78,6 +78,8 @@ struct wm8962_priv { | |||
78 | #ifdef CONFIG_GPIOLIB | 78 | #ifdef CONFIG_GPIOLIB |
79 | struct gpio_chip gpio_chip; | 79 | struct gpio_chip gpio_chip; |
80 | #endif | 80 | #endif |
81 | |||
82 | int irq; | ||
81 | }; | 83 | }; |
82 | 84 | ||
83 | /* We can't use the same notifier block for more than one supply and | 85 | /* We can't use the same notifier block for more than one supply and |
@@ -1957,7 +1959,13 @@ static int wm8962_readable_register(struct snd_soc_codec *codec, unsigned int re | |||
1957 | 1959 | ||
1958 | static int wm8962_reset(struct snd_soc_codec *codec) | 1960 | static int wm8962_reset(struct snd_soc_codec *codec) |
1959 | { | 1961 | { |
1960 | return snd_soc_write(codec, WM8962_SOFTWARE_RESET, 0x6243); | 1962 | int ret; |
1963 | |||
1964 | ret = snd_soc_write(codec, WM8962_SOFTWARE_RESET, 0x6243); | ||
1965 | if (ret != 0) | ||
1966 | return ret; | ||
1967 | |||
1968 | return snd_soc_write(codec, WM8962_PLL_SOFTWARE_RESET, 0); | ||
1961 | } | 1969 | } |
1962 | 1970 | ||
1963 | static const DECLARE_TLV_DB_SCALE(inpga_tlv, -2325, 75, 0); | 1971 | static const DECLARE_TLV_DB_SCALE(inpga_tlv, -2325, 75, 0); |
@@ -1982,6 +1990,7 @@ static const unsigned int classd_tlv[] = { | |||
1982 | 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0), | 1990 | 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0), |
1983 | 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0), | 1991 | 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0), |
1984 | }; | 1992 | }; |
1993 | static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); | ||
1985 | 1994 | ||
1986 | /* The VU bits for the headphones are in a different register to the mute | 1995 | /* The VU bits for the headphones are in a different register to the mute |
1987 | * bits and only take effect on the PGA if it is actually powered. | 1996 | * bits and only take effect on the PGA if it is actually powered. |
@@ -2018,7 +2027,6 @@ static int wm8962_put_spk_sw(struct snd_kcontrol *kcontrol, | |||
2018 | struct snd_ctl_elem_value *ucontrol) | 2027 | struct snd_ctl_elem_value *ucontrol) |
2019 | { | 2028 | { |
2020 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | 2029 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); |
2021 | u16 *reg_cache = codec->reg_cache; | ||
2022 | int ret; | 2030 | int ret; |
2023 | 2031 | ||
2024 | /* Apply the update (if any) */ | 2032 | /* Apply the update (if any) */ |
@@ -2027,16 +2035,19 @@ static int wm8962_put_spk_sw(struct snd_kcontrol *kcontrol, | |||
2027 | return 0; | 2035 | return 0; |
2028 | 2036 | ||
2029 | /* If the left PGA is enabled hit that VU bit... */ | 2037 | /* If the left PGA is enabled hit that VU bit... */ |
2030 | if (reg_cache[WM8962_PWR_MGMT_2] & WM8962_SPKOUTL_PGA_ENA) | 2038 | ret = snd_soc_read(codec, WM8962_PWR_MGMT_2); |
2031 | return snd_soc_write(codec, WM8962_SPKOUTL_VOLUME, | 2039 | if (ret & WM8962_SPKOUTL_PGA_ENA) { |
2032 | reg_cache[WM8962_SPKOUTL_VOLUME]); | 2040 | snd_soc_write(codec, WM8962_SPKOUTL_VOLUME, |
2041 | snd_soc_read(codec, WM8962_SPKOUTL_VOLUME)); | ||
2042 | return 1; | ||
2043 | } | ||
2033 | 2044 | ||
2034 | /* ...otherwise the right. The VU is stereo. */ | 2045 | /* ...otherwise the right. The VU is stereo. */ |
2035 | if (reg_cache[WM8962_PWR_MGMT_2] & WM8962_SPKOUTR_PGA_ENA) | 2046 | if (ret & WM8962_SPKOUTR_PGA_ENA) |
2036 | return snd_soc_write(codec, WM8962_SPKOUTR_VOLUME, | 2047 | snd_soc_write(codec, WM8962_SPKOUTR_VOLUME, |
2037 | reg_cache[WM8962_SPKOUTR_VOLUME]); | 2048 | snd_soc_read(codec, WM8962_SPKOUTR_VOLUME)); |
2038 | 2049 | ||
2039 | return 0; | 2050 | return 1; |
2040 | } | 2051 | } |
2041 | 2052 | ||
2042 | static const char *cap_hpf_mode_text[] = { | 2053 | static const char *cap_hpf_mode_text[] = { |
@@ -2119,6 +2130,18 @@ SOC_SINGLE_TLV("HPMIXR MIXINR Volume", WM8962_HEADPHONE_MIXER_4, | |||
2119 | 2130 | ||
2120 | SOC_SINGLE_TLV("Speaker Boost Volume", WM8962_CLASS_D_CONTROL_2, 0, 7, 0, | 2131 | SOC_SINGLE_TLV("Speaker Boost Volume", WM8962_CLASS_D_CONTROL_2, 0, 7, 0, |
2121 | classd_tlv), | 2132 | classd_tlv), |
2133 | |||
2134 | SOC_SINGLE("EQ Switch", WM8962_EQ1, WM8962_EQ_ENA_SHIFT, 1, 0), | ||
2135 | SOC_DOUBLE_R_TLV("EQ1 Volume", WM8962_EQ2, WM8962_EQ22, | ||
2136 | WM8962_EQL_B1_GAIN_SHIFT, 31, 0, eq_tlv), | ||
2137 | SOC_DOUBLE_R_TLV("EQ2 Volume", WM8962_EQ2, WM8962_EQ22, | ||
2138 | WM8962_EQL_B2_GAIN_SHIFT, 31, 0, eq_tlv), | ||
2139 | SOC_DOUBLE_R_TLV("EQ3 Volume", WM8962_EQ2, WM8962_EQ22, | ||
2140 | WM8962_EQL_B3_GAIN_SHIFT, 31, 0, eq_tlv), | ||
2141 | SOC_DOUBLE_R_TLV("EQ4 Volume", WM8962_EQ3, WM8962_EQ23, | ||
2142 | WM8962_EQL_B4_GAIN_SHIFT, 31, 0, eq_tlv), | ||
2143 | SOC_DOUBLE_R_TLV("EQ5 Volume", WM8962_EQ3, WM8962_EQ23, | ||
2144 | WM8962_EQL_B5_GAIN_SHIFT, 31, 0, eq_tlv), | ||
2122 | }; | 2145 | }; |
2123 | 2146 | ||
2124 | static const struct snd_kcontrol_new wm8962_spk_mono_controls[] = { | 2147 | static const struct snd_kcontrol_new wm8962_spk_mono_controls[] = { |
@@ -2184,6 +2207,8 @@ static int sysclk_event(struct snd_soc_dapm_widget *w, | |||
2184 | struct snd_kcontrol *kcontrol, int event) | 2207 | struct snd_kcontrol *kcontrol, int event) |
2185 | { | 2208 | { |
2186 | struct snd_soc_codec *codec = w->codec; | 2209 | struct snd_soc_codec *codec = w->codec; |
2210 | struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); | ||
2211 | unsigned long timeout; | ||
2187 | int src; | 2212 | int src; |
2188 | int fll; | 2213 | int fll; |
2189 | 2214 | ||
@@ -2203,9 +2228,20 @@ static int sysclk_event(struct snd_soc_dapm_widget *w, | |||
2203 | 2228 | ||
2204 | switch (event) { | 2229 | switch (event) { |
2205 | case SND_SOC_DAPM_PRE_PMU: | 2230 | case SND_SOC_DAPM_PRE_PMU: |
2206 | if (fll) | 2231 | if (fll) { |
2232 | try_wait_for_completion(&wm8962->fll_lock); | ||
2233 | |||
2207 | snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1, | 2234 | snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1, |
2208 | WM8962_FLL_ENA, WM8962_FLL_ENA); | 2235 | WM8962_FLL_ENA, WM8962_FLL_ENA); |
2236 | |||
2237 | timeout = msecs_to_jiffies(5); | ||
2238 | timeout = wait_for_completion_timeout(&wm8962->fll_lock, | ||
2239 | timeout); | ||
2240 | |||
2241 | if (wm8962->irq && timeout == 0) | ||
2242 | dev_err(codec->dev, | ||
2243 | "Timed out starting FLL\n"); | ||
2244 | } | ||
2209 | break; | 2245 | break; |
2210 | 2246 | ||
2211 | case SND_SOC_DAPM_POST_PMD: | 2247 | case SND_SOC_DAPM_POST_PMD: |
@@ -2336,7 +2372,6 @@ static int out_pga_event(struct snd_soc_dapm_widget *w, | |||
2336 | struct snd_kcontrol *kcontrol, int event) | 2372 | struct snd_kcontrol *kcontrol, int event) |
2337 | { | 2373 | { |
2338 | struct snd_soc_codec *codec = w->codec; | 2374 | struct snd_soc_codec *codec = w->codec; |
2339 | u16 *reg_cache = codec->reg_cache; | ||
2340 | int reg; | 2375 | int reg; |
2341 | 2376 | ||
2342 | switch (w->shift) { | 2377 | switch (w->shift) { |
@@ -2359,7 +2394,7 @@ static int out_pga_event(struct snd_soc_dapm_widget *w, | |||
2359 | 2394 | ||
2360 | switch (event) { | 2395 | switch (event) { |
2361 | case SND_SOC_DAPM_POST_PMU: | 2396 | case SND_SOC_DAPM_POST_PMU: |
2362 | return snd_soc_write(codec, reg, reg_cache[reg]); | 2397 | return snd_soc_write(codec, reg, snd_soc_read(codec, reg)); |
2363 | default: | 2398 | default: |
2364 | BUG(); | 2399 | BUG(); |
2365 | return -EINVAL; | 2400 | return -EINVAL; |
@@ -2763,18 +2798,44 @@ static const int bclk_divs[] = { | |||
2763 | 1, -1, 2, 3, 4, -1, 6, 8, -1, 12, 16, 24, -1, 32, 32, 32 | 2798 | 1, -1, 2, 3, 4, -1, 6, 8, -1, 12, 16, 24, -1, 32, 32, 32 |
2764 | }; | 2799 | }; |
2765 | 2800 | ||
2801 | static const int sysclk_rates[] = { | ||
2802 | 64, 128, 192, 256, 384, 512, 768, 1024, 1408, 1536, | ||
2803 | }; | ||
2804 | |||
2766 | static void wm8962_configure_bclk(struct snd_soc_codec *codec) | 2805 | static void wm8962_configure_bclk(struct snd_soc_codec *codec) |
2767 | { | 2806 | { |
2768 | struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); | 2807 | struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); |
2769 | int dspclk, i; | 2808 | int dspclk, i; |
2770 | int clocking2 = 0; | 2809 | int clocking2 = 0; |
2810 | int clocking4 = 0; | ||
2771 | int aif2 = 0; | 2811 | int aif2 = 0; |
2772 | 2812 | ||
2773 | if (!wm8962->bclk) { | 2813 | if (!wm8962->sysclk_rate) { |
2774 | dev_dbg(codec->dev, "No BCLK rate configured\n"); | 2814 | dev_dbg(codec->dev, "No SYSCLK configured\n"); |
2775 | return; | 2815 | return; |
2776 | } | 2816 | } |
2777 | 2817 | ||
2818 | if (!wm8962->bclk || !wm8962->lrclk) { | ||
2819 | dev_dbg(codec->dev, "No audio clocks configured\n"); | ||
2820 | return; | ||
2821 | } | ||
2822 | |||
2823 | for (i = 0; i < ARRAY_SIZE(sysclk_rates); i++) { | ||
2824 | if (sysclk_rates[i] == wm8962->sysclk_rate / wm8962->lrclk) { | ||
2825 | clocking4 |= i << WM8962_SYSCLK_RATE_SHIFT; | ||
2826 | break; | ||
2827 | } | ||
2828 | } | ||
2829 | |||
2830 | if (i == ARRAY_SIZE(sysclk_rates)) { | ||
2831 | dev_err(codec->dev, "Unsupported sysclk ratio %d\n", | ||
2832 | wm8962->sysclk_rate / wm8962->lrclk); | ||
2833 | return; | ||
2834 | } | ||
2835 | |||
2836 | snd_soc_update_bits(codec, WM8962_CLOCKING_4, | ||
2837 | WM8962_SYSCLK_RATE_MASK, clocking4); | ||
2838 | |||
2778 | dspclk = snd_soc_read(codec, WM8962_CLOCKING1); | 2839 | dspclk = snd_soc_read(codec, WM8962_CLOCKING1); |
2779 | if (dspclk < 0) { | 2840 | if (dspclk < 0) { |
2780 | dev_err(codec->dev, "Failed to read DSPCLK: %d\n", dspclk); | 2841 | dev_err(codec->dev, "Failed to read DSPCLK: %d\n", dspclk); |
@@ -2844,6 +2905,8 @@ static int wm8962_set_bias_level(struct snd_soc_codec *codec, | |||
2844 | /* VMID 2*50k */ | 2905 | /* VMID 2*50k */ |
2845 | snd_soc_update_bits(codec, WM8962_PWR_MGMT_1, | 2906 | snd_soc_update_bits(codec, WM8962_PWR_MGMT_1, |
2846 | WM8962_VMID_SEL_MASK, 0x80); | 2907 | WM8962_VMID_SEL_MASK, 0x80); |
2908 | |||
2909 | wm8962_configure_bclk(codec); | ||
2847 | break; | 2910 | break; |
2848 | 2911 | ||
2849 | case SND_SOC_BIAS_STANDBY: | 2912 | case SND_SOC_BIAS_STANDBY: |
@@ -2872,12 +2935,6 @@ static int wm8962_set_bias_level(struct snd_soc_codec *codec, | |||
2872 | WM8962_BIAS_ENA | 0x180); | 2935 | WM8962_BIAS_ENA | 0x180); |
2873 | 2936 | ||
2874 | msleep(5); | 2937 | msleep(5); |
2875 | |||
2876 | snd_soc_update_bits(codec, WM8962_CLOCKING2, | ||
2877 | WM8962_CLKREG_OVD, | ||
2878 | WM8962_CLKREG_OVD); | ||
2879 | |||
2880 | wm8962_configure_bclk(codec); | ||
2881 | } | 2938 | } |
2882 | 2939 | ||
2883 | /* VMID 2*250k */ | 2940 | /* VMID 2*250k */ |
@@ -2918,10 +2975,6 @@ static const struct { | |||
2918 | { 96000, 6 }, | 2975 | { 96000, 6 }, |
2919 | }; | 2976 | }; |
2920 | 2977 | ||
2921 | static const int sysclk_rates[] = { | ||
2922 | 64, 128, 192, 256, 384, 512, 768, 1024, 1408, 1536, | ||
2923 | }; | ||
2924 | |||
2925 | static int wm8962_hw_params(struct snd_pcm_substream *substream, | 2978 | static int wm8962_hw_params(struct snd_pcm_substream *substream, |
2926 | struct snd_pcm_hw_params *params, | 2979 | struct snd_pcm_hw_params *params, |
2927 | struct snd_soc_dai *dai) | 2980 | struct snd_soc_dai *dai) |
@@ -2929,41 +2982,27 @@ static int wm8962_hw_params(struct snd_pcm_substream *substream, | |||
2929 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 2982 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
2930 | struct snd_soc_codec *codec = rtd->codec; | 2983 | struct snd_soc_codec *codec = rtd->codec; |
2931 | struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); | 2984 | struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); |
2932 | int rate = params_rate(params); | ||
2933 | int i; | 2985 | int i; |
2934 | int aif0 = 0; | 2986 | int aif0 = 0; |
2935 | int adctl3 = 0; | 2987 | int adctl3 = 0; |
2936 | int clocking4 = 0; | ||
2937 | 2988 | ||
2938 | wm8962->bclk = snd_soc_params_to_bclk(params); | 2989 | wm8962->bclk = snd_soc_params_to_bclk(params); |
2939 | wm8962->lrclk = params_rate(params); | 2990 | wm8962->lrclk = params_rate(params); |
2940 | 2991 | ||
2941 | for (i = 0; i < ARRAY_SIZE(sr_vals); i++) { | 2992 | for (i = 0; i < ARRAY_SIZE(sr_vals); i++) { |
2942 | if (sr_vals[i].rate == rate) { | 2993 | if (sr_vals[i].rate == wm8962->lrclk) { |
2943 | adctl3 |= sr_vals[i].reg; | 2994 | adctl3 |= sr_vals[i].reg; |
2944 | break; | 2995 | break; |
2945 | } | 2996 | } |
2946 | } | 2997 | } |
2947 | if (i == ARRAY_SIZE(sr_vals)) { | 2998 | if (i == ARRAY_SIZE(sr_vals)) { |
2948 | dev_err(codec->dev, "Unsupported rate %dHz\n", rate); | 2999 | dev_err(codec->dev, "Unsupported rate %dHz\n", wm8962->lrclk); |
2949 | return -EINVAL; | 3000 | return -EINVAL; |
2950 | } | 3001 | } |
2951 | 3002 | ||
2952 | if (rate % 8000 == 0) | 3003 | if (wm8962->lrclk % 8000 == 0) |
2953 | adctl3 |= WM8962_SAMPLE_RATE_INT_MODE; | 3004 | adctl3 |= WM8962_SAMPLE_RATE_INT_MODE; |
2954 | 3005 | ||
2955 | for (i = 0; i < ARRAY_SIZE(sysclk_rates); i++) { | ||
2956 | if (sysclk_rates[i] == wm8962->sysclk_rate / rate) { | ||
2957 | clocking4 |= i << WM8962_SYSCLK_RATE_SHIFT; | ||
2958 | break; | ||
2959 | } | ||
2960 | } | ||
2961 | if (i == ARRAY_SIZE(sysclk_rates)) { | ||
2962 | dev_err(codec->dev, "Unsupported sysclk ratio %d\n", | ||
2963 | wm8962->sysclk_rate / rate); | ||
2964 | return -EINVAL; | ||
2965 | } | ||
2966 | |||
2967 | switch (params_format(params)) { | 3006 | switch (params_format(params)) { |
2968 | case SNDRV_PCM_FORMAT_S16_LE: | 3007 | case SNDRV_PCM_FORMAT_S16_LE: |
2969 | break; | 3008 | break; |
@@ -2985,8 +3024,6 @@ static int wm8962_hw_params(struct snd_pcm_substream *substream, | |||
2985 | snd_soc_update_bits(codec, WM8962_ADDITIONAL_CONTROL_3, | 3024 | snd_soc_update_bits(codec, WM8962_ADDITIONAL_CONTROL_3, |
2986 | WM8962_SAMPLE_RATE_INT_MODE | | 3025 | WM8962_SAMPLE_RATE_INT_MODE | |
2987 | WM8962_SAMPLE_RATE_MASK, adctl3); | 3026 | WM8962_SAMPLE_RATE_MASK, adctl3); |
2988 | snd_soc_update_bits(codec, WM8962_CLOCKING_4, | ||
2989 | WM8962_SYSCLK_RATE_MASK, clocking4); | ||
2990 | 3027 | ||
2991 | wm8962_configure_bclk(codec); | 3028 | wm8962_configure_bclk(codec); |
2992 | 3029 | ||
@@ -3027,9 +3064,9 @@ static int wm8962_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) | |||
3027 | int aif0 = 0; | 3064 | int aif0 = 0; |
3028 | 3065 | ||
3029 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | 3066 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
3030 | case SND_SOC_DAIFMT_DSP_A: | ||
3031 | aif0 |= WM8962_LRCLK_INV; | ||
3032 | case SND_SOC_DAIFMT_DSP_B: | 3067 | case SND_SOC_DAIFMT_DSP_B: |
3068 | aif0 |= WM8962_LRCLK_INV | 3; | ||
3069 | case SND_SOC_DAIFMT_DSP_A: | ||
3033 | aif0 |= 3; | 3070 | aif0 |= 3; |
3034 | 3071 | ||
3035 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | 3072 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
@@ -3255,22 +3292,39 @@ static int wm8962_set_fll(struct snd_soc_codec *codec, int fll_id, int source, | |||
3255 | snd_soc_write(codec, WM8962_FLL_CONTROL_7, fll_div.lambda); | 3292 | snd_soc_write(codec, WM8962_FLL_CONTROL_7, fll_div.lambda); |
3256 | snd_soc_write(codec, WM8962_FLL_CONTROL_8, fll_div.n); | 3293 | snd_soc_write(codec, WM8962_FLL_CONTROL_8, fll_div.n); |
3257 | 3294 | ||
3295 | try_wait_for_completion(&wm8962->fll_lock); | ||
3296 | |||
3258 | snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1, | 3297 | snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1, |
3259 | WM8962_FLL_FRAC | WM8962_FLL_REFCLK_SRC_MASK | | 3298 | WM8962_FLL_FRAC | WM8962_FLL_REFCLK_SRC_MASK | |
3260 | WM8962_FLL_ENA, fll1); | 3299 | WM8962_FLL_ENA, fll1); |
3261 | 3300 | ||
3262 | dev_dbg(codec->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout); | 3301 | dev_dbg(codec->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout); |
3263 | 3302 | ||
3264 | /* This should be a massive overestimate */ | 3303 | ret = 0; |
3265 | timeout = msecs_to_jiffies(1); | 3304 | |
3305 | if (fll1 & WM8962_FLL_ENA) { | ||
3306 | /* This should be a massive overestimate but go even | ||
3307 | * higher if we'll error out | ||
3308 | */ | ||
3309 | if (wm8962->irq) | ||
3310 | timeout = msecs_to_jiffies(5); | ||
3311 | else | ||
3312 | timeout = msecs_to_jiffies(1); | ||
3313 | |||
3314 | timeout = wait_for_completion_timeout(&wm8962->fll_lock, | ||
3315 | timeout); | ||
3266 | 3316 | ||
3267 | wait_for_completion_timeout(&wm8962->fll_lock, timeout); | 3317 | if (timeout == 0 && wm8962->irq) { |
3318 | dev_err(codec->dev, "FLL lock timed out"); | ||
3319 | ret = -ETIMEDOUT; | ||
3320 | } | ||
3321 | } | ||
3268 | 3322 | ||
3269 | wm8962->fll_fref = Fref; | 3323 | wm8962->fll_fref = Fref; |
3270 | wm8962->fll_fout = Fout; | 3324 | wm8962->fll_fout = Fout; |
3271 | wm8962->fll_src = source; | 3325 | wm8962->fll_src = source; |
3272 | 3326 | ||
3273 | return 0; | 3327 | return ret; |
3274 | } | 3328 | } |
3275 | 3329 | ||
3276 | static int wm8962_mute(struct snd_soc_dai *dai, int mute) | 3330 | static int wm8962_mute(struct snd_soc_dai *dai, int mute) |
@@ -3361,6 +3415,9 @@ static irqreturn_t wm8962_irq(int irq, void *data) | |||
3361 | active = snd_soc_read(codec, WM8962_INTERRUPT_STATUS_2); | 3415 | active = snd_soc_read(codec, WM8962_INTERRUPT_STATUS_2); |
3362 | active &= ~mask; | 3416 | active &= ~mask; |
3363 | 3417 | ||
3418 | /* Acknowledge the interrupts */ | ||
3419 | snd_soc_write(codec, WM8962_INTERRUPT_STATUS_2, active); | ||
3420 | |||
3364 | if (active & WM8962_FLL_LOCK_EINT) { | 3421 | if (active & WM8962_FLL_LOCK_EINT) { |
3365 | dev_dbg(codec->dev, "FLL locked\n"); | 3422 | dev_dbg(codec->dev, "FLL locked\n"); |
3366 | complete(&wm8962->fll_lock); | 3423 | complete(&wm8962->fll_lock); |
@@ -3385,9 +3442,6 @@ static irqreturn_t wm8962_irq(int irq, void *data) | |||
3385 | msecs_to_jiffies(250)); | 3442 | msecs_to_jiffies(250)); |
3386 | } | 3443 | } |
3387 | 3444 | ||
3388 | /* Acknowledge the interrupts */ | ||
3389 | snd_soc_write(codec, WM8962_INTERRUPT_STATUS_2, active); | ||
3390 | |||
3391 | return IRQ_HANDLED; | 3445 | return IRQ_HANDLED; |
3392 | } | 3446 | } |
3393 | 3447 | ||
@@ -3431,31 +3485,6 @@ int wm8962_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack) | |||
3431 | } | 3485 | } |
3432 | EXPORT_SYMBOL_GPL(wm8962_mic_detect); | 3486 | EXPORT_SYMBOL_GPL(wm8962_mic_detect); |
3433 | 3487 | ||
3434 | #ifdef CONFIG_PM | ||
3435 | static int wm8962_resume(struct snd_soc_codec *codec) | ||
3436 | { | ||
3437 | u16 *reg_cache = codec->reg_cache; | ||
3438 | int i; | ||
3439 | |||
3440 | /* Restore the registers */ | ||
3441 | for (i = 1; i < codec->driver->reg_cache_size; i++) { | ||
3442 | switch (i) { | ||
3443 | case WM8962_SOFTWARE_RESET: | ||
3444 | continue; | ||
3445 | default: | ||
3446 | break; | ||
3447 | } | ||
3448 | |||
3449 | if (reg_cache[i] != wm8962_reg[i]) | ||
3450 | snd_soc_write(codec, i, reg_cache[i]); | ||
3451 | } | ||
3452 | |||
3453 | return 0; | ||
3454 | } | ||
3455 | #else | ||
3456 | #define wm8962_resume NULL | ||
3457 | #endif | ||
3458 | |||
3459 | #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE) | 3488 | #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE) |
3460 | static int beep_rates[] = { | 3489 | static int beep_rates[] = { |
3461 | 500, 1000, 2000, 4000, | 3490 | 500, 1000, 2000, 4000, |
@@ -3731,8 +3760,6 @@ static int wm8962_probe(struct snd_soc_codec *codec) | |||
3731 | int ret; | 3760 | int ret; |
3732 | struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); | 3761 | struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); |
3733 | struct wm8962_pdata *pdata = dev_get_platdata(codec->dev); | 3762 | struct wm8962_pdata *pdata = dev_get_platdata(codec->dev); |
3734 | struct i2c_client *i2c = container_of(codec->dev, struct i2c_client, | ||
3735 | dev); | ||
3736 | u16 *reg_cache = codec->reg_cache; | 3763 | u16 *reg_cache = codec->reg_cache; |
3737 | int i, trigger, irq_pol; | 3764 | int i, trigger, irq_pol; |
3738 | bool dmicclk, dmicdat; | 3765 | bool dmicclk, dmicdat; |
@@ -3822,6 +3849,15 @@ static int wm8962_probe(struct snd_soc_codec *codec) | |||
3822 | */ | 3849 | */ |
3823 | snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_SYSCLK_ENA, 0); | 3850 | snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_SYSCLK_ENA, 0); |
3824 | 3851 | ||
3852 | /* Ensure we have soft control over all registers */ | ||
3853 | snd_soc_update_bits(codec, WM8962_CLOCKING2, | ||
3854 | WM8962_CLKREG_OVD, WM8962_CLKREG_OVD); | ||
3855 | |||
3856 | /* Ensure that the oscillator and PLLs are disabled */ | ||
3857 | snd_soc_update_bits(codec, WM8962_PLL2, | ||
3858 | WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA, | ||
3859 | 0); | ||
3860 | |||
3825 | regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); | 3861 | regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); |
3826 | 3862 | ||
3827 | if (pdata) { | 3863 | if (pdata) { |
@@ -3871,6 +3907,9 @@ static int wm8962_probe(struct snd_soc_codec *codec) | |||
3871 | snd_soc_update_bits(codec, WM8962_HPOUTR_VOLUME, | 3907 | snd_soc_update_bits(codec, WM8962_HPOUTR_VOLUME, |
3872 | WM8962_HPOUT_VU, WM8962_HPOUT_VU); | 3908 | WM8962_HPOUT_VU, WM8962_HPOUT_VU); |
3873 | 3909 | ||
3910 | /* Stereo control for EQ */ | ||
3911 | snd_soc_update_bits(codec, WM8962_EQ1, WM8962_EQ_SHARED_COEFF, 0); | ||
3912 | |||
3874 | wm8962_add_widgets(codec); | 3913 | wm8962_add_widgets(codec); |
3875 | 3914 | ||
3876 | /* Save boards having to disable DMIC when not in use */ | 3915 | /* Save boards having to disable DMIC when not in use */ |
@@ -3899,7 +3938,7 @@ static int wm8962_probe(struct snd_soc_codec *codec) | |||
3899 | wm8962_init_beep(codec); | 3938 | wm8962_init_beep(codec); |
3900 | wm8962_init_gpio(codec); | 3939 | wm8962_init_gpio(codec); |
3901 | 3940 | ||
3902 | if (i2c->irq) { | 3941 | if (wm8962->irq) { |
3903 | if (pdata && pdata->irq_active_low) { | 3942 | if (pdata && pdata->irq_active_low) { |
3904 | trigger = IRQF_TRIGGER_LOW; | 3943 | trigger = IRQF_TRIGGER_LOW; |
3905 | irq_pol = WM8962_IRQ_POL; | 3944 | irq_pol = WM8962_IRQ_POL; |
@@ -3911,12 +3950,13 @@ static int wm8962_probe(struct snd_soc_codec *codec) | |||
3911 | snd_soc_update_bits(codec, WM8962_INTERRUPT_CONTROL, | 3950 | snd_soc_update_bits(codec, WM8962_INTERRUPT_CONTROL, |
3912 | WM8962_IRQ_POL, irq_pol); | 3951 | WM8962_IRQ_POL, irq_pol); |
3913 | 3952 | ||
3914 | ret = request_threaded_irq(i2c->irq, NULL, wm8962_irq, | 3953 | ret = request_threaded_irq(wm8962->irq, NULL, wm8962_irq, |
3915 | trigger | IRQF_ONESHOT, | 3954 | trigger | IRQF_ONESHOT, |
3916 | "wm8962", codec); | 3955 | "wm8962", codec); |
3917 | if (ret != 0) { | 3956 | if (ret != 0) { |
3918 | dev_err(codec->dev, "Failed to request IRQ %d: %d\n", | 3957 | dev_err(codec->dev, "Failed to request IRQ %d: %d\n", |
3919 | i2c->irq, ret); | 3958 | wm8962->irq, ret); |
3959 | wm8962->irq = 0; | ||
3920 | /* Non-fatal */ | 3960 | /* Non-fatal */ |
3921 | } else { | 3961 | } else { |
3922 | /* Enable some IRQs by default */ | 3962 | /* Enable some IRQs by default */ |
@@ -3941,12 +3981,10 @@ err: | |||
3941 | static int wm8962_remove(struct snd_soc_codec *codec) | 3981 | static int wm8962_remove(struct snd_soc_codec *codec) |
3942 | { | 3982 | { |
3943 | struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); | 3983 | struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); |
3944 | struct i2c_client *i2c = container_of(codec->dev, struct i2c_client, | ||
3945 | dev); | ||
3946 | int i; | 3984 | int i; |
3947 | 3985 | ||
3948 | if (i2c->irq) | 3986 | if (wm8962->irq) |
3949 | free_irq(i2c->irq, codec); | 3987 | free_irq(wm8962->irq, codec); |
3950 | 3988 | ||
3951 | cancel_delayed_work_sync(&wm8962->mic_work); | 3989 | cancel_delayed_work_sync(&wm8962->mic_work); |
3952 | 3990 | ||
@@ -3963,7 +4001,6 @@ static int wm8962_remove(struct snd_soc_codec *codec) | |||
3963 | static struct snd_soc_codec_driver soc_codec_dev_wm8962 = { | 4001 | static struct snd_soc_codec_driver soc_codec_dev_wm8962 = { |
3964 | .probe = wm8962_probe, | 4002 | .probe = wm8962_probe, |
3965 | .remove = wm8962_remove, | 4003 | .remove = wm8962_remove, |
3966 | .resume = wm8962_resume, | ||
3967 | .set_bias_level = wm8962_set_bias_level, | 4004 | .set_bias_level = wm8962_set_bias_level, |
3968 | .reg_cache_size = WM8962_MAX_REGISTER + 1, | 4005 | .reg_cache_size = WM8962_MAX_REGISTER + 1, |
3969 | .reg_word_size = sizeof(u16), | 4006 | .reg_word_size = sizeof(u16), |
@@ -3986,6 +4023,8 @@ static __devinit int wm8962_i2c_probe(struct i2c_client *i2c, | |||
3986 | 4023 | ||
3987 | i2c_set_clientdata(i2c, wm8962); | 4024 | i2c_set_clientdata(i2c, wm8962); |
3988 | 4025 | ||
4026 | wm8962->irq = i2c->irq; | ||
4027 | |||
3989 | ret = snd_soc_register_codec(&i2c->dev, | 4028 | ret = snd_soc_register_codec(&i2c->dev, |
3990 | &soc_codec_dev_wm8962, &wm8962_dai, 1); | 4029 | &soc_codec_dev_wm8962, &wm8962_dai, 1); |
3991 | if (ret < 0) | 4030 | if (ret < 0) |