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-rw-r--r--include/asm-arm/arch-s3c2410/anubis-cpld.h4
-rw-r--r--include/asm-arm/arch-s3c2410/anubis-map.h10
-rw-r--r--include/asm-arm/arch-s3c2410/osiris-cpld.h19
-rw-r--r--include/asm-arm/arch-s3c2410/osiris-map.h19
-rw-r--r--include/asm-arm/linkage.h4
-rw-r--r--include/asm-avr32/arch-at32ap/gpio.h2
-rw-r--r--include/asm-avr32/cache.h9
-rw-r--r--include/asm-blackfin/blackfin.h6
-rw-r--r--include/asm-blackfin/gpio.h1
-rw-r--r--include/asm-blackfin/mach-common/def_LPBlackfin.h22
-rw-r--r--include/asm-blackfin/macros.h95
-rw-r--r--include/asm-generic/pgtable.h17
-rw-r--r--include/asm-i386/dma-mapping.h6
-rw-r--r--include/asm-i386/pgtable.h34
-rw-r--r--include/asm-ia64/pgtable.h25
-rw-r--r--include/asm-mips/irq.h9
-rw-r--r--include/asm-mips/mips-boards/atlasint.h6
-rw-r--r--include/asm-mips/mips-boards/generic.h22
-rw-r--r--include/asm-mips/mips-boards/maltaint.h6
-rw-r--r--include/asm-mips/mips-boards/msc01_pci.h1
-rw-r--r--include/asm-mips/mips-boards/seadint.h7
-rw-r--r--include/asm-mips/mips-boards/simint.h4
-rw-r--r--include/asm-parisc/hardware.h5
-rw-r--r--include/asm-parisc/linkage.h5
-rw-r--r--include/asm-parisc/processor.h8
-rw-r--r--include/asm-parisc/unistd.h13
-rw-r--r--include/asm-powerpc/pgtable-ppc32.h12
-rw-r--r--include/asm-powerpc/pgtable-ppc64.h12
-rw-r--r--include/asm-ppc/pgtable.h12
-rw-r--r--include/asm-s390/pgtable.h7
-rw-r--r--include/asm-s390/processor.h5
-rw-r--r--include/asm-s390/ptrace.h9
-rw-r--r--include/asm-sparc/pgtable.h11
-rw-r--r--include/asm-sparc64/dma-mapping.h42
-rw-r--r--include/asm-sparc64/hypervisor.h8
-rw-r--r--include/asm-sparc64/irq.h1
-rw-r--r--include/asm-sparc64/parport.h5
-rw-r--r--include/asm-um/a.out.h1
-rw-r--r--include/asm-x86_64/pgtable.h14
-rw-r--r--include/asm-x86_64/unistd.h4
-rw-r--r--include/linux/futex.h9
-rw-r--r--include/linux/hugetlb.h4
-rw-r--r--include/linux/ktime.h12
-rw-r--r--include/linux/skbuff.h4
-rw-r--r--include/linux/slub_def.h13
-rw-r--r--include/linux/spi/spi.h20
-rw-r--r--include/net/irda/irlap.h17
-rw-r--r--include/net/sctp/sctp.h7
-rw-r--r--include/net/sctp/structs.h7
49 files changed, 332 insertions, 263 deletions
diff --git a/include/asm-arm/arch-s3c2410/anubis-cpld.h b/include/asm-arm/arch-s3c2410/anubis-cpld.h
index dcebf6d6190..168b93fee52 100644
--- a/include/asm-arm/arch-s3c2410/anubis-cpld.h
+++ b/include/asm-arm/arch-s3c2410/anubis-cpld.h
@@ -18,4 +18,8 @@
18 18
19#define ANUBIS_CTRL1_NANDSEL (0x3) 19#define ANUBIS_CTRL1_NANDSEL (0x3)
20 20
21/* IDREG - revision */
22
23#define ANUBIS_IDREG_REVMASK (0x7)
24
21#endif /* __ASM_ARCH_ANUBISCPLD_H */ 25#endif /* __ASM_ARCH_ANUBISCPLD_H */
diff --git a/include/asm-arm/arch-s3c2410/anubis-map.h b/include/asm-arm/arch-s3c2410/anubis-map.h
index ab076de4a0d..830d114261d 100644
--- a/include/asm-arm/arch-s3c2410/anubis-map.h
+++ b/include/asm-arm/arch-s3c2410/anubis-map.h
@@ -27,14 +27,8 @@
27#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */ 27#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */
28#define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD) 28#define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD)
29 29
30#define ANUBIS_VA_CTRL2 ANUBIS_IOADDR(0x00100000) /* 0x01900000 */ 30#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */
31#define ANUBIS_PA_CTRL2 (ANUBIS_PA_CPLD) 31#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3<<23))
32
33#define ANUBIS_VA_CTRL3 ANUBIS_IOADDR(0x00200000) /* 0x01A00000 */
34#define ANUBIS_PA_CTRL3 (ANUBIS_PA_CPLD)
35
36#define ANUBIS_VA_CTRL4 ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */
37#define ANUBIS_PA_CTRL4 (ANUBIS_PA_CPLD)
38 32
39#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) 33#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000)
40#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000) 34#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000)
diff --git a/include/asm-arm/arch-s3c2410/osiris-cpld.h b/include/asm-arm/arch-s3c2410/osiris-cpld.h
index 3b6498468d6..229ab2351db 100644
--- a/include/asm-arm/arch-s3c2410/osiris-cpld.h
+++ b/include/asm-arm/arch-s3c2410/osiris-cpld.h
@@ -1,6 +1,6 @@
1/* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h 1/* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h
2 * 2 *
3 * Copyright (c) 2005 Simtec Electronics 3 * Copyright 2005 Simtec Electronics
4 * http://www.simtec.co.uk/products/ 4 * http://www.simtec.co.uk/products/
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * 6 *
@@ -14,12 +14,17 @@
14#ifndef __ASM_ARCH_OSIRISCPLD_H 14#ifndef __ASM_ARCH_OSIRISCPLD_H
15#define __ASM_ARCH_OSIRISCPLD_H 15#define __ASM_ARCH_OSIRISCPLD_H
16 16
17/* CTRL1 - NAND WP control */ 17/* CTRL0 - NAND WP control */
18 18
19#define OSIRIS_CTRL1_NANDSEL (0x3) 19#define OSIRIS_CTRL0_NANDSEL (0x3)
20#define OSIRIS_CTRL1_BOOT_INT (1<<3) 20#define OSIRIS_CTRL0_BOOT_INT (1<<3)
21#define OSIRIS_CTRL1_PCMCIA (1<<4) 21#define OSIRIS_CTRL0_PCMCIA (1<<4)
22#define OSIRIS_CTRL1_PCMCIA_nWAIT (1<<6) 22#define OSIRIS_CTRL0_FIX8 (1<<5)
23#define OSIRIS_CTRL1_PCMCIA_nIOIS16 (1<<7) 23#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6)
24#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7)
25
26#define OSIRIS_CTRL1_FIX8 (1<<0)
27
28#define OSIRIS_ID_REVMASK (0x7)
24 29
25#endif /* __ASM_ARCH_OSIRISCPLD_H */ 30#endif /* __ASM_ARCH_OSIRISCPLD_H */
diff --git a/include/asm-arm/arch-s3c2410/osiris-map.h b/include/asm-arm/arch-s3c2410/osiris-map.h
index a14164dfa52..b5c74d2b9aa 100644
--- a/include/asm-arm/arch-s3c2410/osiris-map.h
+++ b/include/asm-arm/arch-s3c2410/osiris-map.h
@@ -24,16 +24,19 @@
24 24
25/* we put the CPLD registers next, to get them out of the way */ 25/* we put the CPLD registers next, to get them out of the way */
26 26
27#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00000000) 27#define OSIRIS_VA_CTRL0 OSIRIS_IOADDR(0x00000000)
28#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD) 28#define OSIRIS_PA_CTRL0 (OSIRIS_PA_CPLD)
29 29
30#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00100000) 30#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00100000)
31#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (1<<23)) 31#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD + (1<<23))
32 32
33#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00200000) 33#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00200000)
34#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) 34#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (2<<23))
35 35
36#define OSIRIS_VA_CTRL4 OSIRIS_IOADDR(0x00300000) 36#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00300000)
37#define OSIRIS_PA_CTRL4 (OSIRIS_PA_CPLD + (3<<23)) 37#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23))
38
39#define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000)
40#define OSIRIS_PA_IDREG (OSIRIS_PA_CPLD + (7<<23))
38 41
39#endif /* __ASM_ARCH_OSIRISMAP_H */ 42#endif /* __ASM_ARCH_OSIRISMAP_H */
diff --git a/include/asm-arm/linkage.h b/include/asm-arm/linkage.h
index dbe4b4e31a5..5a25632b1bc 100644
--- a/include/asm-arm/linkage.h
+++ b/include/asm-arm/linkage.h
@@ -4,4 +4,8 @@
4#define __ALIGN .align 0 4#define __ALIGN .align 0
5#define __ALIGN_STR ".align 0" 5#define __ALIGN_STR ".align 0"
6 6
7#define ENDPROC(name) \
8 .type name, %function; \
9 END(name)
10
7#endif 11#endif
diff --git a/include/asm-avr32/arch-at32ap/gpio.h b/include/asm-avr32/arch-at32ap/gpio.h
index 80a21aa9ae7..af7f9535bab 100644
--- a/include/asm-avr32/arch-at32ap/gpio.h
+++ b/include/asm-avr32/arch-at32ap/gpio.h
@@ -14,6 +14,8 @@ int gpio_direction_output(unsigned int gpio, int value);
14int gpio_get_value(unsigned int gpio); 14int gpio_get_value(unsigned int gpio);
15void gpio_set_value(unsigned int gpio, int value); 15void gpio_set_value(unsigned int gpio, int value);
16 16
17#include <asm-generic/gpio.h> /* cansleep wrappers */
18
17static inline int gpio_to_irq(unsigned int gpio) 19static inline int gpio_to_irq(unsigned int gpio)
18{ 20{
19 return gpio + GPIO_IRQ_BASE; 21 return gpio + GPIO_IRQ_BASE;
diff --git a/include/asm-avr32/cache.h b/include/asm-avr32/cache.h
index dabb955f3c0..d3cf35ab11a 100644
--- a/include/asm-avr32/cache.h
+++ b/include/asm-avr32/cache.h
@@ -4,6 +4,15 @@
4#define L1_CACHE_SHIFT 5 4#define L1_CACHE_SHIFT 5
5#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 5#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
6 6
7/*
8 * Memory returned by kmalloc() may be used for DMA, so we must make
9 * sure that all such allocations are cache aligned. Otherwise,
10 * unrelated code may cause parts of the buffer to be read into the
11 * cache before the transfer is done, causing old data to be seen by
12 * the CPU.
13 */
14#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
15
7#ifndef __ASSEMBLER__ 16#ifndef __ASSEMBLER__
8struct cache_info { 17struct cache_info {
9 unsigned int ways; 18 unsigned int ways;
diff --git a/include/asm-blackfin/blackfin.h b/include/asm-blackfin/blackfin.h
index 14e58de7397..db3b615ffba 100644
--- a/include/asm-blackfin/blackfin.h
+++ b/include/asm-blackfin/blackfin.h
@@ -6,7 +6,11 @@
6#ifndef _BLACKFIN_H_ 6#ifndef _BLACKFIN_H_
7#define _BLACKFIN_H_ 7#define _BLACKFIN_H_
8 8
9#include <asm/macros.h> 9#define LO(con32) ((con32) & 0xFFFF)
10#define lo(con32) ((con32) & 0xFFFF)
11#define HI(con32) (((con32) >> 16) & 0xFFFF)
12#define hi(con32) (((con32) >> 16) & 0xFFFF)
13
10#include <asm/mach/blackfin.h> 14#include <asm/mach/blackfin.h>
11#include <asm/bfin-global.h> 15#include <asm/bfin-global.h>
12 16
diff --git a/include/asm-blackfin/gpio.h b/include/asm-blackfin/gpio.h
index aa0d5503e23..d98d77ad71f 100644
--- a/include/asm-blackfin/gpio.h
+++ b/include/asm-blackfin/gpio.h
@@ -332,6 +332,7 @@ struct gpio_port_s {
332 unsigned short inen; 332 unsigned short inen;
333 333
334 unsigned short fer; 334 unsigned short fer;
335 unsigned short reserved;
335}; 336};
336#endif /*CONFIG_PM*/ 337#endif /*CONFIG_PM*/
337 338
diff --git a/include/asm-blackfin/mach-common/def_LPBlackfin.h b/include/asm-blackfin/mach-common/def_LPBlackfin.h
index 76103526aec..be1ece8c0c2 100644
--- a/include/asm-blackfin/mach-common/def_LPBlackfin.h
+++ b/include/asm-blackfin/mach-common/def_LPBlackfin.h
@@ -42,6 +42,12 @@
42 42
43#if defined(ANOMALY_05000198) 43#if defined(ANOMALY_05000198)
44 44
45#define bfin_read8(addr) ({ unsigned char __v; \
46 __asm__ __volatile__ ("NOP;\n\t" \
47 "%0 = b[%1] (z);\n\t" \
48 : "=d"(__v) : "a"(addr)); \
49 __v; })
50
45#define bfin_read16(addr) ({ unsigned __v; \ 51#define bfin_read16(addr) ({ unsigned __v; \
46 __asm__ __volatile__ ("NOP;\n\t"\ 52 __asm__ __volatile__ ("NOP;\n\t"\
47 "%0 = w[%1] (z);\n\t"\ 53 "%0 = w[%1] (z);\n\t"\
@@ -52,6 +58,11 @@
52 "%0 = [%1];\n\t"\ 58 "%0 = [%1];\n\t"\
53 : "=d"(__v) : "a"(addr)); __v; }) 59 : "=d"(__v) : "a"(addr)); __v; })
54 60
61#define bfin_write8(addr, val) ({ \
62 __asm__ __volatile__ ("NOP;\n\t" \
63 "b[%0] = %1;\n\t" \
64 : : "a"(addr), "d"(val) : "memory");})
65
55#define bfin_write16(addr,val) ({\ 66#define bfin_write16(addr,val) ({\
56 __asm__ __volatile__ ("NOP;\n\t"\ 67 __asm__ __volatile__ ("NOP;\n\t"\
57 "w[%0] = %1;\n\t"\ 68 "w[%0] = %1;\n\t"\
@@ -64,6 +75,12 @@
64 75
65#else 76#else
66 77
78#define bfin_read8(addr) ({ unsigned char __v; \
79 __asm__ __volatile__ ( \
80 "%0 = b[%1] (z);\n\t" \
81 :"=d"(__v) : "a"(addr)); \
82 __v; })
83
67#define bfin_read16(addr) ({ unsigned __v; \ 84#define bfin_read16(addr) ({ unsigned __v; \
68 __asm__ __volatile__ (\ 85 __asm__ __volatile__ (\
69 "%0 = w[%1] (z);\n\t"\ 86 "%0 = w[%1] (z);\n\t"\
@@ -74,6 +91,11 @@
74 "%0 = [%1];\n\t"\ 91 "%0 = [%1];\n\t"\
75 : "=d"(__v) : "a"(addr)); __v; }) 92 : "=d"(__v) : "a"(addr)); __v; })
76 93
94#define bfin_write8(addr, val) ({ \
95 __asm__ __volatile__ ( \
96 "b[%0] = %1; \n\t" \
97 ::"a"(addr), "d"(val) : "memory");})
98
77#define bfin_write16(addr,val) ({\ 99#define bfin_write16(addr,val) ({\
78 __asm__ __volatile__ (\ 100 __asm__ __volatile__ (\
79 "w[%0] = %1;\n\t"\ 101 "w[%0] = %1;\n\t"\
diff --git a/include/asm-blackfin/macros.h b/include/asm-blackfin/macros.h
index c0c04a2f2dd..e69de29bb2d 100644
--- a/include/asm-blackfin/macros.h
+++ b/include/asm-blackfin/macros.h
@@ -1,95 +0,0 @@
1/************************************************************************
2 *
3 * macros.h
4 *
5 * (c) Copyright 2001-2003 Analog Devices, Inc. All rights reserved.
6 *
7 ************************************************************************/
8
9/* Defines various assembly macros. */
10
11#ifndef _MACROS_H
12#define _MACROS_H
13
14#define LO(con32) ((con32) & 0xFFFF)
15#define lo(con32) ((con32) & 0xFFFF)
16#define HI(con32) (((con32) >> 16) & 0xFFFF)
17#define hi(con32) (((con32) >> 16) & 0xFFFF)
18
19/*
20 * Set the corresponding bits in a System Register (SR);
21 * All bits set in "mask" will be set in the system register
22 * specified by "sys_reg" bitset_SR(sys_reg, mask), where
23 * sys_reg is the system register and mask are the bits to be set.
24 */
25#define bitset_SR(sys_reg, mask)\
26 [--SP] = (R7:6);\
27 r7 = sys_reg;\
28 r6.l = (mask) & 0xffff;\
29 r6.h = (mask) >> 16;\
30 r7 = r7 | r6;\
31 sys_reg = r7;\
32 csync;\
33 (R7:6) = [SP++]
34
35/*
36 * Clear the corresponding bits in a System Register (SR);
37 * All bits set in "mask" will be cleared in the SR
38 * specified by "sys_reg" bitclr_SR(sys_reg, mask), where
39 * sys_reg is the SR and mask are the bits to be cleared.
40 */
41#define bitclr_SR(sys_reg, mask)\
42 [--SP] = (R7:6);\
43 r7 = sys_reg;\
44 r7 =~ r7;\
45 r6.l = (mask) & 0xffff;\
46 r6.h = (mask) >> 16;\
47 r7 = r7 | r6;\
48 r7 =~ r7;\
49 sys_reg = r7;\
50 csync;\
51 (R7:6) = [SP++]
52
53/*
54 * Set the corresponding bits in a Memory Mapped Register (MMR);
55 * All bits set in "mask" will be set in the MMR specified by "mmr_reg"
56 * bitset_MMR(mmr_reg, mask), where mmr_reg is the MMR and mask are
57 * the bits to be set.
58 */
59#define bitset_MMR(mmr_reg, mask)\
60 [--SP] = (R7:6);\
61 [--SP] = P5;\
62 p5.l = mmr_reg & 0xffff;\
63 p5.h = mmr_reg >> 16;\
64 r7 = [p5];\
65 r6.l = (mask) & 0xffff;\
66 r6.h = (mask) >> 16;\
67 r7 = r7 | r6;\
68 [p5] = r7;\
69 csync;\
70 p5 = [SP++];\
71 (R7:6) = [SP++]
72
73/*
74 * Clear the corresponding bits in a Memory Mapped Register (MMR);
75 * All bits set in "mask" will be cleared in the MMR specified by "mmr_reg"
76 * bitclr_MMRreg(mmr_reg, mask), where sys_reg is the MMR and mask are
77 * the bits to be cleared.
78 */
79#define bitclr_MMR(mmr_reg, mask)\
80 [--SP] = (R7:6);\
81 [--SP] = P5;\
82 p5.l = mmr_reg & 0xffff;\
83 p5.h = mmr_reg >> 16;\
84 r7 = [p5];\
85 r7 =~ r7;\
86 r6.l = (mask) & 0xffff;\
87 r6.h = (mask) >> 16;\
88 r7 = r7 | r6;\
89 r7 =~ r7;\
90 [p5] = r7;\
91 csync;\
92 p5 = [SP++];\
93 (R7:6) = [SP++]
94
95#endif /* _MACROS_H */
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index dc8f99ee305..7d7bcf990e9 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -27,13 +27,20 @@ do { \
27 * Largely same as above, but only sets the access flags (dirty, 27 * Largely same as above, but only sets the access flags (dirty,
28 * accessed, and writable). Furthermore, we know it always gets set 28 * accessed, and writable). Furthermore, we know it always gets set
29 * to a "more permissive" setting, which allows most architectures 29 * to a "more permissive" setting, which allows most architectures
30 * to optimize this. 30 * to optimize this. We return whether the PTE actually changed, which
31 * in turn instructs the caller to do things like update__mmu_cache.
32 * This used to be done in the caller, but sparc needs minor faults to
33 * force that call on sun4c so we changed this macro slightly
31 */ 34 */
32#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ 35#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
33do { \ 36({ \
34 set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \ 37 int __changed = !pte_same(*(__ptep), __entry); \
35 flush_tlb_page(__vma, __address); \ 38 if (__changed) { \
36} while (0) 39 set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \
40 flush_tlb_page(__vma, __address); \
41 } \
42 __changed; \
43})
37#endif 44#endif
38 45
39#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 46#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
diff --git a/include/asm-i386/dma-mapping.h b/include/asm-i386/dma-mapping.h
index 183eebeebbd..f1d72d177f6 100644
--- a/include/asm-i386/dma-mapping.h
+++ b/include/asm-i386/dma-mapping.h
@@ -123,6 +123,8 @@ dma_mapping_error(dma_addr_t dma_addr)
123 return 0; 123 return 0;
124} 124}
125 125
126extern int forbid_dac;
127
126static inline int 128static inline int
127dma_supported(struct device *dev, u64 mask) 129dma_supported(struct device *dev, u64 mask)
128{ 130{
@@ -134,6 +136,10 @@ dma_supported(struct device *dev, u64 mask)
134 if(mask < 0x00ffffff) 136 if(mask < 0x00ffffff)
135 return 0; 137 return 0;
136 138
139 /* Work around chipset bugs */
140 if (forbid_dac > 0 && mask > 0xffffffffULL)
141 return 0;
142
137 return 1; 143 return 1;
138} 144}
139 145
diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h
index 2394589786b..628fa7747d0 100644
--- a/include/asm-i386/pgtable.h
+++ b/include/asm-i386/pgtable.h
@@ -285,32 +285,36 @@ static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
285 */ 285 */
286#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 286#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
287#define ptep_set_access_flags(vma, address, ptep, entry, dirty) \ 287#define ptep_set_access_flags(vma, address, ptep, entry, dirty) \
288do { \ 288({ \
289 if (dirty) { \ 289 int __changed = !pte_same(*(ptep), entry); \
290 if (__changed && dirty) { \
290 (ptep)->pte_low = (entry).pte_low; \ 291 (ptep)->pte_low = (entry).pte_low; \
291 pte_update_defer((vma)->vm_mm, (address), (ptep)); \ 292 pte_update_defer((vma)->vm_mm, (address), (ptep)); \
292 flush_tlb_page(vma, address); \ 293 flush_tlb_page(vma, address); \
293 } \ 294 } \
294} while (0) 295 __changed; \
296})
295 297
296#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY 298#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
297#define ptep_test_and_clear_dirty(vma, addr, ptep) ({ \ 299#define ptep_test_and_clear_dirty(vma, addr, ptep) ({ \
298 int ret = 0; \ 300 int __ret = 0; \
299 if (pte_dirty(*ptep)) \ 301 if (pte_dirty(*(ptep))) \
300 ret = test_and_clear_bit(_PAGE_BIT_DIRTY, &ptep->pte_low); \ 302 __ret = test_and_clear_bit(_PAGE_BIT_DIRTY, \
301 if (ret) \ 303 &(ptep)->pte_low); \
302 pte_update_defer(vma->vm_mm, addr, ptep); \ 304 if (__ret) \
303 ret; \ 305 pte_update((vma)->vm_mm, addr, ptep); \
306 __ret; \
304}) 307})
305 308
306#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 309#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
307#define ptep_test_and_clear_young(vma, addr, ptep) ({ \ 310#define ptep_test_and_clear_young(vma, addr, ptep) ({ \
308 int ret = 0; \ 311 int __ret = 0; \
309 if (pte_young(*ptep)) \ 312 if (pte_young(*(ptep))) \
310 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte_low); \ 313 __ret = test_and_clear_bit(_PAGE_BIT_ACCESSED, \
311 if (ret) \ 314 &(ptep)->pte_low); \
312 pte_update_defer(vma->vm_mm, addr, ptep); \ 315 if (__ret) \
313 ret; \ 316 pte_update((vma)->vm_mm, addr, ptep); \
317 __ret; \
314}) 318})
315 319
316/* 320/*
diff --git a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h
index 670b706411b..6580f31b313 100644
--- a/include/asm-ia64/pgtable.h
+++ b/include/asm-ia64/pgtable.h
@@ -533,16 +533,23 @@ extern void lazy_mmu_prot_update (pte_t pte);
533 * daccess_bit in ivt.S). 533 * daccess_bit in ivt.S).
534 */ 534 */
535#ifdef CONFIG_SMP 535#ifdef CONFIG_SMP
536# define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __safely_writable) \ 536# define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __safely_writable) \
537do { \ 537({ \
538 if (__safely_writable) { \ 538 int __changed = !pte_same(*(__ptep), __entry); \
539 set_pte(__ptep, __entry); \ 539 if (__changed && __safely_writable) { \
540 flush_tlb_page(__vma, __addr); \ 540 set_pte(__ptep, __entry); \
541 } \ 541 flush_tlb_page(__vma, __addr); \
542} while (0) 542 } \
543 __changed; \
544})
543#else 545#else
544# define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __safely_writable) \ 546# define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __safely_writable) \
545 ptep_establish(__vma, __addr, __ptep, __entry) 547({ \
548 int __changed = !pte_same(*(__ptep), __entry); \
549 if (__changed) \
550 ptep_establish(__vma, __addr, __ptep, __entry); \
551 __changed; \
552})
546#endif 553#endif
547 554
548# ifdef CONFIG_VIRTUAL_MEM_MAP 555# ifdef CONFIG_VIRTUAL_MEM_MAP
diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h
index 91803ba30ff..3ca6a076124 100644
--- a/include/asm-mips/irq.h
+++ b/include/asm-mips/irq.h
@@ -72,4 +72,13 @@ extern int allocate_irqno(void);
72extern void alloc_legacy_irqno(void); 72extern void alloc_legacy_irqno(void);
73extern void free_irqno(unsigned int irq); 73extern void free_irqno(unsigned int irq);
74 74
75/*
76 * Before R2 the timer and performance counter interrupts were both fixed to
77 * IE7. Since R2 their number has to be read from the c0_intctl register.
78 */
79#define CP0_LEGACY_COMPARE_IRQ 7
80
81extern int cp0_compare_irq;
82extern int cp0_perfcount_irq;
83
75#endif /* _ASM_IRQ_H */ 84#endif /* _ASM_IRQ_H */
diff --git a/include/asm-mips/mips-boards/atlasint.h b/include/asm-mips/mips-boards/atlasint.h
index 76add42e486..93ba1c1b2a4 100644
--- a/include/asm-mips/mips-boards/atlasint.h
+++ b/include/asm-mips/mips-boards/atlasint.h
@@ -28,11 +28,6 @@
28 28
29#include <irq.h> 29#include <irq.h>
30 30
31/*
32 * Interrupts 0..7 are used for Atlas CPU interrupts (nonEIC mode)
33 */
34#define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE
35
36/* CPU interrupt offsets */ 31/* CPU interrupt offsets */
37#define MIPSCPU_INT_SW0 0 32#define MIPSCPU_INT_SW0 0
38#define MIPSCPU_INT_SW1 1 33#define MIPSCPU_INT_SW1 1
@@ -42,7 +37,6 @@
42#define MIPSCPU_INT_MB2 4 37#define MIPSCPU_INT_MB2 4
43#define MIPSCPU_INT_MB3 5 38#define MIPSCPU_INT_MB3 5
44#define MIPSCPU_INT_MB4 6 39#define MIPSCPU_INT_MB4 6
45#define MIPSCPU_INT_CPUCTR 7
46 40
47/* 41/*
48 * Interrupts 8..39 are used for Atlas interrupt controller interrupts 42 * Interrupts 8..39 are used for Atlas interrupt controller interrupts
diff --git a/include/asm-mips/mips-boards/generic.h b/include/asm-mips/mips-boards/generic.h
index b98f1658cfd..c8ebcc3e126 100644
--- a/include/asm-mips/mips-boards/generic.h
+++ b/include/asm-mips/mips-boards/generic.h
@@ -73,12 +73,28 @@
73 * CoreEMUL with Bonito System Controller is treated like a Core20K 73 * CoreEMUL with Bonito System Controller is treated like a Core20K
74 * CoreEMUL with SOC-it 101 System Controller is treated like a CoreMSC 74 * CoreEMUL with SOC-it 101 System Controller is treated like a CoreMSC
75 */ 75 */
76#define MIPS_REVISION_CORID_CORE_EMUL_BON 0x63 76#define MIPS_REVISION_CORID_CORE_EMUL_BON -1
77#define MIPS_REVISION_CORID_CORE_EMUL_MSC 0x65 77#define MIPS_REVISION_CORID_CORE_EMUL_MSC -2
78 78
79#define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f) 79#define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f)
80 80
81extern unsigned int mips_revision_corid; 81extern int mips_revision_corid;
82
83#define MIPS_REVISION_SCON_OTHER 0
84#define MIPS_REVISION_SCON_SOCITSC 1
85#define MIPS_REVISION_SCON_SOCITSCP 2
86
87/* Artificial SCON defines for MIPS_REVISION_SCON_OTHER */
88#define MIPS_REVISION_SCON_UNKNOWN -1
89#define MIPS_REVISION_SCON_GT64120 -2
90#define MIPS_REVISION_SCON_BONITO -3
91#define MIPS_REVISION_SCON_BRTL -4
92#define MIPS_REVISION_SCON_SOCIT -5
93#define MIPS_REVISION_SCON_ROCIT -6
94
95#define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff)
96
97extern int mips_revision_sconid;
82 98
83#ifdef CONFIG_PCI 99#ifdef CONFIG_PCI
84extern void mips_pcibios_init(void); 100extern void mips_pcibios_init(void);
diff --git a/include/asm-mips/mips-boards/maltaint.h b/include/asm-mips/mips-boards/maltaint.h
index 9180d646611..7461318f1cd 100644
--- a/include/asm-mips/mips-boards/maltaint.h
+++ b/include/asm-mips/mips-boards/maltaint.h
@@ -32,11 +32,6 @@
32 */ 32 */
33#define MALTA_INT_BASE 0 33#define MALTA_INT_BASE 0
34 34
35/*
36 * Interrupts 16..23 are used for Malta CPU interrupts (nonEIC mode)
37 */
38#define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE
39
40/* CPU interrupt offsets */ 35/* CPU interrupt offsets */
41#define MIPSCPU_INT_SW0 0 36#define MIPSCPU_INT_SW0 0
42#define MIPSCPU_INT_SW1 1 37#define MIPSCPU_INT_SW1 1
@@ -49,7 +44,6 @@
49#define MIPSCPU_INT_COREHI MIPSCPU_INT_MB3 44#define MIPSCPU_INT_COREHI MIPSCPU_INT_MB3
50#define MIPSCPU_INT_MB4 6 45#define MIPSCPU_INT_MB4 6
51#define MIPSCPU_INT_CORELO MIPSCPU_INT_MB4 46#define MIPSCPU_INT_CORELO MIPSCPU_INT_MB4
52#define MIPSCPU_INT_CPUCTR 7
53 47
54/* 48/*
55 * Interrupts 64..127 are used for Soc-it Classic interrupts 49 * Interrupts 64..127 are used for Soc-it Classic interrupts
diff --git a/include/asm-mips/mips-boards/msc01_pci.h b/include/asm-mips/mips-boards/msc01_pci.h
index 8eaefb837b9..e036b7dd6de 100644
--- a/include/asm-mips/mips-boards/msc01_pci.h
+++ b/include/asm-mips/mips-boards/msc01_pci.h
@@ -208,6 +208,7 @@
208 * latter, they should be moved elsewhere. 208 * latter, they should be moved elsewhere.
209 */ 209 */
210#define MIPS_MSC01_PCI_REG_BASE 0x1bd00000 210#define MIPS_MSC01_PCI_REG_BASE 0x1bd00000
211#define MIPS_SOCITSC_PCI_REG_BASE 0x1ff10000
211 212
212extern unsigned long _pcictrl_msc; 213extern unsigned long _pcictrl_msc;
213 214
diff --git a/include/asm-mips/mips-boards/seadint.h b/include/asm-mips/mips-boards/seadint.h
index 4f6a3933699..e710bae0734 100644
--- a/include/asm-mips/mips-boards/seadint.h
+++ b/include/asm-mips/mips-boards/seadint.h
@@ -22,14 +22,7 @@
22 22
23#include <irq.h> 23#include <irq.h>
24 24
25/*
26 * Interrupts 0..7 are used for SEAD CPU interrupts
27 */
28#define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE
29
30#define MIPSCPU_INT_UART0 2 25#define MIPSCPU_INT_UART0 2
31#define MIPSCPU_INT_UART1 3 26#define MIPSCPU_INT_UART1 3
32 27
33#define MIPSCPU_INT_CPUCTR 7
34
35#endif /* !(_MIPS_SEADINT_H) */ 28#endif /* !(_MIPS_SEADINT_H) */
diff --git a/include/asm-mips/mips-boards/simint.h b/include/asm-mips/mips-boards/simint.h
index 54f2fe621d6..8ef6db76d5c 100644
--- a/include/asm-mips/mips-boards/simint.h
+++ b/include/asm-mips/mips-boards/simint.h
@@ -21,15 +21,11 @@
21 21
22#define SIM_INT_BASE 0 22#define SIM_INT_BASE 0
23#define MIPSCPU_INT_MB0 2 23#define MIPSCPU_INT_MB0 2
24#define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE
25#define MIPS_CPU_TIMER_IRQ 7 24#define MIPS_CPU_TIMER_IRQ 7
26 25
27 26
28#define MIPSCPU_INT_CPUCTR 7
29
30#define MSC01E_INT_BASE 64 27#define MSC01E_INT_BASE 64
31 28
32#define MIPSCPU_INT_CPUCTR 7
33#define MSC01E_INT_CPUCTR 11 29#define MSC01E_INT_CPUCTR 11
34 30
35#endif 31#endif
diff --git a/include/asm-parisc/hardware.h b/include/asm-parisc/hardware.h
index 76d880dc4ba..4e9626836ba 100644
--- a/include/asm-parisc/hardware.h
+++ b/include/asm-parisc/hardware.h
@@ -31,10 +31,11 @@ enum cpu_type {
31 pcxw = 8, /* pa8500 pa 2.0 */ 31 pcxw = 8, /* pa8500 pa 2.0 */
32 pcxw_ = 9, /* pa8600 (w+) pa 2.0 */ 32 pcxw_ = 9, /* pa8600 (w+) pa 2.0 */
33 pcxw2 = 10, /* pa8700 pa 2.0 */ 33 pcxw2 = 10, /* pa8700 pa 2.0 */
34 mako = 11 /* pa8800 pa 2.0 */ 34 mako = 11, /* pa8800 pa 2.0 */
35 mako2 = 12 /* pa8900 pa 2.0 */
35}; 36};
36 37
37extern char *cpu_name_version[][2]; /* mapping from enum cpu_type to strings */ 38extern const char * const cpu_name_version[][2]; /* mapping from enum cpu_type to strings */
38 39
39struct parisc_driver; 40struct parisc_driver;
40 41
diff --git a/include/asm-parisc/linkage.h b/include/asm-parisc/linkage.h
index 7a09d911b53..ad8cd0d069e 100644
--- a/include/asm-parisc/linkage.h
+++ b/include/asm-parisc/linkage.h
@@ -8,8 +8,10 @@
8 8
9/* 9/*
10 * In parisc assembly a semicolon marks a comment while a 10 * In parisc assembly a semicolon marks a comment while a
11 * exclamation mark is used to seperate independend lines. 11 * exclamation mark is used to seperate independent lines.
12 */ 12 */
13#ifdef __ASSEMBLY__
14
13#define ENTRY(name) \ 15#define ENTRY(name) \
14 .export name !\ 16 .export name !\
15 ALIGN !\ 17 ALIGN !\
@@ -24,5 +26,6 @@ name:
24 END(name) 26 END(name)
25#endif 27#endif
26 28
29#endif /* __ASSEMBLY__ */
27 30
28#endif /* __ASM_PARISC_LINKAGE_H */ 31#endif /* __ASM_PARISC_LINKAGE_H */
diff --git a/include/asm-parisc/processor.h b/include/asm-parisc/processor.h
index d2f396721d3..6b294fb07a2 100644
--- a/include/asm-parisc/processor.h
+++ b/include/asm-parisc/processor.h
@@ -69,8 +69,8 @@ struct system_cpuinfo_parisc {
69 char sys_model_name[81]; /* PDC-ROM returnes this model name */ 69 char sys_model_name[81]; /* PDC-ROM returnes this model name */
70 } pdc; 70 } pdc;
71 71
72 char *cpu_name; /* e.g. "PA7300LC (PCX-L2)" */ 72 const char *cpu_name; /* e.g. "PA7300LC (PCX-L2)" */
73 char *family_name; /* e.g. "1.1e" */ 73 const char *family_name; /* e.g. "1.1e" */
74}; 74};
75 75
76 76
@@ -334,8 +334,8 @@ extern unsigned long get_wchan(struct task_struct *p);
334static inline int parisc_requires_coherency(void) 334static inline int parisc_requires_coherency(void)
335{ 335{
336#ifdef CONFIG_PA8X00 336#ifdef CONFIG_PA8X00
337 /* FIXME: also pa8900 - when we see one */ 337 return (boot_cpu_data.cpu_type == mako) ||
338 return boot_cpu_data.cpu_type == mako; 338 (boot_cpu_data.cpu_type == mako2);
339#else 339#else
340 return 0; 340 return 0;
341#endif 341#endif
diff --git a/include/asm-parisc/unistd.h b/include/asm-parisc/unistd.h
index 2f7c40861c9..f74099bdca3 100644
--- a/include/asm-parisc/unistd.h
+++ b/include/asm-parisc/unistd.h
@@ -792,8 +792,19 @@
792#define __NR_epoll_pwait (__NR_Linux + 297) 792#define __NR_epoll_pwait (__NR_Linux + 297)
793#define __NR_statfs64 (__NR_Linux + 298) 793#define __NR_statfs64 (__NR_Linux + 298)
794#define __NR_fstatfs64 (__NR_Linux + 299) 794#define __NR_fstatfs64 (__NR_Linux + 299)
795#define __NR_kexec_load (__NR_Linux + 300)
796#define __NR_utimensat (__NR_Linux + 301)
797#define __NR_signalfd (__NR_Linux + 302)
798#define __NR_timerfd (__NR_Linux + 303)
799#define __NR_eventfd (__NR_Linux + 304)
800
801#define __NR_Linux_syscalls (__NR_eventfd + 1)
802
803
804#define __IGNORE_select /* newselect */
805#define __IGNORE_fadvise64 /* fadvise64_64 */
806#define __IGNORE_utimes /* utime */
795 807
796#define __NR_Linux_syscalls (__NR_fstatfs64 + 1)
797 808
798#define HPUX_GATEWAY_ADDR 0xC0000004 809#define HPUX_GATEWAY_ADDR 0xC0000004
799#define LINUX_GATEWAY_ADDR 0x100 810#define LINUX_GATEWAY_ADDR 0x100
diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h
index c863bdb2889..7fb730c62f8 100644
--- a/include/asm-powerpc/pgtable-ppc32.h
+++ b/include/asm-powerpc/pgtable-ppc32.h
@@ -673,10 +673,14 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
673} 673}
674 674
675#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ 675#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
676 do { \ 676({ \
677 __ptep_set_access_flags(__ptep, __entry, __dirty); \ 677 int __changed = !pte_same(*(__ptep), __entry); \
678 flush_tlb_page_nohash(__vma, __address); \ 678 if (__changed) { \
679 } while(0) 679 __ptep_set_access_flags(__ptep, __entry, __dirty); \
680 flush_tlb_page_nohash(__vma, __address); \
681 } \
682 __changed; \
683})
680 684
681/* 685/*
682 * Macro to mark a page protection value as "uncacheable". 686 * Macro to mark a page protection value as "uncacheable".
diff --git a/include/asm-powerpc/pgtable-ppc64.h b/include/asm-powerpc/pgtable-ppc64.h
index 704c4e669fe..3cfd98f44bf 100644
--- a/include/asm-powerpc/pgtable-ppc64.h
+++ b/include/asm-powerpc/pgtable-ppc64.h
@@ -413,10 +413,14 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
413 :"cc"); 413 :"cc");
414} 414}
415#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ 415#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
416 do { \ 416({ \
417 __ptep_set_access_flags(__ptep, __entry, __dirty); \ 417 int __changed = !pte_same(*(__ptep), __entry); \
418 flush_tlb_page_nohash(__vma, __address); \ 418 if (__changed) { \
419 } while(0) 419 __ptep_set_access_flags(__ptep, __entry, __dirty); \
420 flush_tlb_page_nohash(__vma, __address); \
421 } \
422 __changed; \
423})
420 424
421/* 425/*
422 * Macro to mark a page protection value as "uncacheable". 426 * Macro to mark a page protection value as "uncacheable".
diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
index bed452d4a5f..9d0ce9ff584 100644
--- a/include/asm-ppc/pgtable.h
+++ b/include/asm-ppc/pgtable.h
@@ -694,10 +694,14 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
694} 694}
695 695
696#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ 696#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
697 do { \ 697({ \
698 __ptep_set_access_flags(__ptep, __entry, __dirty); \ 698 int __changed = !pte_same(*(__ptep), __entry); \
699 flush_tlb_page_nohash(__vma, __address); \ 699 if (__changed) { \
700 } while(0) 700 __ptep_set_access_flags(__ptep, __entry, __dirty); \
701 flush_tlb_page_nohash(__vma, __address); \
702 } \
703 __changed; \
704})
701 705
702/* 706/*
703 * Macro to mark a page protection value as "uncacheable". 707 * Macro to mark a page protection value as "uncacheable".
diff --git a/include/asm-s390/pgtable.h b/include/asm-s390/pgtable.h
index 8fe8d42e64c..0a307bb2f35 100644
--- a/include/asm-s390/pgtable.h
+++ b/include/asm-s390/pgtable.h
@@ -744,7 +744,12 @@ ptep_establish(struct vm_area_struct *vma,
744} 744}
745 745
746#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ 746#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
747 ptep_establish(__vma, __address, __ptep, __entry) 747({ \
748 int __changed = !pte_same(*(__ptep), __entry); \
749 if (__changed) \
750 ptep_establish(__vma, __address, __ptep, __entry); \
751 __changed; \
752})
748 753
749/* 754/*
750 * Test and clear dirty bit in storage key. 755 * Test and clear dirty bit in storage key.
diff --git a/include/asm-s390/processor.h b/include/asm-s390/processor.h
index e0fcea8c64c..5cb480af65d 100644
--- a/include/asm-s390/processor.h
+++ b/include/asm-s390/processor.h
@@ -216,6 +216,11 @@ static inline void cpu_relax(void)
216 barrier(); 216 barrier();
217} 217}
218 218
219static inline void psw_set_key(unsigned int key)
220{
221 asm volatile("spka 0(%0)" : : "d" (key));
222}
223
219/* 224/*
220 * Set PSW to specified value. 225 * Set PSW to specified value.
221 */ 226 */
diff --git a/include/asm-s390/ptrace.h b/include/asm-s390/ptrace.h
index fa6ca87080e..332ee73688f 100644
--- a/include/asm-s390/ptrace.h
+++ b/include/asm-s390/ptrace.h
@@ -470,14 +470,7 @@ struct user_regs_struct
470#define regs_return_value(regs)((regs)->gprs[2]) 470#define regs_return_value(regs)((regs)->gprs[2])
471#define profile_pc(regs) instruction_pointer(regs) 471#define profile_pc(regs) instruction_pointer(regs)
472extern void show_regs(struct pt_regs * regs); 472extern void show_regs(struct pt_regs * regs);
473#endif 473#endif /* __KERNEL__ */
474
475static inline void
476psw_set_key(unsigned int key)
477{
478 asm volatile("spka 0(%0)" : : "d" (key));
479}
480
481#endif /* __ASSEMBLY__ */ 474#endif /* __ASSEMBLY__ */
482 475
483#endif /* _S390_PTRACE_H */ 476#endif /* _S390_PTRACE_H */
diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h
index 4f0a5ba0d6a..59229aeba27 100644
--- a/include/asm-sparc/pgtable.h
+++ b/include/asm-sparc/pgtable.h
@@ -446,6 +446,17 @@ extern int io_remap_pfn_range(struct vm_area_struct *vma,
446#define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) 446#define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4))
447#define GET_PFN(pfn) (pfn & 0x0fffffffUL) 447#define GET_PFN(pfn) (pfn & 0x0fffffffUL)
448 448
449#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
450#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
451({ \
452 int __changed = !pte_same(*(__ptep), __entry); \
453 if (__changed) { \
454 set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \
455 flush_tlb_page(__vma, __address); \
456 } \
457 (sparc_cpu_model == sun4c) || __changed; \
458})
459
449#include <asm-generic/pgtable.h> 460#include <asm-generic/pgtable.h>
450 461
451#endif /* !(__ASSEMBLY__) */ 462#endif /* !(__ASSEMBLY__) */
diff --git a/include/asm-sparc64/dma-mapping.h b/include/asm-sparc64/dma-mapping.h
index 4e21c2f3065..c58ec1661df 100644
--- a/include/asm-sparc64/dma-mapping.h
+++ b/include/asm-sparc64/dma-mapping.h
@@ -15,8 +15,7 @@
15static inline int 15static inline int
16dma_supported(struct device *dev, u64 mask) 16dma_supported(struct device *dev, u64 mask)
17{ 17{
18 BUG_ON(dev->bus != &pci_bus_type && 18 BUG_ON(dev->bus != &pci_bus_type);
19 dev->bus != &ebus_bus_type);
20 19
21 return pci_dma_supported(to_pci_dev(dev), mask); 20 return pci_dma_supported(to_pci_dev(dev), mask);
22} 21}
@@ -24,8 +23,7 @@ dma_supported(struct device *dev, u64 mask)
24static inline int 23static inline int
25dma_set_mask(struct device *dev, u64 dma_mask) 24dma_set_mask(struct device *dev, u64 dma_mask)
26{ 25{
27 BUG_ON(dev->bus != &pci_bus_type && 26 BUG_ON(dev->bus != &pci_bus_type);
28 dev->bus != &ebus_bus_type);
29 27
30 return pci_set_dma_mask(to_pci_dev(dev), dma_mask); 28 return pci_set_dma_mask(to_pci_dev(dev), dma_mask);
31} 29}
@@ -34,8 +32,7 @@ static inline void *
34dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, 32dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
35 gfp_t flag) 33 gfp_t flag)
36{ 34{
37 BUG_ON(dev->bus != &pci_bus_type && 35 BUG_ON(dev->bus != &pci_bus_type);
38 dev->bus != &ebus_bus_type);
39 36
40 return pci_iommu_ops->alloc_consistent(to_pci_dev(dev), size, dma_handle, flag); 37 return pci_iommu_ops->alloc_consistent(to_pci_dev(dev), size, dma_handle, flag);
41} 38}
@@ -44,8 +41,7 @@ static inline void
44dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, 41dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
45 dma_addr_t dma_handle) 42 dma_addr_t dma_handle)
46{ 43{
47 BUG_ON(dev->bus != &pci_bus_type && 44 BUG_ON(dev->bus != &pci_bus_type);
48 dev->bus != &ebus_bus_type);
49 45
50 pci_free_consistent(to_pci_dev(dev), size, cpu_addr, dma_handle); 46 pci_free_consistent(to_pci_dev(dev), size, cpu_addr, dma_handle);
51} 47}
@@ -54,8 +50,7 @@ static inline dma_addr_t
54dma_map_single(struct device *dev, void *cpu_addr, size_t size, 50dma_map_single(struct device *dev, void *cpu_addr, size_t size,
55 enum dma_data_direction direction) 51 enum dma_data_direction direction)
56{ 52{
57 BUG_ON(dev->bus != &pci_bus_type && 53 BUG_ON(dev->bus != &pci_bus_type);
58 dev->bus != &ebus_bus_type);
59 54
60 return pci_map_single(to_pci_dev(dev), cpu_addr, size, (int)direction); 55 return pci_map_single(to_pci_dev(dev), cpu_addr, size, (int)direction);
61} 56}
@@ -64,8 +59,7 @@ static inline void
64dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, 59dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
65 enum dma_data_direction direction) 60 enum dma_data_direction direction)
66{ 61{
67 BUG_ON(dev->bus != &pci_bus_type && 62 BUG_ON(dev->bus != &pci_bus_type);
68 dev->bus != &ebus_bus_type);
69 63
70 pci_unmap_single(to_pci_dev(dev), dma_addr, size, (int)direction); 64 pci_unmap_single(to_pci_dev(dev), dma_addr, size, (int)direction);
71} 65}
@@ -75,8 +69,7 @@ dma_map_page(struct device *dev, struct page *page,
75 unsigned long offset, size_t size, 69 unsigned long offset, size_t size,
76 enum dma_data_direction direction) 70 enum dma_data_direction direction)
77{ 71{
78 BUG_ON(dev->bus != &pci_bus_type && 72 BUG_ON(dev->bus != &pci_bus_type);
79 dev->bus != &ebus_bus_type);
80 73
81 return pci_map_page(to_pci_dev(dev), page, offset, size, (int)direction); 74 return pci_map_page(to_pci_dev(dev), page, offset, size, (int)direction);
82} 75}
@@ -85,8 +78,7 @@ static inline void
85dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, 78dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
86 enum dma_data_direction direction) 79 enum dma_data_direction direction)
87{ 80{
88 BUG_ON(dev->bus != &pci_bus_type && 81 BUG_ON(dev->bus != &pci_bus_type);
89 dev->bus != &ebus_bus_type);
90 82
91 pci_unmap_page(to_pci_dev(dev), dma_address, size, (int)direction); 83 pci_unmap_page(to_pci_dev(dev), dma_address, size, (int)direction);
92} 84}
@@ -95,8 +87,7 @@ static inline int
95dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, 87dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
96 enum dma_data_direction direction) 88 enum dma_data_direction direction)
97{ 89{
98 BUG_ON(dev->bus != &pci_bus_type && 90 BUG_ON(dev->bus != &pci_bus_type);
99 dev->bus != &ebus_bus_type);
100 91
101 return pci_map_sg(to_pci_dev(dev), sg, nents, (int)direction); 92 return pci_map_sg(to_pci_dev(dev), sg, nents, (int)direction);
102} 93}
@@ -105,8 +96,7 @@ static inline void
105dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, 96dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
106 enum dma_data_direction direction) 97 enum dma_data_direction direction)
107{ 98{
108 BUG_ON(dev->bus != &pci_bus_type && 99 BUG_ON(dev->bus != &pci_bus_type);
109 dev->bus != &ebus_bus_type);
110 100
111 pci_unmap_sg(to_pci_dev(dev), sg, nhwentries, (int)direction); 101 pci_unmap_sg(to_pci_dev(dev), sg, nhwentries, (int)direction);
112} 102}
@@ -115,8 +105,7 @@ static inline void
115dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size, 105dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
116 enum dma_data_direction direction) 106 enum dma_data_direction direction)
117{ 107{
118 BUG_ON(dev->bus != &pci_bus_type && 108 BUG_ON(dev->bus != &pci_bus_type);
119 dev->bus != &ebus_bus_type);
120 109
121 pci_dma_sync_single_for_cpu(to_pci_dev(dev), dma_handle, 110 pci_dma_sync_single_for_cpu(to_pci_dev(dev), dma_handle,
122 size, (int)direction); 111 size, (int)direction);
@@ -126,8 +115,7 @@ static inline void
126dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size, 115dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
127 enum dma_data_direction direction) 116 enum dma_data_direction direction)
128{ 117{
129 BUG_ON(dev->bus != &pci_bus_type && 118 BUG_ON(dev->bus != &pci_bus_type);
130 dev->bus != &ebus_bus_type);
131 119
132 pci_dma_sync_single_for_device(to_pci_dev(dev), dma_handle, 120 pci_dma_sync_single_for_device(to_pci_dev(dev), dma_handle,
133 size, (int)direction); 121 size, (int)direction);
@@ -137,8 +125,7 @@ static inline void
137dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, 125dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
138 enum dma_data_direction direction) 126 enum dma_data_direction direction)
139{ 127{
140 BUG_ON(dev->bus != &pci_bus_type && 128 BUG_ON(dev->bus != &pci_bus_type);
141 dev->bus != &ebus_bus_type);
142 129
143 pci_dma_sync_sg_for_cpu(to_pci_dev(dev), sg, nelems, (int)direction); 130 pci_dma_sync_sg_for_cpu(to_pci_dev(dev), sg, nelems, (int)direction);
144} 131}
@@ -147,8 +134,7 @@ static inline void
147dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, 134dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
148 enum dma_data_direction direction) 135 enum dma_data_direction direction)
149{ 136{
150 BUG_ON(dev->bus != &pci_bus_type && 137 BUG_ON(dev->bus != &pci_bus_type);
151 dev->bus != &ebus_bus_type);
152 138
153 pci_dma_sync_sg_for_device(to_pci_dev(dev), sg, nelems, (int)direction); 139 pci_dma_sync_sg_for_device(to_pci_dev(dev), sg, nelems, (int)direction);
154} 140}
diff --git a/include/asm-sparc64/hypervisor.h b/include/asm-sparc64/hypervisor.h
index 5c2f9d4b9f0..db2130a95d6 100644
--- a/include/asm-sparc64/hypervisor.h
+++ b/include/asm-sparc64/hypervisor.h
@@ -2615,8 +2615,9 @@ struct ldc_mtable_entry {
2615/* ldc_revoke() 2615/* ldc_revoke()
2616 * TRAP: HV_FAST_TRAP 2616 * TRAP: HV_FAST_TRAP
2617 * FUNCTION: HV_FAST_LDC_REVOKE 2617 * FUNCTION: HV_FAST_LDC_REVOKE
2618 * ARG0: cookie 2618 * ARG0: channel ID
2619 * ARG1: ldc_mtable_entry cookie 2619 * ARG1: cookie
2620 * ARG2: ldc_mtable_entry cookie
2620 * RET0: status 2621 * RET0: status
2621 */ 2622 */
2622#define HV_FAST_LDC_REVOKE 0xef 2623#define HV_FAST_LDC_REVOKE 0xef
@@ -2663,7 +2664,8 @@ extern unsigned long sun4v_ldc_mapin(unsigned long channel,
2663 unsigned long *ra, 2664 unsigned long *ra,
2664 unsigned long *perm); 2665 unsigned long *perm);
2665extern unsigned long sun4v_ldc_unmap(unsigned long ra); 2666extern unsigned long sun4v_ldc_unmap(unsigned long ra);
2666extern unsigned long sun4v_ldc_revoke(unsigned long cookie, 2667extern unsigned long sun4v_ldc_revoke(unsigned long channel,
2668 unsigned long cookie,
2667 unsigned long mte_cookie); 2669 unsigned long mte_cookie);
2668#endif 2670#endif
2669 2671
diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h
index 5d233b42fe1..90781e34a95 100644
--- a/include/asm-sparc64/irq.h
+++ b/include/asm-sparc64/irq.h
@@ -46,6 +46,7 @@ extern void irq_install_pre_handler(int virt_irq,
46#define irq_canonicalize(irq) (irq) 46#define irq_canonicalize(irq) (irq)
47extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap); 47extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap);
48extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino); 48extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino);
49extern unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino);
49extern unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p, 50extern unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p,
50 unsigned int msi_devino_start, 51 unsigned int msi_devino_start,
51 unsigned int msi_devino_end); 52 unsigned int msi_devino_end);
diff --git a/include/asm-sparc64/parport.h b/include/asm-sparc64/parport.h
index 6340a5253a3..23cc63f049a 100644
--- a/include/asm-sparc64/parport.h
+++ b/include/asm-sparc64/parport.h
@@ -145,7 +145,7 @@ static int parport_isa_probe(int count)
145 */ 145 */
146 if (parport_pc_probe_port(base, base + 0x400, 146 if (parport_pc_probe_port(base, base + 0x400,
147 child->irq, PARPORT_DMA_NOFIFO, 147 child->irq, PARPORT_DMA_NOFIFO,
148 child->bus->self)) 148 &child->bus->self->dev))
149 count++; 149 count++;
150 } 150 }
151 } 151 }
@@ -199,7 +199,8 @@ static int parport_pc_find_nonpci_ports (int autoirq, int autodma)
199 199
200 if (parport_pc_probe_port(base, base + 0x400, 200 if (parport_pc_probe_port(base, base + 0x400,
201 edev->irqs[0], 201 edev->irqs[0],
202 count, ebus->self)) 202 count,
203 &ebus->self->dev))
203 count++; 204 count++;
204 } 205 }
205 } 206 }
diff --git a/include/asm-um/a.out.h b/include/asm-um/a.out.h
index 50cee7b296f..7016b893ac9 100644
--- a/include/asm-um/a.out.h
+++ b/include/asm-um/a.out.h
@@ -5,6 +5,7 @@
5#include "choose-mode.h" 5#include "choose-mode.h"
6 6
7#undef STACK_TOP 7#undef STACK_TOP
8#undef STACK_TOP_MAX
8 9
9extern unsigned long stacksizelim; 10extern unsigned long stacksizelim;
10 11
diff --git a/include/asm-x86_64/pgtable.h b/include/asm-x86_64/pgtable.h
index 08b9831f2e1..0a71e0b9a61 100644
--- a/include/asm-x86_64/pgtable.h
+++ b/include/asm-x86_64/pgtable.h
@@ -395,12 +395,14 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
395 * bit at the same time. */ 395 * bit at the same time. */
396#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 396#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
397#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ 397#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
398 do { \ 398({ \
399 if (__dirty) { \ 399 int __changed = !pte_same(*(__ptep), __entry); \
400 set_pte(__ptep, __entry); \ 400 if (__changed && __dirty) { \
401 flush_tlb_page(__vma, __address); \ 401 set_pte(__ptep, __entry); \
402 } \ 402 flush_tlb_page(__vma, __address); \
403 } while (0) 403 } \
404 __changed; \
405})
404 406
405/* Encode and de-code a swap entry */ 407/* Encode and de-code a swap entry */
406#define __swp_type(x) (((x).val >> 1) & 0x3f) 408#define __swp_type(x) (((x).val >> 1) & 0x3f)
diff --git a/include/asm-x86_64/unistd.h b/include/asm-x86_64/unistd.h
index ae1ed05f281..8696f8ad401 100644
--- a/include/asm-x86_64/unistd.h
+++ b/include/asm-x86_64/unistd.h
@@ -626,9 +626,9 @@ __SYSCALL(__NR_utimensat, sys_utimensat)
626__SYSCALL(__NR_epoll_pwait, sys_epoll_pwait) 626__SYSCALL(__NR_epoll_pwait, sys_epoll_pwait)
627#define __NR_signalfd 282 627#define __NR_signalfd 282
628__SYSCALL(__NR_signalfd, sys_signalfd) 628__SYSCALL(__NR_signalfd, sys_signalfd)
629#define __NR_timerfd 282 629#define __NR_timerfd 283
630__SYSCALL(__NR_timerfd, sys_timerfd) 630__SYSCALL(__NR_timerfd, sys_timerfd)
631#define __NR_eventfd 283 631#define __NR_eventfd 284
632__SYSCALL(__NR_eventfd, sys_eventfd) 632__SYSCALL(__NR_eventfd, sys_eventfd)
633 633
634#ifndef __NO_STUBS 634#ifndef __NO_STUBS
diff --git a/include/linux/futex.h b/include/linux/futex.h
index 899fc7f20ed..99650353adf 100644
--- a/include/linux/futex.h
+++ b/include/linux/futex.h
@@ -17,7 +17,6 @@ union ktime;
17#define FUTEX_LOCK_PI 6 17#define FUTEX_LOCK_PI 6
18#define FUTEX_UNLOCK_PI 7 18#define FUTEX_UNLOCK_PI 7
19#define FUTEX_TRYLOCK_PI 8 19#define FUTEX_TRYLOCK_PI 8
20#define FUTEX_CMP_REQUEUE_PI 9
21 20
22#define FUTEX_PRIVATE_FLAG 128 21#define FUTEX_PRIVATE_FLAG 128
23#define FUTEX_CMD_MASK ~FUTEX_PRIVATE_FLAG 22#define FUTEX_CMD_MASK ~FUTEX_PRIVATE_FLAG
@@ -98,14 +97,9 @@ struct robust_list_head {
98#define FUTEX_OWNER_DIED 0x40000000 97#define FUTEX_OWNER_DIED 0x40000000
99 98
100/* 99/*
101 * Some processes have been requeued on this PI-futex
102 */
103#define FUTEX_WAITER_REQUEUED 0x20000000
104
105/*
106 * The rest of the robust-futex field is for the TID: 100 * The rest of the robust-futex field is for the TID:
107 */ 101 */
108#define FUTEX_TID_MASK 0x0fffffff 102#define FUTEX_TID_MASK 0x3fffffff
109 103
110/* 104/*
111 * This limit protects against a deliberately circular list. 105 * This limit protects against a deliberately circular list.
@@ -139,7 +133,6 @@ handle_futex_death(u32 __user *uaddr, struct task_struct *curr, int pi);
139#define FUT_OFF_MMSHARED 2 /* We set bit 1 if key has a reference on mm */ 133#define FUT_OFF_MMSHARED 2 /* We set bit 1 if key has a reference on mm */
140 134
141union futex_key { 135union futex_key {
142 u32 __user *uaddr;
143 struct { 136 struct {
144 unsigned long pgoff; 137 unsigned long pgoff;
145 struct inode *inode; 138 struct inode *inode;
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index b4570b62ab8..2c13715e9dd 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -163,7 +163,7 @@ static inline struct hugetlbfs_sb_info *HUGETLBFS_SB(struct super_block *sb)
163 163
164extern const struct file_operations hugetlbfs_file_operations; 164extern const struct file_operations hugetlbfs_file_operations;
165extern struct vm_operations_struct hugetlb_vm_ops; 165extern struct vm_operations_struct hugetlb_vm_ops;
166struct file *hugetlb_zero_setup(size_t); 166struct file *hugetlb_file_setup(const char *name, size_t);
167int hugetlb_get_quota(struct address_space *mapping); 167int hugetlb_get_quota(struct address_space *mapping);
168void hugetlb_put_quota(struct address_space *mapping); 168void hugetlb_put_quota(struct address_space *mapping);
169 169
@@ -185,7 +185,7 @@ static inline void set_file_hugepages(struct file *file)
185 185
186#define is_file_hugepages(file) 0 186#define is_file_hugepages(file) 0
187#define set_file_hugepages(file) BUG() 187#define set_file_hugepages(file) BUG()
188#define hugetlb_zero_setup(size) ERR_PTR(-ENOSYS) 188#define hugetlb_file_setup(name,size) ERR_PTR(-ENOSYS)
189 189
190#endif /* !CONFIG_HUGETLBFS */ 190#endif /* !CONFIG_HUGETLBFS */
191 191
diff --git a/include/linux/ktime.h b/include/linux/ktime.h
index c762954bda1..2b139f66027 100644
--- a/include/linux/ktime.h
+++ b/include/linux/ktime.h
@@ -261,6 +261,18 @@ static inline s64 ktime_to_ns(const ktime_t kt)
261 261
262#endif 262#endif
263 263
264/**
265 * ktime_equal - Compares two ktime_t variables to see if they are equal
266 * @cmp1: comparable1
267 * @cmp2: comparable2
268 *
269 * Compare two ktime_t variables, returns 1 if equal
270 */
271static inline int ktime_equal(const ktime_t cmp1, const ktime_t cmp2)
272{
273 return cmp1.tv64 == cmp2.tv64;
274}
275
264static inline s64 ktime_to_us(const ktime_t kt) 276static inline s64 ktime_to_us(const ktime_t kt)
265{ 277{
266 struct timeval tv = ktime_to_timeval(kt); 278 struct timeval tv = ktime_to_timeval(kt);
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index e7367c74e1b..6f0b2f7d001 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -1579,6 +1579,10 @@ static inline ktime_t net_timedelta(ktime_t t)
1579 return ktime_sub(ktime_get_real(), t); 1579 return ktime_sub(ktime_get_real(), t);
1580} 1580}
1581 1581
1582static inline ktime_t net_invalid_timestamp(void)
1583{
1584 return ktime_set(0, 0);
1585}
1582 1586
1583extern __sum16 __skb_checksum_complete_head(struct sk_buff *skb, int len); 1587extern __sum16 __skb_checksum_complete_head(struct sk_buff *skb, int len);
1584extern __sum16 __skb_checksum_complete(struct sk_buff *skb); 1588extern __sum16 __skb_checksum_complete(struct sk_buff *skb);
diff --git a/include/linux/slub_def.h b/include/linux/slub_def.h
index a0ad37463d6..6207a3d8da7 100644
--- a/include/linux/slub_def.h
+++ b/include/linux/slub_def.h
@@ -28,7 +28,7 @@ struct kmem_cache {
28 int size; /* The size of an object including meta data */ 28 int size; /* The size of an object including meta data */
29 int objsize; /* The size of an object without meta data */ 29 int objsize; /* The size of an object without meta data */
30 int offset; /* Free pointer offset. */ 30 int offset; /* Free pointer offset. */
31 unsigned int order; 31 int order;
32 32
33 /* 33 /*
34 * Avoid an extra cache line for UP, SMP and for the node local to 34 * Avoid an extra cache line for UP, SMP and for the node local to
@@ -56,7 +56,13 @@ struct kmem_cache {
56/* 56/*
57 * Kmalloc subsystem. 57 * Kmalloc subsystem.
58 */ 58 */
59#define KMALLOC_SHIFT_LOW 3 59#if defined(ARCH_KMALLOC_MINALIGN) && ARCH_KMALLOC_MINALIGN > 8
60#define KMALLOC_MIN_SIZE ARCH_KMALLOC_MINALIGN
61#else
62#define KMALLOC_MIN_SIZE 8
63#endif
64
65#define KMALLOC_SHIFT_LOW ilog2(KMALLOC_MIN_SIZE)
60 66
61/* 67/*
62 * We keep the general caches in an array of slab caches that are used for 68 * We keep the general caches in an array of slab caches that are used for
@@ -76,6 +82,9 @@ static inline int kmalloc_index(size_t size)
76 if (size > KMALLOC_MAX_SIZE) 82 if (size > KMALLOC_MAX_SIZE)
77 return -1; 83 return -1;
78 84
85 if (size <= KMALLOC_MIN_SIZE)
86 return KMALLOC_SHIFT_LOW;
87
79 if (size > 64 && size <= 96) 88 if (size > 64 && size <= 96)
80 return 1; 89 return 1;
81 if (size > 128 && size <= 192) 90 if (size > 128 && size <= 192)
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index b6bedc3ee95..1be5ea05947 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -341,9 +341,14 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum);
341 * chip transactions together. 341 * chip transactions together.
342 * 342 *
343 * (ii) When the transfer is the last one in the message, the chip may 343 * (ii) When the transfer is the last one in the message, the chip may
344 * stay selected until the next transfer. This is purely a performance 344 * stay selected until the next transfer. On multi-device SPI busses
345 * hint; the controller driver may need to select a different device 345 * with nothing blocking messages going to other devices, this is just
346 * for the next message. 346 * a performance hint; starting a message to another device deselects
347 * this one. But in other cases, this can be used to ensure correctness.
348 * Some devices need protocol transactions to be built from a series of
349 * spi_message submissions, where the content of one message is determined
350 * by the results of previous messages and where the whole transaction
351 * ends when the chipselect goes intactive.
347 * 352 *
348 * The code that submits an spi_message (and its spi_transfers) 353 * The code that submits an spi_message (and its spi_transfers)
349 * to the lower layers is responsible for managing its memory. 354 * to the lower layers is responsible for managing its memory.
@@ -480,14 +485,15 @@ static inline void spi_message_free(struct spi_message *m)
480/** 485/**
481 * spi_setup - setup SPI mode and clock rate 486 * spi_setup - setup SPI mode and clock rate
482 * @spi: the device whose settings are being modified 487 * @spi: the device whose settings are being modified
483 * Context: can sleep 488 * Context: can sleep, and no requests are queued to the device
484 * 489 *
485 * SPI protocol drivers may need to update the transfer mode if the 490 * SPI protocol drivers may need to update the transfer mode if the
486 * device doesn't work with the mode 0 default. They may likewise need 491 * device doesn't work with its default. They may likewise need
487 * to update clock rates or word sizes from initial values. This function 492 * to update clock rates or word sizes from initial values. This function
488 * changes those settings, and must be called from a context that can sleep. 493 * changes those settings, and must be called from a context that can sleep.
489 * The changes take effect the next time the device is selected and data 494 * Except for SPI_CS_HIGH, which takes effect immediately, the changes take
490 * is transferred to or from it. 495 * effect the next time the device is selected and data is transferred to
496 * or from it. When this function returns, the spi device is deselected.
491 * 497 *
492 * Note that this call will fail if the protocol driver specifies an option 498 * Note that this call will fail if the protocol driver specifies an option
493 * that the underlying controller or its driver does not support. For 499 * that the underlying controller or its driver does not support. For
diff --git a/include/net/irda/irlap.h b/include/net/irda/irlap.h
index f0248fb8e19..a3d370efb90 100644
--- a/include/net/irda/irlap.h
+++ b/include/net/irda/irlap.h
@@ -289,4 +289,21 @@ static inline void irlap_clear_disconnect(struct irlap_cb *self)
289 self->disconnect_pending = FALSE; 289 self->disconnect_pending = FALSE;
290} 290}
291 291
292/*
293 * Function irlap_next_state (self, state)
294 *
295 * Switches state and provides debug information
296 *
297 */
298static inline void irlap_next_state(struct irlap_cb *self, IRLAP_STATE state)
299{
300 /*
301 if (!self || self->magic != LAP_MAGIC)
302 return;
303
304 IRDA_DEBUG(4, "next LAP state = %s\n", irlap_state[state]);
305 */
306 self->state = state;
307}
308
292#endif 309#endif
diff --git a/include/net/sctp/sctp.h b/include/net/sctp/sctp.h
index dda72bf5b9b..16baef4dab7 100644
--- a/include/net/sctp/sctp.h
+++ b/include/net/sctp/sctp.h
@@ -503,6 +503,13 @@ static inline int sctp_frag_point(const struct sctp_sock *sp, int pmtu)
503 return frag; 503 return frag;
504} 504}
505 505
506static inline void sctp_assoc_pending_pmtu(struct sctp_association *asoc)
507{
508
509 sctp_assoc_sync_pmtu(asoc);
510 asoc->pmtu_pending = 0;
511}
512
506/* Walk through a list of TLV parameters. Don't trust the 513/* Walk through a list of TLV parameters. Don't trust the
507 * individual parameter lengths and instead depend on 514 * individual parameter lengths and instead depend on
508 * the chunk length to indicate when to stop. Make sure 515 * the chunk length to indicate when to stop. Make sure
diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h
index 5e81984b847..ee4559b1130 100644
--- a/include/net/sctp/structs.h
+++ b/include/net/sctp/structs.h
@@ -912,6 +912,9 @@ struct sctp_transport {
912 */ 912 */
913 __u16 pathmaxrxt; 913 __u16 pathmaxrxt;
914 914
915 /* is the Path MTU update pending on this tranport */
916 __u8 pmtu_pending;
917
915 /* PMTU : The current known path MTU. */ 918 /* PMTU : The current known path MTU. */
916 __u32 pathmtu; 919 __u32 pathmtu;
917 920
@@ -1006,6 +1009,7 @@ void sctp_transport_raise_cwnd(struct sctp_transport *, __u32, __u32);
1006void sctp_transport_lower_cwnd(struct sctp_transport *, sctp_lower_cwnd_t); 1009void sctp_transport_lower_cwnd(struct sctp_transport *, sctp_lower_cwnd_t);
1007unsigned long sctp_transport_timeout(struct sctp_transport *); 1010unsigned long sctp_transport_timeout(struct sctp_transport *);
1008void sctp_transport_reset(struct sctp_transport *); 1011void sctp_transport_reset(struct sctp_transport *);
1012void sctp_transport_update_pmtu(struct sctp_transport *, u32);
1009 1013
1010 1014
1011/* This is the structure we use to queue packets as they come into 1015/* This is the structure we use to queue packets as they come into
@@ -1565,6 +1569,9 @@ struct sctp_association {
1565 */ 1569 */
1566 __u16 pathmaxrxt; 1570 __u16 pathmaxrxt;
1567 1571
1572 /* Flag that path mtu update is pending */
1573 __u8 pmtu_pending;
1574
1568 /* Association : The smallest PMTU discovered for all of the 1575 /* Association : The smallest PMTU discovered for all of the
1569 * PMTU : peer's transport addresses. 1576 * PMTU : peer's transport addresses.
1570 */ 1577 */
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-23 14:28:21 -0400