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-rw-r--r--include/linux/ssb/ssb.h6
-rw-r--r--include/linux/ssb/ssb_driver_chipcommon.h12
-rw-r--r--include/linux/ssb/ssb_driver_extif.h53
-rw-r--r--include/linux/ssb/ssb_driver_mips.h10
-rw-r--r--include/linux/ssb/ssb_regs.h2
5 files changed, 72 insertions, 11 deletions
diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h
index bb674c02f30..22958d68ecf 100644
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
@@ -6,8 +6,10 @@
6#include <linux/types.h> 6#include <linux/types.h>
7#include <linux/spinlock.h> 7#include <linux/spinlock.h>
8#include <linux/pci.h> 8#include <linux/pci.h>
9#include <linux/gpio.h>
9#include <linux/mod_devicetable.h> 10#include <linux/mod_devicetable.h>
10#include <linux/dma-mapping.h> 11#include <linux/dma-mapping.h>
12#include <linux/platform_device.h>
11 13
12#include <linux/ssb/ssb_regs.h> 14#include <linux/ssb/ssb_regs.h>
13 15
@@ -432,7 +434,11 @@ struct ssb_bus {
432#ifdef CONFIG_SSB_EMBEDDED 434#ifdef CONFIG_SSB_EMBEDDED
433 /* Lock for GPIO register access. */ 435 /* Lock for GPIO register access. */
434 spinlock_t gpio_lock; 436 spinlock_t gpio_lock;
437 struct platform_device *watchdog;
435#endif /* EMBEDDED */ 438#endif /* EMBEDDED */
439#ifdef CONFIG_SSB_DRIVER_GPIO
440 struct gpio_chip gpio;
441#endif /* DRIVER_GPIO */
436 442
437 /* Internal-only stuff follows. Do not touch. */ 443 /* Internal-only stuff follows. Do not touch. */
438 struct list_head list; 444 struct list_head list;
diff --git a/include/linux/ssb/ssb_driver_chipcommon.h b/include/linux/ssb/ssb_driver_chipcommon.h
index 1a6b0045b06..9e492be5244 100644
--- a/include/linux/ssb/ssb_driver_chipcommon.h
+++ b/include/linux/ssb/ssb_driver_chipcommon.h
@@ -504,7 +504,9 @@
504#define SSB_CHIPCO_FLASHCTL_ST_SE 0x02D8 /* Sector Erase */ 504#define SSB_CHIPCO_FLASHCTL_ST_SE 0x02D8 /* Sector Erase */
505#define SSB_CHIPCO_FLASHCTL_ST_BE 0x00C7 /* Bulk Erase */ 505#define SSB_CHIPCO_FLASHCTL_ST_BE 0x00C7 /* Bulk Erase */
506#define SSB_CHIPCO_FLASHCTL_ST_DP 0x00B9 /* Deep Power-down */ 506#define SSB_CHIPCO_FLASHCTL_ST_DP 0x00B9 /* Deep Power-down */
507#define SSB_CHIPCO_FLASHCTL_ST_RSIG 0x03AB /* Read Electronic Signature */ 507#define SSB_CHIPCO_FLASHCTL_ST_RES 0x03AB /* Read Electronic Signature */
508#define SSB_CHIPCO_FLASHCTL_ST_CSA 0x1000 /* Keep chip select asserted */
509#define SSB_CHIPCO_FLASHCTL_ST_SSE 0x0220 /* Sub-sector Erase */
508 510
509/* Status register bits for ST flashes */ 511/* Status register bits for ST flashes */
510#define SSB_CHIPCO_FLASHSTA_ST_WIP 0x01 /* Write In Progress */ 512#define SSB_CHIPCO_FLASHSTA_ST_WIP 0x01 /* Write In Progress */
@@ -588,7 +590,10 @@ struct ssb_chipcommon {
588 u32 status; 590 u32 status;
589 /* Fast Powerup Delay constant */ 591 /* Fast Powerup Delay constant */
590 u16 fast_pwrup_delay; 592 u16 fast_pwrup_delay;
593 spinlock_t gpio_lock;
591 struct ssb_chipcommon_pmu pmu; 594 struct ssb_chipcommon_pmu pmu;
595 u32 ticks_per_ms;
596 u32 max_timer_ms;
592}; 597};
593 598
594static inline bool ssb_chipco_available(struct ssb_chipcommon *cc) 599static inline bool ssb_chipco_available(struct ssb_chipcommon *cc)
@@ -628,8 +633,7 @@ enum ssb_clkmode {
628extern void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc, 633extern void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc,
629 enum ssb_clkmode mode); 634 enum ssb_clkmode mode);
630 635
631extern void ssb_chipco_watchdog_timer_set(struct ssb_chipcommon *cc, 636extern u32 ssb_chipco_watchdog_timer_set(struct ssb_chipcommon *cc, u32 ticks);
632 u32 ticks);
633 637
634void ssb_chipco_irq_mask(struct ssb_chipcommon *cc, u32 mask, u32 value); 638void ssb_chipco_irq_mask(struct ssb_chipcommon *cc, u32 mask, u32 value);
635 639
@@ -642,6 +646,8 @@ u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value);
642u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value); 646u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value);
643u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value); 647u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value);
644u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value); 648u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value);
649u32 ssb_chipco_gpio_pullup(struct ssb_chipcommon *cc, u32 mask, u32 value);
650u32 ssb_chipco_gpio_pulldown(struct ssb_chipcommon *cc, u32 mask, u32 value);
645 651
646#ifdef CONFIG_SSB_SERIAL 652#ifdef CONFIG_SSB_SERIAL
647extern int ssb_chipco_serial_init(struct ssb_chipcommon *cc, 653extern int ssb_chipco_serial_init(struct ssb_chipcommon *cc,
diff --git a/include/linux/ssb/ssb_driver_extif.h b/include/linux/ssb/ssb_driver_extif.h
index 91161f0aa22..a410e841eb9 100644
--- a/include/linux/ssb/ssb_driver_extif.h
+++ b/include/linux/ssb/ssb_driver_extif.h
@@ -152,12 +152,16 @@
152/* watchdog */ 152/* watchdog */
153#define SSB_EXTIF_WATCHDOG_CLK 48000000 /* Hz */ 153#define SSB_EXTIF_WATCHDOG_CLK 48000000 /* Hz */
154 154
155#define SSB_EXTIF_WATCHDOG_MAX_TIMER ((1 << 28) - 1)
156#define SSB_EXTIF_WATCHDOG_MAX_TIMER_MS (SSB_EXTIF_WATCHDOG_MAX_TIMER \
157 / (SSB_EXTIF_WATCHDOG_CLK / 1000))
155 158
156 159
157#ifdef CONFIG_SSB_DRIVER_EXTIF 160#ifdef CONFIG_SSB_DRIVER_EXTIF
158 161
159struct ssb_extif { 162struct ssb_extif {
160 struct ssb_device *dev; 163 struct ssb_device *dev;
164 spinlock_t gpio_lock;
161}; 165};
162 166
163static inline bool ssb_extif_available(struct ssb_extif *extif) 167static inline bool ssb_extif_available(struct ssb_extif *extif)
@@ -171,8 +175,7 @@ extern void ssb_extif_get_clockcontrol(struct ssb_extif *extif,
171extern void ssb_extif_timing_init(struct ssb_extif *extif, 175extern void ssb_extif_timing_init(struct ssb_extif *extif,
172 unsigned long ns); 176 unsigned long ns);
173 177
174extern void ssb_extif_watchdog_timer_set(struct ssb_extif *extif, 178extern u32 ssb_extif_watchdog_timer_set(struct ssb_extif *extif, u32 ticks);
175 u32 ticks);
176 179
177/* Extif GPIO pin access */ 180/* Extif GPIO pin access */
178u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask); 181u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask);
@@ -205,10 +208,52 @@ void ssb_extif_get_clockcontrol(struct ssb_extif *extif,
205} 208}
206 209
207static inline 210static inline
208void ssb_extif_watchdog_timer_set(struct ssb_extif *extif, 211void ssb_extif_timing_init(struct ssb_extif *extif, unsigned long ns)
209 u32 ticks)
210{ 212{
211} 213}
212 214
215static inline
216u32 ssb_extif_watchdog_timer_set(struct ssb_extif *extif, u32 ticks)
217{
218 return 0;
219}
220
221static inline u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask)
222{
223 return 0;
224}
225
226static inline u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask,
227 u32 value)
228{
229 return 0;
230}
231
232static inline u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask,
233 u32 value)
234{
235 return 0;
236}
237
238static inline u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask,
239 u32 value)
240{
241 return 0;
242}
243
244static inline u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask,
245 u32 value)
246{
247 return 0;
248}
249
250#ifdef CONFIG_SSB_SERIAL
251static inline int ssb_extif_serial_init(struct ssb_extif *extif,
252 struct ssb_serial_port *ports)
253{
254 return 0;
255}
256#endif /* CONFIG_SSB_SERIAL */
257
213#endif /* CONFIG_SSB_DRIVER_EXTIF */ 258#endif /* CONFIG_SSB_DRIVER_EXTIF */
214#endif /* LINUX_SSB_EXTIFCORE_H_ */ 259#endif /* LINUX_SSB_EXTIFCORE_H_ */
diff --git a/include/linux/ssb/ssb_driver_mips.h b/include/linux/ssb/ssb_driver_mips.h
index 5f44e9740cd..07a9c7a2e08 100644
--- a/include/linux/ssb/ssb_driver_mips.h
+++ b/include/linux/ssb/ssb_driver_mips.h
@@ -13,6 +13,12 @@ struct ssb_serial_port {
13 unsigned int reg_shift; 13 unsigned int reg_shift;
14}; 14};
15 15
16struct ssb_pflash {
17 bool present;
18 u8 buswidth;
19 u32 window;
20 u32 window_size;
21};
16 22
17struct ssb_mipscore { 23struct ssb_mipscore {
18 struct ssb_device *dev; 24 struct ssb_device *dev;
@@ -20,9 +26,7 @@ struct ssb_mipscore {
20 int nr_serial_ports; 26 int nr_serial_ports;
21 struct ssb_serial_port serial_ports[4]; 27 struct ssb_serial_port serial_ports[4];
22 28
23 u8 flash_buswidth; 29 struct ssb_pflash pflash;
24 u32 flash_window;
25 u32 flash_window_size;
26}; 30};
27 31
28extern void ssb_mipscore_init(struct ssb_mipscore *mcore); 32extern void ssb_mipscore_init(struct ssb_mipscore *mcore);
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h
index a0525019e1d..6ecfa02ddba 100644
--- a/include/linux/ssb/ssb_regs.h
+++ b/include/linux/ssb/ssb_regs.h
@@ -485,7 +485,7 @@
485#define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT 4 485#define SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT 4
486#define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL 0x0020 486#define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL 0x0020
487#define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT 5 487#define SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT 5
488#define SSB_SPROM8_TEMPDELTA 0x00BA 488#define SSB_SPROM8_TEMPDELTA 0x00BC
489#define SSB_SPROM8_TEMPDELTA_PHYCAL 0x00ff 489#define SSB_SPROM8_TEMPDELTA_PHYCAL 0x00ff
490#define SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT 0 490#define SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT 0
491#define SSB_SPROM8_TEMPDELTA_PERIOD 0x0f00 491#define SSB_SPROM8_TEMPDELTA_PERIOD 0x0f00