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Diffstat (limited to 'include/asm-x86/cpufeature.h')
-rw-r--r--include/asm-x86/cpufeature.h14
1 files changed, 11 insertions, 3 deletions
diff --git a/include/asm-x86/cpufeature.h b/include/asm-x86/cpufeature.h
index 3fb7dfa7fc9..065e92966c7 100644
--- a/include/asm-x86/cpufeature.h
+++ b/include/asm-x86/cpufeature.h
@@ -4,9 +4,6 @@
4#ifndef _ASM_X86_CPUFEATURE_H 4#ifndef _ASM_X86_CPUFEATURE_H
5#define _ASM_X86_CPUFEATURE_H 5#define _ASM_X86_CPUFEATURE_H
6 6
7#ifndef __ASSEMBLY__
8#include <linux/bitops.h>
9#endif
10#include <asm/required-features.h> 7#include <asm/required-features.h>
11 8
12#define NCAPINTS 8 /* N 32-bit words worth of info */ 9#define NCAPINTS 8 /* N 32-bit words worth of info */
@@ -49,6 +46,7 @@
49#define X86_FEATURE_MP (1*32+19) /* MP Capable. */ 46#define X86_FEATURE_MP (1*32+19) /* MP Capable. */
50#define X86_FEATURE_NX (1*32+20) /* Execute Disable */ 47#define X86_FEATURE_NX (1*32+20) /* Execute Disable */
51#define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */ 48#define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */
49#define X86_FEATURE_GBPAGES (1*32+26) /* GB pages */
52#define X86_FEATURE_RDTSCP (1*32+27) /* RDTSCP */ 50#define X86_FEATURE_RDTSCP (1*32+27) /* RDTSCP */
53#define X86_FEATURE_LM (1*32+29) /* Long Mode (x86-64) */ 51#define X86_FEATURE_LM (1*32+29) /* Long Mode (x86-64) */
54#define X86_FEATURE_3DNOWEXT (1*32+30) /* AMD 3DNow! extensions */ 52#define X86_FEATURE_3DNOWEXT (1*32+30) /* AMD 3DNow! extensions */
@@ -115,6 +113,13 @@
115 */ 113 */
116#define X86_FEATURE_IDA (7*32+ 0) /* Intel Dynamic Acceleration */ 114#define X86_FEATURE_IDA (7*32+ 0) /* Intel Dynamic Acceleration */
117 115
116#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
117
118#include <linux/bitops.h>
119
120extern const char * const x86_cap_flags[NCAPINTS*32];
121extern const char * const x86_power_flags[32];
122
118#define cpu_has(c, bit) \ 123#define cpu_has(c, bit) \
119 (__builtin_constant_p(bit) && \ 124 (__builtin_constant_p(bit) && \
120 ( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0)) || \ 125 ( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0)) || \
@@ -175,6 +180,7 @@
175#define cpu_has_pebs boot_cpu_has(X86_FEATURE_PEBS) 180#define cpu_has_pebs boot_cpu_has(X86_FEATURE_PEBS)
176#define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLSH) 181#define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLSH)
177#define cpu_has_bts boot_cpu_has(X86_FEATURE_BTS) 182#define cpu_has_bts boot_cpu_has(X86_FEATURE_BTS)
183#define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES)
178 184
179#if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64) 185#if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64)
180# define cpu_has_invlpg 1 186# define cpu_has_invlpg 1
@@ -204,4 +210,6 @@
204 210
205#endif /* CONFIG_X86_64 */ 211#endif /* CONFIG_X86_64 */
206 212
213#endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */
214
207#endif /* _ASM_X86_CPUFEATURE_H */ 215#endif /* _ASM_X86_CPUFEATURE_H */