diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/video/omap2/dss/hdmi.c | 27 |
1 files changed, 13 insertions, 14 deletions
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c index 8af1dc48453..76e1142e4b6 100644 --- a/drivers/video/omap2/dss/hdmi.c +++ b/drivers/video/omap2/dss/hdmi.c | |||
@@ -1052,25 +1052,26 @@ static void update_hdmi_timings(struct hdmi_config *cfg, | |||
1052 | cfg->timings.hsync_pol = cea_vesa_timings[code].hsync_pol; | 1052 | cfg->timings.hsync_pol = cea_vesa_timings[code].hsync_pol; |
1053 | } | 1053 | } |
1054 | 1054 | ||
1055 | static void hdmi_compute_pll(unsigned long clkin, int phy, | 1055 | static void hdmi_compute_pll(struct omap_dss_device *dssdev, int phy, |
1056 | int n, struct hdmi_pll_info *pi) | 1056 | struct hdmi_pll_info *pi) |
1057 | { | 1057 | { |
1058 | unsigned long refclk; | 1058 | unsigned long clkin, refclk; |
1059 | u32 mf; | 1059 | u32 mf; |
1060 | 1060 | ||
1061 | clkin = dss_clk_get_rate(DSS_CLK_SYSCK) / 10000; | ||
1061 | /* | 1062 | /* |
1062 | * Input clock is predivided by N + 1 | 1063 | * Input clock is predivided by N + 1 |
1063 | * out put of which is reference clk | 1064 | * out put of which is reference clk |
1064 | */ | 1065 | */ |
1065 | refclk = clkin / (n + 1); | 1066 | pi->regn = dssdev->clocks.hdmi.regn; |
1066 | pi->regn = n; | 1067 | refclk = clkin / (pi->regn + 1); |
1067 | 1068 | ||
1068 | /* | 1069 | /* |
1069 | * multiplier is pixel_clk/ref_clk | 1070 | * multiplier is pixel_clk/ref_clk |
1070 | * Multiplying by 100 to avoid fractional part removal | 1071 | * Multiplying by 100 to avoid fractional part removal |
1071 | */ | 1072 | */ |
1072 | pi->regm = (phy * 100/(refclk))/100; | 1073 | pi->regm = (phy * 100 / (refclk)) / 100; |
1073 | pi->regm2 = 1; | 1074 | pi->regm2 = dssdev->clocks.hdmi.regm2; |
1074 | 1075 | ||
1075 | /* | 1076 | /* |
1076 | * fractional multiplier is remainder of the difference between | 1077 | * fractional multiplier is remainder of the difference between |
@@ -1078,14 +1079,14 @@ static void hdmi_compute_pll(unsigned long clkin, int phy, | |||
1078 | * multiplied by 2^18(262144) divided by the reference clock | 1079 | * multiplied by 2^18(262144) divided by the reference clock |
1079 | */ | 1080 | */ |
1080 | mf = (phy - pi->regm * refclk) * 262144; | 1081 | mf = (phy - pi->regm * refclk) * 262144; |
1081 | pi->regmf = mf/(refclk); | 1082 | pi->regmf = mf / (refclk); |
1082 | 1083 | ||
1083 | /* | 1084 | /* |
1084 | * Dcofreq should be set to 1 if required pixel clock | 1085 | * Dcofreq should be set to 1 if required pixel clock |
1085 | * is greater than 1000MHz | 1086 | * is greater than 1000MHz |
1086 | */ | 1087 | */ |
1087 | pi->dcofreq = phy > 1000 * 100; | 1088 | pi->dcofreq = phy > 1000 * 100; |
1088 | pi->regsd = ((pi->regm * clkin / 10) / ((n + 1) * 250) + 5) / 10; | 1089 | pi->regsd = ((pi->regm * clkin / 10) / ((pi->regn + 1) * 250) + 5) / 10; |
1089 | 1090 | ||
1090 | DSSDBG("M = %d Mf = %d\n", pi->regm, pi->regmf); | 1091 | DSSDBG("M = %d Mf = %d\n", pi->regm, pi->regmf); |
1091 | DSSDBG("range = %d sd = %d\n", pi->dcofreq, pi->regsd); | 1092 | DSSDBG("range = %d sd = %d\n", pi->dcofreq, pi->regsd); |
@@ -1106,7 +1107,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev) | |||
1106 | int r, code = 0; | 1107 | int r, code = 0; |
1107 | struct hdmi_pll_info pll_data; | 1108 | struct hdmi_pll_info pll_data; |
1108 | struct omap_video_timings *p; | 1109 | struct omap_video_timings *p; |
1109 | int clkin, n, phy; | 1110 | unsigned long phy; |
1110 | 1111 | ||
1111 | hdmi_enable_clocks(1); | 1112 | hdmi_enable_clocks(1); |
1112 | 1113 | ||
@@ -1126,11 +1127,9 @@ static int hdmi_power_on(struct omap_dss_device *dssdev) | |||
1126 | dssdev->panel.timings = cea_vesa_timings[code].timings; | 1127 | dssdev->panel.timings = cea_vesa_timings[code].timings; |
1127 | update_hdmi_timings(&hdmi.cfg, p, code); | 1128 | update_hdmi_timings(&hdmi.cfg, p, code); |
1128 | 1129 | ||
1129 | clkin = 3840; /* 38.4 MHz */ | ||
1130 | n = 15; /* this is a constant for our math */ | ||
1131 | phy = p->pixel_clock; | 1130 | phy = p->pixel_clock; |
1132 | 1131 | ||
1133 | hdmi_compute_pll(clkin, phy, n, &pll_data); | 1132 | hdmi_compute_pll(dssdev, phy, &pll_data); |
1134 | 1133 | ||
1135 | hdmi_wp_video_start(0); | 1134 | hdmi_wp_video_start(0); |
1136 | 1135 | ||
@@ -1160,7 +1159,7 @@ static int hdmi_power_on(struct omap_dss_device *dssdev) | |||
1160 | * dynamically by user. This can be moved to single location , say | 1159 | * dynamically by user. This can be moved to single location , say |
1161 | * Boardfile. | 1160 | * Boardfile. |
1162 | */ | 1161 | */ |
1163 | dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK); | 1162 | dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src); |
1164 | 1163 | ||
1165 | /* bypass TV gamma table */ | 1164 | /* bypass TV gamma table */ |
1166 | dispc_enable_gamma_table(0); | 1165 | dispc_enable_gamma_table(0); |