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-rw-r--r--drivers/usb/host/ehci-ps3.c30
1 files changed, 30 insertions, 0 deletions
diff --git a/drivers/usb/host/ehci-ps3.c b/drivers/usb/host/ehci-ps3.c
index 2dc32da75cf..a20e496eb47 100644
--- a/drivers/usb/host/ehci-ps3.c
+++ b/drivers/usb/host/ehci-ps3.c
@@ -21,6 +21,34 @@
21#include <asm/firmware.h> 21#include <asm/firmware.h>
22#include <asm/ps3.h> 22#include <asm/ps3.h>
23 23
24static void ps3_ehci_setup_insnreg(struct ehci_hcd *ehci)
25{
26 /* PS3 HC internal setup register offsets. */
27
28 enum ps3_ehci_hc_insnreg {
29 ps3_ehci_hc_insnreg01 = 0x084,
30 ps3_ehci_hc_insnreg02 = 0x088,
31 ps3_ehci_hc_insnreg03 = 0x08c,
32 };
33
34 /* PS3 EHCI HC errata fix 316 - The PS3 EHCI HC will reset its
35 * internal INSNREGXX setup regs back to the chip default values
36 * on Host Controller Reset (CMD_RESET) or Light Host Controller
37 * Reset (CMD_LRESET). The work-around for this is for the HC
38 * driver to re-initialise these regs when ever the HC is reset.
39 */
40
41 /* Set burst transfer counts to 256 out, 32 in. */
42
43 writel_be(0x01000020, (void __iomem *)ehci->regs +
44 ps3_ehci_hc_insnreg01);
45
46 /* Enable burst transfer counts. */
47
48 writel_be(0x00000001, (void __iomem *)ehci->regs +
49 ps3_ehci_hc_insnreg03);
50}
51
24static int ps3_ehci_hc_reset(struct usb_hcd *hcd) 52static int ps3_ehci_hc_reset(struct usb_hcd *hcd)
25{ 53{
26 int result; 54 int result;
@@ -49,6 +77,8 @@ static int ps3_ehci_hc_reset(struct usb_hcd *hcd)
49 77
50 ehci_reset(ehci); 78 ehci_reset(ehci);
51 79
80 ps3_ehci_setup_insnreg(ehci);
81
52 return result; 82 return result;
53} 83}
54 84