diff options
Diffstat (limited to 'drivers/usb/host')
58 files changed, 1665 insertions, 669 deletions
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index ab085f12d57..9179076801c 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig | |||
@@ -578,3 +578,9 @@ config USB_OCTEON_OHCI | |||
578 | config USB_OCTEON2_COMMON | 578 | config USB_OCTEON2_COMMON |
579 | bool | 579 | bool |
580 | default y if USB_OCTEON_EHCI || USB_OCTEON_OHCI | 580 | default y if USB_OCTEON_EHCI || USB_OCTEON_OHCI |
581 | |||
582 | config USB_EHCI_ONOFF_FEATURE | ||
583 | boolean "EHCI ON/OFF Feature" | ||
584 | depends on USB && USB_EHCI_HCD | ||
585 | help | ||
586 | Enable support for turning EHCI Off and On | ||
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 624a362f2fe..ea6d2e8f659 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile | |||
@@ -1,6 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Makefile for USB Host Controller Drivers | 2 | # Makefile for USB Host Controller Drivers |
3 | # | 3 | # |
4 | GCOV_PROFILE := y | ||
4 | 5 | ||
5 | ccflags-$(CONFIG_USB_DEBUG) := -DDEBUG | 6 | ccflags-$(CONFIG_USB_DEBUG) := -DDEBUG |
6 | 7 | ||
diff --git a/drivers/usb/host/ehci-ath79.c b/drivers/usb/host/ehci-ath79.c index aa248c2f2c6..4d2e88d04da 100644 --- a/drivers/usb/host/ehci-ath79.c +++ b/drivers/usb/host/ehci-ath79.c | |||
@@ -148,7 +148,7 @@ static int ehci_ath79_probe(struct platform_device *pdev) | |||
148 | return -ENOMEM; | 148 | return -ENOMEM; |
149 | 149 | ||
150 | hcd->rsrc_start = res->start; | 150 | hcd->rsrc_start = res->start; |
151 | hcd->rsrc_len = res->end - res->start + 1; | 151 | hcd->rsrc_len = resource_size(res); |
152 | 152 | ||
153 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | 153 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { |
154 | dev_dbg(&pdev->dev, "controller already in use\n"); | 154 | dev_dbg(&pdev->dev, "controller already in use\n"); |
diff --git a/drivers/usb/host/ehci-cns3xxx.c b/drivers/usb/host/ehci-cns3xxx.c index d41745c6f0c..6536abdea6e 100644 --- a/drivers/usb/host/ehci-cns3xxx.c +++ b/drivers/usb/host/ehci-cns3xxx.c | |||
@@ -107,7 +107,7 @@ static int cns3xxx_ehci_probe(struct platform_device *pdev) | |||
107 | } | 107 | } |
108 | 108 | ||
109 | hcd->rsrc_start = res->start; | 109 | hcd->rsrc_start = res->start; |
110 | hcd->rsrc_len = res->end - res->start + 1; | 110 | hcd->rsrc_len = resource_size(res); |
111 | 111 | ||
112 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, | 112 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, |
113 | driver->description)) { | 113 | driver->description)) { |
diff --git a/drivers/usb/host/ehci-dbg.c b/drivers/usb/host/ehci-dbg.c index 40a844c1dbb..3e2ccb0dd25 100644 --- a/drivers/usb/host/ehci-dbg.c +++ b/drivers/usb/host/ehci-dbg.c | |||
@@ -808,7 +808,7 @@ static ssize_t fill_registers_buffer(struct debug_buffer *buf) | |||
808 | next += temp; | 808 | next += temp; |
809 | 809 | ||
810 | temp = scnprintf (next, size, "uframe %04x\n", | 810 | temp = scnprintf (next, size, "uframe %04x\n", |
811 | ehci_readl(ehci, &ehci->regs->frame_index)); | 811 | ehci_read_frame_index(ehci)); |
812 | size -= temp; | 812 | size -= temp; |
813 | next += temp; | 813 | next += temp; |
814 | 814 | ||
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index f380bf97e5a..53ca216657d 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c | |||
@@ -100,7 +100,7 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver, | |||
100 | goto err2; | 100 | goto err2; |
101 | } | 101 | } |
102 | hcd->rsrc_start = res->start; | 102 | hcd->rsrc_start = res->start; |
103 | hcd->rsrc_len = res->end - res->start + 1; | 103 | hcd->rsrc_len = resource_size(res); |
104 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, | 104 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, |
105 | driver->description)) { | 105 | driver->description)) { |
106 | dev_dbg(&pdev->dev, "controller already in use\n"); | 106 | dev_dbg(&pdev->dev, "controller already in use\n"); |
@@ -117,15 +117,12 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver, | |||
117 | 117 | ||
118 | pdata->regs = hcd->regs; | 118 | pdata->regs = hcd->regs; |
119 | 119 | ||
120 | if (pdata->power_budget) | ||
121 | hcd->power_budget = pdata->power_budget; | ||
122 | |||
123 | /* | 120 | /* |
124 | * do platform specific init: check the clock, grab/config pins, etc. | 121 | * do platform specific init: check the clock, grab/config pins, etc. |
125 | */ | 122 | */ |
126 | if (pdata->init && pdata->init(pdev)) { | 123 | if (pdata->init && pdata->init(pdev)) { |
127 | retval = -ENODEV; | 124 | retval = -ENODEV; |
128 | goto err3; | 125 | goto err4; |
129 | } | 126 | } |
130 | 127 | ||
131 | /* Enable USB controller, 83xx or 8536 */ | 128 | /* Enable USB controller, 83xx or 8536 */ |
@@ -137,30 +134,6 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver, | |||
137 | retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED); | 134 | retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED); |
138 | if (retval != 0) | 135 | if (retval != 0) |
139 | goto err4; | 136 | goto err4; |
140 | |||
141 | #ifdef CONFIG_USB_OTG | ||
142 | if (pdata->operating_mode == FSL_USB2_DR_OTG) { | ||
143 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | ||
144 | |||
145 | ehci->transceiver = otg_get_transceiver(); | ||
146 | dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, transceiver=0x%p\n", | ||
147 | hcd, ehci, ehci->transceiver); | ||
148 | |||
149 | if (ehci->transceiver) { | ||
150 | retval = otg_set_host(ehci->transceiver, | ||
151 | &ehci_to_hcd(ehci)->self); | ||
152 | if (retval) { | ||
153 | if (ehci->transceiver) | ||
154 | put_device(ehci->transceiver->dev); | ||
155 | goto err4; | ||
156 | } | ||
157 | } else { | ||
158 | dev_err(&pdev->dev, "can't find transceiver\n"); | ||
159 | retval = -ENODEV; | ||
160 | goto err4; | ||
161 | } | ||
162 | } | ||
163 | #endif | ||
164 | return retval; | 137 | return retval; |
165 | 138 | ||
166 | err4: | 139 | err4: |
@@ -191,12 +164,6 @@ static void usb_hcd_fsl_remove(struct usb_hcd *hcd, | |||
191 | struct platform_device *pdev) | 164 | struct platform_device *pdev) |
192 | { | 165 | { |
193 | struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; | 166 | struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; |
194 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | ||
195 | |||
196 | if (ehci->transceiver) { | ||
197 | otg_set_host(ehci->transceiver, NULL); | ||
198 | put_device(ehci->transceiver->dev); | ||
199 | } | ||
200 | 167 | ||
201 | usb_remove_hcd(hcd); | 168 | usb_remove_hcd(hcd); |
202 | 169 | ||
@@ -577,38 +544,6 @@ static struct dev_pm_ops ehci_fsl_pm_ops = { | |||
577 | #define EHCI_FSL_PM_OPS NULL | 544 | #define EHCI_FSL_PM_OPS NULL |
578 | #endif /* CONFIG_PM */ | 545 | #endif /* CONFIG_PM */ |
579 | 546 | ||
580 | #ifdef CONFIG_USB_OTG | ||
581 | static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port) | ||
582 | { | ||
583 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | ||
584 | u32 status; | ||
585 | |||
586 | if (!port) | ||
587 | return -EINVAL; | ||
588 | |||
589 | port--; | ||
590 | |||
591 | /* start port reset before HNP protocol time out */ | ||
592 | status = readl(&ehci->regs->port_status[port]); | ||
593 | if (!(status & PORT_CONNECT)) | ||
594 | return -ENODEV; | ||
595 | |||
596 | /* khubd will finish the reset later */ | ||
597 | if (ehci_is_TDI(ehci)) { | ||
598 | writel(PORT_RESET | | ||
599 | (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)), | ||
600 | &ehci->regs->port_status[port]); | ||
601 | } else { | ||
602 | writel(PORT_RESET, &ehci->regs->port_status[port]); | ||
603 | } | ||
604 | |||
605 | return 0; | ||
606 | } | ||
607 | #else | ||
608 | #define ehci_start_port_reset NULL | ||
609 | #endif /* CONFIG_USB_OTG */ | ||
610 | |||
611 | |||
612 | static const struct hc_driver ehci_fsl_hc_driver = { | 547 | static const struct hc_driver ehci_fsl_hc_driver = { |
613 | .description = hcd_name, | 548 | .description = hcd_name, |
614 | .product_desc = "Freescale On-Chip EHCI Host Controller", | 549 | .product_desc = "Freescale On-Chip EHCI Host Controller", |
@@ -648,7 +583,6 @@ static const struct hc_driver ehci_fsl_hc_driver = { | |||
648 | .hub_control = ehci_hub_control, | 583 | .hub_control = ehci_hub_control, |
649 | .bus_suspend = ehci_bus_suspend, | 584 | .bus_suspend = ehci_bus_suspend, |
650 | .bus_resume = ehci_bus_resume, | 585 | .bus_resume = ehci_bus_resume, |
651 | .start_port_reset = ehci_start_port_reset, | ||
652 | .relinquish_port = ehci_relinquish_port, | 586 | .relinquish_port = ehci_relinquish_port, |
653 | .port_handed_over = ehci_port_handed_over, | 587 | .port_handed_over = ehci_port_handed_over, |
654 | 588 | ||
diff --git a/drivers/usb/host/ehci-grlib.c b/drivers/usb/host/ehci-grlib.c index 93b230dc51a..fdfd8c5b639 100644 --- a/drivers/usb/host/ehci-grlib.c +++ b/drivers/usb/host/ehci-grlib.c | |||
@@ -130,7 +130,7 @@ static int __devinit ehci_hcd_grlib_probe(struct platform_device *op) | |||
130 | return -ENOMEM; | 130 | return -ENOMEM; |
131 | 131 | ||
132 | hcd->rsrc_start = res.start; | 132 | hcd->rsrc_start = res.start; |
133 | hcd->rsrc_len = res.end - res.start + 1; | 133 | hcd->rsrc_len = resource_size(&res); |
134 | 134 | ||
135 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | 135 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { |
136 | printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__); | 136 | printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__); |
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index f8030ee928e..1a534c70ea6 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c | |||
@@ -94,7 +94,8 @@ static const char hcd_name [] = "ehci_hcd"; | |||
94 | #define EHCI_IAA_MSECS 10 /* arbitrary */ | 94 | #define EHCI_IAA_MSECS 10 /* arbitrary */ |
95 | #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */ | 95 | #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */ |
96 | #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */ | 96 | #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */ |
97 | #define EHCI_SHRINK_FRAMES 5 /* async qh unlink delay */ | 97 | #define EHCI_SHRINK_JIFFIES (DIV_ROUND_UP(HZ, 200) + 1) |
98 | /* 200-ms async qh unlink delay */ | ||
98 | 99 | ||
99 | /* Initial IRQ latency: faster than hw default */ | 100 | /* Initial IRQ latency: faster than hw default */ |
100 | static int log2_irq_thresh = 0; // 0 to 6 | 101 | static int log2_irq_thresh = 0; // 0 to 6 |
@@ -114,7 +115,7 @@ MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications"); | |||
114 | /* for link power management(LPM) feature */ | 115 | /* for link power management(LPM) feature */ |
115 | static unsigned int hird; | 116 | static unsigned int hird; |
116 | module_param(hird, int, S_IRUGO); | 117 | module_param(hird, int, S_IRUGO); |
117 | MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us\n"); | 118 | MODULE_PARM_DESC(hird, "host initiated resume duration, +1 for each 75us"); |
118 | 119 | ||
119 | #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) | 120 | #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT) |
120 | 121 | ||
@@ -152,10 +153,7 @@ timer_action(struct ehci_hcd *ehci, enum ehci_timer_action action) | |||
152 | break; | 153 | break; |
153 | /* case TIMER_ASYNC_SHRINK: */ | 154 | /* case TIMER_ASYNC_SHRINK: */ |
154 | default: | 155 | default: |
155 | /* add a jiffie since we synch against the | 156 | t = EHCI_SHRINK_JIFFIES; |
156 | * 8 KHz uframe counter. | ||
157 | */ | ||
158 | t = DIV_ROUND_UP(EHCI_SHRINK_FRAMES * HZ, 1000) + 1; | ||
159 | break; | 157 | break; |
160 | } | 158 | } |
161 | mod_timer(&ehci->watchdog, t + jiffies); | 159 | mod_timer(&ehci->watchdog, t + jiffies); |
@@ -205,7 +203,10 @@ static int tdi_in_host_mode (struct ehci_hcd *ehci) | |||
205 | u32 __iomem *reg_ptr; | 203 | u32 __iomem *reg_ptr; |
206 | u32 tmp; | 204 | u32 tmp; |
207 | 205 | ||
208 | reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE); | 206 | if (ehci->has_hostpc) |
207 | reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE_EX); | ||
208 | else | ||
209 | reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE); | ||
209 | tmp = ehci_readl(ehci, reg_ptr); | 210 | tmp = ehci_readl(ehci, reg_ptr); |
210 | return (tmp & 3) == USBMODE_CM_HC; | 211 | return (tmp & 3) == USBMODE_CM_HC; |
211 | } | 212 | } |
@@ -279,7 +280,10 @@ static int ehci_reset (struct ehci_hcd *ehci) | |||
279 | 280 | ||
280 | command |= CMD_RESET; | 281 | command |= CMD_RESET; |
281 | dbg_cmd (ehci, "reset", command); | 282 | dbg_cmd (ehci, "reset", command); |
282 | ehci_writel(ehci, command, &ehci->regs->command); | 283 | #ifdef CONFIG_USB_EHCI_TEGRA |
284 | if (!ehci->controller_resets_phy) | ||
285 | #endif | ||
286 | ehci_writel(ehci, command, &ehci->regs->command); | ||
283 | ehci_to_hcd(ehci)->state = HC_STATE_HALT; | 287 | ehci_to_hcd(ehci)->state = HC_STATE_HALT; |
284 | ehci->next_statechange = jiffies; | 288 | ehci->next_statechange = jiffies; |
285 | retval = handshake (ehci, &ehci->regs->command, | 289 | retval = handshake (ehci, &ehci->regs->command, |
@@ -340,6 +344,7 @@ static void ehci_work(struct ehci_hcd *ehci); | |||
340 | #include "ehci-mem.c" | 344 | #include "ehci-mem.c" |
341 | #include "ehci-q.c" | 345 | #include "ehci-q.c" |
342 | #include "ehci-sched.c" | 346 | #include "ehci-sched.c" |
347 | #include "ehci-sysfs.c" | ||
343 | 348 | ||
344 | /*-------------------------------------------------------------------------*/ | 349 | /*-------------------------------------------------------------------------*/ |
345 | 350 | ||
@@ -524,7 +529,7 @@ static void ehci_stop (struct usb_hcd *hcd) | |||
524 | ehci_reset (ehci); | 529 | ehci_reset (ehci); |
525 | spin_unlock_irq(&ehci->lock); | 530 | spin_unlock_irq(&ehci->lock); |
526 | 531 | ||
527 | remove_companion_file(ehci); | 532 | remove_sysfs_files(ehci); |
528 | remove_debug_files (ehci); | 533 | remove_debug_files (ehci); |
529 | 534 | ||
530 | /* root hub is shut down separately (first, when possible) */ | 535 | /* root hub is shut down separately (first, when possible) */ |
@@ -575,6 +580,12 @@ static int ehci_init(struct usb_hcd *hcd) | |||
575 | hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params); | 580 | hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params); |
576 | 581 | ||
577 | /* | 582 | /* |
583 | * by default set standard 80% (== 100 usec/uframe) max periodic | ||
584 | * bandwidth as required by USB 2.0 | ||
585 | */ | ||
586 | ehci->uframe_periodic_max = 100; | ||
587 | |||
588 | /* | ||
578 | * hw default: 1K periodic list heads, one per frame. | 589 | * hw default: 1K periodic list heads, one per frame. |
579 | * periodic_size can shrink by USBCMD update if hcc_params allows. | 590 | * periodic_size can shrink by USBCMD update if hcc_params allows. |
580 | */ | 591 | */ |
@@ -758,7 +769,36 @@ static int ehci_run (struct usb_hcd *hcd) | |||
758 | * since the class device isn't created that early. | 769 | * since the class device isn't created that early. |
759 | */ | 770 | */ |
760 | create_debug_files(ehci); | 771 | create_debug_files(ehci); |
761 | create_companion_file(ehci); | 772 | create_sysfs_files(ehci); |
773 | |||
774 | return 0; | ||
775 | } | ||
776 | |||
777 | static int __maybe_unused ehci_setup (struct usb_hcd *hcd) | ||
778 | { | ||
779 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | ||
780 | int retval; | ||
781 | |||
782 | ehci->regs = (void __iomem *)ehci->caps + | ||
783 | HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase)); | ||
784 | dbg_hcs_params(ehci, "reset"); | ||
785 | dbg_hcc_params(ehci, "reset"); | ||
786 | |||
787 | /* cache this readonly data; minimize chip reads */ | ||
788 | ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); | ||
789 | |||
790 | ehci->sbrn = HCD_USB2; | ||
791 | |||
792 | retval = ehci_halt(ehci); | ||
793 | if (retval) | ||
794 | return retval; | ||
795 | |||
796 | /* data structure init */ | ||
797 | retval = ehci_init(hcd); | ||
798 | if (retval) | ||
799 | return retval; | ||
800 | |||
801 | ehci_reset(ehci); | ||
762 | 802 | ||
763 | return 0; | 803 | return 0; |
764 | } | 804 | } |
@@ -866,6 +906,9 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd) | |||
866 | ehci->reset_done[i] = jiffies + msecs_to_jiffies(25); | 906 | ehci->reset_done[i] = jiffies + msecs_to_jiffies(25); |
867 | ehci_dbg (ehci, "port %d remote wakeup\n", i + 1); | 907 | ehci_dbg (ehci, "port %d remote wakeup\n", i + 1); |
868 | mod_timer(&hcd->rh_timer, ehci->reset_done[i]); | 908 | mod_timer(&hcd->rh_timer, ehci->reset_done[i]); |
909 | #ifdef CONFIG_USB_EHCI_TEGRA | ||
910 | ehci->controller_remote_wakeup = true; | ||
911 | #endif | ||
869 | } | 912 | } |
870 | } | 913 | } |
871 | 914 | ||
@@ -1161,8 +1204,7 @@ ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep) | |||
1161 | static int ehci_get_frame (struct usb_hcd *hcd) | 1204 | static int ehci_get_frame (struct usb_hcd *hcd) |
1162 | { | 1205 | { |
1163 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | 1206 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); |
1164 | return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) % | 1207 | return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size; |
1165 | ehci->periodic_size; | ||
1166 | } | 1208 | } |
1167 | 1209 | ||
1168 | /*-------------------------------------------------------------------------*/ | 1210 | /*-------------------------------------------------------------------------*/ |
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c index ea6184bf48d..25ed607aab9 100644 --- a/drivers/usb/host/ehci-hub.c +++ b/drivers/usb/host/ehci-hub.c | |||
@@ -27,7 +27,6 @@ | |||
27 | */ | 27 | */ |
28 | 28 | ||
29 | /*-------------------------------------------------------------------------*/ | 29 | /*-------------------------------------------------------------------------*/ |
30 | #include <linux/usb/otg.h> | ||
31 | 30 | ||
32 | #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E) | 31 | #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E) |
33 | 32 | ||
@@ -285,7 +284,7 @@ static int ehci_bus_suspend (struct usb_hcd *hcd) | |||
285 | changed = 1; | 284 | changed = 1; |
286 | } | 285 | } |
287 | } | 286 | } |
288 | 287 | #ifdef CONFIG_ARCH_TEGRA_2x_SOC | |
289 | if (changed && ehci->has_hostpc) { | 288 | if (changed && ehci->has_hostpc) { |
290 | spin_unlock_irq(&ehci->lock); | 289 | spin_unlock_irq(&ehci->lock); |
291 | msleep(5); /* 5 ms for HCD to enter low-power mode */ | 290 | msleep(5); /* 5 ms for HCD to enter low-power mode */ |
@@ -306,7 +305,7 @@ static int ehci_bus_suspend (struct usb_hcd *hcd) | |||
306 | "succeeded" : "failed"); | 305 | "succeeded" : "failed"); |
307 | } | 306 | } |
308 | } | 307 | } |
309 | 308 | #endif | |
310 | /* Apparently some devices need a >= 1-uframe delay here */ | 309 | /* Apparently some devices need a >= 1-uframe delay here */ |
311 | if (ehci->bus_suspended) | 310 | if (ehci->bus_suspended) |
312 | udelay(150); | 311 | udelay(150); |
@@ -343,7 +342,7 @@ static int ehci_bus_resume (struct usb_hcd *hcd) | |||
343 | u32 temp; | 342 | u32 temp; |
344 | u32 power_okay; | 343 | u32 power_okay; |
345 | int i; | 344 | int i; |
346 | u8 resume_needed = 0; | 345 | unsigned long resume_needed = 0; |
347 | 346 | ||
348 | if (time_before (jiffies, ehci->next_statechange)) | 347 | if (time_before (jiffies, ehci->next_statechange)) |
349 | msleep(5); | 348 | msleep(5); |
@@ -416,7 +415,7 @@ static int ehci_bus_resume (struct usb_hcd *hcd) | |||
416 | if (test_bit(i, &ehci->bus_suspended) && | 415 | if (test_bit(i, &ehci->bus_suspended) && |
417 | (temp & PORT_SUSPEND)) { | 416 | (temp & PORT_SUSPEND)) { |
418 | temp |= PORT_RESUME; | 417 | temp |= PORT_RESUME; |
419 | resume_needed = 1; | 418 | set_bit(i, &resume_needed); |
420 | } | 419 | } |
421 | ehci_writel(ehci, temp, &ehci->regs->port_status [i]); | 420 | ehci_writel(ehci, temp, &ehci->regs->port_status [i]); |
422 | } | 421 | } |
@@ -431,8 +430,7 @@ static int ehci_bus_resume (struct usb_hcd *hcd) | |||
431 | i = HCS_N_PORTS (ehci->hcs_params); | 430 | i = HCS_N_PORTS (ehci->hcs_params); |
432 | while (i--) { | 431 | while (i--) { |
433 | temp = ehci_readl(ehci, &ehci->regs->port_status [i]); | 432 | temp = ehci_readl(ehci, &ehci->regs->port_status [i]); |
434 | if (test_bit(i, &ehci->bus_suspended) && | 433 | if (test_bit(i, &resume_needed)) { |
435 | (temp & PORT_SUSPEND)) { | ||
436 | temp &= ~(PORT_RWC_BITS | PORT_RESUME); | 434 | temp &= ~(PORT_RWC_BITS | PORT_RESUME); |
437 | ehci_writel(ehci, temp, &ehci->regs->port_status [i]); | 435 | ehci_writel(ehci, temp, &ehci->regs->port_status [i]); |
438 | ehci_vdbg (ehci, "resumed port %d\n", i + 1); | 436 | ehci_vdbg (ehci, "resumed port %d\n", i + 1); |
@@ -471,29 +469,6 @@ static int ehci_bus_resume (struct usb_hcd *hcd) | |||
471 | 469 | ||
472 | /*-------------------------------------------------------------------------*/ | 470 | /*-------------------------------------------------------------------------*/ |
473 | 471 | ||
474 | /* Display the ports dedicated to the companion controller */ | ||
475 | static ssize_t show_companion(struct device *dev, | ||
476 | struct device_attribute *attr, | ||
477 | char *buf) | ||
478 | { | ||
479 | struct ehci_hcd *ehci; | ||
480 | int nports, index, n; | ||
481 | int count = PAGE_SIZE; | ||
482 | char *ptr = buf; | ||
483 | |||
484 | ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); | ||
485 | nports = HCS_N_PORTS(ehci->hcs_params); | ||
486 | |||
487 | for (index = 0; index < nports; ++index) { | ||
488 | if (test_bit(index, &ehci->companion_ports)) { | ||
489 | n = scnprintf(ptr, count, "%d\n", index + 1); | ||
490 | ptr += n; | ||
491 | count -= n; | ||
492 | } | ||
493 | } | ||
494 | return ptr - buf; | ||
495 | } | ||
496 | |||
497 | /* | 472 | /* |
498 | * Sets the owner of a port | 473 | * Sets the owner of a port |
499 | */ | 474 | */ |
@@ -528,58 +503,6 @@ static void set_owner(struct ehci_hcd *ehci, int portnum, int new_owner) | |||
528 | } | 503 | } |
529 | } | 504 | } |
530 | 505 | ||
531 | /* | ||
532 | * Dedicate or undedicate a port to the companion controller. | ||
533 | * Syntax is "[-]portnum", where a leading '-' sign means | ||
534 | * return control of the port to the EHCI controller. | ||
535 | */ | ||
536 | static ssize_t store_companion(struct device *dev, | ||
537 | struct device_attribute *attr, | ||
538 | const char *buf, size_t count) | ||
539 | { | ||
540 | struct ehci_hcd *ehci; | ||
541 | int portnum, new_owner; | ||
542 | |||
543 | ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); | ||
544 | new_owner = PORT_OWNER; /* Owned by companion */ | ||
545 | if (sscanf(buf, "%d", &portnum) != 1) | ||
546 | return -EINVAL; | ||
547 | if (portnum < 0) { | ||
548 | portnum = - portnum; | ||
549 | new_owner = 0; /* Owned by EHCI */ | ||
550 | } | ||
551 | if (portnum <= 0 || portnum > HCS_N_PORTS(ehci->hcs_params)) | ||
552 | return -ENOENT; | ||
553 | portnum--; | ||
554 | if (new_owner) | ||
555 | set_bit(portnum, &ehci->companion_ports); | ||
556 | else | ||
557 | clear_bit(portnum, &ehci->companion_ports); | ||
558 | set_owner(ehci, portnum, new_owner); | ||
559 | return count; | ||
560 | } | ||
561 | static DEVICE_ATTR(companion, 0644, show_companion, store_companion); | ||
562 | |||
563 | static inline int create_companion_file(struct ehci_hcd *ehci) | ||
564 | { | ||
565 | int i = 0; | ||
566 | |||
567 | /* with integrated TT there is no companion! */ | ||
568 | if (!ehci_is_TDI(ehci)) | ||
569 | i = device_create_file(ehci_to_hcd(ehci)->self.controller, | ||
570 | &dev_attr_companion); | ||
571 | return i; | ||
572 | } | ||
573 | |||
574 | static inline void remove_companion_file(struct ehci_hcd *ehci) | ||
575 | { | ||
576 | /* with integrated TT there is no companion! */ | ||
577 | if (!ehci_is_TDI(ehci)) | ||
578 | device_remove_file(ehci_to_hcd(ehci)->self.controller, | ||
579 | &dev_attr_companion); | ||
580 | } | ||
581 | |||
582 | |||
583 | /*-------------------------------------------------------------------------*/ | 506 | /*-------------------------------------------------------------------------*/ |
584 | 507 | ||
585 | static int check_reset_complete ( | 508 | static int check_reset_complete ( |
@@ -802,13 +725,6 @@ static int ehci_hub_control ( | |||
802 | goto error; | 725 | goto error; |
803 | if (ehci->no_selective_suspend) | 726 | if (ehci->no_selective_suspend) |
804 | break; | 727 | break; |
805 | #ifdef CONFIG_USB_OTG | ||
806 | if ((hcd->self.otg_port == (wIndex + 1)) | ||
807 | && hcd->self.b_hnp_enable) { | ||
808 | otg_start_hnp(ehci->transceiver); | ||
809 | break; | ||
810 | } | ||
811 | #endif | ||
812 | if (!(temp & PORT_SUSPEND)) | 728 | if (!(temp & PORT_SUSPEND)) |
813 | break; | 729 | break; |
814 | if ((temp & PORT_PE) == 0) | 730 | if ((temp & PORT_PE) == 0) |
@@ -891,10 +807,11 @@ static int ehci_hub_control ( | |||
891 | * power switching; they're allowed to just limit the | 807 | * power switching; they're allowed to just limit the |
892 | * current. khubd will turn the power back on. | 808 | * current. khubd will turn the power back on. |
893 | */ | 809 | */ |
894 | if (HCS_PPC (ehci->hcs_params)){ | 810 | if ((temp & PORT_OC) && HCS_PPC(ehci->hcs_params)) { |
895 | ehci_writel(ehci, | 811 | ehci_writel(ehci, |
896 | temp & ~(PORT_RWC_BITS | PORT_POWER), | 812 | temp & ~(PORT_RWC_BITS | PORT_POWER), |
897 | status_reg); | 813 | status_reg); |
814 | temp = ehci_readl(ehci, status_reg); | ||
898 | } | 815 | } |
899 | } | 816 | } |
900 | 817 | ||
@@ -1120,7 +1037,19 @@ static int ehci_hub_control ( | |||
1120 | if (!selector || selector > 5) | 1037 | if (!selector || selector > 5) |
1121 | goto error; | 1038 | goto error; |
1122 | ehci_quiesce(ehci); | 1039 | ehci_quiesce(ehci); |
1040 | |||
1041 | /* Put all enabled ports into suspend */ | ||
1042 | while (ports--) { | ||
1043 | u32 __iomem *sreg = | ||
1044 | &ehci->regs->port_status[ports]; | ||
1045 | |||
1046 | temp = ehci_readl(ehci, sreg) & ~PORT_RWC_BITS; | ||
1047 | if (temp & PORT_PE) | ||
1048 | ehci_writel(ehci, temp | PORT_SUSPEND, | ||
1049 | sreg); | ||
1050 | } | ||
1123 | ehci_halt(ehci); | 1051 | ehci_halt(ehci); |
1052 | temp = ehci_readl(ehci, status_reg); | ||
1124 | temp |= selector << 16; | 1053 | temp |= selector << 16; |
1125 | ehci_writel(ehci, temp, status_reg); | 1054 | ehci_writel(ehci, temp, status_reg); |
1126 | break; | 1055 | break; |
diff --git a/drivers/usb/host/ehci-ixp4xx.c b/drivers/usb/host/ehci-ixp4xx.c index 50e600d26e2..c4460f3d009 100644 --- a/drivers/usb/host/ehci-ixp4xx.c +++ b/drivers/usb/host/ehci-ixp4xx.c | |||
@@ -100,7 +100,7 @@ static int ixp4xx_ehci_probe(struct platform_device *pdev) | |||
100 | goto fail_request_resource; | 100 | goto fail_request_resource; |
101 | } | 101 | } |
102 | hcd->rsrc_start = res->start; | 102 | hcd->rsrc_start = res->start; |
103 | hcd->rsrc_len = res->end - res->start + 1; | 103 | hcd->rsrc_len = resource_size(res); |
104 | 104 | ||
105 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, | 105 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, |
106 | driver->description)) { | 106 | driver->description)) { |
diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c index b5a0bf649c9..592d5f76803 100644 --- a/drivers/usb/host/ehci-msm.c +++ b/drivers/usb/host/ehci-msm.c | |||
@@ -40,27 +40,9 @@ static int ehci_msm_reset(struct usb_hcd *hcd) | |||
40 | int retval; | 40 | int retval; |
41 | 41 | ||
42 | ehci->caps = USB_CAPLENGTH; | 42 | ehci->caps = USB_CAPLENGTH; |
43 | ehci->regs = USB_CAPLENGTH + | ||
44 | HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase)); | ||
45 | dbg_hcs_params(ehci, "reset"); | ||
46 | dbg_hcc_params(ehci, "reset"); | ||
47 | |||
48 | /* cache the data to minimize the chip reads*/ | ||
49 | ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); | ||
50 | |||
51 | hcd->has_tt = 1; | 43 | hcd->has_tt = 1; |
52 | ehci->sbrn = HCD_USB2; | ||
53 | |||
54 | retval = ehci_halt(ehci); | ||
55 | if (retval) | ||
56 | return retval; | ||
57 | |||
58 | /* data structure init */ | ||
59 | retval = ehci_init(hcd); | ||
60 | if (retval) | ||
61 | return retval; | ||
62 | 44 | ||
63 | retval = ehci_reset(ehci); | 45 | retval = ehci_setup(hcd); |
64 | if (retval) | 46 | if (retval) |
65 | return retval; | 47 | return retval; |
66 | 48 | ||
diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c index 0c058be35a3..555a73c864b 100644 --- a/drivers/usb/host/ehci-mxc.c +++ b/drivers/usb/host/ehci-mxc.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/usb/ulpi.h> | 24 | #include <linux/usb/ulpi.h> |
25 | #include <linux/slab.h> | 25 | #include <linux/slab.h> |
26 | 26 | ||
27 | #include <mach/hardware.h> | ||
27 | #include <mach/mxc_ehci.h> | 28 | #include <mach/mxc_ehci.h> |
28 | 29 | ||
29 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
diff --git a/drivers/usb/host/ehci-octeon.c b/drivers/usb/host/ehci-octeon.c index ff55757ba7d..c3ba3ed5f3a 100644 --- a/drivers/usb/host/ehci-octeon.c +++ b/drivers/usb/host/ehci-octeon.c | |||
@@ -124,7 +124,7 @@ static int ehci_octeon_drv_probe(struct platform_device *pdev) | |||
124 | return -ENOMEM; | 124 | return -ENOMEM; |
125 | 125 | ||
126 | hcd->rsrc_start = res_mem->start; | 126 | hcd->rsrc_start = res_mem->start; |
127 | hcd->rsrc_len = res_mem->end - res_mem->start + 1; | 127 | hcd->rsrc_len = resource_size(res_mem); |
128 | 128 | ||
129 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, | 129 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, |
130 | OCTEON_EHCI_HCD_NAME)) { | 130 | OCTEON_EHCI_HCD_NAME)) { |
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index 55a57c23dd0..45240321ca0 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c | |||
@@ -98,6 +98,18 @@ static void omap_ehci_soft_phy_reset(struct platform_device *pdev, u8 port) | |||
98 | } | 98 | } |
99 | } | 99 | } |
100 | 100 | ||
101 | static void disable_put_regulator( | ||
102 | struct ehci_hcd_omap_platform_data *pdata) | ||
103 | { | ||
104 | int i; | ||
105 | |||
106 | for (i = 0 ; i < OMAP3_HS_USB_PORTS ; i++) { | ||
107 | if (pdata->regulator[i]) { | ||
108 | regulator_disable(pdata->regulator[i]); | ||
109 | regulator_put(pdata->regulator[i]); | ||
110 | } | ||
111 | } | ||
112 | } | ||
101 | 113 | ||
102 | /* configure so an HC device and id are always provided */ | 114 | /* configure so an HC device and id are always provided */ |
103 | /* always called with process context; sleeping is OK */ | 115 | /* always called with process context; sleeping is OK */ |
@@ -231,9 +243,11 @@ err_add_hcd: | |||
231 | omap_usbhs_disable(dev); | 243 | omap_usbhs_disable(dev); |
232 | 244 | ||
233 | err_enable: | 245 | err_enable: |
246 | disable_put_regulator(pdata); | ||
234 | usb_put_hcd(hcd); | 247 | usb_put_hcd(hcd); |
235 | 248 | ||
236 | err_io: | 249 | err_io: |
250 | iounmap(regs); | ||
237 | return ret; | 251 | return ret; |
238 | } | 252 | } |
239 | 253 | ||
@@ -253,6 +267,8 @@ static int ehci_hcd_omap_remove(struct platform_device *pdev) | |||
253 | 267 | ||
254 | usb_remove_hcd(hcd); | 268 | usb_remove_hcd(hcd); |
255 | omap_usbhs_disable(dev); | 269 | omap_usbhs_disable(dev); |
270 | disable_put_regulator(dev->platform_data); | ||
271 | iounmap(hcd->regs); | ||
256 | usb_put_hcd(hcd); | 272 | usb_put_hcd(hcd); |
257 | return 0; | 273 | return 0; |
258 | } | 274 | } |
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c index 1102ce65a3a..1d1caa6a33f 100644 --- a/drivers/usb/host/ehci-pci.c +++ b/drivers/usb/host/ehci-pci.c | |||
@@ -224,6 +224,11 @@ static int ehci_pci_setup(struct usb_hcd *hcd) | |||
224 | pci_dev_put(p_smbus); | 224 | pci_dev_put(p_smbus); |
225 | } | 225 | } |
226 | break; | 226 | break; |
227 | case PCI_VENDOR_ID_NETMOS: | ||
228 | /* MosChip frame-index-register bug */ | ||
229 | ehci_info(ehci, "applying MosChip frame-index workaround\n"); | ||
230 | ehci->frame_index_bug = 1; | ||
231 | break; | ||
227 | } | 232 | } |
228 | 233 | ||
229 | /* optional debug port, normally in the first BAR */ | 234 | /* optional debug port, normally in the first BAR */ |
diff --git a/drivers/usb/host/ehci-pmcmsp.c b/drivers/usb/host/ehci-pmcmsp.c index cd69099cda1..e8d54de44ac 100644 --- a/drivers/usb/host/ehci-pmcmsp.c +++ b/drivers/usb/host/ehci-pmcmsp.c | |||
@@ -124,7 +124,7 @@ static int usb_hcd_msp_map_regs(struct mspusb_device *dev) | |||
124 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | 124 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
125 | if (res == NULL) | 125 | if (res == NULL) |
126 | return -ENOMEM; | 126 | return -ENOMEM; |
127 | res_len = res->end - res->start + 1; | 127 | res_len = resource_size(res); |
128 | if (!request_mem_region(res->start, res_len, "mab regs")) | 128 | if (!request_mem_region(res->start, res_len, "mab regs")) |
129 | return -EBUSY; | 129 | return -EBUSY; |
130 | 130 | ||
@@ -140,7 +140,7 @@ static int usb_hcd_msp_map_regs(struct mspusb_device *dev) | |||
140 | retval = -ENOMEM; | 140 | retval = -ENOMEM; |
141 | goto err2; | 141 | goto err2; |
142 | } | 142 | } |
143 | res_len = res->end - res->start + 1; | 143 | res_len = resource_size(res); |
144 | if (!request_mem_region(res->start, res_len, "usbid regs")) { | 144 | if (!request_mem_region(res->start, res_len, "usbid regs")) { |
145 | retval = -EBUSY; | 145 | retval = -EBUSY; |
146 | goto err2; | 146 | goto err2; |
@@ -154,13 +154,13 @@ static int usb_hcd_msp_map_regs(struct mspusb_device *dev) | |||
154 | return 0; | 154 | return 0; |
155 | err3: | 155 | err3: |
156 | res = platform_get_resource(pdev, IORESOURCE_MEM, 2); | 156 | res = platform_get_resource(pdev, IORESOURCE_MEM, 2); |
157 | res_len = res->end - res->start + 1; | 157 | res_len = resource_size(res); |
158 | release_mem_region(res->start, res_len); | 158 | release_mem_region(res->start, res_len); |
159 | err2: | 159 | err2: |
160 | iounmap(dev->mab_regs); | 160 | iounmap(dev->mab_regs); |
161 | err1: | 161 | err1: |
162 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | 162 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
163 | res_len = res->end - res->start + 1; | 163 | res_len = resource_size(res); |
164 | release_mem_region(res->start, res_len); | 164 | release_mem_region(res->start, res_len); |
165 | dev_err(&pdev->dev, "Failed to map non-EHCI regs.\n"); | 165 | dev_err(&pdev->dev, "Failed to map non-EHCI regs.\n"); |
166 | return retval; | 166 | return retval; |
@@ -194,7 +194,7 @@ int usb_hcd_msp_probe(const struct hc_driver *driver, | |||
194 | goto err1; | 194 | goto err1; |
195 | } | 195 | } |
196 | hcd->rsrc_start = res->start; | 196 | hcd->rsrc_start = res->start; |
197 | hcd->rsrc_len = res->end - res->start + 1; | 197 | hcd->rsrc_len = resource_size(res); |
198 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, dev->name)) { | 198 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, dev->name)) { |
199 | retval = -EBUSY; | 199 | retval = -EBUSY; |
200 | goto err1; | 200 | goto err1; |
diff --git a/drivers/usb/host/ehci-ppc-of.c b/drivers/usb/host/ehci-ppc-of.c index 8552db6c29c..41d11fe1425 100644 --- a/drivers/usb/host/ehci-ppc-of.c +++ b/drivers/usb/host/ehci-ppc-of.c | |||
@@ -130,7 +130,7 @@ static int __devinit ehci_hcd_ppc_of_probe(struct platform_device *op) | |||
130 | return -ENOMEM; | 130 | return -ENOMEM; |
131 | 131 | ||
132 | hcd->rsrc_start = res.start; | 132 | hcd->rsrc_start = res.start; |
133 | hcd->rsrc_len = res.end - res.start + 1; | 133 | hcd->rsrc_len = resource_size(&res); |
134 | 134 | ||
135 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | 135 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { |
136 | printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__); | 136 | printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__); |
diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c index 5d6bc624c96..5c25783a764 100644 --- a/drivers/usb/host/ehci-q.c +++ b/drivers/usb/host/ehci-q.c | |||
@@ -103,7 +103,7 @@ qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd) | |||
103 | if (!(hw->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) { | 103 | if (!(hw->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) { |
104 | unsigned is_out, epnum; | 104 | unsigned is_out, epnum; |
105 | 105 | ||
106 | is_out = !(qtd->hw_token & cpu_to_hc32(ehci, 1 << 8)); | 106 | is_out = qh->is_out; |
107 | epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f; | 107 | epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f; |
108 | if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) { | 108 | if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) { |
109 | hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE); | 109 | hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE); |
@@ -649,7 +649,7 @@ qh_urb_transaction ( | |||
649 | /* | 649 | /* |
650 | * data transfer stage: buffer setup | 650 | * data transfer stage: buffer setup |
651 | */ | 651 | */ |
652 | i = urb->num_sgs; | 652 | i = urb->num_mapped_sgs; |
653 | if (len > 0 && i > 0) { | 653 | if (len > 0 && i > 0) { |
654 | sg = urb->sg; | 654 | sg = urb->sg; |
655 | buf = sg_dma_address(sg); | 655 | buf = sg_dma_address(sg); |
@@ -946,6 +946,7 @@ done: | |||
946 | hw = qh->hw; | 946 | hw = qh->hw; |
947 | hw->hw_info1 = cpu_to_hc32(ehci, info1); | 947 | hw->hw_info1 = cpu_to_hc32(ehci, info1); |
948 | hw->hw_info2 = cpu_to_hc32(ehci, info2); | 948 | hw->hw_info2 = cpu_to_hc32(ehci, info2); |
949 | qh->is_out = !is_input; | ||
949 | usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1); | 950 | usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1); |
950 | qh_refresh (ehci, qh); | 951 | qh_refresh (ehci, qh); |
951 | return qh; | 952 | return qh; |
@@ -994,9 +995,16 @@ static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh) | |||
994 | head->qh_next.qh = qh; | 995 | head->qh_next.qh = qh; |
995 | head->hw->hw_next = dma; | 996 | head->hw->hw_next = dma; |
996 | 997 | ||
998 | /* | ||
999 | * flush qh descriptor into memory immediately, | ||
1000 | * see comments in qh_append_tds. | ||
1001 | * */ | ||
1002 | ehci_sync_mem(); | ||
1003 | |||
997 | qh_get(qh); | 1004 | qh_get(qh); |
998 | qh->xacterrs = 0; | 1005 | qh->xacterrs = 0; |
999 | qh->qh_state = QH_STATE_LINKED; | 1006 | qh->qh_state = QH_STATE_LINKED; |
1007 | wmb(); | ||
1000 | /* qtd completions reported later by interrupt */ | 1008 | /* qtd completions reported later by interrupt */ |
1001 | } | 1009 | } |
1002 | 1010 | ||
@@ -1081,6 +1089,18 @@ static struct ehci_qh *qh_append_tds ( | |||
1081 | wmb (); | 1089 | wmb (); |
1082 | dummy->hw_token = token; | 1090 | dummy->hw_token = token; |
1083 | 1091 | ||
1092 | /* | ||
1093 | * Writing to dma coherent buffer on ARM may | ||
1094 | * be delayed to reach memory, so HC may not see | ||
1095 | * hw_token of dummy qtd in time, which can cause | ||
1096 | * the qtd transaction to be executed very late, | ||
1097 | * and degrade performance a lot. ehci_sync_mem | ||
1098 | * is added to flush 'token' immediatelly into | ||
1099 | * memory, so that ehci can execute the transaction | ||
1100 | * ASAP. | ||
1101 | * */ | ||
1102 | ehci_sync_mem(); | ||
1103 | |||
1084 | urb->hcpriv = qh_get (qh); | 1104 | urb->hcpriv = qh_get (qh); |
1085 | } | 1105 | } |
1086 | } | 1106 | } |
@@ -1231,6 +1251,8 @@ static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh) | |||
1231 | 1251 | ||
1232 | prev->hw->hw_next = qh->hw->hw_next; | 1252 | prev->hw->hw_next = qh->hw->hw_next; |
1233 | prev->qh_next = qh->qh_next; | 1253 | prev->qh_next = qh->qh_next; |
1254 | if (ehci->qh_scan_next == qh) | ||
1255 | ehci->qh_scan_next = qh->qh_next.qh; | ||
1234 | wmb (); | 1256 | wmb (); |
1235 | 1257 | ||
1236 | /* If the controller isn't running, we don't have to wait for it */ | 1258 | /* If the controller isn't running, we don't have to wait for it */ |
@@ -1256,53 +1278,49 @@ static void scan_async (struct ehci_hcd *ehci) | |||
1256 | struct ehci_qh *qh; | 1278 | struct ehci_qh *qh; |
1257 | enum ehci_timer_action action = TIMER_IO_WATCHDOG; | 1279 | enum ehci_timer_action action = TIMER_IO_WATCHDOG; |
1258 | 1280 | ||
1259 | ehci->stamp = ehci_readl(ehci, &ehci->regs->frame_index); | ||
1260 | timer_action_done (ehci, TIMER_ASYNC_SHRINK); | 1281 | timer_action_done (ehci, TIMER_ASYNC_SHRINK); |
1261 | rescan: | ||
1262 | stopped = !HC_IS_RUNNING(ehci_to_hcd(ehci)->state); | 1282 | stopped = !HC_IS_RUNNING(ehci_to_hcd(ehci)->state); |
1263 | qh = ehci->async->qh_next.qh; | ||
1264 | if (likely (qh != NULL)) { | ||
1265 | do { | ||
1266 | /* clean any finished work for this qh */ | ||
1267 | if (!list_empty(&qh->qtd_list) && (stopped || | ||
1268 | qh->stamp != ehci->stamp)) { | ||
1269 | int temp; | ||
1270 | |||
1271 | /* unlinks could happen here; completion | ||
1272 | * reporting drops the lock. rescan using | ||
1273 | * the latest schedule, but don't rescan | ||
1274 | * qhs we already finished (no looping) | ||
1275 | * unless the controller is stopped. | ||
1276 | */ | ||
1277 | qh = qh_get (qh); | ||
1278 | qh->stamp = ehci->stamp; | ||
1279 | temp = qh_completions (ehci, qh); | ||
1280 | if (qh->needs_rescan) | ||
1281 | unlink_async(ehci, qh); | ||
1282 | qh_put (qh); | ||
1283 | if (temp != 0) { | ||
1284 | goto rescan; | ||
1285 | } | ||
1286 | } | ||
1287 | 1283 | ||
1288 | /* unlink idle entries, reducing DMA usage as well | 1284 | ehci->qh_scan_next = ehci->async->qh_next.qh; |
1289 | * as HCD schedule-scanning costs. delay for any qh | 1285 | while (ehci->qh_scan_next) { |
1290 | * we just scanned, there's a not-unusual case that it | 1286 | qh = ehci->qh_scan_next; |
1291 | * doesn't stay idle for long. | 1287 | ehci->qh_scan_next = qh->qh_next.qh; |
1292 | * (plus, avoids some kind of re-activation race.) | 1288 | rescan: |
1289 | /* clean any finished work for this qh */ | ||
1290 | if (!list_empty(&qh->qtd_list)) { | ||
1291 | int temp; | ||
1292 | |||
1293 | /* | ||
1294 | * Unlinks could happen here; completion reporting | ||
1295 | * drops the lock. That's why ehci->qh_scan_next | ||
1296 | * always holds the next qh to scan; if the next qh | ||
1297 | * gets unlinked then ehci->qh_scan_next is adjusted | ||
1298 | * in start_unlink_async(). | ||
1293 | */ | 1299 | */ |
1294 | if (list_empty(&qh->qtd_list) | 1300 | qh = qh_get(qh); |
1295 | && qh->qh_state == QH_STATE_LINKED) { | 1301 | temp = qh_completions(ehci, qh); |
1296 | if (!ehci->reclaim && (stopped || | 1302 | if (qh->needs_rescan) |
1297 | ((ehci->stamp - qh->stamp) & 0x1fff) | 1303 | unlink_async(ehci, qh); |
1298 | >= EHCI_SHRINK_FRAMES * 8)) | 1304 | qh->unlink_time = jiffies + EHCI_SHRINK_JIFFIES; |
1299 | start_unlink_async(ehci, qh); | 1305 | qh_put(qh); |
1300 | else | 1306 | if (temp != 0) |
1301 | action = TIMER_ASYNC_SHRINK; | 1307 | goto rescan; |
1302 | } | 1308 | } |
1303 | 1309 | ||
1304 | qh = qh->qh_next.qh; | 1310 | /* unlink idle entries, reducing DMA usage as well |
1305 | } while (qh); | 1311 | * as HCD schedule-scanning costs. delay for any qh |
1312 | * we just scanned, there's a not-unusual case that it | ||
1313 | * doesn't stay idle for long. | ||
1314 | * (plus, avoids some kind of re-activation race.) | ||
1315 | */ | ||
1316 | if (list_empty(&qh->qtd_list) | ||
1317 | && qh->qh_state == QH_STATE_LINKED) { | ||
1318 | if (!ehci->reclaim && (stopped || | ||
1319 | time_after_eq(jiffies, qh->unlink_time))) | ||
1320 | start_unlink_async(ehci, qh); | ||
1321 | else | ||
1322 | action = TIMER_ASYNC_SHRINK; | ||
1323 | } | ||
1306 | } | 1324 | } |
1307 | if (action == TIMER_ASYNC_SHRINK) | 1325 | if (action == TIMER_ASYNC_SHRINK) |
1308 | timer_action (ehci, TIMER_ASYNC_SHRINK); | 1326 | timer_action (ehci, TIMER_ASYNC_SHRINK); |
diff --git a/drivers/usb/host/ehci-s5p.c b/drivers/usb/host/ehci-s5p.c index e3374c8f7b3..9e77f1c8bdb 100644 --- a/drivers/usb/host/ehci-s5p.c +++ b/drivers/usb/host/ehci-s5p.c | |||
@@ -86,6 +86,7 @@ static int __devinit s5p_ehci_probe(struct platform_device *pdev) | |||
86 | goto fail_hcd; | 86 | goto fail_hcd; |
87 | } | 87 | } |
88 | 88 | ||
89 | s5p_ehci->hcd = hcd; | ||
89 | s5p_ehci->clk = clk_get(&pdev->dev, "usbhost"); | 90 | s5p_ehci->clk = clk_get(&pdev->dev, "usbhost"); |
90 | 91 | ||
91 | if (IS_ERR(s5p_ehci->clk)) { | 92 | if (IS_ERR(s5p_ehci->clk)) { |
@@ -189,6 +190,100 @@ static void s5p_ehci_shutdown(struct platform_device *pdev) | |||
189 | hcd->driver->shutdown(hcd); | 190 | hcd->driver->shutdown(hcd); |
190 | } | 191 | } |
191 | 192 | ||
193 | #ifdef CONFIG_PM | ||
194 | static int s5p_ehci_suspend(struct device *dev) | ||
195 | { | ||
196 | struct s5p_ehci_hcd *s5p_ehci = dev_get_drvdata(dev); | ||
197 | struct usb_hcd *hcd = s5p_ehci->hcd; | ||
198 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | ||
199 | struct platform_device *pdev = to_platform_device(dev); | ||
200 | struct s5p_ehci_platdata *pdata = pdev->dev.platform_data; | ||
201 | unsigned long flags; | ||
202 | int rc = 0; | ||
203 | |||
204 | if (time_before(jiffies, ehci->next_statechange)) | ||
205 | msleep(20); | ||
206 | |||
207 | /* | ||
208 | * Root hub was already suspended. Disable irq emission and | ||
209 | * mark HW unaccessible. The PM and USB cores make sure that | ||
210 | * the root hub is either suspended or stopped. | ||
211 | */ | ||
212 | ehci_prepare_ports_for_controller_suspend(ehci, device_may_wakeup(dev)); | ||
213 | spin_lock_irqsave(&ehci->lock, flags); | ||
214 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); | ||
215 | (void)ehci_readl(ehci, &ehci->regs->intr_enable); | ||
216 | |||
217 | clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | ||
218 | spin_unlock_irqrestore(&ehci->lock, flags); | ||
219 | |||
220 | if (pdata && pdata->phy_exit) | ||
221 | pdata->phy_exit(pdev, S5P_USB_PHY_HOST); | ||
222 | |||
223 | return rc; | ||
224 | } | ||
225 | |||
226 | static int s5p_ehci_resume(struct device *dev) | ||
227 | { | ||
228 | struct s5p_ehci_hcd *s5p_ehci = dev_get_drvdata(dev); | ||
229 | struct usb_hcd *hcd = s5p_ehci->hcd; | ||
230 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | ||
231 | struct platform_device *pdev = to_platform_device(dev); | ||
232 | struct s5p_ehci_platdata *pdata = pdev->dev.platform_data; | ||
233 | |||
234 | if (pdata && pdata->phy_init) | ||
235 | pdata->phy_init(pdev, S5P_USB_PHY_HOST); | ||
236 | |||
237 | if (time_before(jiffies, ehci->next_statechange)) | ||
238 | msleep(100); | ||
239 | |||
240 | /* Mark hardware accessible again as we are out of D3 state by now */ | ||
241 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | ||
242 | |||
243 | if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF) { | ||
244 | int mask = INTR_MASK; | ||
245 | |||
246 | ehci_prepare_ports_for_controller_resume(ehci); | ||
247 | if (!hcd->self.root_hub->do_remote_wakeup) | ||
248 | mask &= ~STS_PCD; | ||
249 | ehci_writel(ehci, mask, &ehci->regs->intr_enable); | ||
250 | ehci_readl(ehci, &ehci->regs->intr_enable); | ||
251 | return 0; | ||
252 | } | ||
253 | |||
254 | usb_root_hub_lost_power(hcd->self.root_hub); | ||
255 | |||
256 | (void) ehci_halt(ehci); | ||
257 | (void) ehci_reset(ehci); | ||
258 | |||
259 | /* emptying the schedule aborts any urbs */ | ||
260 | spin_lock_irq(&ehci->lock); | ||
261 | if (ehci->reclaim) | ||
262 | end_unlink_async(ehci); | ||
263 | ehci_work(ehci); | ||
264 | spin_unlock_irq(&ehci->lock); | ||
265 | |||
266 | ehci_writel(ehci, ehci->command, &ehci->regs->command); | ||
267 | ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag); | ||
268 | ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */ | ||
269 | |||
270 | /* here we "know" root ports should always stay powered */ | ||
271 | ehci_port_power(ehci, 1); | ||
272 | |||
273 | hcd->state = HC_STATE_SUSPENDED; | ||
274 | |||
275 | return 0; | ||
276 | } | ||
277 | #else | ||
278 | #define s5p_ehci_suspend NULL | ||
279 | #define s5p_ehci_resume NULL | ||
280 | #endif | ||
281 | |||
282 | static const struct dev_pm_ops s5p_ehci_pm_ops = { | ||
283 | .suspend = s5p_ehci_suspend, | ||
284 | .resume = s5p_ehci_resume, | ||
285 | }; | ||
286 | |||
192 | static struct platform_driver s5p_ehci_driver = { | 287 | static struct platform_driver s5p_ehci_driver = { |
193 | .probe = s5p_ehci_probe, | 288 | .probe = s5p_ehci_probe, |
194 | .remove = __devexit_p(s5p_ehci_remove), | 289 | .remove = __devexit_p(s5p_ehci_remove), |
@@ -196,6 +291,7 @@ static struct platform_driver s5p_ehci_driver = { | |||
196 | .driver = { | 291 | .driver = { |
197 | .name = "s5p-ehci", | 292 | .name = "s5p-ehci", |
198 | .owner = THIS_MODULE, | 293 | .owner = THIS_MODULE, |
294 | .pm = &s5p_ehci_pm_ops, | ||
199 | } | 295 | } |
200 | }; | 296 | }; |
201 | 297 | ||
diff --git a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c index 6c9fbe352f7..c787af2ba4b 100644 --- a/drivers/usb/host/ehci-sched.c +++ b/drivers/usb/host/ehci-sched.c | |||
@@ -36,6 +36,27 @@ | |||
36 | 36 | ||
37 | static int ehci_get_frame (struct usb_hcd *hcd); | 37 | static int ehci_get_frame (struct usb_hcd *hcd); |
38 | 38 | ||
39 | #ifdef CONFIG_PCI | ||
40 | |||
41 | static unsigned ehci_read_frame_index(struct ehci_hcd *ehci) | ||
42 | { | ||
43 | unsigned uf; | ||
44 | |||
45 | /* | ||
46 | * The MosChip MCS9990 controller updates its microframe counter | ||
47 | * a little before the frame counter, and occasionally we will read | ||
48 | * the invalid intermediate value. Avoid problems by checking the | ||
49 | * microframe number (the low-order 3 bits); if they are 0 then | ||
50 | * re-read the register to get the correct value. | ||
51 | */ | ||
52 | uf = ehci_readl(ehci, &ehci->regs->frame_index); | ||
53 | if (unlikely(ehci->frame_index_bug && ((uf & 7) == 0))) | ||
54 | uf = ehci_readl(ehci, &ehci->regs->frame_index); | ||
55 | return uf; | ||
56 | } | ||
57 | |||
58 | #endif | ||
59 | |||
39 | /*-------------------------------------------------------------------------*/ | 60 | /*-------------------------------------------------------------------------*/ |
40 | 61 | ||
41 | /* | 62 | /* |
@@ -172,7 +193,7 @@ periodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe) | |||
172 | } | 193 | } |
173 | } | 194 | } |
174 | #ifdef DEBUG | 195 | #ifdef DEBUG |
175 | if (usecs > 100) | 196 | if (usecs > ehci->uframe_periodic_max) |
176 | ehci_err (ehci, "uframe %d sched overrun: %d usecs\n", | 197 | ehci_err (ehci, "uframe %d sched overrun: %d usecs\n", |
177 | frame * 8 + uframe, usecs); | 198 | frame * 8 + uframe, usecs); |
178 | #endif | 199 | #endif |
@@ -482,7 +503,7 @@ static int enable_periodic (struct ehci_hcd *ehci) | |||
482 | ehci_to_hcd(ehci)->state = HC_STATE_RUNNING; | 503 | ehci_to_hcd(ehci)->state = HC_STATE_RUNNING; |
483 | 504 | ||
484 | /* make sure ehci_work scans these */ | 505 | /* make sure ehci_work scans these */ |
485 | ehci->next_uframe = ehci_readl(ehci, &ehci->regs->frame_index) | 506 | ehci->next_uframe = ehci_read_frame_index(ehci) |
486 | % (ehci->periodic_size << 3); | 507 | % (ehci->periodic_size << 3); |
487 | if (unlikely(ehci->broken_periodic)) | 508 | if (unlikely(ehci->broken_periodic)) |
488 | ehci->last_periodic_enable = ktime_get_real(); | 509 | ehci->last_periodic_enable = ktime_get_real(); |
@@ -709,11 +730,8 @@ static int check_period ( | |||
709 | if (uframe >= 8) | 730 | if (uframe >= 8) |
710 | return 0; | 731 | return 0; |
711 | 732 | ||
712 | /* | 733 | /* convert "usecs we need" to "max already claimed" */ |
713 | * 80% periodic == 100 usec/uframe available | 734 | usecs = ehci->uframe_periodic_max - usecs; |
714 | * convert "usecs we need" to "max already claimed" | ||
715 | */ | ||
716 | usecs = 100 - usecs; | ||
717 | 735 | ||
718 | /* we "know" 2 and 4 uframe intervals were rejected; so | 736 | /* we "know" 2 and 4 uframe intervals were rejected; so |
719 | * for period 0, check _every_ microframe in the schedule. | 737 | * for period 0, check _every_ microframe in the schedule. |
@@ -1286,9 +1304,9 @@ itd_slot_ok ( | |||
1286 | { | 1304 | { |
1287 | uframe %= period; | 1305 | uframe %= period; |
1288 | do { | 1306 | do { |
1289 | /* can't commit more than 80% periodic == 100 usec */ | 1307 | /* can't commit more than uframe_periodic_max usec */ |
1290 | if (periodic_usecs (ehci, uframe >> 3, uframe & 0x7) | 1308 | if (periodic_usecs (ehci, uframe >> 3, uframe & 0x7) |
1291 | > (100 - usecs)) | 1309 | > (ehci->uframe_periodic_max - usecs)) |
1292 | return 0; | 1310 | return 0; |
1293 | 1311 | ||
1294 | /* we know urb->interval is 2^N uframes */ | 1312 | /* we know urb->interval is 2^N uframes */ |
@@ -1345,7 +1363,7 @@ sitd_slot_ok ( | |||
1345 | #endif | 1363 | #endif |
1346 | 1364 | ||
1347 | /* check starts (OUT uses more than one) */ | 1365 | /* check starts (OUT uses more than one) */ |
1348 | max_used = 100 - stream->usecs; | 1366 | max_used = ehci->uframe_periodic_max - stream->usecs; |
1349 | for (tmp = stream->raw_mask & 0xff; tmp; tmp >>= 1, uf++) { | 1367 | for (tmp = stream->raw_mask & 0xff; tmp; tmp >>= 1, uf++) { |
1350 | if (periodic_usecs (ehci, frame, uf) > max_used) | 1368 | if (periodic_usecs (ehci, frame, uf) > max_used) |
1351 | return 0; | 1369 | return 0; |
@@ -1354,7 +1372,7 @@ sitd_slot_ok ( | |||
1354 | /* for IN, check CSPLIT */ | 1372 | /* for IN, check CSPLIT */ |
1355 | if (stream->c_usecs) { | 1373 | if (stream->c_usecs) { |
1356 | uf = uframe & 7; | 1374 | uf = uframe & 7; |
1357 | max_used = 100 - stream->c_usecs; | 1375 | max_used = ehci->uframe_periodic_max - stream->c_usecs; |
1358 | do { | 1376 | do { |
1359 | tmp = 1 << uf; | 1377 | tmp = 1 << uf; |
1360 | tmp <<= 8; | 1378 | tmp <<= 8; |
@@ -1412,7 +1430,7 @@ iso_stream_schedule ( | |||
1412 | goto fail; | 1430 | goto fail; |
1413 | } | 1431 | } |
1414 | 1432 | ||
1415 | now = ehci_readl(ehci, &ehci->regs->frame_index) & (mod - 1); | 1433 | now = ehci_read_frame_index(ehci) & (mod - 1); |
1416 | 1434 | ||
1417 | /* Typical case: reuse current schedule, stream is still active. | 1435 | /* Typical case: reuse current schedule, stream is still active. |
1418 | * Hopefully there are no gaps from the host falling behind | 1436 | * Hopefully there are no gaps from the host falling behind |
@@ -1458,30 +1476,36 @@ iso_stream_schedule ( | |||
1458 | * jump until after the queue is primed. | 1476 | * jump until after the queue is primed. |
1459 | */ | 1477 | */ |
1460 | else { | 1478 | else { |
1479 | int done = 0; | ||
1461 | start = SCHEDULE_SLOP + (now & ~0x07); | 1480 | start = SCHEDULE_SLOP + (now & ~0x07); |
1462 | 1481 | ||
1463 | /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */ | 1482 | /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */ |
1464 | 1483 | ||
1465 | /* find a uframe slot with enough bandwidth */ | 1484 | /* find a uframe slot with enough bandwidth. |
1466 | next = start + period; | 1485 | * Early uframes are more precious because full-speed |
1467 | for (; start < next; start++) { | 1486 | * iso IN transfers can't use late uframes, |
1468 | 1487 | * and therefore they should be allocated last. | |
1488 | */ | ||
1489 | next = start; | ||
1490 | start += period; | ||
1491 | do { | ||
1492 | start--; | ||
1469 | /* check schedule: enough space? */ | 1493 | /* check schedule: enough space? */ |
1470 | if (stream->highspeed) { | 1494 | if (stream->highspeed) { |
1471 | if (itd_slot_ok(ehci, mod, start, | 1495 | if (itd_slot_ok(ehci, mod, start, |
1472 | stream->usecs, period)) | 1496 | stream->usecs, period)) |
1473 | break; | 1497 | done = 1; |
1474 | } else { | 1498 | } else { |
1475 | if ((start % 8) >= 6) | 1499 | if ((start % 8) >= 6) |
1476 | continue; | 1500 | continue; |
1477 | if (sitd_slot_ok(ehci, mod, stream, | 1501 | if (sitd_slot_ok(ehci, mod, stream, |
1478 | start, sched, period)) | 1502 | start, sched, period)) |
1479 | break; | 1503 | done = 1; |
1480 | } | 1504 | } |
1481 | } | 1505 | } while (start > next && !done); |
1482 | 1506 | ||
1483 | /* no room in the schedule */ | 1507 | /* no room in the schedule */ |
1484 | if (start == next) { | 1508 | if (!done) { |
1485 | ehci_dbg(ehci, "iso resched full %p (now %d max %d)\n", | 1509 | ehci_dbg(ehci, "iso resched full %p (now %d max %d)\n", |
1486 | urb, now, now + mod); | 1510 | urb, now, now + mod); |
1487 | status = -ENOSPC; | 1511 | status = -ENOSPC; |
@@ -2279,7 +2303,7 @@ scan_periodic (struct ehci_hcd *ehci) | |||
2279 | */ | 2303 | */ |
2280 | now_uframe = ehci->next_uframe; | 2304 | now_uframe = ehci->next_uframe; |
2281 | if (HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) { | 2305 | if (HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) { |
2282 | clock = ehci_readl(ehci, &ehci->regs->frame_index); | 2306 | clock = ehci_read_frame_index(ehci); |
2283 | clock_frame = (clock >> 3) & (ehci->periodic_size - 1); | 2307 | clock_frame = (clock >> 3) & (ehci->periodic_size - 1); |
2284 | } else { | 2308 | } else { |
2285 | clock = now_uframe + mod - 1; | 2309 | clock = now_uframe + mod - 1; |
@@ -2458,8 +2482,7 @@ restart: | |||
2458 | || ehci->periodic_sched == 0) | 2482 | || ehci->periodic_sched == 0) |
2459 | break; | 2483 | break; |
2460 | ehci->next_uframe = now_uframe; | 2484 | ehci->next_uframe = now_uframe; |
2461 | now = ehci_readl(ehci, &ehci->regs->frame_index) & | 2485 | now = ehci_read_frame_index(ehci) & (mod - 1); |
2462 | (mod - 1); | ||
2463 | if (now_uframe == now) | 2486 | if (now_uframe == now) |
2464 | break; | 2487 | break; |
2465 | 2488 | ||
diff --git a/drivers/usb/host/ehci-sysfs.c b/drivers/usb/host/ehci-sysfs.c new file mode 100644 index 00000000000..14ced00ba22 --- /dev/null +++ b/drivers/usb/host/ehci-sysfs.c | |||
@@ -0,0 +1,190 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007 by Alan Stern | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms of the GNU General Public License as published by the | ||
6 | * Free Software Foundation; either version 2 of the License, or (at your | ||
7 | * option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, but | ||
10 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | ||
11 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
12 | * for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software Foundation, | ||
16 | * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
17 | */ | ||
18 | |||
19 | /* this file is part of ehci-hcd.c */ | ||
20 | |||
21 | |||
22 | /* Display the ports dedicated to the companion controller */ | ||
23 | static ssize_t show_companion(struct device *dev, | ||
24 | struct device_attribute *attr, | ||
25 | char *buf) | ||
26 | { | ||
27 | struct ehci_hcd *ehci; | ||
28 | int nports, index, n; | ||
29 | int count = PAGE_SIZE; | ||
30 | char *ptr = buf; | ||
31 | |||
32 | ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); | ||
33 | nports = HCS_N_PORTS(ehci->hcs_params); | ||
34 | |||
35 | for (index = 0; index < nports; ++index) { | ||
36 | if (test_bit(index, &ehci->companion_ports)) { | ||
37 | n = scnprintf(ptr, count, "%d\n", index + 1); | ||
38 | ptr += n; | ||
39 | count -= n; | ||
40 | } | ||
41 | } | ||
42 | return ptr - buf; | ||
43 | } | ||
44 | |||
45 | /* | ||
46 | * Dedicate or undedicate a port to the companion controller. | ||
47 | * Syntax is "[-]portnum", where a leading '-' sign means | ||
48 | * return control of the port to the EHCI controller. | ||
49 | */ | ||
50 | static ssize_t store_companion(struct device *dev, | ||
51 | struct device_attribute *attr, | ||
52 | const char *buf, size_t count) | ||
53 | { | ||
54 | struct ehci_hcd *ehci; | ||
55 | int portnum, new_owner; | ||
56 | |||
57 | ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); | ||
58 | new_owner = PORT_OWNER; /* Owned by companion */ | ||
59 | if (sscanf(buf, "%d", &portnum) != 1) | ||
60 | return -EINVAL; | ||
61 | if (portnum < 0) { | ||
62 | portnum = - portnum; | ||
63 | new_owner = 0; /* Owned by EHCI */ | ||
64 | } | ||
65 | if (portnum <= 0 || portnum > HCS_N_PORTS(ehci->hcs_params)) | ||
66 | return -ENOENT; | ||
67 | portnum--; | ||
68 | if (new_owner) | ||
69 | set_bit(portnum, &ehci->companion_ports); | ||
70 | else | ||
71 | clear_bit(portnum, &ehci->companion_ports); | ||
72 | set_owner(ehci, portnum, new_owner); | ||
73 | return count; | ||
74 | } | ||
75 | static DEVICE_ATTR(companion, 0644, show_companion, store_companion); | ||
76 | |||
77 | |||
78 | /* | ||
79 | * Display / Set uframe_periodic_max | ||
80 | */ | ||
81 | static ssize_t show_uframe_periodic_max(struct device *dev, | ||
82 | struct device_attribute *attr, | ||
83 | char *buf) | ||
84 | { | ||
85 | struct ehci_hcd *ehci; | ||
86 | int n; | ||
87 | |||
88 | ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); | ||
89 | n = scnprintf(buf, PAGE_SIZE, "%d\n", ehci->uframe_periodic_max); | ||
90 | return n; | ||
91 | } | ||
92 | |||
93 | |||
94 | static ssize_t store_uframe_periodic_max(struct device *dev, | ||
95 | struct device_attribute *attr, | ||
96 | const char *buf, size_t count) | ||
97 | { | ||
98 | struct ehci_hcd *ehci; | ||
99 | unsigned uframe_periodic_max; | ||
100 | unsigned frame, uframe; | ||
101 | unsigned short allocated_max; | ||
102 | unsigned long flags; | ||
103 | ssize_t ret; | ||
104 | |||
105 | ehci = hcd_to_ehci(bus_to_hcd(dev_get_drvdata(dev))); | ||
106 | if (kstrtouint(buf, 0, &uframe_periodic_max) < 0) | ||
107 | return -EINVAL; | ||
108 | |||
109 | if (uframe_periodic_max < 100 || uframe_periodic_max >= 125) { | ||
110 | ehci_info(ehci, "rejecting invalid request for " | ||
111 | "uframe_periodic_max=%u\n", uframe_periodic_max); | ||
112 | return -EINVAL; | ||
113 | } | ||
114 | |||
115 | ret = -EINVAL; | ||
116 | |||
117 | /* | ||
118 | * lock, so that our checking does not race with possible periodic | ||
119 | * bandwidth allocation through submitting new urbs. | ||
120 | */ | ||
121 | spin_lock_irqsave (&ehci->lock, flags); | ||
122 | |||
123 | /* | ||
124 | * for request to decrease max periodic bandwidth, we have to check | ||
125 | * every microframe in the schedule to see whether the decrease is | ||
126 | * possible. | ||
127 | */ | ||
128 | if (uframe_periodic_max < ehci->uframe_periodic_max) { | ||
129 | allocated_max = 0; | ||
130 | |||
131 | for (frame = 0; frame < ehci->periodic_size; ++frame) | ||
132 | for (uframe = 0; uframe < 7; ++uframe) | ||
133 | allocated_max = max(allocated_max, | ||
134 | periodic_usecs (ehci, frame, uframe)); | ||
135 | |||
136 | if (allocated_max > uframe_periodic_max) { | ||
137 | ehci_info(ehci, | ||
138 | "cannot decrease uframe_periodic_max becase " | ||
139 | "periodic bandwidth is already allocated " | ||
140 | "(%u > %u)\n", | ||
141 | allocated_max, uframe_periodic_max); | ||
142 | goto out_unlock; | ||
143 | } | ||
144 | } | ||
145 | |||
146 | /* increasing is always ok */ | ||
147 | |||
148 | ehci_info(ehci, "setting max periodic bandwidth to %u%% " | ||
149 | "(== %u usec/uframe)\n", | ||
150 | 100*uframe_periodic_max/125, uframe_periodic_max); | ||
151 | |||
152 | if (uframe_periodic_max != 100) | ||
153 | ehci_warn(ehci, "max periodic bandwidth set is non-standard\n"); | ||
154 | |||
155 | ehci->uframe_periodic_max = uframe_periodic_max; | ||
156 | ret = count; | ||
157 | |||
158 | out_unlock: | ||
159 | spin_unlock_irqrestore (&ehci->lock, flags); | ||
160 | return ret; | ||
161 | } | ||
162 | static DEVICE_ATTR(uframe_periodic_max, 0644, show_uframe_periodic_max, store_uframe_periodic_max); | ||
163 | |||
164 | |||
165 | static inline int create_sysfs_files(struct ehci_hcd *ehci) | ||
166 | { | ||
167 | struct device *controller = ehci_to_hcd(ehci)->self.controller; | ||
168 | int i = 0; | ||
169 | |||
170 | /* with integrated TT there is no companion! */ | ||
171 | if (!ehci_is_TDI(ehci)) | ||
172 | i = device_create_file(controller, &dev_attr_companion); | ||
173 | if (i) | ||
174 | goto out; | ||
175 | |||
176 | i = device_create_file(controller, &dev_attr_uframe_periodic_max); | ||
177 | out: | ||
178 | return i; | ||
179 | } | ||
180 | |||
181 | static inline void remove_sysfs_files(struct ehci_hcd *ehci) | ||
182 | { | ||
183 | struct device *controller = ehci_to_hcd(ehci)->self.controller; | ||
184 | |||
185 | /* with integrated TT there is no companion! */ | ||
186 | if (!ehci_is_TDI(ehci)) | ||
187 | device_remove_file(controller, &dev_attr_companion); | ||
188 | |||
189 | device_remove_file(controller, &dev_attr_uframe_periodic_max); | ||
190 | } | ||
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c index 02b2bfd49a1..c6ddcab4640 100644 --- a/drivers/usb/host/ehci-tegra.c +++ b/drivers/usb/host/ehci-tegra.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs | 2 | * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs |
3 | * | 3 | * |
4 | * Copyright (C) 2010 Google, Inc. | 4 | * Copyright (C) 2010 Google, Inc. |
5 | * Copyright (C) 2009 NVIDIA Corporation | 5 | * Copyright (C) 2009 - 2011 NVIDIA Corporation |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify it | 7 | * This program is free software; you can redistribute it and/or modify it |
8 | * under the terms of the GNU General Public License as published by the | 8 | * under the terms of the GNU General Public License as published by the |
@@ -22,40 +22,80 @@ | |||
22 | #include <linux/irq.h> | 22 | #include <linux/irq.h> |
23 | #include <linux/usb/otg.h> | 23 | #include <linux/usb/otg.h> |
24 | #include <mach/usb_phy.h> | 24 | #include <mach/usb_phy.h> |
25 | #include <mach/iomap.h> | ||
26 | |||
27 | #define TEGRA_USB_PORTSC_PHCD (1 << 23) | ||
28 | |||
29 | #define TEGRA_USB_SUSP_CTRL_OFFSET 0x400 | ||
30 | #define TEGRA_USB_SUSP_CLR (1 << 5) | ||
31 | #define TEGRA_USB_PHY_CLK_VALID (1 << 7) | ||
32 | #define TEGRA_USB_SRT (1 << 25) | ||
33 | #define TEGRA_USB_PHY_CLK_VALID_INT_ENB (1 << 9) | ||
34 | #define TEGRA_USB_PHY_CLK_VALID_INT_STS (1 << 8) | ||
35 | |||
36 | #ifdef CONFIG_ARCH_TEGRA_2x_SOC | ||
37 | #define TEGRA_USB_PORTSC1_OFFSET 0x184 | ||
38 | #else | ||
39 | #define TEGRA_USB_PORTSC1_OFFSET 0x174 | ||
40 | #endif | ||
41 | #define TEGRA_USB_PORTSC1_WKCN (1 << 20) | ||
42 | |||
43 | #define TEGRA_LVL2_CLK_GATE_OVRB 0xfc | ||
44 | #define TEGRA_USB2_CLK_OVR_ON (1 << 10) | ||
25 | 45 | ||
26 | #define TEGRA_USB_DMA_ALIGN 32 | 46 | #define TEGRA_USB_DMA_ALIGN 32 |
27 | 47 | ||
48 | #define STS_SRI (1<<7) /* SOF Recieved */ | ||
49 | |||
50 | #define HOSTPC_REG_OFFSET 0x1b4 | ||
51 | |||
52 | #define HOSTPC1_DEVLC_STS (1 << 28) | ||
53 | #define HOSTPC1_DEVLC_PTS(x) (((x) & 0x7) << 29) | ||
54 | |||
55 | #define USB1_PREFETCH_ID 6 | ||
56 | #define USB2_PREFETCH_ID 18 | ||
57 | #define USB3_PREFETCH_ID 17 | ||
58 | |||
28 | struct tegra_ehci_hcd { | 59 | struct tegra_ehci_hcd { |
29 | struct ehci_hcd *ehci; | 60 | struct ehci_hcd *ehci; |
30 | struct tegra_usb_phy *phy; | 61 | struct tegra_usb_phy *phy; |
31 | struct clk *clk; | 62 | struct clk *clk; |
32 | struct clk *emc_clk; | 63 | struct clk *emc_clk; |
64 | struct clk *sclk_clk; | ||
33 | struct otg_transceiver *transceiver; | 65 | struct otg_transceiver *transceiver; |
34 | int host_resumed; | 66 | int host_resumed; |
35 | int bus_suspended; | 67 | int bus_suspended; |
36 | int port_resuming; | 68 | int port_resuming; |
37 | int power_down_on_bus_suspend; | 69 | int power_down_on_bus_suspend; |
70 | int default_enable; | ||
38 | enum tegra_usb_phy_port_speed port_speed; | 71 | enum tegra_usb_phy_port_speed port_speed; |
72 | struct work_struct clk_timer_work; | ||
73 | struct timer_list clk_timer; | ||
74 | bool clock_enabled; | ||
75 | bool timer_event; | ||
76 | struct mutex tegra_ehci_hcd_mutex; | ||
77 | unsigned int irq; | ||
78 | bool bus_suspended_fail; | ||
39 | }; | 79 | }; |
40 | 80 | ||
41 | static void tegra_ehci_power_up(struct usb_hcd *hcd) | 81 | static void tegra_ehci_power_up(struct usb_hcd *hcd, bool is_dpd) |
42 | { | 82 | { |
43 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); | 83 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); |
44 | 84 | ||
45 | clk_enable(tegra->emc_clk); | 85 | if (!tegra->default_enable) |
46 | clk_enable(tegra->clk); | 86 | clk_enable(tegra->clk); |
47 | tegra_usb_phy_power_on(tegra->phy); | 87 | tegra_usb_phy_power_on(tegra->phy, is_dpd); |
48 | tegra->host_resumed = 1; | 88 | tegra->host_resumed = 1; |
49 | } | 89 | } |
50 | 90 | ||
51 | static void tegra_ehci_power_down(struct usb_hcd *hcd) | 91 | static void tegra_ehci_power_down(struct usb_hcd *hcd, bool is_dpd) |
52 | { | 92 | { |
53 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); | 93 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); |
54 | 94 | ||
55 | tegra->host_resumed = 0; | 95 | tegra->host_resumed = 0; |
56 | tegra_usb_phy_power_off(tegra->phy); | 96 | tegra_usb_phy_power_off(tegra->phy, is_dpd); |
57 | clk_disable(tegra->clk); | 97 | if (!tegra->default_enable) |
58 | clk_disable(tegra->emc_clk); | 98 | clk_disable(tegra->clk); |
59 | } | 99 | } |
60 | 100 | ||
61 | static int tegra_ehci_internal_port_reset( | 101 | static int tegra_ehci_internal_port_reset( |
@@ -123,6 +163,69 @@ static int tegra_ehci_internal_port_reset( | |||
123 | return retval; | 163 | return retval; |
124 | } | 164 | } |
125 | 165 | ||
166 | static irqreturn_t tegra_ehci_irq (struct usb_hcd *hcd) | ||
167 | { | ||
168 | struct ehci_hcd *ehci = hcd_to_ehci (hcd); | ||
169 | struct ehci_regs __iomem *hw = ehci->regs; | ||
170 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); | ||
171 | u32 val; | ||
172 | irqreturn_t irq_status; | ||
173 | bool pmc_remote_wakeup = false; | ||
174 | |||
175 | /* Fence read for coherency of AHB master intiated writes */ | ||
176 | if (tegra->phy->instance == 0) | ||
177 | readb(IO_ADDRESS(IO_PPCS_PHYS + USB1_PREFETCH_ID)); | ||
178 | else if (tegra->phy->instance == 1) | ||
179 | readb(IO_ADDRESS(IO_PPCS_PHYS + USB2_PREFETCH_ID)); | ||
180 | else if (tegra->phy->instance == 2) | ||
181 | readb(IO_ADDRESS(IO_PPCS_PHYS + USB3_PREFETCH_ID)); | ||
182 | |||
183 | if ((tegra->phy->usb_phy_type == TEGRA_USB_PHY_TYPE_UTMIP) && | ||
184 | (tegra->ehci->has_hostpc)) { | ||
185 | /* check if there is any remote wake event */ | ||
186 | if (tegra_usb_phy_is_remotewake_detected(tegra->phy)) { | ||
187 | pmc_remote_wakeup = true; | ||
188 | spin_lock (&ehci->lock); | ||
189 | usb_hcd_resume_root_hub(hcd); | ||
190 | spin_unlock (&ehci->lock); | ||
191 | } | ||
192 | } | ||
193 | if (tegra->phy->hotplug) { | ||
194 | spin_lock(&ehci->lock); | ||
195 | val = readl(hcd->regs + TEGRA_USB_SUSP_CTRL_OFFSET); | ||
196 | if ((val & TEGRA_USB_PHY_CLK_VALID_INT_STS)) { | ||
197 | val &= ~TEGRA_USB_PHY_CLK_VALID_INT_ENB | | ||
198 | TEGRA_USB_PHY_CLK_VALID_INT_STS; | ||
199 | writel(val , (hcd->regs + TEGRA_USB_SUSP_CTRL_OFFSET)); | ||
200 | |||
201 | val = readl(&hw->status); | ||
202 | if (!(val & STS_PCD)) { | ||
203 | spin_unlock(&ehci->lock); | ||
204 | return 0; | ||
205 | } | ||
206 | val = readl(hcd->regs + TEGRA_USB_PORTSC1_OFFSET); | ||
207 | val &= ~(TEGRA_USB_PORTSC1_WKCN | PORT_RWC_BITS); | ||
208 | writel(val , (hcd->regs + TEGRA_USB_PORTSC1_OFFSET)); | ||
209 | } | ||
210 | spin_unlock(&ehci->lock); | ||
211 | } | ||
212 | |||
213 | irq_status = ehci_irq(hcd); | ||
214 | |||
215 | if (pmc_remote_wakeup) { | ||
216 | ehci->controller_remote_wakeup = false; | ||
217 | } | ||
218 | |||
219 | if (ehci->controller_remote_wakeup) { | ||
220 | ehci->controller_remote_wakeup = false; | ||
221 | /* disable interrupts */ | ||
222 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); | ||
223 | tegra_usb_phy_preresume(tegra->phy, true); | ||
224 | tegra->port_resuming = 1; | ||
225 | } | ||
226 | return irq_status; | ||
227 | } | ||
228 | |||
126 | static int tegra_ehci_hub_control( | 229 | static int tegra_ehci_hub_control( |
127 | struct usb_hcd *hcd, | 230 | struct usb_hcd *hcd, |
128 | u16 typeReq, | 231 | u16 typeReq, |
@@ -133,11 +236,27 @@ static int tegra_ehci_hub_control( | |||
133 | ) | 236 | ) |
134 | { | 237 | { |
135 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | 238 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
136 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); | 239 | int ports = HCS_N_PORTS(ehci->hcs_params); |
240 | u32 temp, status; | ||
137 | u32 __iomem *status_reg; | 241 | u32 __iomem *status_reg; |
138 | u32 temp; | 242 | u32 usbsts_reg; |
243 | |||
139 | unsigned long flags; | 244 | unsigned long flags; |
140 | int retval = 0; | 245 | int retval = 0; |
246 | unsigned selector; | ||
247 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); | ||
248 | bool hsic = false; | ||
249 | bool do_post_resume = false; | ||
250 | |||
251 | mutex_lock(&tegra->tegra_ehci_hcd_mutex); | ||
252 | if (!tegra->host_resumed) { | ||
253 | if (buf) | ||
254 | memset (buf, 0, wLength); | ||
255 | mutex_unlock(&tegra->tegra_ehci_hcd_mutex); | ||
256 | return retval; | ||
257 | } | ||
258 | |||
259 | hsic = (tegra->phy->usb_phy_type == TEGRA_USB_PHY_TYPE_HSIC); | ||
141 | 260 | ||
142 | status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1]; | 261 | status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1]; |
143 | 262 | ||
@@ -152,18 +271,35 @@ static int tegra_ehci_hub_control( | |||
152 | temp = ehci_readl(ehci, status_reg) & ~PORT_RWC_BITS; | 271 | temp = ehci_readl(ehci, status_reg) & ~PORT_RWC_BITS; |
153 | ehci_writel(ehci, temp & ~PORT_PE, status_reg); | 272 | ehci_writel(ehci, temp & ~PORT_PE, status_reg); |
154 | goto done; | 273 | goto done; |
155 | } | 274 | } else if (typeReq == GetPortStatus) { |
156 | |||
157 | else if (typeReq == GetPortStatus) { | ||
158 | temp = ehci_readl(ehci, status_reg); | 275 | temp = ehci_readl(ehci, status_reg); |
159 | if (tegra->port_resuming && !(temp & PORT_SUSPEND)) { | 276 | if (tegra->port_resuming && !(temp & PORT_SUSPEND) && |
160 | /* Resume completed, re-enable disconnect detection */ | 277 | time_after_eq(jiffies, ehci->reset_done[wIndex-1])) { |
278 | clear_bit((wIndex & 0xff) - 1, &ehci->suspended_ports); | ||
279 | ehci->reset_done[wIndex-1] = 0; | ||
280 | do_post_resume = true; | ||
281 | } else if (tegra->port_resuming && (temp & PORT_RESUME) && | ||
282 | time_after_eq(jiffies, ehci->reset_done[wIndex-1]) ) { | ||
283 | do_post_resume = true; | ||
284 | } | ||
285 | |||
286 | if (do_post_resume) { | ||
161 | tegra->port_resuming = 0; | 287 | tegra->port_resuming = 0; |
162 | tegra_usb_phy_postresume(tegra->phy); | 288 | tegra_usb_phy_postresume(tegra->phy, false); |
289 | if (tegra->phy->usb_phy_type == TEGRA_USB_PHY_TYPE_UTMIP) { | ||
290 | ehci->command |= CMD_RUN; | ||
291 | /* | ||
292 | * ehci run bit is disabled to avoid SOF. | ||
293 | * 2LS WAR is executed by now enable the run bit. | ||
294 | */ | ||
295 | ehci_writel(ehci, ehci->command, | ||
296 | &ehci->regs->command); | ||
297 | /* Now we can safely re-enable irqs */ | ||
298 | ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable); | ||
299 | } | ||
163 | } | 300 | } |
164 | } | ||
165 | 301 | ||
166 | else if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) { | 302 | } else if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) { |
167 | temp = ehci_readl(ehci, status_reg); | 303 | temp = ehci_readl(ehci, status_reg); |
168 | if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) { | 304 | if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) { |
169 | retval = -EPIPE; | 305 | retval = -EPIPE; |
@@ -174,6 +310,9 @@ static int tegra_ehci_hub_control( | |||
174 | temp |= PORT_WKDISC_E | PORT_WKOC_E; | 310 | temp |= PORT_WKDISC_E | PORT_WKOC_E; |
175 | ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); | 311 | ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); |
176 | 312 | ||
313 | /* Need a 4ms delay before the controller goes to suspend */ | ||
314 | mdelay(4); | ||
315 | |||
177 | /* | 316 | /* |
178 | * If a transaction is in progress, there may be a delay in | 317 | * If a transaction is in progress, there may be a delay in |
179 | * suspending the port. Poll until the port is suspended. | 318 | * suspending the port. Poll until the port is suspended. |
@@ -183,6 +322,16 @@ static int tegra_ehci_hub_control( | |||
183 | pr_err("%s: timeout waiting for SUSPEND\n", __func__); | 322 | pr_err("%s: timeout waiting for SUSPEND\n", __func__); |
184 | 323 | ||
185 | set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports); | 324 | set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports); |
325 | |||
326 | if (tegra->phy->usb_phy_type == TEGRA_USB_PHY_TYPE_UTMIP) { | ||
327 | /* Disable RUN bit. */ | ||
328 | ehci->command &= ~CMD_RUN; | ||
329 | ehci_writel(ehci, ehci->command, | ||
330 | &ehci->regs->command); | ||
331 | } | ||
332 | |||
333 | tegra_usb_phy_postsuspend(tegra->phy, false); | ||
334 | |||
186 | goto done; | 335 | goto done; |
187 | } | 336 | } |
188 | 337 | ||
@@ -190,6 +339,7 @@ static int tegra_ehci_hub_control( | |||
190 | if (tegra->phy->instance == 0 && | 339 | if (tegra->phy->instance == 0 && |
191 | (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_RESET)) { | 340 | (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_RESET)) { |
192 | spin_unlock_irqrestore(&ehci->lock, flags); | 341 | spin_unlock_irqrestore(&ehci->lock, flags); |
342 | mutex_unlock(&tegra->tegra_ehci_hcd_mutex); | ||
193 | return tegra_ehci_internal_port_reset(ehci, status_reg); | 343 | return tegra_ehci_internal_port_reset(ehci, status_reg); |
194 | } | 344 | } |
195 | 345 | ||
@@ -211,108 +361,257 @@ static int tegra_ehci_hub_control( | |||
211 | if (!(temp & PORT_SUSPEND)) | 361 | if (!(temp & PORT_SUSPEND)) |
212 | goto done; | 362 | goto done; |
213 | 363 | ||
364 | tegra->port_resuming = 1; | ||
365 | |||
366 | if (tegra->phy->usb_phy_type == TEGRA_USB_PHY_TYPE_UTMIP) { | ||
367 | /* disable interrupts */ | ||
368 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); | ||
369 | /* Disable RUN bit. */ | ||
370 | ehci->command &= ~CMD_RUN; | ||
371 | ehci_writel(ehci, ehci->command, | ||
372 | &ehci->regs->command); | ||
373 | } | ||
374 | |||
214 | /* Disable disconnect detection during port resume */ | 375 | /* Disable disconnect detection during port resume */ |
215 | tegra_usb_phy_preresume(tegra->phy); | 376 | tegra_usb_phy_preresume(tegra->phy, false); |
377 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
378 | if (tegra->phy->usb_phy_type != TEGRA_USB_PHY_TYPE_UTMIP) { | ||
379 | #endif | ||
380 | ehci_dbg(ehci, "%s:USBSTS = 0x%x", __func__, | ||
381 | ehci_readl(ehci, &ehci->regs->status)); | ||
382 | usbsts_reg = ehci_readl(ehci, &ehci->regs->status); | ||
383 | ehci_writel(ehci, usbsts_reg, &ehci->regs->status); | ||
384 | usbsts_reg = ehci_readl(ehci, &ehci->regs->status); | ||
385 | udelay(20); | ||
216 | 386 | ||
217 | ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25); | 387 | if (handshake(ehci, &ehci->regs->status, STS_SRI, STS_SRI, 2000)) |
388 | pr_err("%s: timeout set for STS_SRI\n", __func__); | ||
218 | 389 | ||
390 | usbsts_reg = ehci_readl(ehci, &ehci->regs->status); | ||
391 | ehci_writel(ehci, usbsts_reg, &ehci->regs->status); | ||
392 | |||
393 | if (handshake(ehci, &ehci->regs->status, STS_SRI, 0, 2000)) | ||
394 | pr_err("%s: timeout clear STS_SRI\n", __func__); | ||
395 | |||
396 | if (handshake(ehci, &ehci->regs->status, STS_SRI, STS_SRI, 2000)) | ||
397 | pr_err("%s: timeout set STS_SRI\n", __func__); | ||
398 | |||
399 | udelay(20); | ||
400 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC | ||
401 | } | ||
402 | #endif | ||
219 | temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); | 403 | temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); |
220 | /* start resume signalling */ | 404 | /* start resume signaling */ |
221 | ehci_writel(ehci, temp | PORT_RESUME, status_reg); | 405 | ehci_writel(ehci, temp | PORT_RESUME, status_reg); |
222 | 406 | ||
223 | spin_unlock_irqrestore(&ehci->lock, flags); | 407 | ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25); |
224 | msleep(20); | 408 | /* whoever resumes must GetPortStatus to complete it!! */ |
225 | spin_lock_irqsave(&ehci->lock, flags); | 409 | goto done; |
226 | 410 | } | |
227 | /* Poll until the controller clears RESUME and SUSPEND */ | ||
228 | if (handshake(ehci, status_reg, PORT_RESUME, 0, 2000)) | ||
229 | pr_err("%s: timeout waiting for RESUME\n", __func__); | ||
230 | if (handshake(ehci, status_reg, PORT_SUSPEND, 0, 2000)) | ||
231 | pr_err("%s: timeout waiting for SUSPEND\n", __func__); | ||
232 | 411 | ||
233 | ehci->reset_done[wIndex-1] = 0; | 412 | /* Handle port reset here */ |
413 | if ((hsic) && (typeReq == SetPortFeature) && | ||
414 | ((wValue == USB_PORT_FEAT_RESET) || (wValue == USB_PORT_FEAT_POWER))) { | ||
415 | selector = wIndex >> 8; | ||
416 | wIndex &= 0xff; | ||
417 | if (!wIndex || wIndex > ports) { | ||
418 | retval = -EPIPE; | ||
419 | goto done; | ||
420 | } | ||
421 | wIndex--; | ||
422 | status = 0; | ||
423 | temp = ehci_readl(ehci, status_reg); | ||
424 | if (temp & PORT_OWNER) | ||
425 | goto done; | ||
426 | temp &= ~PORT_RWC_BITS; | ||
427 | |||
428 | switch (wValue) { | ||
429 | case USB_PORT_FEAT_RESET: | ||
430 | { | ||
431 | if (temp & PORT_RESUME) { | ||
432 | retval = -EPIPE; | ||
433 | goto done; | ||
434 | } | ||
435 | /* line status bits may report this as low speed, | ||
436 | * which can be fine if this root hub has a | ||
437 | * transaction translator built in. | ||
438 | */ | ||
439 | if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT | ||
440 | && !ehci_is_TDI(ehci) && PORT_USB11 (temp)) { | ||
441 | ehci_dbg (ehci, "port %d low speed --> companion\n", wIndex + 1); | ||
442 | temp |= PORT_OWNER; | ||
443 | ehci_writel(ehci, temp, status_reg); | ||
444 | } else { | ||
445 | ehci_vdbg(ehci, "port %d reset\n", wIndex + 1); | ||
446 | temp &= ~PORT_PE; | ||
447 | /* | ||
448 | * caller must wait, then call GetPortStatus | ||
449 | * usb 2.0 spec says 50 ms resets on root | ||
450 | */ | ||
451 | ehci->reset_done[wIndex] = jiffies + msecs_to_jiffies(50); | ||
452 | ehci_writel(ehci, temp, status_reg); | ||
453 | if (hsic && (wIndex == 0)) | ||
454 | tegra_usb_phy_bus_reset(tegra->phy); | ||
455 | } | ||
234 | 456 | ||
235 | tegra->port_resuming = 1; | 457 | break; |
458 | } | ||
459 | case USB_PORT_FEAT_POWER: | ||
460 | { | ||
461 | if (HCS_PPC(ehci->hcs_params)) | ||
462 | ehci_writel(ehci, temp | PORT_POWER, status_reg); | ||
463 | if (hsic && (wIndex == 0)) | ||
464 | tegra_usb_phy_bus_connect(tegra->phy); | ||
465 | break; | ||
466 | } | ||
467 | } | ||
236 | goto done; | 468 | goto done; |
237 | } | 469 | } |
238 | 470 | ||
239 | spin_unlock_irqrestore(&ehci->lock, flags); | 471 | spin_unlock_irqrestore(&ehci->lock, flags); |
240 | 472 | ||
241 | /* Handle the hub control events here */ | 473 | /* Handle the hub control events here */ |
242 | return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength); | 474 | retval = ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength); |
475 | mutex_unlock(&tegra->tegra_ehci_hcd_mutex); | ||
476 | return retval; | ||
243 | done: | 477 | done: |
244 | spin_unlock_irqrestore(&ehci->lock, flags); | 478 | spin_unlock_irqrestore(&ehci->lock, flags); |
479 | mutex_unlock(&tegra->tegra_ehci_hcd_mutex); | ||
245 | return retval; | 480 | return retval; |
246 | } | 481 | } |
247 | 482 | ||
248 | static void tegra_ehci_restart(struct usb_hcd *hcd) | 483 | #ifdef CONFIG_PM |
484 | static void tegra_ehci_restart(struct usb_hcd *hcd, bool is_dpd) | ||
249 | { | 485 | { |
250 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | 486 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
487 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); | ||
488 | unsigned int temp; | ||
251 | 489 | ||
490 | ehci->controller_resets_phy = 0; | ||
491 | tegra_ehci_pre_reset(tegra->phy, false); | ||
252 | ehci_reset(ehci); | 492 | ehci_reset(ehci); |
493 | tegra_ehci_post_reset(tegra->phy, false); | ||
494 | |||
495 | if (tegra->phy->usb_phy_type == TEGRA_USB_PHY_TYPE_NULL_ULPI) | ||
496 | ehci->controller_resets_phy = 1; | ||
253 | 497 | ||
254 | /* setup the frame list and Async q heads */ | 498 | /* setup the frame list and Async q heads */ |
255 | ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list); | 499 | ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list); |
256 | ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next); | 500 | ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next); |
257 | /* setup the command register and set the controller in RUN mode */ | 501 | /* setup the command register and set the controller in RUN mode */ |
258 | ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); | 502 | ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); |
259 | ehci->command |= CMD_RUN; | 503 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC |
504 | /* dont start RS here for HSIC, it will be set by bus_reset */ | ||
505 | if (tegra->phy->usb_phy_type != TEGRA_USB_PHY_TYPE_HSIC) | ||
506 | #endif | ||
507 | ehci->command |= CMD_RUN; | ||
260 | ehci_writel(ehci, ehci->command, &ehci->regs->command); | 508 | ehci_writel(ehci, ehci->command, &ehci->regs->command); |
261 | 509 | ||
510 | /* Enable the root Port Power */ | ||
511 | if (HCS_PPC(ehci->hcs_params)) { | ||
512 | temp = ehci_readl(ehci, &ehci->regs->port_status[0]); | ||
513 | ehci_writel(ehci, temp | PORT_POWER, &ehci->regs->port_status[0]); | ||
514 | } | ||
515 | |||
262 | down_write(&ehci_cf_port_reset_rwsem); | 516 | down_write(&ehci_cf_port_reset_rwsem); |
517 | if(is_dpd) | ||
518 | hcd->state = HC_STATE_SUSPENDED; | ||
519 | else | ||
520 | hcd->state = HC_STATE_RUNNING; | ||
263 | ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag); | 521 | ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag); |
264 | /* flush posted writes */ | 522 | /* flush posted writes */ |
265 | ehci_readl(ehci, &ehci->regs->command); | 523 | ehci_readl(ehci, &ehci->regs->command); |
266 | up_write(&ehci_cf_port_reset_rwsem); | 524 | up_write(&ehci_cf_port_reset_rwsem); |
525 | |||
526 | /* Turn On Interrupts */ | ||
527 | ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable); | ||
267 | } | 528 | } |
268 | 529 | ||
269 | static int tegra_usb_suspend(struct usb_hcd *hcd) | 530 | static int tegra_usb_suspend(struct usb_hcd *hcd, bool is_dpd) |
270 | { | 531 | { |
271 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); | 532 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); |
272 | struct ehci_regs __iomem *hw = tegra->ehci->regs; | 533 | struct ehci_regs __iomem *hw = tegra->ehci->regs; |
273 | unsigned long flags; | 534 | unsigned long flags; |
535 | int hsic = 0; | ||
536 | |||
537 | hsic = (tegra->phy->usb_phy_type == TEGRA_USB_PHY_TYPE_HSIC); | ||
274 | 538 | ||
275 | spin_lock_irqsave(&tegra->ehci->lock, flags); | 539 | spin_lock_irqsave(&tegra->ehci->lock, flags); |
276 | 540 | ||
277 | tegra->port_speed = (readl(&hw->port_status[0]) >> 26) & 0x3; | 541 | if (tegra->ehci->has_hostpc) |
542 | tegra->port_speed = (readl(hcd->regs + HOSTPC_REG_OFFSET) >> 25) & 0x3; | ||
543 | else | ||
544 | tegra->port_speed = (readl(&hw->port_status[0]) >> 26) & 0x3; | ||
278 | ehci_halt(tegra->ehci); | 545 | ehci_halt(tegra->ehci); |
279 | clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | 546 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC |
547 | if (tegra->phy->usb_phy_type == TEGRA_USB_PHY_TYPE_UTMIP) { | ||
548 | /* | ||
549 | * Ehci run bit is disabled by now read this into command variable | ||
550 | * so that bus resume will not enable run bit immedialty. | ||
551 | * this is required for 2LS WAR on UTMIP interface. | ||
552 | */ | ||
553 | tegra->ehci->command = ehci_readl(tegra->ehci, | ||
554 | &tegra->ehci->regs->command); | ||
555 | } | ||
556 | #endif | ||
280 | 557 | ||
281 | spin_unlock_irqrestore(&tegra->ehci->lock, flags); | 558 | spin_unlock_irqrestore(&tegra->ehci->lock, flags); |
282 | 559 | ||
283 | tegra_ehci_power_down(hcd); | 560 | tegra_ehci_power_down(hcd, is_dpd); |
284 | return 0; | 561 | return 0; |
285 | } | 562 | } |
286 | 563 | ||
287 | static int tegra_usb_resume(struct usb_hcd *hcd) | 564 | static int tegra_usb_resume(struct usb_hcd *hcd, bool is_dpd) |
288 | { | 565 | { |
289 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); | 566 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); |
567 | struct usb_device *udev = hcd->self.root_hub; | ||
290 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | 568 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
291 | struct ehci_regs __iomem *hw = ehci->regs; | 569 | struct ehci_regs __iomem *hw = ehci->regs; |
292 | unsigned long val; | 570 | unsigned long val; |
571 | bool hsic; | ||
572 | bool null_ulpi; | ||
573 | bool utmip_remote_wakeup = false; | ||
293 | 574 | ||
575 | null_ulpi = (tegra->phy->usb_phy_type == TEGRA_USB_PHY_TYPE_NULL_ULPI); | ||
576 | hsic = (tegra->phy->usb_phy_type == TEGRA_USB_PHY_TYPE_HSIC); | ||
577 | |||
578 | tegra_ehci_power_up(hcd, is_dpd); | ||
294 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | 579 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); |
295 | tegra_ehci_power_up(hcd); | ||
296 | 580 | ||
297 | if (tegra->port_speed > TEGRA_USB_PHY_PORT_SPEED_HIGH) { | 581 | if ((tegra->port_speed > TEGRA_USB_PHY_PORT_SPEED_HIGH) || (hsic) || |
298 | /* Wait for the phy to detect new devices | 582 | (null_ulpi)) |
299 | * before we restart the controller */ | ||
300 | msleep(10); | ||
301 | goto restart; | 583 | goto restart; |
302 | } | ||
303 | 584 | ||
304 | /* Force the phy to keep data lines in suspend state */ | 585 | /* Force the phy to keep data lines in suspend state */ |
305 | tegra_ehci_phy_restore_start(tegra->phy, tegra->port_speed); | 586 | tegra_ehci_phy_restore_start(tegra->phy, tegra->port_speed); |
306 | 587 | ||
588 | if ((tegra->phy->usb_phy_type == TEGRA_USB_PHY_TYPE_UTMIP) && | ||
589 | (tegra->ehci->has_hostpc)) { | ||
590 | ehci_reset(ehci); | ||
591 | } | ||
592 | |||
307 | /* Enable host mode */ | 593 | /* Enable host mode */ |
308 | tdi_reset(ehci); | 594 | tdi_reset(ehci); |
309 | 595 | ||
596 | if ((tegra->phy->usb_phy_type == TEGRA_USB_PHY_TYPE_UTMIP) && | ||
597 | (tegra->ehci->has_hostpc)) { | ||
598 | val = readl(hcd->regs + HOSTPC_REG_OFFSET); | ||
599 | val &= ~HOSTPC1_DEVLC_PTS(~0); | ||
600 | val |= HOSTPC1_DEVLC_STS; | ||
601 | writel(val, hcd->regs + HOSTPC_REG_OFFSET); | ||
602 | } | ||
603 | |||
310 | /* Enable Port Power */ | 604 | /* Enable Port Power */ |
311 | val = readl(&hw->port_status[0]); | 605 | val = readl(&hw->port_status[0]); |
312 | val |= PORT_POWER; | 606 | val |= PORT_POWER; |
313 | writel(val, &hw->port_status[0]); | 607 | writel(val, &hw->port_status[0]); |
314 | udelay(10); | 608 | udelay(10); |
315 | 609 | ||
610 | if ((tegra->phy->usb_phy_type == TEGRA_USB_PHY_TYPE_UTMIP) && | ||
611 | (tegra->ehci->has_hostpc) && (tegra->phy->remote_wakeup)) { | ||
612 | utmip_remote_wakeup = true; | ||
613 | } | ||
614 | |||
316 | /* Check if the phy resume from LP0. When the phy resume from LP0 | 615 | /* Check if the phy resume from LP0. When the phy resume from LP0 |
317 | * USB register will be reset. */ | 616 | * USB register will be reset. */ |
318 | if (!readl(&hw->async_next)) { | 617 | if (!readl(&hw->async_next)) { |
@@ -360,6 +659,9 @@ static int tegra_usb_resume(struct usb_hcd *hcd) | |||
360 | val |= PORT_SUSPEND; | 659 | val |= PORT_SUSPEND; |
361 | writel(val, &hw->port_status[0]); | 660 | writel(val, &hw->port_status[0]); |
362 | 661 | ||
662 | /* Need a 4ms delay before the controller goes to suspend */ | ||
663 | mdelay(4); | ||
664 | |||
363 | /* Wait until port suspend completes */ | 665 | /* Wait until port suspend completes */ |
364 | if (handshake(ehci, &hw->port_status[0], PORT_SUSPEND, | 666 | if (handshake(ehci, &hw->port_status[0], PORT_SUSPEND, |
365 | PORT_SUSPEND, 1000)) { | 667 | PORT_SUSPEND, 1000)) { |
@@ -370,31 +672,98 @@ static int tegra_usb_resume(struct usb_hcd *hcd) | |||
370 | } | 672 | } |
371 | 673 | ||
372 | tegra_ehci_phy_restore_end(tegra->phy); | 674 | tegra_ehci_phy_restore_end(tegra->phy); |
675 | if (utmip_remote_wakeup) { | ||
676 | ehci->command |= CMD_RUN; | ||
677 | ehci_writel(ehci, ehci->command, &ehci->regs->command); | ||
678 | } | ||
373 | return 0; | 679 | return 0; |
374 | 680 | ||
375 | restart: | 681 | restart: |
376 | if (tegra->port_speed <= TEGRA_USB_PHY_PORT_SPEED_HIGH) | 682 | if (null_ulpi) { |
683 | bool LP0 = !readl(&hw->async_next); | ||
684 | |||
685 | if (LP0) { | ||
686 | static int cnt = 1; | ||
687 | |||
688 | pr_info("LP0 restart %d\n", cnt++); | ||
689 | tegra_ehci_phy_restore_start(tegra->phy, | ||
690 | tegra->port_speed); | ||
691 | } | ||
692 | |||
693 | val = readl(&hw->port_status[0]); | ||
694 | if (!((val & PORT_POWER) && (val & PORT_PE))) { | ||
695 | tegra_ehci_restart(hcd, is_dpd); | ||
696 | } | ||
697 | |||
698 | if (LP0) | ||
699 | tegra_ehci_phy_restore_end(tegra->phy); | ||
700 | |||
701 | return 0; | ||
702 | } | ||
703 | |||
704 | if ((tegra->port_speed <= TEGRA_USB_PHY_PORT_SPEED_HIGH) && (!hsic)) | ||
377 | tegra_ehci_phy_restore_end(tegra->phy); | 705 | tegra_ehci_phy_restore_end(tegra->phy); |
706 | if (hsic) { | ||
707 | val = readl(&hw->port_status[0]); | ||
708 | if (!((val & PORT_POWER) && (val & PORT_PE))) | ||
709 | tegra_ehci_restart(hcd, false); | ||
710 | |||
711 | tegra_usb_phy_bus_idle(tegra->phy); | ||
712 | if (!tegra_usb_phy_is_device_connected(tegra->phy)) | ||
713 | pr_err("%s: no hsic device conenction\n", __func__); | ||
714 | } else { | ||
715 | tegra_ehci_restart(hcd, false); | ||
716 | } | ||
378 | 717 | ||
379 | tegra_ehci_restart(hcd); | ||
380 | return 0; | 718 | return 0; |
381 | } | 719 | } |
720 | #endif | ||
721 | |||
722 | /* | ||
723 | * Disable PHY clock valid interrupts and wait for the interrupt handler to | ||
724 | * finish. | ||
725 | * | ||
726 | * Requires a lock on tegra_ehci_hcd_mutex | ||
727 | * Must not be called with a lock on ehci->lock | ||
728 | */ | ||
729 | static void tegra_ehci_disable_phy_interrupt(struct usb_hcd *hcd) { | ||
730 | struct tegra_ehci_hcd *tegra; | ||
731 | u32 val; | ||
732 | if (hcd->irq >= 0) { | ||
733 | tegra = dev_get_drvdata(hcd->self.controller); | ||
734 | if (tegra->phy->hotplug) { | ||
735 | /* Disable PHY clock valid interrupts */ | ||
736 | val = readl(hcd->regs + TEGRA_USB_SUSP_CTRL_OFFSET); | ||
737 | val &= ~TEGRA_USB_PHY_CLK_VALID_INT_ENB; | ||
738 | writel(val , (hcd->regs + TEGRA_USB_SUSP_CTRL_OFFSET)); | ||
739 | } | ||
740 | /* Wait for the interrupt handler to finish */ | ||
741 | synchronize_irq(hcd->irq); | ||
742 | } | ||
743 | } | ||
382 | 744 | ||
383 | static void tegra_ehci_shutdown(struct usb_hcd *hcd) | 745 | static void tegra_ehci_shutdown(struct usb_hcd *hcd) |
384 | { | 746 | { |
385 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); | 747 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); |
386 | 748 | ||
749 | mutex_lock(&tegra->tegra_ehci_hcd_mutex); | ||
750 | tegra_ehci_disable_phy_interrupt(hcd); | ||
387 | /* ehci_shutdown touches the USB controller registers, make sure | 751 | /* ehci_shutdown touches the USB controller registers, make sure |
388 | * controller has clocks to it */ | 752 | * controller has clocks to it */ |
389 | if (!tegra->host_resumed) | 753 | if (!tegra->host_resumed) |
390 | tegra_ehci_power_up(hcd); | 754 | tegra_ehci_power_up(hcd, false); |
391 | 755 | ||
392 | ehci_shutdown(hcd); | 756 | ehci_shutdown(hcd); |
757 | |||
758 | /* we are ready to shut down, powerdown the phy */ | ||
759 | tegra_ehci_power_down(hcd, false); | ||
760 | mutex_unlock(&tegra->tegra_ehci_hcd_mutex); | ||
393 | } | 761 | } |
394 | 762 | ||
395 | static int tegra_ehci_setup(struct usb_hcd *hcd) | 763 | static int tegra_ehci_setup(struct usb_hcd *hcd) |
396 | { | 764 | { |
397 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | 765 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
766 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); | ||
398 | int retval; | 767 | int retval; |
399 | 768 | ||
400 | /* EHCI registers start at offset 0x100 */ | 769 | /* EHCI registers start at offset 0x100 */ |
@@ -408,9 +777,15 @@ static int tegra_ehci_setup(struct usb_hcd *hcd) | |||
408 | /* cache this readonly data; minimize chip reads */ | 777 | /* cache this readonly data; minimize chip reads */ |
409 | ehci->hcs_params = readl(&ehci->caps->hcs_params); | 778 | ehci->hcs_params = readl(&ehci->caps->hcs_params); |
410 | 779 | ||
411 | /* switch to host mode */ | 780 | #ifndef CONFIG_ARCH_TEGRA_2x_SOC |
781 | ehci->has_hostpc = 1; | ||
782 | #endif | ||
412 | hcd->has_tt = 1; | 783 | hcd->has_tt = 1; |
413 | ehci_reset(ehci); | 784 | |
785 | if (tegra->phy->usb_phy_type != TEGRA_USB_PHY_TYPE_NULL_ULPI) { | ||
786 | ehci_reset(ehci); | ||
787 | tegra_ehci_post_reset(tegra->phy, false); | ||
788 | } | ||
414 | 789 | ||
415 | retval = ehci_halt(ehci); | 790 | retval = ehci_halt(ehci); |
416 | if (retval) | 791 | if (retval) |
@@ -422,6 +797,20 @@ static int tegra_ehci_setup(struct usb_hcd *hcd) | |||
422 | return retval; | 797 | return retval; |
423 | 798 | ||
424 | ehci->sbrn = 0x20; | 799 | ehci->sbrn = 0x20; |
800 | ehci->controller_remote_wakeup = false; | ||
801 | |||
802 | if (tegra->phy->usb_phy_type == TEGRA_USB_PHY_TYPE_NULL_ULPI) { | ||
803 | tegra_ehci_pre_reset(tegra->phy, false); | ||
804 | ehci_reset(ehci); | ||
805 | tegra_ehci_post_reset(tegra->phy, false); | ||
806 | |||
807 | /* | ||
808 | * Resetting the controller has the side effect of resetting the PHY. | ||
809 | * So, never reset the controller after the calling | ||
810 | * tegra_ehci_reinit API. | ||
811 | */ | ||
812 | ehci->controller_resets_phy = 1; | ||
813 | } | ||
425 | 814 | ||
426 | ehci_port_power(ehci, 1); | 815 | ehci_port_power(ehci, 1); |
427 | return retval; | 816 | return retval; |
@@ -433,11 +822,21 @@ static int tegra_ehci_bus_suspend(struct usb_hcd *hcd) | |||
433 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); | 822 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); |
434 | int error_status = 0; | 823 | int error_status = 0; |
435 | 824 | ||
825 | mutex_lock(&tegra->tegra_ehci_hcd_mutex); | ||
826 | tegra->bus_suspended_fail = false; | ||
827 | tegra_ehci_disable_phy_interrupt(hcd); | ||
828 | /* ehci_shutdown touches the USB controller registers, make sure | ||
829 | * controller has clocks to it */ | ||
830 | if (!tegra->host_resumed) | ||
831 | tegra_ehci_power_up(hcd, false); | ||
436 | error_status = ehci_bus_suspend(hcd); | 832 | error_status = ehci_bus_suspend(hcd); |
833 | if (error_status) | ||
834 | tegra->bus_suspended_fail = true; | ||
437 | if (!error_status && tegra->power_down_on_bus_suspend) { | 835 | if (!error_status && tegra->power_down_on_bus_suspend) { |
438 | tegra_usb_suspend(hcd); | 836 | tegra_usb_suspend(hcd, false); |
439 | tegra->bus_suspended = 1; | 837 | tegra->bus_suspended = 1; |
440 | } | 838 | } |
839 | mutex_unlock(&tegra->tegra_ehci_hcd_mutex); | ||
441 | 840 | ||
442 | return error_status; | 841 | return error_status; |
443 | } | 842 | } |
@@ -445,50 +844,45 @@ static int tegra_ehci_bus_suspend(struct usb_hcd *hcd) | |||
445 | static int tegra_ehci_bus_resume(struct usb_hcd *hcd) | 844 | static int tegra_ehci_bus_resume(struct usb_hcd *hcd) |
446 | { | 845 | { |
447 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); | 846 | struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); |
847 | int ehci_bus_resumed; | ||
448 | 848 | ||
849 | mutex_lock(&tegra->tegra_ehci_hcd_mutex); | ||
449 | if (tegra->bus_suspended && tegra->power_down_on_bus_suspend) { | 850 | if (tegra->bus_suspended && tegra->power_down_on_bus_suspend) { |
450 | tegra_usb_resume(hcd); | 851 | tegra_usb_resume(hcd, false); |
451 | tegra->bus_suspended = 0; | 852 | tegra->bus_suspended = 0; |
452 | } | 853 | } |
453 | 854 | ||
454 | tegra_usb_phy_preresume(tegra->phy); | 855 | ehci_bus_resumed = ehci_bus_resume(hcd); |
455 | tegra->port_resuming = 1; | 856 | mutex_unlock(&tegra->tegra_ehci_hcd_mutex); |
456 | return ehci_bus_resume(hcd); | 857 | return ehci_bus_resumed; |
457 | } | 858 | } |
458 | #endif | 859 | #endif |
459 | 860 | ||
460 | struct temp_buffer { | 861 | struct dma_aligned_buffer { |
461 | void *kmalloc_ptr; | 862 | void *kmalloc_ptr; |
462 | void *old_xfer_buffer; | 863 | void *old_xfer_buffer; |
463 | u8 data[0]; | 864 | u8 data[0]; |
464 | }; | 865 | }; |
465 | 866 | ||
466 | static void free_temp_buffer(struct urb *urb) | 867 | static void free_dma_aligned_buffer(struct urb *urb) |
467 | { | 868 | { |
468 | enum dma_data_direction dir; | 869 | struct dma_aligned_buffer *temp = container_of(urb->transfer_buffer, |
469 | struct temp_buffer *temp; | 870 | struct dma_aligned_buffer, data); |
470 | 871 | ||
471 | if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER)) | 872 | if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER)) |
472 | return; | 873 | return; |
473 | 874 | ||
474 | dir = usb_urb_dir_in(urb) ? DMA_FROM_DEVICE : DMA_TO_DEVICE; | 875 | if(usb_urb_dir_in(urb)) |
475 | |||
476 | temp = container_of(urb->transfer_buffer, struct temp_buffer, | ||
477 | data); | ||
478 | |||
479 | if (dir == DMA_FROM_DEVICE) | ||
480 | memcpy(temp->old_xfer_buffer, temp->data, | 876 | memcpy(temp->old_xfer_buffer, temp->data, |
481 | urb->transfer_buffer_length); | 877 | urb->transfer_buffer_length); |
482 | urb->transfer_buffer = temp->old_xfer_buffer; | 878 | urb->transfer_buffer = temp->old_xfer_buffer; |
483 | kfree(temp->kmalloc_ptr); | 879 | kfree(temp->kmalloc_ptr); |
484 | |||
485 | urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER; | 880 | urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER; |
486 | } | 881 | } |
487 | 882 | ||
488 | static int alloc_temp_buffer(struct urb *urb, gfp_t mem_flags) | 883 | static int alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags) |
489 | { | 884 | { |
490 | enum dma_data_direction dir; | 885 | struct dma_aligned_buffer *temp, *kmalloc_ptr; |
491 | struct temp_buffer *temp, *kmalloc_ptr; | ||
492 | size_t kmalloc_size; | 886 | size_t kmalloc_size; |
493 | 887 | ||
494 | if (urb->num_sgs || urb->sg || | 888 | if (urb->num_sgs || urb->sg || |
@@ -496,26 +890,22 @@ static int alloc_temp_buffer(struct urb *urb, gfp_t mem_flags) | |||
496 | !((uintptr_t)urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN - 1))) | 890 | !((uintptr_t)urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN - 1))) |
497 | return 0; | 891 | return 0; |
498 | 892 | ||
499 | dir = usb_urb_dir_in(urb) ? DMA_FROM_DEVICE : DMA_TO_DEVICE; | ||
500 | |||
501 | /* Allocate a buffer with enough padding for alignment */ | 893 | /* Allocate a buffer with enough padding for alignment */ |
502 | kmalloc_size = urb->transfer_buffer_length + | 894 | kmalloc_size = urb->transfer_buffer_length + |
503 | sizeof(struct temp_buffer) + TEGRA_USB_DMA_ALIGN - 1; | 895 | sizeof(struct dma_aligned_buffer) + TEGRA_USB_DMA_ALIGN - 1; |
504 | 896 | ||
505 | kmalloc_ptr = kmalloc(kmalloc_size, mem_flags); | 897 | kmalloc_ptr = kmalloc(kmalloc_size, mem_flags); |
506 | if (!kmalloc_ptr) | 898 | if (!kmalloc_ptr) |
507 | return -ENOMEM; | 899 | return -ENOMEM; |
508 | 900 | ||
509 | /* Position our struct temp_buffer such that data is aligned */ | 901 | /* Position our struct dma_aligned_buffer such that data is aligned */ |
510 | temp = PTR_ALIGN(kmalloc_ptr + 1, TEGRA_USB_DMA_ALIGN) - 1; | 902 | temp = PTR_ALIGN(kmalloc_ptr + 1, TEGRA_USB_DMA_ALIGN) - 1; |
511 | |||
512 | temp->kmalloc_ptr = kmalloc_ptr; | 903 | temp->kmalloc_ptr = kmalloc_ptr; |
513 | temp->old_xfer_buffer = urb->transfer_buffer; | 904 | temp->old_xfer_buffer = urb->transfer_buffer; |
514 | if (dir == DMA_TO_DEVICE) | 905 | if (!usb_urb_dir_in(urb)) |
515 | memcpy(temp->data, urb->transfer_buffer, | 906 | memcpy(temp->data, urb->transfer_buffer, |
516 | urb->transfer_buffer_length); | 907 | urb->transfer_buffer_length); |
517 | urb->transfer_buffer = temp->data; | 908 | urb->transfer_buffer = temp->data; |
518 | |||
519 | urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER; | 909 | urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER; |
520 | 910 | ||
521 | return 0; | 911 | return 0; |
@@ -526,13 +916,13 @@ static int tegra_ehci_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, | |||
526 | { | 916 | { |
527 | int ret; | 917 | int ret; |
528 | 918 | ||
529 | ret = alloc_temp_buffer(urb, mem_flags); | 919 | ret = alloc_dma_aligned_buffer(urb, mem_flags); |
530 | if (ret) | 920 | if (ret) |
531 | return ret; | 921 | return ret; |
532 | 922 | ||
533 | ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags); | 923 | ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags); |
534 | if (ret) | 924 | if (ret) |
535 | free_temp_buffer(urb); | 925 | free_dma_aligned_buffer(urb); |
536 | 926 | ||
537 | return ret; | 927 | return ret; |
538 | } | 928 | } |
@@ -540,7 +930,98 @@ static int tegra_ehci_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, | |||
540 | static void tegra_ehci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb) | 930 | static void tegra_ehci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb) |
541 | { | 931 | { |
542 | usb_hcd_unmap_urb_for_dma(hcd, urb); | 932 | usb_hcd_unmap_urb_for_dma(hcd, urb); |
543 | free_temp_buffer(urb); | 933 | free_dma_aligned_buffer(urb); |
934 | } | ||
935 | |||
936 | void clk_timer_callback(unsigned long data) | ||
937 | { | ||
938 | struct tegra_ehci_hcd *tegra = (struct tegra_ehci_hcd*) data; | ||
939 | unsigned long flags; | ||
940 | |||
941 | if (!timer_pending(&tegra->clk_timer)) { | ||
942 | spin_lock_irqsave(&tegra->ehci->lock, flags); | ||
943 | tegra->timer_event = 1; | ||
944 | spin_unlock_irqrestore(&tegra->ehci->lock, flags); | ||
945 | schedule_work(&tegra->clk_timer_work); | ||
946 | } | ||
947 | } | ||
948 | |||
949 | static void clk_timer_work_handler(struct work_struct* clk_timer_work) { | ||
950 | struct tegra_ehci_hcd *tegra = container_of(clk_timer_work, | ||
951 | struct tegra_ehci_hcd, clk_timer_work); | ||
952 | int ret; | ||
953 | unsigned long flags; | ||
954 | bool clock_enabled, timer_event; | ||
955 | |||
956 | spin_lock_irqsave(&tegra->ehci->lock, flags); | ||
957 | clock_enabled = tegra->clock_enabled; | ||
958 | timer_event = tegra->timer_event; | ||
959 | spin_unlock_irqrestore(&tegra->ehci->lock, flags); | ||
960 | |||
961 | if (timer_event) { | ||
962 | spin_lock_irqsave(&tegra->ehci->lock, flags); | ||
963 | tegra->clock_enabled = 0; | ||
964 | tegra->timer_event = 0; | ||
965 | spin_unlock_irqrestore(&tegra->ehci->lock, flags); | ||
966 | clk_disable(tegra->emc_clk); | ||
967 | clk_disable(tegra->sclk_clk); | ||
968 | return; | ||
969 | } | ||
970 | |||
971 | if ((!clock_enabled)) { | ||
972 | ret = mod_timer(&tegra->clk_timer, jiffies + msecs_to_jiffies(2000)); | ||
973 | if (ret) | ||
974 | pr_err("tegra_ehci_urb_enqueue timer modify failed \n"); | ||
975 | clk_enable(tegra->emc_clk); | ||
976 | clk_enable(tegra->sclk_clk); | ||
977 | spin_lock_irqsave(&tegra->ehci->lock, flags); | ||
978 | tegra->clock_enabled = 1; | ||
979 | spin_unlock_irqrestore(&tegra->ehci->lock, flags); | ||
980 | } else { | ||
981 | if (timer_pending(&tegra->clk_timer)) { | ||
982 | mod_timer_pending (&tegra->clk_timer, jiffies | ||
983 | + msecs_to_jiffies(2000)); | ||
984 | } | ||
985 | } | ||
986 | } | ||
987 | |||
988 | static int tegra_ehci_urb_enqueue ( | ||
989 | struct usb_hcd *hcd, | ||
990 | struct urb *urb, | ||
991 | gfp_t mem_flags) | ||
992 | { | ||
993 | struct tegra_ehci_hcd *pdata; | ||
994 | int xfertype; | ||
995 | int transfer_buffer_length; | ||
996 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); | ||
997 | unsigned long flags; | ||
998 | pdata = dev_get_drvdata(hcd->self.controller); | ||
999 | |||
1000 | xfertype = usb_endpoint_type(&urb->ep->desc); | ||
1001 | transfer_buffer_length = urb->transfer_buffer_length; | ||
1002 | spin_lock_irqsave(&ehci->lock,flags); | ||
1003 | /* Turn on the USB busy hints */ | ||
1004 | switch (xfertype) { | ||
1005 | case USB_ENDPOINT_XFER_INT: | ||
1006 | if (transfer_buffer_length < 255) { | ||
1007 | /* Do nothing for interrupt buffers < 255 */ | ||
1008 | } else { | ||
1009 | /* signal to set the busy hints */ | ||
1010 | schedule_work(&pdata->clk_timer_work); | ||
1011 | } | ||
1012 | break; | ||
1013 | case USB_ENDPOINT_XFER_ISOC: | ||
1014 | case USB_ENDPOINT_XFER_BULK: | ||
1015 | /* signal to set the busy hints */ | ||
1016 | schedule_work(&pdata->clk_timer_work); | ||
1017 | break; | ||
1018 | case USB_ENDPOINT_XFER_CONTROL: | ||
1019 | default: | ||
1020 | /* Do nothing special here */ | ||
1021 | break; | ||
1022 | } | ||
1023 | spin_unlock_irqrestore(&ehci->lock,flags); | ||
1024 | return ehci_urb_enqueue(hcd, urb, mem_flags); | ||
544 | } | 1025 | } |
545 | 1026 | ||
546 | static const struct hc_driver tegra_ehci_hc_driver = { | 1027 | static const struct hc_driver tegra_ehci_hc_driver = { |
@@ -551,12 +1032,12 @@ static const struct hc_driver tegra_ehci_hc_driver = { | |||
551 | .flags = HCD_USB2 | HCD_MEMORY, | 1032 | .flags = HCD_USB2 | HCD_MEMORY, |
552 | 1033 | ||
553 | .reset = tegra_ehci_setup, | 1034 | .reset = tegra_ehci_setup, |
554 | .irq = ehci_irq, | 1035 | .irq = tegra_ehci_irq, |
555 | 1036 | ||
556 | .start = ehci_run, | 1037 | .start = ehci_run, |
557 | .stop = ehci_stop, | 1038 | .stop = ehci_stop, |
558 | .shutdown = tegra_ehci_shutdown, | 1039 | .shutdown = tegra_ehci_shutdown, |
559 | .urb_enqueue = ehci_urb_enqueue, | 1040 | .urb_enqueue = tegra_ehci_urb_enqueue, |
560 | .urb_dequeue = ehci_urb_dequeue, | 1041 | .urb_dequeue = ehci_urb_dequeue, |
561 | .map_urb_for_dma = tegra_ehci_map_urb_for_dma, | 1042 | .map_urb_for_dma = tegra_ehci_map_urb_for_dma, |
562 | .unmap_urb_for_dma = tegra_ehci_unmap_urb_for_dma, | 1043 | .unmap_urb_for_dma = tegra_ehci_unmap_urb_for_dma, |
@@ -594,6 +1075,8 @@ static int tegra_ehci_probe(struct platform_device *pdev) | |||
594 | if (!tegra) | 1075 | if (!tegra) |
595 | return -ENOMEM; | 1076 | return -ENOMEM; |
596 | 1077 | ||
1078 | mutex_init(&tegra->tegra_ehci_hcd_mutex); | ||
1079 | |||
597 | hcd = usb_create_hcd(&tegra_ehci_hc_driver, &pdev->dev, | 1080 | hcd = usb_create_hcd(&tegra_ehci_hc_driver, &pdev->dev, |
598 | dev_name(&pdev->dev)); | 1081 | dev_name(&pdev->dev)); |
599 | if (!hcd) { | 1082 | if (!hcd) { |
@@ -603,6 +1086,7 @@ static int tegra_ehci_probe(struct platform_device *pdev) | |||
603 | } | 1086 | } |
604 | 1087 | ||
605 | platform_set_drvdata(pdev, tegra); | 1088 | platform_set_drvdata(pdev, tegra); |
1089 | tegra->default_enable = pdata->default_enable; | ||
606 | 1090 | ||
607 | tegra->clk = clk_get(&pdev->dev, NULL); | 1091 | tegra->clk = clk_get(&pdev->dev, NULL); |
608 | if (IS_ERR(tegra->clk)) { | 1092 | if (IS_ERR(tegra->clk)) { |
@@ -615,15 +1099,33 @@ static int tegra_ehci_probe(struct platform_device *pdev) | |||
615 | if (err) | 1099 | if (err) |
616 | goto fail_clken; | 1100 | goto fail_clken; |
617 | 1101 | ||
1102 | |||
1103 | tegra->sclk_clk = clk_get(&pdev->dev, "sclk"); | ||
1104 | if (IS_ERR(tegra->sclk_clk)) { | ||
1105 | dev_err(&pdev->dev, "Can't get sclk clock\n"); | ||
1106 | err = PTR_ERR(tegra->sclk_clk); | ||
1107 | goto fail_sclk_clk; | ||
1108 | } | ||
1109 | |||
1110 | clk_set_rate(tegra->sclk_clk, 80000000); | ||
1111 | |||
618 | tegra->emc_clk = clk_get(&pdev->dev, "emc"); | 1112 | tegra->emc_clk = clk_get(&pdev->dev, "emc"); |
619 | if (IS_ERR(tegra->emc_clk)) { | 1113 | if (IS_ERR(tegra->emc_clk)) { |
620 | dev_err(&pdev->dev, "Can't get emc clock\n"); | 1114 | dev_err(&pdev->dev, "Can't get emc clock\n"); |
621 | err = PTR_ERR(tegra->emc_clk); | 1115 | err = PTR_ERR(tegra->emc_clk); |
622 | goto fail_emc_clk; | 1116 | goto fail_emc_clk; |
623 | } | 1117 | } |
624 | 1118 | init_timer(&tegra->clk_timer); | |
625 | clk_enable(tegra->emc_clk); | 1119 | tegra->clk_timer.function = clk_timer_callback; |
626 | clk_set_rate(tegra->emc_clk, 400000000); | 1120 | tegra->clk_timer.data = (unsigned long) tegra; |
1121 | |||
1122 | #ifdef CONFIG_ARCH_TEGRA_2x_SOC | ||
1123 | /* Set DDR busy hints to 150MHz. For Tegra 2x SOC, DDR rate is half of EMC rate */ | ||
1124 | clk_set_rate(tegra->emc_clk, 300000000); | ||
1125 | #else | ||
1126 | /* Set DDR busy hints to 100MHz. For Tegra 3x SOC DDR rate equals to EMC rate */ | ||
1127 | clk_set_rate(tegra->emc_clk, 100000000); | ||
1128 | #endif | ||
627 | 1129 | ||
628 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1130 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
629 | if (!res) { | 1131 | if (!res) { |
@@ -640,15 +1142,18 @@ static int tegra_ehci_probe(struct platform_device *pdev) | |||
640 | goto fail_io; | 1142 | goto fail_io; |
641 | } | 1143 | } |
642 | 1144 | ||
1145 | INIT_WORK(&tegra->clk_timer_work, clk_timer_work_handler); | ||
1146 | |||
643 | tegra->phy = tegra_usb_phy_open(instance, hcd->regs, pdata->phy_config, | 1147 | tegra->phy = tegra_usb_phy_open(instance, hcd->regs, pdata->phy_config, |
644 | TEGRA_USB_PHY_MODE_HOST); | 1148 | TEGRA_USB_PHY_MODE_HOST, pdata->phy_type); |
645 | if (IS_ERR(tegra->phy)) { | 1149 | if (IS_ERR(tegra->phy)) { |
646 | dev_err(&pdev->dev, "Failed to open USB phy\n"); | 1150 | dev_err(&pdev->dev, "Failed to open USB phy\n"); |
647 | err = -ENXIO; | 1151 | err = -ENXIO; |
648 | goto fail_phy; | 1152 | goto fail_phy; |
649 | } | 1153 | } |
1154 | tegra->phy->hotplug = pdata->hotplug; | ||
650 | 1155 | ||
651 | err = tegra_usb_phy_power_on(tegra->phy); | 1156 | err = tegra_usb_phy_power_on(tegra->phy, true); |
652 | if (err) { | 1157 | if (err) { |
653 | dev_err(&pdev->dev, "Failed to power on the phy\n"); | 1158 | dev_err(&pdev->dev, "Failed to power on the phy\n"); |
654 | goto fail; | 1159 | goto fail; |
@@ -665,6 +1170,7 @@ static int tegra_ehci_probe(struct platform_device *pdev) | |||
665 | goto fail; | 1170 | goto fail; |
666 | } | 1171 | } |
667 | set_irq_flags(irq, IRQF_VALID); | 1172 | set_irq_flags(irq, IRQF_VALID); |
1173 | tegra->irq = irq; | ||
668 | 1174 | ||
669 | #ifdef CONFIG_USB_OTG_UTILS | 1175 | #ifdef CONFIG_USB_OTG_UTILS |
670 | if (pdata->operating_mode == TEGRA_USB_OTG) { | 1176 | if (pdata->operating_mode == TEGRA_USB_OTG) { |
@@ -676,10 +1182,19 @@ static int tegra_ehci_probe(struct platform_device *pdev) | |||
676 | 1182 | ||
677 | err = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED); | 1183 | err = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED); |
678 | if (err) { | 1184 | if (err) { |
679 | dev_err(&pdev->dev, "Failed to add USB HCD\n"); | 1185 | dev_err(&pdev->dev, "Failed to add USB HCD error = %d\n", err); |
680 | goto fail; | 1186 | goto fail; |
681 | } | 1187 | } |
682 | 1188 | ||
1189 | err = enable_irq_wake(tegra->irq); | ||
1190 | if (err < 0) { | ||
1191 | dev_warn(&pdev->dev, | ||
1192 | "Couldn't enable USB host mode wakeup, irq=%d, " | ||
1193 | "error=%d\n", tegra->irq, err); | ||
1194 | err = 0; | ||
1195 | tegra->irq = 0; | ||
1196 | } | ||
1197 | |||
683 | return err; | 1198 | return err; |
684 | 1199 | ||
685 | fail: | 1200 | fail: |
@@ -696,6 +1211,9 @@ fail_io: | |||
696 | clk_disable(tegra->emc_clk); | 1211 | clk_disable(tegra->emc_clk); |
697 | clk_put(tegra->emc_clk); | 1212 | clk_put(tegra->emc_clk); |
698 | fail_emc_clk: | 1213 | fail_emc_clk: |
1214 | clk_disable(tegra->sclk_clk); | ||
1215 | clk_put(tegra->sclk_clk); | ||
1216 | fail_sclk_clk: | ||
699 | clk_disable(tegra->clk); | 1217 | clk_disable(tegra->clk); |
700 | fail_clken: | 1218 | fail_clken: |
701 | clk_put(tegra->clk); | 1219 | clk_put(tegra->clk); |
@@ -711,25 +1229,62 @@ static int tegra_ehci_resume(struct platform_device *pdev) | |||
711 | { | 1229 | { |
712 | struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev); | 1230 | struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev); |
713 | struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci); | 1231 | struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci); |
1232 | int ret; | ||
714 | 1233 | ||
715 | if (tegra->bus_suspended) | 1234 | mutex_lock(&tegra->tegra_ehci_hcd_mutex); |
1235 | if ((tegra->bus_suspended) && (tegra->power_down_on_bus_suspend)) { | ||
1236 | if (tegra->default_enable) | ||
1237 | clk_enable(tegra->clk); | ||
1238 | mutex_unlock(&tegra->tegra_ehci_hcd_mutex); | ||
716 | return 0; | 1239 | return 0; |
1240 | } | ||
1241 | |||
1242 | if (tegra->default_enable) | ||
1243 | clk_enable(tegra->clk); | ||
717 | 1244 | ||
718 | return tegra_usb_resume(hcd); | 1245 | ret = tegra_usb_resume(hcd, true); |
1246 | mutex_unlock(&tegra->tegra_ehci_hcd_mutex); | ||
1247 | return ret; | ||
719 | } | 1248 | } |
720 | 1249 | ||
721 | static int tegra_ehci_suspend(struct platform_device *pdev, pm_message_t state) | 1250 | static int tegra_ehci_suspend(struct platform_device *pdev, pm_message_t state) |
722 | { | 1251 | { |
723 | struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev); | 1252 | struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev); |
724 | struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci); | 1253 | struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci); |
1254 | int ret; | ||
1255 | u32 val; | ||
1256 | |||
1257 | mutex_lock(&tegra->tegra_ehci_hcd_mutex); | ||
1258 | /* if bus suspend is failed means there is remote wakeup resume, | ||
1259 | then abort the PM suspend */ | ||
1260 | if (tegra->bus_suspended_fail) { | ||
1261 | tegra->bus_suspended_fail = false; | ||
1262 | pr_err("%s: bus suspend failed, aborting driver suspend\n", __func__); | ||
1263 | mutex_unlock(&tegra->tegra_ehci_hcd_mutex); | ||
1264 | return -EBUSY; | ||
1265 | } | ||
1266 | if (tegra->phy->hotplug) { | ||
1267 | /* Disable PHY clock valid interrupts while going into suspend*/ | ||
1268 | val = readl(hcd->regs + TEGRA_USB_SUSP_CTRL_OFFSET); | ||
1269 | val &= ~TEGRA_USB_PHY_CLK_VALID_INT_ENB; | ||
1270 | writel(val , (hcd->regs + TEGRA_USB_SUSP_CTRL_OFFSET)); | ||
1271 | } | ||
725 | 1272 | ||
726 | if (tegra->bus_suspended) | 1273 | if ((tegra->bus_suspended) && (tegra->power_down_on_bus_suspend)) { |
1274 | if (tegra->default_enable) | ||
1275 | clk_disable(tegra->clk); | ||
1276 | mutex_unlock(&tegra->tegra_ehci_hcd_mutex); | ||
727 | return 0; | 1277 | return 0; |
1278 | } | ||
728 | 1279 | ||
729 | if (time_before(jiffies, tegra->ehci->next_statechange)) | 1280 | if (time_before(jiffies, tegra->ehci->next_statechange)) |
730 | msleep(10); | 1281 | msleep(10); |
731 | 1282 | ||
732 | return tegra_usb_suspend(hcd); | 1283 | ret = tegra_usb_suspend(hcd, true); |
1284 | if (tegra->default_enable) | ||
1285 | clk_disable(tegra->clk); | ||
1286 | mutex_unlock(&tegra->tegra_ehci_hcd_mutex); | ||
1287 | return ret; | ||
733 | } | 1288 | } |
734 | #endif | 1289 | #endif |
735 | 1290 | ||
@@ -740,6 +1295,9 @@ static int tegra_ehci_remove(struct platform_device *pdev) | |||
740 | 1295 | ||
741 | if (tegra == NULL || hcd == NULL) | 1296 | if (tegra == NULL || hcd == NULL) |
742 | return -EINVAL; | 1297 | return -EINVAL; |
1298 | /* make sure controller is on as we will touch its registers */ | ||
1299 | if (!tegra->host_resumed) | ||
1300 | tegra_ehci_power_up(hcd, true); | ||
743 | 1301 | ||
744 | #ifdef CONFIG_USB_OTG_UTILS | 1302 | #ifdef CONFIG_USB_OTG_UTILS |
745 | if (tegra->transceiver) { | 1303 | if (tegra->transceiver) { |
@@ -748,16 +1306,27 @@ static int tegra_ehci_remove(struct platform_device *pdev) | |||
748 | } | 1306 | } |
749 | #endif | 1307 | #endif |
750 | 1308 | ||
1309 | /* Turn Off Interrupts */ | ||
1310 | ehci_writel(tegra->ehci, 0, &tegra->ehci->regs->intr_enable); | ||
1311 | clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | ||
1312 | if (tegra->irq) | ||
1313 | disable_irq_wake(tegra->irq); | ||
751 | usb_remove_hcd(hcd); | 1314 | usb_remove_hcd(hcd); |
752 | usb_put_hcd(hcd); | 1315 | usb_put_hcd(hcd); |
753 | 1316 | tegra_usb_phy_power_off(tegra->phy, true); | |
754 | tegra_usb_phy_close(tegra->phy); | 1317 | tegra_usb_phy_close(tegra->phy); |
755 | iounmap(hcd->regs); | 1318 | iounmap(hcd->regs); |
756 | 1319 | ||
1320 | del_timer_sync(&tegra->clk_timer); | ||
1321 | |||
757 | clk_disable(tegra->clk); | 1322 | clk_disable(tegra->clk); |
758 | clk_put(tegra->clk); | 1323 | clk_put(tegra->clk); |
759 | 1324 | ||
760 | clk_disable(tegra->emc_clk); | 1325 | if (tegra->clock_enabled) { |
1326 | clk_disable(tegra->sclk_clk); | ||
1327 | clk_disable(tegra->emc_clk); | ||
1328 | } | ||
1329 | clk_put(tegra->sclk_clk); | ||
761 | clk_put(tegra->emc_clk); | 1330 | clk_put(tegra->emc_clk); |
762 | 1331 | ||
763 | kfree(tegra); | 1332 | kfree(tegra); |
diff --git a/drivers/usb/host/ehci-w90x900.c b/drivers/usb/host/ehci-w90x900.c index 52a027aaa37..d661cf7de14 100644 --- a/drivers/usb/host/ehci-w90x900.c +++ b/drivers/usb/host/ehci-w90x900.c | |||
@@ -41,7 +41,7 @@ static int __devinit usb_w90x900_probe(const struct hc_driver *driver, | |||
41 | } | 41 | } |
42 | 42 | ||
43 | hcd->rsrc_start = res->start; | 43 | hcd->rsrc_start = res->start; |
44 | hcd->rsrc_len = res->end - res->start + 1; | 44 | hcd->rsrc_len = resource_size(res); |
45 | 45 | ||
46 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | 46 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { |
47 | retval = -EBUSY; | 47 | retval = -EBUSY; |
diff --git a/drivers/usb/host/ehci-xilinx-of.c b/drivers/usb/host/ehci-xilinx-of.c index a64d6d66d76..32793ce3d9e 100644 --- a/drivers/usb/host/ehci-xilinx-of.c +++ b/drivers/usb/host/ehci-xilinx-of.c | |||
@@ -174,7 +174,7 @@ static int __devinit ehci_hcd_xilinx_of_probe(struct platform_device *op) | |||
174 | return -ENOMEM; | 174 | return -ENOMEM; |
175 | 175 | ||
176 | hcd->rsrc_start = res.start; | 176 | hcd->rsrc_start = res.start; |
177 | hcd->rsrc_len = res.end - res.start + 1; | 177 | hcd->rsrc_len = resource_size(&res); |
178 | 178 | ||
179 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | 179 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { |
180 | printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__); | 180 | printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__); |
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h index bd6ff489baf..e897262c6a6 100644 --- a/drivers/usb/host/ehci.h +++ b/drivers/usb/host/ehci.h | |||
@@ -75,6 +75,7 @@ struct ehci_hcd { /* one per controller */ | |||
75 | struct ehci_qh *async; | 75 | struct ehci_qh *async; |
76 | struct ehci_qh *dummy; /* For AMD quirk use */ | 76 | struct ehci_qh *dummy; /* For AMD quirk use */ |
77 | struct ehci_qh *reclaim; | 77 | struct ehci_qh *reclaim; |
78 | struct ehci_qh *qh_scan_next; | ||
78 | unsigned scanning : 1; | 79 | unsigned scanning : 1; |
79 | 80 | ||
80 | /* periodic schedule support */ | 81 | /* periodic schedule support */ |
@@ -87,6 +88,8 @@ struct ehci_hcd { /* one per controller */ | |||
87 | union ehci_shadow *pshadow; /* mirror hw periodic table */ | 88 | union ehci_shadow *pshadow; /* mirror hw periodic table */ |
88 | int next_uframe; /* scan periodic, start here */ | 89 | int next_uframe; /* scan periodic, start here */ |
89 | unsigned periodic_sched; /* periodic activity count */ | 90 | unsigned periodic_sched; /* periodic activity count */ |
91 | unsigned uframe_periodic_max; /* max periodic time per uframe */ | ||
92 | |||
90 | 93 | ||
91 | /* list of itds & sitds completed while clock_frame was still active */ | 94 | /* list of itds & sitds completed while clock_frame was still active */ |
92 | struct list_head cached_itd_list; | 95 | struct list_head cached_itd_list; |
@@ -117,7 +120,6 @@ struct ehci_hcd { /* one per controller */ | |||
117 | struct timer_list iaa_watchdog; | 120 | struct timer_list iaa_watchdog; |
118 | struct timer_list watchdog; | 121 | struct timer_list watchdog; |
119 | unsigned long actions; | 122 | unsigned long actions; |
120 | unsigned stamp; | ||
121 | unsigned periodic_stamp; | 123 | unsigned periodic_stamp; |
122 | unsigned random_frame; | 124 | unsigned random_frame; |
123 | unsigned long next_statechange; | 125 | unsigned long next_statechange; |
@@ -137,6 +139,11 @@ struct ehci_hcd { /* one per controller */ | |||
137 | unsigned fs_i_thresh:1; /* Intel iso scheduling */ | 139 | unsigned fs_i_thresh:1; /* Intel iso scheduling */ |
138 | unsigned use_dummy_qh:1; /* AMD Frame List table quirk*/ | 140 | unsigned use_dummy_qh:1; /* AMD Frame List table quirk*/ |
139 | unsigned has_synopsys_hc_bug:1; /* Synopsys HC */ | 141 | unsigned has_synopsys_hc_bug:1; /* Synopsys HC */ |
142 | unsigned frame_index_bug:1; /* MosChip (AKA NetMos) */ | ||
143 | #ifdef CONFIG_USB_EHCI_TEGRA | ||
144 | unsigned controller_resets_phy:1; | ||
145 | unsigned controller_remote_wakeup:1; | ||
146 | #endif | ||
140 | 147 | ||
141 | /* required for usb32 quirk */ | 148 | /* required for usb32 quirk */ |
142 | #define OHCI_CTRL_HCFS (3 << 6) | 149 | #define OHCI_CTRL_HCFS (3 << 6) |
@@ -163,10 +170,6 @@ struct ehci_hcd { /* one per controller */ | |||
163 | #ifdef DEBUG | 170 | #ifdef DEBUG |
164 | struct dentry *debug_dir; | 171 | struct dentry *debug_dir; |
165 | #endif | 172 | #endif |
166 | /* | ||
167 | * OTG controllers and transceivers need software interaction | ||
168 | */ | ||
169 | struct otg_transceiver *transceiver; | ||
170 | }; | 173 | }; |
171 | 174 | ||
172 | /* convert between an HCD pointer and the corresponding EHCI_HCD */ | 175 | /* convert between an HCD pointer and the corresponding EHCI_HCD */ |
@@ -343,6 +346,7 @@ struct ehci_qh { | |||
343 | struct ehci_qh *reclaim; /* next to reclaim */ | 346 | struct ehci_qh *reclaim; /* next to reclaim */ |
344 | 347 | ||
345 | struct ehci_hcd *ehci; | 348 | struct ehci_hcd *ehci; |
349 | unsigned long unlink_time; | ||
346 | 350 | ||
347 | /* | 351 | /* |
348 | * Do NOT use atomic operations for QH refcounting. On some CPUs | 352 | * Do NOT use atomic operations for QH refcounting. On some CPUs |
@@ -374,6 +378,7 @@ struct ehci_qh { | |||
374 | #define NO_FRAME ((unsigned short)~0) /* pick new start */ | 378 | #define NO_FRAME ((unsigned short)~0) /* pick new start */ |
375 | 379 | ||
376 | struct usb_device *dev; /* access to TT */ | 380 | struct usb_device *dev; /* access to TT */ |
381 | unsigned is_out:1; /* bulk or intr OUT */ | ||
377 | unsigned clearing_tt:1; /* Clear-TT-Buf in progress */ | 382 | unsigned clearing_tt:1; /* Clear-TT-Buf in progress */ |
378 | }; | 383 | }; |
379 | 384 | ||
@@ -736,6 +741,39 @@ static inline u32 hc32_to_cpup (const struct ehci_hcd *ehci, const __hc32 *x) | |||
736 | 741 | ||
737 | /*-------------------------------------------------------------------------*/ | 742 | /*-------------------------------------------------------------------------*/ |
738 | 743 | ||
744 | #ifdef CONFIG_PCI | ||
745 | |||
746 | /* For working around the MosChip frame-index-register bug */ | ||
747 | static unsigned ehci_read_frame_index(struct ehci_hcd *ehci); | ||
748 | |||
749 | #else | ||
750 | |||
751 | static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci) | ||
752 | { | ||
753 | return ehci_readl(ehci, &ehci->regs->frame_index); | ||
754 | } | ||
755 | |||
756 | #endif | ||
757 | |||
758 | /* | ||
759 | * Writing to dma coherent memory on ARM may be delayed via L2 | ||
760 | * writing buffer, so introduce the helper which can flush L2 writing | ||
761 | * buffer into memory immediately, especially used to flush ehci | ||
762 | * descriptor to memory. | ||
763 | * */ | ||
764 | #ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE | ||
765 | static inline void ehci_sync_mem() | ||
766 | { | ||
767 | mb(); | ||
768 | } | ||
769 | #else | ||
770 | static inline void ehci_sync_mem() | ||
771 | { | ||
772 | } | ||
773 | #endif | ||
774 | |||
775 | /*-------------------------------------------------------------------------*/ | ||
776 | |||
739 | #ifndef DEBUG | 777 | #ifndef DEBUG |
740 | #define STUB_DEBUG_FILES | 778 | #define STUB_DEBUG_FILES |
741 | #endif /* DEBUG */ | 779 | #endif /* DEBUG */ |
diff --git a/drivers/usb/host/fhci-hcd.c b/drivers/usb/host/fhci-hcd.c index 19223c7449e..572ea53b022 100644 --- a/drivers/usb/host/fhci-hcd.c +++ b/drivers/usb/host/fhci-hcd.c | |||
@@ -605,7 +605,7 @@ static int __devinit of_fhci_probe(struct platform_device *ofdev) | |||
605 | goto err_regs; | 605 | goto err_regs; |
606 | } | 606 | } |
607 | 607 | ||
608 | hcd->regs = ioremap(usb_regs.start, usb_regs.end - usb_regs.start + 1); | 608 | hcd->regs = ioremap(usb_regs.start, resource_size(&usb_regs)); |
609 | if (!hcd->regs) { | 609 | if (!hcd->regs) { |
610 | dev_err(dev, "could not ioremap regs\n"); | 610 | dev_err(dev, "could not ioremap regs\n"); |
611 | ret = -ENOMEM; | 611 | ret = -ENOMEM; |
diff --git a/drivers/usb/host/fhci-sched.c b/drivers/usb/host/fhci-sched.c index a42ef380e91..2df851b4bc7 100644 --- a/drivers/usb/host/fhci-sched.c +++ b/drivers/usb/host/fhci-sched.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Freescale QUICC Engine USB Host Controller Driver | 2 | * Freescale QUICC Engine USB Host Controller Driver |
3 | * | 3 | * |
4 | * Copyright (c) Freescale Semicondutor, Inc. 2006. | 4 | * Copyright (c) Freescale Semicondutor, Inc. 2006, 2011. |
5 | * Shlomi Gridish <gridish@freescale.com> | 5 | * Shlomi Gridish <gridish@freescale.com> |
6 | * Jerry Huang <Chang-Ming.Huang@freescale.com> | 6 | * Jerry Huang <Chang-Ming.Huang@freescale.com> |
7 | * Copyright (c) Logic Product Development, Inc. 2007 | 7 | * Copyright (c) Logic Product Development, Inc. 2007 |
@@ -810,9 +810,11 @@ void fhci_queue_urb(struct fhci_hcd *fhci, struct urb *urb) | |||
810 | ed->dev_addr = usb_pipedevice(urb->pipe); | 810 | ed->dev_addr = usb_pipedevice(urb->pipe); |
811 | ed->max_pkt_size = usb_maxpacket(urb->dev, urb->pipe, | 811 | ed->max_pkt_size = usb_maxpacket(urb->dev, urb->pipe, |
812 | usb_pipeout(urb->pipe)); | 812 | usb_pipeout(urb->pipe)); |
813 | /* setup stage */ | ||
813 | td = fhci_td_fill(fhci, urb, urb_priv, ed, cnt++, FHCI_TA_SETUP, | 814 | td = fhci_td_fill(fhci, urb, urb_priv, ed, cnt++, FHCI_TA_SETUP, |
814 | USB_TD_TOGGLE_DATA0, urb->setup_packet, 8, 0, 0, true); | 815 | USB_TD_TOGGLE_DATA0, urb->setup_packet, 8, 0, 0, true); |
815 | 816 | ||
817 | /* data stage */ | ||
816 | if (data_len > 0) { | 818 | if (data_len > 0) { |
817 | td = fhci_td_fill(fhci, urb, urb_priv, ed, cnt++, | 819 | td = fhci_td_fill(fhci, urb, urb_priv, ed, cnt++, |
818 | usb_pipeout(urb->pipe) ? FHCI_TA_OUT : | 820 | usb_pipeout(urb->pipe) ? FHCI_TA_OUT : |
@@ -820,9 +822,18 @@ void fhci_queue_urb(struct fhci_hcd *fhci, struct urb *urb) | |||
820 | USB_TD_TOGGLE_DATA1, data, data_len, 0, 0, | 822 | USB_TD_TOGGLE_DATA1, data, data_len, 0, 0, |
821 | true); | 823 | true); |
822 | } | 824 | } |
823 | td = fhci_td_fill(fhci, urb, urb_priv, ed, cnt++, | 825 | |
824 | usb_pipeout(urb->pipe) ? FHCI_TA_IN : FHCI_TA_OUT, | 826 | /* status stage */ |
825 | USB_TD_TOGGLE_DATA1, data, 0, 0, 0, true); | 827 | if (data_len > 0) |
828 | td = fhci_td_fill(fhci, urb, urb_priv, ed, cnt++, | ||
829 | (usb_pipeout(urb->pipe) ? FHCI_TA_IN : | ||
830 | FHCI_TA_OUT), | ||
831 | USB_TD_TOGGLE_DATA1, data, 0, 0, 0, true); | ||
832 | else | ||
833 | td = fhci_td_fill(fhci, urb, urb_priv, ed, cnt++, | ||
834 | FHCI_TA_IN, | ||
835 | USB_TD_TOGGLE_DATA1, data, 0, 0, 0, true); | ||
836 | |||
826 | urb_state = US_CTRL_SETUP; | 837 | urb_state = US_CTRL_SETUP; |
827 | break; | 838 | break; |
828 | case FHCI_TF_ISO: | 839 | case FHCI_TF_ISO: |
diff --git a/drivers/usb/host/isp1760-hcd.c b/drivers/usb/host/isp1760-hcd.c index 55d3d5859ac..840beda66dd 100644 --- a/drivers/usb/host/isp1760-hcd.c +++ b/drivers/usb/host/isp1760-hcd.c | |||
@@ -1583,6 +1583,9 @@ static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, | |||
1583 | int retval = 0; | 1583 | int retval = 0; |
1584 | 1584 | ||
1585 | spin_lock_irqsave(&priv->lock, spinflags); | 1585 | spin_lock_irqsave(&priv->lock, spinflags); |
1586 | retval = usb_hcd_check_unlink_urb(hcd, urb, status); | ||
1587 | if (retval) | ||
1588 | goto out; | ||
1586 | 1589 | ||
1587 | qh = urb->ep->hcpriv; | 1590 | qh = urb->ep->hcpriv; |
1588 | if (!qh) { | 1591 | if (!qh) { |
diff --git a/drivers/usb/host/ohci-ath79.c b/drivers/usb/host/ohci-ath79.c index ffea3e7cb0a..c620c50f677 100644 --- a/drivers/usb/host/ohci-ath79.c +++ b/drivers/usb/host/ohci-ath79.c | |||
@@ -93,8 +93,8 @@ static int ohci_ath79_probe(struct platform_device *pdev) | |||
93 | ret = -ENODEV; | 93 | ret = -ENODEV; |
94 | goto err_put_hcd; | 94 | goto err_put_hcd; |
95 | } | 95 | } |
96 | hcd->rsrc_start = res->start; | 96 | hcd->rsrc_start = res->start; |
97 | hcd->rsrc_len = res->end - res->start + 1; | 97 | hcd->rsrc_len = resource_size(res); |
98 | 98 | ||
99 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | 99 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { |
100 | dev_dbg(&pdev->dev, "controller already in use\n"); | 100 | dev_dbg(&pdev->dev, "controller already in use\n"); |
diff --git a/drivers/usb/host/ohci-cns3xxx.c b/drivers/usb/host/ohci-cns3xxx.c index f05ef87e934..5a00a1e1c6c 100644 --- a/drivers/usb/host/ohci-cns3xxx.c +++ b/drivers/usb/host/ohci-cns3xxx.c | |||
@@ -100,7 +100,7 @@ static int cns3xxx_ohci_probe(struct platform_device *pdev) | |||
100 | goto err1; | 100 | goto err1; |
101 | } | 101 | } |
102 | hcd->rsrc_start = res->start; | 102 | hcd->rsrc_start = res->start; |
103 | hcd->rsrc_len = res->end - res->start + 1; | 103 | hcd->rsrc_len = resource_size(res); |
104 | 104 | ||
105 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, | 105 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, |
106 | driver->description)) { | 106 | driver->description)) { |
diff --git a/drivers/usb/host/ohci-da8xx.c b/drivers/usb/host/ohci-da8xx.c index d22fb4d577b..6aca2c4453f 100644 --- a/drivers/usb/host/ohci-da8xx.c +++ b/drivers/usb/host/ohci-da8xx.c | |||
@@ -322,7 +322,7 @@ static int usb_hcd_da8xx_probe(const struct hc_driver *driver, | |||
322 | goto err2; | 322 | goto err2; |
323 | } | 323 | } |
324 | hcd->rsrc_start = mem->start; | 324 | hcd->rsrc_start = mem->start; |
325 | hcd->rsrc_len = mem->end - mem->start + 1; | 325 | hcd->rsrc_len = resource_size(mem); |
326 | 326 | ||
327 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | 327 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { |
328 | dev_dbg(&pdev->dev, "request_mem_region failed\n"); | 328 | dev_dbg(&pdev->dev, "request_mem_region failed\n"); |
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index f9cf3f04b74..23107e23053 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c | |||
@@ -389,17 +389,14 @@ ohci_shutdown (struct usb_hcd *hcd) | |||
389 | struct ohci_hcd *ohci; | 389 | struct ohci_hcd *ohci; |
390 | 390 | ||
391 | ohci = hcd_to_ohci (hcd); | 391 | ohci = hcd_to_ohci (hcd); |
392 | ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); | 392 | ohci_writel(ohci, (u32) ~0, &ohci->regs->intrdisable); |
393 | ohci->hc_control = ohci_readl(ohci, &ohci->regs->control); | ||
394 | 393 | ||
395 | /* If the SHUTDOWN quirk is set, don't put the controller in RESET */ | 394 | /* Software reset, after which the controller goes into SUSPEND */ |
396 | ohci->hc_control &= (ohci->flags & OHCI_QUIRK_SHUTDOWN ? | 395 | ohci_writel(ohci, OHCI_HCR, &ohci->regs->cmdstatus); |
397 | OHCI_CTRL_RWC | OHCI_CTRL_HCFS : | 396 | ohci_readl(ohci, &ohci->regs->cmdstatus); /* flush the writes */ |
398 | OHCI_CTRL_RWC); | 397 | udelay(10); |
399 | ohci_writel(ohci, ohci->hc_control, &ohci->regs->control); | ||
400 | 398 | ||
401 | /* flush the writes */ | 399 | ohci_writel(ohci, ohci->fminterval, &ohci->regs->fminterval); |
402 | (void) ohci_readl (ohci, &ohci->regs->control); | ||
403 | } | 400 | } |
404 | 401 | ||
405 | static int check_ed(struct ohci_hcd *ohci, struct ed *ed) | 402 | static int check_ed(struct ohci_hcd *ohci, struct ed *ed) |
diff --git a/drivers/usb/host/ohci-hub.c b/drivers/usb/host/ohci-hub.c index 9154615292d..2f00040fc40 100644 --- a/drivers/usb/host/ohci-hub.c +++ b/drivers/usb/host/ohci-hub.c | |||
@@ -356,10 +356,7 @@ static void ohci_finish_controller_resume(struct usb_hcd *hcd) | |||
356 | msleep(20); | 356 | msleep(20); |
357 | } | 357 | } |
358 | 358 | ||
359 | /* Does the root hub have a port wakeup pending? */ | 359 | usb_hcd_resume_root_hub(hcd); |
360 | if (ohci_readl(ohci, &ohci->regs->intrstatus) & | ||
361 | (OHCI_INTR_RD | OHCI_INTR_RHSC)) | ||
362 | usb_hcd_resume_root_hub(hcd); | ||
363 | } | 360 | } |
364 | 361 | ||
365 | /* Carry out polling-, autostop-, and autoresume-related state changes */ | 362 | /* Carry out polling-, autostop-, and autoresume-related state changes */ |
diff --git a/drivers/usb/host/ohci-octeon.c b/drivers/usb/host/ohci-octeon.c index e4ddfaf8870..d8b45647d1d 100644 --- a/drivers/usb/host/ohci-octeon.c +++ b/drivers/usb/host/ohci-octeon.c | |||
@@ -135,7 +135,7 @@ static int ohci_octeon_drv_probe(struct platform_device *pdev) | |||
135 | return -ENOMEM; | 135 | return -ENOMEM; |
136 | 136 | ||
137 | hcd->rsrc_start = res_mem->start; | 137 | hcd->rsrc_start = res_mem->start; |
138 | hcd->rsrc_len = res_mem->end - res_mem->start + 1; | 138 | hcd->rsrc_len = resource_size(res_mem); |
139 | 139 | ||
140 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, | 140 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, |
141 | OCTEON_OHCI_HCD_NAME)) { | 141 | OCTEON_OHCI_HCD_NAME)) { |
diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c index ad8166c681e..bc01b064585 100644 --- a/drivers/usb/host/ohci-pci.c +++ b/drivers/usb/host/ohci-pci.c | |||
@@ -175,28 +175,6 @@ static int ohci_quirk_amd700(struct usb_hcd *hcd) | |||
175 | return 0; | 175 | return 0; |
176 | } | 176 | } |
177 | 177 | ||
178 | /* nVidia controllers continue to drive Reset signalling on the bus | ||
179 | * even after system shutdown, wasting power. This flag tells the | ||
180 | * shutdown routine to leave the controller OPERATIONAL instead of RESET. | ||
181 | */ | ||
182 | static int ohci_quirk_nvidia_shutdown(struct usb_hcd *hcd) | ||
183 | { | ||
184 | struct pci_dev *pdev = to_pci_dev(hcd->self.controller); | ||
185 | struct ohci_hcd *ohci = hcd_to_ohci(hcd); | ||
186 | |||
187 | /* Evidently nVidia fixed their later hardware; this is a guess at | ||
188 | * the changeover point. | ||
189 | */ | ||
190 | #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_USB 0x026d | ||
191 | |||
192 | if (pdev->device < PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_USB) { | ||
193 | ohci->flags |= OHCI_QUIRK_SHUTDOWN; | ||
194 | ohci_dbg(ohci, "enabled nVidia shutdown quirk\n"); | ||
195 | } | ||
196 | |||
197 | return 0; | ||
198 | } | ||
199 | |||
200 | static void sb800_prefetch(struct ohci_hcd *ohci, int on) | 178 | static void sb800_prefetch(struct ohci_hcd *ohci, int on) |
201 | { | 179 | { |
202 | struct pci_dev *pdev; | 180 | struct pci_dev *pdev; |
@@ -260,10 +238,6 @@ static const struct pci_device_id ohci_pci_quirks[] = { | |||
260 | PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399), | 238 | PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399), |
261 | .driver_data = (unsigned long)ohci_quirk_amd700, | 239 | .driver_data = (unsigned long)ohci_quirk_amd700, |
262 | }, | 240 | }, |
263 | { | ||
264 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), | ||
265 | .driver_data = (unsigned long) ohci_quirk_nvidia_shutdown, | ||
266 | }, | ||
267 | 241 | ||
268 | /* FIXME for some of the early AMD 760 southbridges, OHCI | 242 | /* FIXME for some of the early AMD 760 southbridges, OHCI |
269 | * won't work at all. blacklist them. | 243 | * won't work at all. blacklist them. |
diff --git a/drivers/usb/host/ohci-ppc-of.c b/drivers/usb/host/ohci-ppc-of.c index 1ca1821320f..0c12f4e14dc 100644 --- a/drivers/usb/host/ohci-ppc-of.c +++ b/drivers/usb/host/ohci-ppc-of.c | |||
@@ -110,7 +110,7 @@ static int __devinit ohci_hcd_ppc_of_probe(struct platform_device *op) | |||
110 | return -ENOMEM; | 110 | return -ENOMEM; |
111 | 111 | ||
112 | hcd->rsrc_start = res.start; | 112 | hcd->rsrc_start = res.start; |
113 | hcd->rsrc_len = res.end - res.start + 1; | 113 | hcd->rsrc_len = resource_size(&res); |
114 | 114 | ||
115 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | 115 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { |
116 | printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__); | 116 | printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__); |
diff --git a/drivers/usb/host/ohci-ppc-soc.c b/drivers/usb/host/ohci-ppc-soc.c index 89e670e38c1..c0f595c4448 100644 --- a/drivers/usb/host/ohci-ppc-soc.c +++ b/drivers/usb/host/ohci-ppc-soc.c | |||
@@ -56,7 +56,7 @@ static int usb_hcd_ppc_soc_probe(const struct hc_driver *driver, | |||
56 | if (!hcd) | 56 | if (!hcd) |
57 | return -ENOMEM; | 57 | return -ENOMEM; |
58 | hcd->rsrc_start = res->start; | 58 | hcd->rsrc_start = res->start; |
59 | hcd->rsrc_len = res->end - res->start + 1; | 59 | hcd->rsrc_len = resource_size(res); |
60 | 60 | ||
61 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | 61 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { |
62 | pr_debug("%s: request_mem_region failed\n", __FILE__); | 62 | pr_debug("%s: request_mem_region failed\n", __FILE__); |
diff --git a/drivers/usb/host/ohci-sa1111.c b/drivers/usb/host/ohci-sa1111.c index d8eb3bdafab..4204d9720d2 100644 --- a/drivers/usb/host/ohci-sa1111.c +++ b/drivers/usb/host/ohci-sa1111.c | |||
@@ -131,7 +131,7 @@ int usb_hcd_sa1111_probe (const struct hc_driver *driver, | |||
131 | if (!hcd) | 131 | if (!hcd) |
132 | return -ENOMEM; | 132 | return -ENOMEM; |
133 | hcd->rsrc_start = dev->res.start; | 133 | hcd->rsrc_start = dev->res.start; |
134 | hcd->rsrc_len = dev->res.end - dev->res.start + 1; | 134 | hcd->rsrc_len = resource_size(&dev->res); |
135 | 135 | ||
136 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | 136 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { |
137 | dbg("request_mem_region failed"); | 137 | dbg("request_mem_region failed"); |
diff --git a/drivers/usb/host/ohci-sh.c b/drivers/usb/host/ohci-sh.c index f47867ff78c..14cecb52a9f 100644 --- a/drivers/usb/host/ohci-sh.c +++ b/drivers/usb/host/ohci-sh.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 2008 Renesas Solutions Corp. | 4 | * Copyright (C) 2008 Renesas Solutions Corp. |
5 | * | 5 | * |
6 | * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | 6 | * Author : Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
diff --git a/drivers/usb/host/ohci-sm501.c b/drivers/usb/host/ohci-sm501.c index 041d30f30c1..78918ca0da2 100644 --- a/drivers/usb/host/ohci-sm501.c +++ b/drivers/usb/host/ohci-sm501.c | |||
@@ -103,8 +103,7 @@ static int ohci_hcd_sm501_drv_probe(struct platform_device *pdev) | |||
103 | goto err0; | 103 | goto err0; |
104 | } | 104 | } |
105 | 105 | ||
106 | if (!request_mem_region(mem->start, mem->end - mem->start + 1, | 106 | if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) { |
107 | pdev->name)) { | ||
108 | dev_err(dev, "request_mem_region failed\n"); | 107 | dev_err(dev, "request_mem_region failed\n"); |
109 | retval = -EBUSY; | 108 | retval = -EBUSY; |
110 | goto err0; | 109 | goto err0; |
@@ -126,7 +125,7 @@ static int ohci_hcd_sm501_drv_probe(struct platform_device *pdev) | |||
126 | 125 | ||
127 | if (!dma_declare_coherent_memory(dev, mem->start, | 126 | if (!dma_declare_coherent_memory(dev, mem->start, |
128 | mem->start - mem->parent->start, | 127 | mem->start - mem->parent->start, |
129 | (mem->end - mem->start) + 1, | 128 | resource_size(mem), |
130 | DMA_MEMORY_MAP | | 129 | DMA_MEMORY_MAP | |
131 | DMA_MEMORY_EXCLUSIVE)) { | 130 | DMA_MEMORY_EXCLUSIVE)) { |
132 | dev_err(dev, "cannot declare coherent memory\n"); | 131 | dev_err(dev, "cannot declare coherent memory\n"); |
@@ -149,7 +148,7 @@ static int ohci_hcd_sm501_drv_probe(struct platform_device *pdev) | |||
149 | } | 148 | } |
150 | 149 | ||
151 | hcd->rsrc_start = res->start; | 150 | hcd->rsrc_start = res->start; |
152 | hcd->rsrc_len = res->end - res->start + 1; | 151 | hcd->rsrc_len = resource_size(res); |
153 | 152 | ||
154 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, pdev->name)) { | 153 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, pdev->name)) { |
155 | dev_err(dev, "request_mem_region failed\n"); | 154 | dev_err(dev, "request_mem_region failed\n"); |
@@ -185,7 +184,7 @@ err3: | |||
185 | err2: | 184 | err2: |
186 | dma_release_declared_memory(dev); | 185 | dma_release_declared_memory(dev); |
187 | err1: | 186 | err1: |
188 | release_mem_region(mem->start, mem->end - mem->start + 1); | 187 | release_mem_region(mem->start, resource_size(mem)); |
189 | err0: | 188 | err0: |
190 | return retval; | 189 | return retval; |
191 | } | 190 | } |
@@ -201,7 +200,7 @@ static int ohci_hcd_sm501_drv_remove(struct platform_device *pdev) | |||
201 | dma_release_declared_memory(&pdev->dev); | 200 | dma_release_declared_memory(&pdev->dev); |
202 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 1); | 201 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
203 | if (mem) | 202 | if (mem) |
204 | release_mem_region(mem->start, mem->end - mem->start + 1); | 203 | release_mem_region(mem->start, resource_size(mem)); |
205 | 204 | ||
206 | /* mask interrupts and disable power */ | 205 | /* mask interrupts and disable power */ |
207 | 206 | ||
diff --git a/drivers/usb/host/ohci-ssb.c b/drivers/usb/host/ohci-ssb.c index 48ee6943bf3..c4aea3b8315 100644 --- a/drivers/usb/host/ohci-ssb.c +++ b/drivers/usb/host/ohci-ssb.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * Sonics Silicon Backplane | 2 | * Sonics Silicon Backplane |
3 | * Broadcom USB-core OHCI driver | 3 | * Broadcom USB-core OHCI driver |
4 | * | 4 | * |
5 | * Copyright 2007 Michael Buesch <mb@bu3sch.de> | 5 | * Copyright 2007 Michael Buesch <m@bues.ch> |
6 | * | 6 | * |
7 | * Derived from the OHCI-PCI driver | 7 | * Derived from the OHCI-PCI driver |
8 | * Copyright 1999 Roman Weissgaerber | 8 | * Copyright 1999 Roman Weissgaerber |
diff --git a/drivers/usb/host/ohci-tmio.c b/drivers/usb/host/ohci-tmio.c index 3558491dd87..57ad1271fc9 100644 --- a/drivers/usb/host/ohci-tmio.c +++ b/drivers/usb/host/ohci-tmio.c | |||
@@ -208,13 +208,13 @@ static int __devinit ohci_hcd_tmio_drv_probe(struct platform_device *dev) | |||
208 | } | 208 | } |
209 | 209 | ||
210 | hcd->rsrc_start = regs->start; | 210 | hcd->rsrc_start = regs->start; |
211 | hcd->rsrc_len = regs->end - regs->start + 1; | 211 | hcd->rsrc_len = resource_size(regs); |
212 | 212 | ||
213 | tmio = hcd_to_tmio(hcd); | 213 | tmio = hcd_to_tmio(hcd); |
214 | 214 | ||
215 | spin_lock_init(&tmio->lock); | 215 | spin_lock_init(&tmio->lock); |
216 | 216 | ||
217 | tmio->ccr = ioremap(config->start, config->end - config->start + 1); | 217 | tmio->ccr = ioremap(config->start, resource_size(config)); |
218 | if (!tmio->ccr) { | 218 | if (!tmio->ccr) { |
219 | ret = -ENOMEM; | 219 | ret = -ENOMEM; |
220 | goto err_ioremap_ccr; | 220 | goto err_ioremap_ccr; |
@@ -228,7 +228,7 @@ static int __devinit ohci_hcd_tmio_drv_probe(struct platform_device *dev) | |||
228 | 228 | ||
229 | if (!dma_declare_coherent_memory(&dev->dev, sram->start, | 229 | if (!dma_declare_coherent_memory(&dev->dev, sram->start, |
230 | sram->start, | 230 | sram->start, |
231 | sram->end - sram->start + 1, | 231 | resource_size(sram), |
232 | DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE)) { | 232 | DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE)) { |
233 | ret = -EBUSY; | 233 | ret = -EBUSY; |
234 | goto err_dma_declare; | 234 | goto err_dma_declare; |
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h index 35e5fd640ce..0795b934d00 100644 --- a/drivers/usb/host/ohci.h +++ b/drivers/usb/host/ohci.h | |||
@@ -403,7 +403,6 @@ struct ohci_hcd { | |||
403 | #define OHCI_QUIRK_HUB_POWER 0x100 /* distrust firmware power/oc setup */ | 403 | #define OHCI_QUIRK_HUB_POWER 0x100 /* distrust firmware power/oc setup */ |
404 | #define OHCI_QUIRK_AMD_PLL 0x200 /* AMD PLL quirk*/ | 404 | #define OHCI_QUIRK_AMD_PLL 0x200 /* AMD PLL quirk*/ |
405 | #define OHCI_QUIRK_AMD_PREFETCH 0x400 /* pre-fetch for ISO transfer */ | 405 | #define OHCI_QUIRK_AMD_PREFETCH 0x400 /* pre-fetch for ISO transfer */ |
406 | #define OHCI_QUIRK_SHUTDOWN 0x800 /* nVidia power bug */ | ||
407 | // there are also chip quirks/bugs in init logic | 406 | // there are also chip quirks/bugs in init logic |
408 | 407 | ||
409 | struct work_struct nec_work; /* Worker for NEC quirk */ | 408 | struct work_struct nec_work; /* Worker for NEC quirk */ |
diff --git a/drivers/usb/host/oxu210hp-hcd.c b/drivers/usb/host/oxu210hp-hcd.c index 5fbe997dc6d..dcd889803f0 100644 --- a/drivers/usb/host/oxu210hp-hcd.c +++ b/drivers/usb/host/oxu210hp-hcd.c | |||
@@ -3828,7 +3828,7 @@ static int oxu_drv_probe(struct platform_device *pdev) | |||
3828 | return -ENODEV; | 3828 | return -ENODEV; |
3829 | } | 3829 | } |
3830 | memstart = res->start; | 3830 | memstart = res->start; |
3831 | memlen = res->end - res->start + 1; | 3831 | memlen = resource_size(res); |
3832 | dev_dbg(&pdev->dev, "MEM resource %lx-%lx\n", memstart, memlen); | 3832 | dev_dbg(&pdev->dev, "MEM resource %lx-%lx\n", memstart, memlen); |
3833 | if (!request_mem_region(memstart, memlen, | 3833 | if (!request_mem_region(memstart, memlen, |
3834 | oxu_hc_driver.description)) { | 3834 | oxu_hc_driver.description)) { |
diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c index fd930618c28..23e04fb038b 100644 --- a/drivers/usb/host/pci-quirks.c +++ b/drivers/usb/host/pci-quirks.c | |||
@@ -35,6 +35,9 @@ | |||
35 | #define OHCI_INTRSTATUS 0x0c | 35 | #define OHCI_INTRSTATUS 0x0c |
36 | #define OHCI_INTRENABLE 0x10 | 36 | #define OHCI_INTRENABLE 0x10 |
37 | #define OHCI_INTRDISABLE 0x14 | 37 | #define OHCI_INTRDISABLE 0x14 |
38 | #define OHCI_FMINTERVAL 0x34 | ||
39 | #define OHCI_HCFS (3 << 6) /* hc functional state */ | ||
40 | #define OHCI_HCR (1 << 0) /* host controller reset */ | ||
38 | #define OHCI_OCR (1 << 3) /* ownership change request */ | 41 | #define OHCI_OCR (1 << 3) /* ownership change request */ |
39 | #define OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */ | 42 | #define OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */ |
40 | #define OHCI_CTRL_IR (1 << 8) /* interrupt routing */ | 43 | #define OHCI_CTRL_IR (1 << 8) /* interrupt routing */ |
@@ -463,6 +466,8 @@ static void __devinit quirk_usb_handoff_ohci(struct pci_dev *pdev) | |||
463 | { | 466 | { |
464 | void __iomem *base; | 467 | void __iomem *base; |
465 | u32 control; | 468 | u32 control; |
469 | u32 fminterval; | ||
470 | int cnt; | ||
466 | 471 | ||
467 | if (!mmio_resource_enabled(pdev, 0)) | 472 | if (!mmio_resource_enabled(pdev, 0)) |
468 | return; | 473 | return; |
@@ -495,32 +500,63 @@ static void __devinit quirk_usb_handoff_ohci(struct pci_dev *pdev) | |||
495 | } | 500 | } |
496 | #endif | 501 | #endif |
497 | 502 | ||
498 | /* reset controller, preserving RWC (and possibly IR) */ | 503 | /* disable interrupts */ |
499 | writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL); | 504 | writel((u32) ~0, base + OHCI_INTRDISABLE); |
500 | 505 | ||
501 | /* | 506 | /* Reset the USB bus, if the controller isn't already in RESET */ |
502 | * disable interrupts | 507 | if (control & OHCI_HCFS) { |
503 | */ | 508 | /* Go into RESET, preserving RWC (and possibly IR) */ |
504 | writel(~(u32)0, base + OHCI_INTRDISABLE); | 509 | writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL); |
505 | writel(~(u32)0, base + OHCI_INTRSTATUS); | 510 | readl(base + OHCI_CONTROL); |
511 | |||
512 | /* drive bus reset for at least 50 ms (7.1.7.5) */ | ||
513 | msleep(50); | ||
514 | } | ||
515 | |||
516 | /* software reset of the controller, preserving HcFmInterval */ | ||
517 | fminterval = readl(base + OHCI_FMINTERVAL); | ||
518 | writel(OHCI_HCR, base + OHCI_CMDSTATUS); | ||
506 | 519 | ||
520 | /* reset requires max 10 us delay */ | ||
521 | for (cnt = 30; cnt > 0; --cnt) { /* ... allow extra time */ | ||
522 | if ((readl(base + OHCI_CMDSTATUS) & OHCI_HCR) == 0) | ||
523 | break; | ||
524 | udelay(1); | ||
525 | } | ||
526 | writel(fminterval, base + OHCI_FMINTERVAL); | ||
527 | |||
528 | /* Now the controller is safely in SUSPEND and nothing can wake it up */ | ||
507 | iounmap(base); | 529 | iounmap(base); |
508 | } | 530 | } |
509 | 531 | ||
532 | static const struct dmi_system_id __devinitconst ehci_dmi_nohandoff_table[] = { | ||
533 | { | ||
534 | /* Pegatron Lucid (ExoPC) */ | ||
535 | .matches = { | ||
536 | DMI_MATCH(DMI_BOARD_NAME, "EXOPG06411"), | ||
537 | DMI_MATCH(DMI_BIOS_VERSION, "Lucid-CE-133"), | ||
538 | }, | ||
539 | }, | ||
540 | { | ||
541 | /* Pegatron Lucid (Ordissimo AIRIS) */ | ||
542 | .matches = { | ||
543 | DMI_MATCH(DMI_BOARD_NAME, "M11JB"), | ||
544 | DMI_MATCH(DMI_BIOS_VERSION, "Lucid-GE-133"), | ||
545 | }, | ||
546 | }, | ||
547 | { } | ||
548 | }; | ||
549 | |||
510 | static void __devinit ehci_bios_handoff(struct pci_dev *pdev, | 550 | static void __devinit ehci_bios_handoff(struct pci_dev *pdev, |
511 | void __iomem *op_reg_base, | 551 | void __iomem *op_reg_base, |
512 | u32 cap, u8 offset) | 552 | u32 cap, u8 offset) |
513 | { | 553 | { |
514 | int try_handoff = 1, tried_handoff = 0; | 554 | int try_handoff = 1, tried_handoff = 0; |
515 | 555 | ||
516 | /* The Pegatron Lucid (ExoPC) tablet sporadically waits for 90 | 556 | /* The Pegatron Lucid tablet sporadically waits for 98 seconds trying |
517 | * seconds trying the handoff on its unused controller. Skip | 557 | * the handoff on its unused controller. Skip it. */ |
518 | * it. */ | ||
519 | if (pdev->vendor == 0x8086 && pdev->device == 0x283a) { | 558 | if (pdev->vendor == 0x8086 && pdev->device == 0x283a) { |
520 | const char *dmi_bn = dmi_get_system_info(DMI_BOARD_NAME); | 559 | if (dmi_check_system(ehci_dmi_nohandoff_table)) |
521 | const char *dmi_bv = dmi_get_system_info(DMI_BIOS_VERSION); | ||
522 | if (dmi_bn && !strcmp(dmi_bn, "EXOPG06411") && | ||
523 | dmi_bv && !strcmp(dmi_bv, "Lucid-CE-133")) | ||
524 | try_handoff = 0; | 560 | try_handoff = 0; |
525 | } | 561 | } |
526 | 562 | ||
@@ -584,7 +620,7 @@ static void __devinit quirk_usb_disable_ehci(struct pci_dev *pdev) | |||
584 | void __iomem *base, *op_reg_base; | 620 | void __iomem *base, *op_reg_base; |
585 | u32 hcc_params, cap, val; | 621 | u32 hcc_params, cap, val; |
586 | u8 offset, cap_length; | 622 | u8 offset, cap_length; |
587 | int wait_time, delta, count = 256/4; | 623 | int wait_time, count = 256/4; |
588 | 624 | ||
589 | if (!mmio_resource_enabled(pdev, 0)) | 625 | if (!mmio_resource_enabled(pdev, 0)) |
590 | return; | 626 | return; |
@@ -630,11 +666,10 @@ static void __devinit quirk_usb_disable_ehci(struct pci_dev *pdev) | |||
630 | writel(val, op_reg_base + EHCI_USBCMD); | 666 | writel(val, op_reg_base + EHCI_USBCMD); |
631 | 667 | ||
632 | wait_time = 2000; | 668 | wait_time = 2000; |
633 | delta = 100; | ||
634 | do { | 669 | do { |
635 | writel(0x3f, op_reg_base + EHCI_USBSTS); | 670 | writel(0x3f, op_reg_base + EHCI_USBSTS); |
636 | udelay(delta); | 671 | udelay(100); |
637 | wait_time -= delta; | 672 | wait_time -= 100; |
638 | val = readl(op_reg_base + EHCI_USBSTS); | 673 | val = readl(op_reg_base + EHCI_USBSTS); |
639 | if ((val == ~(u32)0) || (val & EHCI_USBSTS_HALTED)) { | 674 | if ((val == ~(u32)0) || (val & EHCI_USBSTS_HALTED)) { |
640 | break; | 675 | break; |
@@ -775,7 +810,7 @@ static void __devinit quirk_usb_handoff_xhci(struct pci_dev *pdev) | |||
775 | 810 | ||
776 | /* If the BIOS owns the HC, signal that the OS wants it, and wait */ | 811 | /* If the BIOS owns the HC, signal that the OS wants it, and wait */ |
777 | if (val & XHCI_HC_BIOS_OWNED) { | 812 | if (val & XHCI_HC_BIOS_OWNED) { |
778 | writel(val & XHCI_HC_OS_OWNED, base + ext_cap_offset); | 813 | writel(val | XHCI_HC_OS_OWNED, base + ext_cap_offset); |
779 | 814 | ||
780 | /* Wait for 5 seconds with 10 microsecond polling interval */ | 815 | /* Wait for 5 seconds with 10 microsecond polling interval */ |
781 | timeout = handshake(base + ext_cap_offset, XHCI_HC_BIOS_OWNED, | 816 | timeout = handshake(base + ext_cap_offset, XHCI_HC_BIOS_OWNED, |
diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c index 4586369dda0..40a0d8b03ad 100644 --- a/drivers/usb/host/r8a66597-hcd.c +++ b/drivers/usb/host/r8a66597-hcd.c | |||
@@ -6,7 +6,7 @@ | |||
6 | * Portions Copyright (C) 2004-2005 David Brownell | 6 | * Portions Copyright (C) 2004-2005 David Brownell |
7 | * Portions Copyright (C) 1999 Roman Weissgaerber | 7 | * Portions Copyright (C) 1999 Roman Weissgaerber |
8 | * | 8 | * |
9 | * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | 9 | * Author : Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> |
10 | * | 10 | * |
11 | * This program is free software; you can redistribute it and/or modify | 11 | * This program is free software; you can redistribute it and/or modify |
12 | * it under the terms of the GNU General Public License as published by | 12 | * it under the terms of the GNU General Public License as published by |
@@ -1438,7 +1438,7 @@ static void packet_write(struct r8a66597 *r8a66597, u16 pipenum) | |||
1438 | if (pipenum > 0) | 1438 | if (pipenum > 0) |
1439 | r8a66597_write(r8a66597, ~(1 << pipenum), BEMPSTS); | 1439 | r8a66597_write(r8a66597, ~(1 << pipenum), BEMPSTS); |
1440 | if (urb->transfer_buffer) { | 1440 | if (urb->transfer_buffer) { |
1441 | r8a66597_write_fifo(r8a66597, td->pipe->fifoaddr, buf, size); | 1441 | r8a66597_write_fifo(r8a66597, td->pipe, buf, size); |
1442 | if (!usb_pipebulk(urb->pipe) || td->maxpacket != size) | 1442 | if (!usb_pipebulk(urb->pipe) || td->maxpacket != size) |
1443 | r8a66597_write(r8a66597, BVAL, td->pipe->fifoctr); | 1443 | r8a66597_write(r8a66597, BVAL, td->pipe->fifoctr); |
1444 | } | 1444 | } |
@@ -2306,7 +2306,7 @@ static int r8a66597_bus_resume(struct usb_hcd *hcd) | |||
2306 | 2306 | ||
2307 | dbg("resume port = %d", port); | 2307 | dbg("resume port = %d", port); |
2308 | rh->port &= ~USB_PORT_STAT_SUSPEND; | 2308 | rh->port &= ~USB_PORT_STAT_SUSPEND; |
2309 | rh->port |= USB_PORT_STAT_C_SUSPEND < 16; | 2309 | rh->port |= USB_PORT_STAT_C_SUSPEND << 16; |
2310 | r8a66597_mdfy(r8a66597, RESUME, RESUME | UACT, dvstctr_reg); | 2310 | r8a66597_mdfy(r8a66597, RESUME, RESUME | UACT, dvstctr_reg); |
2311 | msleep(50); | 2311 | msleep(50); |
2312 | r8a66597_mdfy(r8a66597, UACT, RESUME | UACT, dvstctr_reg); | 2312 | r8a66597_mdfy(r8a66597, UACT, RESUME | UACT, dvstctr_reg); |
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h index 25563e9a90b..f28782d20ee 100644 --- a/drivers/usb/host/r8a66597.h +++ b/drivers/usb/host/r8a66597.h | |||
@@ -201,11 +201,26 @@ static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val, | |||
201 | iowrite16(val, r8a66597->reg + offset); | 201 | iowrite16(val, r8a66597->reg + offset); |
202 | } | 202 | } |
203 | 203 | ||
204 | static inline void r8a66597_mdfy(struct r8a66597 *r8a66597, | ||
205 | u16 val, u16 pat, unsigned long offset) | ||
206 | { | ||
207 | u16 tmp; | ||
208 | tmp = r8a66597_read(r8a66597, offset); | ||
209 | tmp = tmp & (~pat); | ||
210 | tmp = tmp | val; | ||
211 | r8a66597_write(r8a66597, tmp, offset); | ||
212 | } | ||
213 | |||
214 | #define r8a66597_bclr(r8a66597, val, offset) \ | ||
215 | r8a66597_mdfy(r8a66597, 0, val, offset) | ||
216 | #define r8a66597_bset(r8a66597, val, offset) \ | ||
217 | r8a66597_mdfy(r8a66597, val, 0, offset) | ||
218 | |||
204 | static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, | 219 | static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, |
205 | unsigned long offset, u16 *buf, | 220 | struct r8a66597_pipe *pipe, u16 *buf, |
206 | int len) | 221 | int len) |
207 | { | 222 | { |
208 | void __iomem *fifoaddr = r8a66597->reg + offset; | 223 | void __iomem *fifoaddr = r8a66597->reg + pipe->fifoaddr; |
209 | unsigned long count; | 224 | unsigned long count; |
210 | unsigned char *pb; | 225 | unsigned char *pb; |
211 | int i; | 226 | int i; |
@@ -230,26 +245,15 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, | |||
230 | iowrite16_rep(fifoaddr, buf, len); | 245 | iowrite16_rep(fifoaddr, buf, len); |
231 | if (unlikely(odd)) { | 246 | if (unlikely(odd)) { |
232 | buf = &buf[len]; | 247 | buf = &buf[len]; |
248 | if (r8a66597->pdata->wr0_shorted_to_wr1) | ||
249 | r8a66597_bclr(r8a66597, MBW_16, pipe->fifosel); | ||
233 | iowrite8((unsigned char)*buf, fifoaddr); | 250 | iowrite8((unsigned char)*buf, fifoaddr); |
251 | if (r8a66597->pdata->wr0_shorted_to_wr1) | ||
252 | r8a66597_bset(r8a66597, MBW_16, pipe->fifosel); | ||
234 | } | 253 | } |
235 | } | 254 | } |
236 | } | 255 | } |
237 | 256 | ||
238 | static inline void r8a66597_mdfy(struct r8a66597 *r8a66597, | ||
239 | u16 val, u16 pat, unsigned long offset) | ||
240 | { | ||
241 | u16 tmp; | ||
242 | tmp = r8a66597_read(r8a66597, offset); | ||
243 | tmp = tmp & (~pat); | ||
244 | tmp = tmp | val; | ||
245 | r8a66597_write(r8a66597, tmp, offset); | ||
246 | } | ||
247 | |||
248 | #define r8a66597_bclr(r8a66597, val, offset) \ | ||
249 | r8a66597_mdfy(r8a66597, 0, val, offset) | ||
250 | #define r8a66597_bset(r8a66597, val, offset) \ | ||
251 | r8a66597_mdfy(r8a66597, val, 0, offset) | ||
252 | |||
253 | static inline unsigned long get_syscfg_reg(int port) | 257 | static inline unsigned long get_syscfg_reg(int port) |
254 | { | 258 | { |
255 | return port == 0 ? SYSCFG0 : SYSCFG1; | 259 | return port == 0 ? SYSCFG0 : SYSCFG1; |
diff --git a/drivers/usb/host/uhci-grlib.c b/drivers/usb/host/uhci-grlib.c index d01c1e22768..f7a62138e3e 100644 --- a/drivers/usb/host/uhci-grlib.c +++ b/drivers/usb/host/uhci-grlib.c | |||
@@ -111,7 +111,7 @@ static int __devinit uhci_hcd_grlib_probe(struct platform_device *op) | |||
111 | return -ENOMEM; | 111 | return -ENOMEM; |
112 | 112 | ||
113 | hcd->rsrc_start = res.start; | 113 | hcd->rsrc_start = res.start; |
114 | hcd->rsrc_len = res.end - res.start + 1; | 114 | hcd->rsrc_len = resource_size(&res); |
115 | 115 | ||
116 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { | 116 | if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { |
117 | printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__); | 117 | printk(KERN_ERR "%s: request_mem_region failed\n", __FILE__); |
diff --git a/drivers/usb/host/uhci-q.c b/drivers/usb/host/uhci-q.c index 84ed28b34f9..82539913ad8 100644 --- a/drivers/usb/host/uhci-q.c +++ b/drivers/usb/host/uhci-q.c | |||
@@ -943,7 +943,7 @@ static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, | |||
943 | if (usb_pipein(urb->pipe)) | 943 | if (usb_pipein(urb->pipe)) |
944 | status |= TD_CTRL_SPD; | 944 | status |= TD_CTRL_SPD; |
945 | 945 | ||
946 | i = urb->num_sgs; | 946 | i = urb->num_mapped_sgs; |
947 | if (len > 0 && i > 0) { | 947 | if (len > 0 && i > 0) { |
948 | sg = urb->sg; | 948 | sg = urb->sg; |
949 | data = sg_dma_address(sg); | 949 | data = sg_dma_address(sg); |
diff --git a/drivers/usb/host/whci/init.c b/drivers/usb/host/whci/init.c index f7582e8e216..d3e13b640d4 100644 --- a/drivers/usb/host/whci/init.c +++ b/drivers/usb/host/whci/init.c | |||
@@ -178,7 +178,7 @@ void whc_clean_up(struct whc *whc) | |||
178 | if (whc->qset_pool) | 178 | if (whc->qset_pool) |
179 | dma_pool_destroy(whc->qset_pool); | 179 | dma_pool_destroy(whc->qset_pool); |
180 | 180 | ||
181 | len = whc->umc->resource.end - whc->umc->resource.start + 1; | 181 | len = resource_size(&whc->umc->resource); |
182 | if (whc->base) | 182 | if (whc->base) |
183 | iounmap(whc->base); | 183 | iounmap(whc->base); |
184 | if (whc->base_phys) | 184 | if (whc->base_phys) |
diff --git a/drivers/usb/host/whci/qset.c b/drivers/usb/host/whci/qset.c index d6e17542861..76083ae9213 100644 --- a/drivers/usb/host/whci/qset.c +++ b/drivers/usb/host/whci/qset.c | |||
@@ -124,7 +124,7 @@ void qset_clear(struct whc *whc, struct whc_qset *qset) | |||
124 | { | 124 | { |
125 | qset->td_start = qset->td_end = qset->ntds = 0; | 125 | qset->td_start = qset->td_end = qset->ntds = 0; |
126 | 126 | ||
127 | qset->qh.link = cpu_to_le32(QH_LINK_NTDS(8) | QH_LINK_T); | 127 | qset->qh.link = cpu_to_le64(QH_LINK_NTDS(8) | QH_LINK_T); |
128 | qset->qh.status = qset->qh.status & QH_STATUS_SEQ_MASK; | 128 | qset->qh.status = qset->qh.status & QH_STATUS_SEQ_MASK; |
129 | qset->qh.err_count = 0; | 129 | qset->qh.err_count = 0; |
130 | qset->qh.scratch[0] = 0; | 130 | qset->qh.scratch[0] = 0; |
@@ -443,7 +443,7 @@ static int qset_add_urb_sg(struct whc *whc, struct whc_qset *qset, struct urb *u | |||
443 | 443 | ||
444 | remaining = urb->transfer_buffer_length; | 444 | remaining = urb->transfer_buffer_length; |
445 | 445 | ||
446 | for_each_sg(urb->sg, sg, urb->num_sgs, i) { | 446 | for_each_sg(urb->sg, sg, urb->num_mapped_sgs, i) { |
447 | dma_addr_t dma_addr; | 447 | dma_addr_t dma_addr; |
448 | size_t dma_remaining; | 448 | size_t dma_remaining; |
449 | dma_addr_t sp, ep; | 449 | dma_addr_t sp, ep; |
@@ -561,7 +561,7 @@ static int qset_add_urb_sg_linearize(struct whc *whc, struct whc_qset *qset, | |||
561 | 561 | ||
562 | remaining = urb->transfer_buffer_length; | 562 | remaining = urb->transfer_buffer_length; |
563 | 563 | ||
564 | for_each_sg(urb->sg, sg, urb->num_sgs, i) { | 564 | for_each_sg(urb->sg, sg, urb->num_mapped_sgs, i) { |
565 | size_t len; | 565 | size_t len; |
566 | size_t sg_remaining; | 566 | size_t sg_remaining; |
567 | void *orig; | 567 | void *orig; |
diff --git a/drivers/usb/host/xhci-dbg.c b/drivers/usb/host/xhci-dbg.c index 1f50b4468e8..e9b0f043455 100644 --- a/drivers/usb/host/xhci-dbg.c +++ b/drivers/usb/host/xhci-dbg.c | |||
@@ -266,11 +266,11 @@ void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb) | |||
266 | xhci_dbg(xhci, "Interrupter target = 0x%x\n", | 266 | xhci_dbg(xhci, "Interrupter target = 0x%x\n", |
267 | GET_INTR_TARGET(le32_to_cpu(trb->link.intr_target))); | 267 | GET_INTR_TARGET(le32_to_cpu(trb->link.intr_target))); |
268 | xhci_dbg(xhci, "Cycle bit = %u\n", | 268 | xhci_dbg(xhci, "Cycle bit = %u\n", |
269 | (unsigned int) (le32_to_cpu(trb->link.control) & TRB_CYCLE)); | 269 | le32_to_cpu(trb->link.control) & TRB_CYCLE); |
270 | xhci_dbg(xhci, "Toggle cycle bit = %u\n", | 270 | xhci_dbg(xhci, "Toggle cycle bit = %u\n", |
271 | (unsigned int) (le32_to_cpu(trb->link.control) & LINK_TOGGLE)); | 271 | le32_to_cpu(trb->link.control) & LINK_TOGGLE); |
272 | xhci_dbg(xhci, "No Snoop bit = %u\n", | 272 | xhci_dbg(xhci, "No Snoop bit = %u\n", |
273 | (unsigned int) (le32_to_cpu(trb->link.control) & TRB_NO_SNOOP)); | 273 | le32_to_cpu(trb->link.control) & TRB_NO_SNOOP); |
274 | break; | 274 | break; |
275 | case TRB_TYPE(TRB_TRANSFER): | 275 | case TRB_TYPE(TRB_TRANSFER): |
276 | address = le64_to_cpu(trb->trans_event.buffer); | 276 | address = le64_to_cpu(trb->trans_event.buffer); |
@@ -284,9 +284,9 @@ void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb) | |||
284 | address = le64_to_cpu(trb->event_cmd.cmd_trb); | 284 | address = le64_to_cpu(trb->event_cmd.cmd_trb); |
285 | xhci_dbg(xhci, "Command TRB pointer = %llu\n", address); | 285 | xhci_dbg(xhci, "Command TRB pointer = %llu\n", address); |
286 | xhci_dbg(xhci, "Completion status = %u\n", | 286 | xhci_dbg(xhci, "Completion status = %u\n", |
287 | (unsigned int) GET_COMP_CODE(le32_to_cpu(trb->event_cmd.status))); | 287 | GET_COMP_CODE(le32_to_cpu(trb->event_cmd.status))); |
288 | xhci_dbg(xhci, "Flags = 0x%x\n", | 288 | xhci_dbg(xhci, "Flags = 0x%x\n", |
289 | (unsigned int) le32_to_cpu(trb->event_cmd.flags)); | 289 | le32_to_cpu(trb->event_cmd.flags)); |
290 | break; | 290 | break; |
291 | default: | 291 | default: |
292 | xhci_dbg(xhci, "Unknown TRB with TRB type ID %u\n", | 292 | xhci_dbg(xhci, "Unknown TRB with TRB type ID %u\n", |
@@ -318,10 +318,10 @@ void xhci_debug_segment(struct xhci_hcd *xhci, struct xhci_segment *seg) | |||
318 | for (i = 0; i < TRBS_PER_SEGMENT; ++i) { | 318 | for (i = 0; i < TRBS_PER_SEGMENT; ++i) { |
319 | trb = &seg->trbs[i]; | 319 | trb = &seg->trbs[i]; |
320 | xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n", addr, | 320 | xhci_dbg(xhci, "@%016llx %08x %08x %08x %08x\n", addr, |
321 | (u32)lower_32_bits(le64_to_cpu(trb->link.segment_ptr)), | 321 | lower_32_bits(le64_to_cpu(trb->link.segment_ptr)), |
322 | (u32)upper_32_bits(le64_to_cpu(trb->link.segment_ptr)), | 322 | upper_32_bits(le64_to_cpu(trb->link.segment_ptr)), |
323 | (unsigned int) le32_to_cpu(trb->link.intr_target), | 323 | le32_to_cpu(trb->link.intr_target), |
324 | (unsigned int) le32_to_cpu(trb->link.control)); | 324 | le32_to_cpu(trb->link.control)); |
325 | addr += sizeof(*trb); | 325 | addr += sizeof(*trb); |
326 | } | 326 | } |
327 | } | 327 | } |
@@ -402,8 +402,8 @@ void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst) | |||
402 | addr, | 402 | addr, |
403 | lower_32_bits(le64_to_cpu(entry->seg_addr)), | 403 | lower_32_bits(le64_to_cpu(entry->seg_addr)), |
404 | upper_32_bits(le64_to_cpu(entry->seg_addr)), | 404 | upper_32_bits(le64_to_cpu(entry->seg_addr)), |
405 | (unsigned int) le32_to_cpu(entry->seg_size), | 405 | le32_to_cpu(entry->seg_size), |
406 | (unsigned int) le32_to_cpu(entry->rsvd)); | 406 | le32_to_cpu(entry->rsvd)); |
407 | addr += sizeof(*entry); | 407 | addr += sizeof(*entry); |
408 | } | 408 | } |
409 | } | 409 | } |
diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c index 0be788cc2fd..ce9f974dac0 100644 --- a/drivers/usb/host/xhci-hub.c +++ b/drivers/usb/host/xhci-hub.c | |||
@@ -392,6 +392,20 @@ static int xhci_get_ports(struct usb_hcd *hcd, __le32 __iomem ***port_array) | |||
392 | return max_ports; | 392 | return max_ports; |
393 | } | 393 | } |
394 | 394 | ||
395 | /* Test and clear port RWC bit */ | ||
396 | void xhci_test_and_clear_bit(struct xhci_hcd *xhci, __le32 __iomem **port_array, | ||
397 | int port_id, u32 port_bit) | ||
398 | { | ||
399 | u32 temp; | ||
400 | |||
401 | temp = xhci_readl(xhci, port_array[port_id]); | ||
402 | if (temp & port_bit) { | ||
403 | temp = xhci_port_state_to_neutral(temp); | ||
404 | temp |= port_bit; | ||
405 | xhci_writel(xhci, temp, port_array[port_id]); | ||
406 | } | ||
407 | } | ||
408 | |||
395 | int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, | 409 | int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, |
396 | u16 wIndex, char *buf, u16 wLength) | 410 | u16 wIndex, char *buf, u16 wLength) |
397 | { | 411 | { |
@@ -463,11 +477,12 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, | |||
463 | && (temp & PORT_POWER)) | 477 | && (temp & PORT_POWER)) |
464 | status |= USB_PORT_STAT_SUSPEND; | 478 | status |= USB_PORT_STAT_SUSPEND; |
465 | } | 479 | } |
466 | if ((temp & PORT_PLS_MASK) == XDEV_RESUME) { | 480 | if ((temp & PORT_PLS_MASK) == XDEV_RESUME && |
481 | !DEV_SUPERSPEED(temp)) { | ||
467 | if ((temp & PORT_RESET) || !(temp & PORT_PE)) | 482 | if ((temp & PORT_RESET) || !(temp & PORT_PE)) |
468 | goto error; | 483 | goto error; |
469 | if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies, | 484 | if (time_after_eq(jiffies, |
470 | bus_state->resume_done[wIndex])) { | 485 | bus_state->resume_done[wIndex])) { |
471 | xhci_dbg(xhci, "Resume USB2 port %d\n", | 486 | xhci_dbg(xhci, "Resume USB2 port %d\n", |
472 | wIndex + 1); | 487 | wIndex + 1); |
473 | bus_state->resume_done[wIndex] = 0; | 488 | bus_state->resume_done[wIndex] = 0; |
@@ -487,6 +502,14 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, | |||
487 | xhci_ring_device(xhci, slot_id); | 502 | xhci_ring_device(xhci, slot_id); |
488 | bus_state->port_c_suspend |= 1 << wIndex; | 503 | bus_state->port_c_suspend |= 1 << wIndex; |
489 | bus_state->suspended_ports &= ~(1 << wIndex); | 504 | bus_state->suspended_ports &= ~(1 << wIndex); |
505 | } else { | ||
506 | /* | ||
507 | * The resume has been signaling for less than | ||
508 | * 20ms. Report the port status as SUSPEND, | ||
509 | * let the usbcore check port status again | ||
510 | * and clear resume signaling later. | ||
511 | */ | ||
512 | status |= USB_PORT_STAT_SUSPEND; | ||
490 | } | 513 | } |
491 | } | 514 | } |
492 | if ((temp & PORT_PLS_MASK) == XDEV_U0 | 515 | if ((temp & PORT_PLS_MASK) == XDEV_U0 |
@@ -664,7 +687,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, | |||
664 | xhci_dbg(xhci, "PORTSC %04x\n", temp); | 687 | xhci_dbg(xhci, "PORTSC %04x\n", temp); |
665 | if (temp & PORT_RESET) | 688 | if (temp & PORT_RESET) |
666 | goto error; | 689 | goto error; |
667 | if (temp & XDEV_U3) { | 690 | if ((temp & PORT_PLS_MASK) == XDEV_U3) { |
668 | if ((temp & PORT_PE) == 0) | 691 | if ((temp & PORT_PE) == 0) |
669 | goto error; | 692 | goto error; |
670 | 693 | ||
@@ -752,7 +775,7 @@ int xhci_hub_status_data(struct usb_hcd *hcd, char *buf) | |||
752 | memset(buf, 0, retval); | 775 | memset(buf, 0, retval); |
753 | status = 0; | 776 | status = 0; |
754 | 777 | ||
755 | mask = PORT_CSC | PORT_PEC | PORT_OCC | PORT_PLC; | 778 | mask = PORT_CSC | PORT_PEC | PORT_OCC | PORT_PLC | PORT_WRC; |
756 | 779 | ||
757 | spin_lock_irqsave(&xhci->lock, flags); | 780 | spin_lock_irqsave(&xhci->lock, flags); |
758 | /* For each port, did anything change? If so, set that bit in buf. */ | 781 | /* For each port, did anything change? If so, set that bit in buf. */ |
@@ -929,12 +952,8 @@ int xhci_bus_resume(struct usb_hcd *hcd) | |||
929 | spin_lock_irqsave(&xhci->lock, flags); | 952 | spin_lock_irqsave(&xhci->lock, flags); |
930 | 953 | ||
931 | /* Clear PLC */ | 954 | /* Clear PLC */ |
932 | temp = xhci_readl(xhci, port_array[port_index]); | 955 | xhci_test_and_clear_bit(xhci, port_array, port_index, |
933 | if (temp & PORT_PLC) { | 956 | PORT_PLC); |
934 | temp = xhci_port_state_to_neutral(temp); | ||
935 | temp |= PORT_PLC; | ||
936 | xhci_writel(xhci, temp, port_array[port_index]); | ||
937 | } | ||
938 | 957 | ||
939 | slot_id = xhci_find_slot_id_by_port(hcd, | 958 | slot_id = xhci_find_slot_id_by_port(hcd, |
940 | xhci, port_index + 1); | 959 | xhci, port_index + 1); |
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index fcb7f7efc86..d718033dc53 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c | |||
@@ -81,7 +81,7 @@ static void xhci_segment_free(struct xhci_hcd *xhci, struct xhci_segment *seg) | |||
81 | * related flags, such as End TRB, Toggle Cycle, and no snoop. | 81 | * related flags, such as End TRB, Toggle Cycle, and no snoop. |
82 | */ | 82 | */ |
83 | static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev, | 83 | static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev, |
84 | struct xhci_segment *next, bool link_trbs) | 84 | struct xhci_segment *next, bool link_trbs, bool isoc) |
85 | { | 85 | { |
86 | u32 val; | 86 | u32 val; |
87 | 87 | ||
@@ -89,15 +89,17 @@ static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev, | |||
89 | return; | 89 | return; |
90 | prev->next = next; | 90 | prev->next = next; |
91 | if (link_trbs) { | 91 | if (link_trbs) { |
92 | prev->trbs[TRBS_PER_SEGMENT-1].link. | 92 | prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr = |
93 | segment_ptr = cpu_to_le64(next->dma); | 93 | cpu_to_le64(next->dma); |
94 | 94 | ||
95 | /* Set the last TRB in the segment to have a TRB type ID of Link TRB */ | 95 | /* Set the last TRB in the segment to have a TRB type ID of Link TRB */ |
96 | val = le32_to_cpu(prev->trbs[TRBS_PER_SEGMENT-1].link.control); | 96 | val = le32_to_cpu(prev->trbs[TRBS_PER_SEGMENT-1].link.control); |
97 | val &= ~TRB_TYPE_BITMASK; | 97 | val &= ~TRB_TYPE_BITMASK; |
98 | val |= TRB_TYPE(TRB_LINK); | 98 | val |= TRB_TYPE(TRB_LINK); |
99 | /* Always set the chain bit with 0.95 hardware */ | 99 | /* Always set the chain bit with 0.95 hardware */ |
100 | if (xhci_link_trb_quirk(xhci)) | 100 | /* Set chain bit for isoc rings on AMD 0.96 host */ |
101 | if (xhci_link_trb_quirk(xhci) || | ||
102 | (isoc && (xhci->quirks & XHCI_AMD_0x96_HOST))) | ||
101 | val |= TRB_CHAIN; | 103 | val |= TRB_CHAIN; |
102 | prev->trbs[TRBS_PER_SEGMENT-1].link.control = cpu_to_le32(val); | 104 | prev->trbs[TRBS_PER_SEGMENT-1].link.control = cpu_to_le32(val); |
103 | } | 105 | } |
@@ -112,18 +114,20 @@ void xhci_ring_free(struct xhci_hcd *xhci, struct xhci_ring *ring) | |||
112 | struct xhci_segment *seg; | 114 | struct xhci_segment *seg; |
113 | struct xhci_segment *first_seg; | 115 | struct xhci_segment *first_seg; |
114 | 116 | ||
115 | if (!ring || !ring->first_seg) | 117 | if (!ring) |
116 | return; | 118 | return; |
117 | first_seg = ring->first_seg; | 119 | if (ring->first_seg) { |
118 | seg = first_seg->next; | 120 | first_seg = ring->first_seg; |
119 | xhci_dbg(xhci, "Freeing ring at %p\n", ring); | 121 | seg = first_seg->next; |
120 | while (seg != first_seg) { | 122 | xhci_dbg(xhci, "Freeing ring at %p\n", ring); |
121 | struct xhci_segment *next = seg->next; | 123 | while (seg != first_seg) { |
122 | xhci_segment_free(xhci, seg); | 124 | struct xhci_segment *next = seg->next; |
123 | seg = next; | 125 | xhci_segment_free(xhci, seg); |
126 | seg = next; | ||
127 | } | ||
128 | xhci_segment_free(xhci, first_seg); | ||
129 | ring->first_seg = NULL; | ||
124 | } | 130 | } |
125 | xhci_segment_free(xhci, first_seg); | ||
126 | ring->first_seg = NULL; | ||
127 | kfree(ring); | 131 | kfree(ring); |
128 | } | 132 | } |
129 | 133 | ||
@@ -152,7 +156,7 @@ static void xhci_initialize_ring_info(struct xhci_ring *ring) | |||
152 | * See section 4.9.1 and figures 15 and 16. | 156 | * See section 4.9.1 and figures 15 and 16. |
153 | */ | 157 | */ |
154 | static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci, | 158 | static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci, |
155 | unsigned int num_segs, bool link_trbs, gfp_t flags) | 159 | unsigned int num_segs, bool link_trbs, bool isoc, gfp_t flags) |
156 | { | 160 | { |
157 | struct xhci_ring *ring; | 161 | struct xhci_ring *ring; |
158 | struct xhci_segment *prev; | 162 | struct xhci_segment *prev; |
@@ -178,17 +182,17 @@ static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci, | |||
178 | next = xhci_segment_alloc(xhci, flags); | 182 | next = xhci_segment_alloc(xhci, flags); |
179 | if (!next) | 183 | if (!next) |
180 | goto fail; | 184 | goto fail; |
181 | xhci_link_segments(xhci, prev, next, link_trbs); | 185 | xhci_link_segments(xhci, prev, next, link_trbs, isoc); |
182 | 186 | ||
183 | prev = next; | 187 | prev = next; |
184 | num_segs--; | 188 | num_segs--; |
185 | } | 189 | } |
186 | xhci_link_segments(xhci, prev, ring->first_seg, link_trbs); | 190 | xhci_link_segments(xhci, prev, ring->first_seg, link_trbs, isoc); |
187 | 191 | ||
188 | if (link_trbs) { | 192 | if (link_trbs) { |
189 | /* See section 4.9.2.1 and 6.4.4.1 */ | 193 | /* See section 4.9.2.1 and 6.4.4.1 */ |
190 | prev->trbs[TRBS_PER_SEGMENT-1].link. | 194 | prev->trbs[TRBS_PER_SEGMENT-1].link.control |= |
191 | control |= cpu_to_le32(LINK_TOGGLE); | 195 | cpu_to_le32(LINK_TOGGLE); |
192 | xhci_dbg(xhci, "Wrote link toggle flag to" | 196 | xhci_dbg(xhci, "Wrote link toggle flag to" |
193 | " segment %p (virtual), 0x%llx (DMA)\n", | 197 | " segment %p (virtual), 0x%llx (DMA)\n", |
194 | prev, (unsigned long long)prev->dma); | 198 | prev, (unsigned long long)prev->dma); |
@@ -229,14 +233,14 @@ void xhci_free_or_cache_endpoint_ring(struct xhci_hcd *xhci, | |||
229 | * pointers to the beginning of the ring. | 233 | * pointers to the beginning of the ring. |
230 | */ | 234 | */ |
231 | static void xhci_reinit_cached_ring(struct xhci_hcd *xhci, | 235 | static void xhci_reinit_cached_ring(struct xhci_hcd *xhci, |
232 | struct xhci_ring *ring) | 236 | struct xhci_ring *ring, bool isoc) |
233 | { | 237 | { |
234 | struct xhci_segment *seg = ring->first_seg; | 238 | struct xhci_segment *seg = ring->first_seg; |
235 | do { | 239 | do { |
236 | memset(seg->trbs, 0, | 240 | memset(seg->trbs, 0, |
237 | sizeof(union xhci_trb)*TRBS_PER_SEGMENT); | 241 | sizeof(union xhci_trb)*TRBS_PER_SEGMENT); |
238 | /* All endpoint rings have link TRBs */ | 242 | /* All endpoint rings have link TRBs */ |
239 | xhci_link_segments(xhci, seg, seg->next, 1); | 243 | xhci_link_segments(xhci, seg, seg->next, 1, isoc); |
240 | seg = seg->next; | 244 | seg = seg->next; |
241 | } while (seg != ring->first_seg); | 245 | } while (seg != ring->first_seg); |
242 | xhci_initialize_ring_info(ring); | 246 | xhci_initialize_ring_info(ring); |
@@ -540,7 +544,7 @@ struct xhci_stream_info *xhci_alloc_stream_info(struct xhci_hcd *xhci, | |||
540 | */ | 544 | */ |
541 | for (cur_stream = 1; cur_stream < num_streams; cur_stream++) { | 545 | for (cur_stream = 1; cur_stream < num_streams; cur_stream++) { |
542 | stream_info->stream_rings[cur_stream] = | 546 | stream_info->stream_rings[cur_stream] = |
543 | xhci_ring_alloc(xhci, 1, true, mem_flags); | 547 | xhci_ring_alloc(xhci, 1, true, false, mem_flags); |
544 | cur_ring = stream_info->stream_rings[cur_stream]; | 548 | cur_ring = stream_info->stream_rings[cur_stream]; |
545 | if (!cur_ring) | 549 | if (!cur_ring) |
546 | goto cleanup_rings; | 550 | goto cleanup_rings; |
@@ -549,8 +553,8 @@ struct xhci_stream_info *xhci_alloc_stream_info(struct xhci_hcd *xhci, | |||
549 | addr = cur_ring->first_seg->dma | | 553 | addr = cur_ring->first_seg->dma | |
550 | SCT_FOR_CTX(SCT_PRI_TR) | | 554 | SCT_FOR_CTX(SCT_PRI_TR) | |
551 | cur_ring->cycle_state; | 555 | cur_ring->cycle_state; |
552 | stream_info->stream_ctx_array[cur_stream]. | 556 | stream_info->stream_ctx_array[cur_stream].stream_ring = |
553 | stream_ring = cpu_to_le64(addr); | 557 | cpu_to_le64(addr); |
554 | xhci_dbg(xhci, "Setting stream %d ring ptr to 0x%08llx\n", | 558 | xhci_dbg(xhci, "Setting stream %d ring ptr to 0x%08llx\n", |
555 | cur_stream, (unsigned long long) addr); | 559 | cur_stream, (unsigned long long) addr); |
556 | 560 | ||
@@ -765,7 +769,7 @@ int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id, | |||
765 | } | 769 | } |
766 | 770 | ||
767 | /* Allocate endpoint 0 ring */ | 771 | /* Allocate endpoint 0 ring */ |
768 | dev->eps[0].ring = xhci_ring_alloc(xhci, 1, true, flags); | 772 | dev->eps[0].ring = xhci_ring_alloc(xhci, 1, true, false, flags); |
769 | if (!dev->eps[0].ring) | 773 | if (!dev->eps[0].ring) |
770 | goto fail; | 774 | goto fail; |
771 | 775 | ||
@@ -786,7 +790,7 @@ int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id, | |||
786 | xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n", | 790 | xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n", |
787 | slot_id, | 791 | slot_id, |
788 | &xhci->dcbaa->dev_context_ptrs[slot_id], | 792 | &xhci->dcbaa->dev_context_ptrs[slot_id], |
789 | (unsigned long long) le64_to_cpu(xhci->dcbaa->dev_context_ptrs[slot_id])); | 793 | le64_to_cpu(xhci->dcbaa->dev_context_ptrs[slot_id])); |
790 | 794 | ||
791 | return 1; | 795 | return 1; |
792 | fail: | 796 | fail: |
@@ -871,7 +875,6 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud | |||
871 | struct xhci_virt_device *dev; | 875 | struct xhci_virt_device *dev; |
872 | struct xhci_ep_ctx *ep0_ctx; | 876 | struct xhci_ep_ctx *ep0_ctx; |
873 | struct xhci_slot_ctx *slot_ctx; | 877 | struct xhci_slot_ctx *slot_ctx; |
874 | struct xhci_input_control_ctx *ctrl_ctx; | ||
875 | u32 port_num; | 878 | u32 port_num; |
876 | struct usb_device *top_dev; | 879 | struct usb_device *top_dev; |
877 | 880 | ||
@@ -883,26 +886,22 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud | |||
883 | return -EINVAL; | 886 | return -EINVAL; |
884 | } | 887 | } |
885 | ep0_ctx = xhci_get_ep_ctx(xhci, dev->in_ctx, 0); | 888 | ep0_ctx = xhci_get_ep_ctx(xhci, dev->in_ctx, 0); |
886 | ctrl_ctx = xhci_get_input_control_ctx(xhci, dev->in_ctx); | ||
887 | slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx); | 889 | slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx); |
888 | 890 | ||
889 | /* 2) New slot context and endpoint 0 context are valid*/ | ||
890 | ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG); | ||
891 | |||
892 | /* 3) Only the control endpoint is valid - one endpoint context */ | 891 | /* 3) Only the control endpoint is valid - one endpoint context */ |
893 | slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1) | (u32) udev->route); | 892 | slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1) | udev->route); |
894 | switch (udev->speed) { | 893 | switch (udev->speed) { |
895 | case USB_SPEED_SUPER: | 894 | case USB_SPEED_SUPER: |
896 | slot_ctx->dev_info |= cpu_to_le32((u32) SLOT_SPEED_SS); | 895 | slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_SS); |
897 | break; | 896 | break; |
898 | case USB_SPEED_HIGH: | 897 | case USB_SPEED_HIGH: |
899 | slot_ctx->dev_info |= cpu_to_le32((u32) SLOT_SPEED_HS); | 898 | slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_HS); |
900 | break; | 899 | break; |
901 | case USB_SPEED_FULL: | 900 | case USB_SPEED_FULL: |
902 | slot_ctx->dev_info |= cpu_to_le32((u32) SLOT_SPEED_FS); | 901 | slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_FS); |
903 | break; | 902 | break; |
904 | case USB_SPEED_LOW: | 903 | case USB_SPEED_LOW: |
905 | slot_ctx->dev_info |= cpu_to_le32((u32) SLOT_SPEED_LS); | 904 | slot_ctx->dev_info |= cpu_to_le32(SLOT_SPEED_LS); |
906 | break; | 905 | break; |
907 | case USB_SPEED_WIRELESS: | 906 | case USB_SPEED_WIRELESS: |
908 | xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n"); | 907 | xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n"); |
@@ -916,7 +915,7 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud | |||
916 | port_num = xhci_find_real_port_number(xhci, udev); | 915 | port_num = xhci_find_real_port_number(xhci, udev); |
917 | if (!port_num) | 916 | if (!port_num) |
918 | return -EINVAL; | 917 | return -EINVAL; |
919 | slot_ctx->dev_info2 |= cpu_to_le32((u32) ROOT_HUB_PORT(port_num)); | 918 | slot_ctx->dev_info2 |= cpu_to_le32(ROOT_HUB_PORT(port_num)); |
920 | /* Set the port number in the virtual_device to the faked port number */ | 919 | /* Set the port number in the virtual_device to the faked port number */ |
921 | for (top_dev = udev; top_dev->parent && top_dev->parent->parent; | 920 | for (top_dev = udev; top_dev->parent && top_dev->parent->parent; |
922 | top_dev = top_dev->parent) | 921 | top_dev = top_dev->parent) |
@@ -1175,10 +1174,10 @@ int xhci_endpoint_init(struct xhci_hcd *xhci, | |||
1175 | */ | 1174 | */ |
1176 | if (usb_endpoint_xfer_isoc(&ep->desc)) | 1175 | if (usb_endpoint_xfer_isoc(&ep->desc)) |
1177 | virt_dev->eps[ep_index].new_ring = | 1176 | virt_dev->eps[ep_index].new_ring = |
1178 | xhci_ring_alloc(xhci, 8, true, mem_flags); | 1177 | xhci_ring_alloc(xhci, 8, true, true, mem_flags); |
1179 | else | 1178 | else |
1180 | virt_dev->eps[ep_index].new_ring = | 1179 | virt_dev->eps[ep_index].new_ring = |
1181 | xhci_ring_alloc(xhci, 1, true, mem_flags); | 1180 | xhci_ring_alloc(xhci, 1, true, false, mem_flags); |
1182 | if (!virt_dev->eps[ep_index].new_ring) { | 1181 | if (!virt_dev->eps[ep_index].new_ring) { |
1183 | /* Attempt to use the ring cache */ | 1182 | /* Attempt to use the ring cache */ |
1184 | if (virt_dev->num_rings_cached == 0) | 1183 | if (virt_dev->num_rings_cached == 0) |
@@ -1187,7 +1186,8 @@ int xhci_endpoint_init(struct xhci_hcd *xhci, | |||
1187 | virt_dev->ring_cache[virt_dev->num_rings_cached]; | 1186 | virt_dev->ring_cache[virt_dev->num_rings_cached]; |
1188 | virt_dev->ring_cache[virt_dev->num_rings_cached] = NULL; | 1187 | virt_dev->ring_cache[virt_dev->num_rings_cached] = NULL; |
1189 | virt_dev->num_rings_cached--; | 1188 | virt_dev->num_rings_cached--; |
1190 | xhci_reinit_cached_ring(xhci, virt_dev->eps[ep_index].new_ring); | 1189 | xhci_reinit_cached_ring(xhci, virt_dev->eps[ep_index].new_ring, |
1190 | usb_endpoint_xfer_isoc(&ep->desc) ? true : false); | ||
1191 | } | 1191 | } |
1192 | virt_dev->eps[ep_index].skip = false; | 1192 | virt_dev->eps[ep_index].skip = false; |
1193 | ep_ring = virt_dev->eps[ep_index].new_ring; | 1193 | ep_ring = virt_dev->eps[ep_index].new_ring; |
@@ -2001,7 +2001,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) | |||
2001 | goto fail; | 2001 | goto fail; |
2002 | 2002 | ||
2003 | /* Set up the command ring to have one segments for now. */ | 2003 | /* Set up the command ring to have one segments for now. */ |
2004 | xhci->cmd_ring = xhci_ring_alloc(xhci, 1, true, flags); | 2004 | xhci->cmd_ring = xhci_ring_alloc(xhci, 1, true, false, flags); |
2005 | if (!xhci->cmd_ring) | 2005 | if (!xhci->cmd_ring) |
2006 | goto fail; | 2006 | goto fail; |
2007 | xhci_dbg(xhci, "Allocated command ring at %p\n", xhci->cmd_ring); | 2007 | xhci_dbg(xhci, "Allocated command ring at %p\n", xhci->cmd_ring); |
@@ -2032,7 +2032,8 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) | |||
2032 | * the event ring segment table (ERST). Section 4.9.3. | 2032 | * the event ring segment table (ERST). Section 4.9.3. |
2033 | */ | 2033 | */ |
2034 | xhci_dbg(xhci, "// Allocating event ring\n"); | 2034 | xhci_dbg(xhci, "// Allocating event ring\n"); |
2035 | xhci->event_ring = xhci_ring_alloc(xhci, ERST_NUM_SEGS, false, flags); | 2035 | xhci->event_ring = xhci_ring_alloc(xhci, ERST_NUM_SEGS, false, false, |
2036 | flags); | ||
2036 | if (!xhci->event_ring) | 2037 | if (!xhci->event_ring) |
2037 | goto fail; | 2038 | goto fail; |
2038 | if (xhci_check_trb_in_td_math(xhci, flags) < 0) | 2039 | if (xhci_check_trb_in_td_math(xhci, flags) < 0) |
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c index cb16de213f6..50e7156a7d8 100644 --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c | |||
@@ -128,6 +128,9 @@ static int xhci_pci_setup(struct usb_hcd *hcd) | |||
128 | if (pdev->vendor == PCI_VENDOR_ID_NEC) | 128 | if (pdev->vendor == PCI_VENDOR_ID_NEC) |
129 | xhci->quirks |= XHCI_NEC_HOST; | 129 | xhci->quirks |= XHCI_NEC_HOST; |
130 | 130 | ||
131 | if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96) | ||
132 | xhci->quirks |= XHCI_AMD_0x96_HOST; | ||
133 | |||
131 | /* AMD PLL quirk */ | 134 | /* AMD PLL quirk */ |
132 | if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info()) | 135 | if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info()) |
133 | xhci->quirks |= XHCI_AMD_PLL_FIX; | 136 | xhci->quirks |= XHCI_AMD_PLL_FIX; |
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index 70cacbbe7fb..ae99e3b32fb 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c | |||
@@ -113,15 +113,13 @@ static int last_trb(struct xhci_hcd *xhci, struct xhci_ring *ring, | |||
113 | if (ring == xhci->event_ring) | 113 | if (ring == xhci->event_ring) |
114 | return trb == &seg->trbs[TRBS_PER_SEGMENT]; | 114 | return trb == &seg->trbs[TRBS_PER_SEGMENT]; |
115 | else | 115 | else |
116 | return (le32_to_cpu(trb->link.control) & TRB_TYPE_BITMASK) | 116 | return TRB_TYPE_LINK_LE32(trb->link.control); |
117 | == TRB_TYPE(TRB_LINK); | ||
118 | } | 117 | } |
119 | 118 | ||
120 | static int enqueue_is_link_trb(struct xhci_ring *ring) | 119 | static int enqueue_is_link_trb(struct xhci_ring *ring) |
121 | { | 120 | { |
122 | struct xhci_link_trb *link = &ring->enqueue->link; | 121 | struct xhci_link_trb *link = &ring->enqueue->link; |
123 | return ((le32_to_cpu(link->control) & TRB_TYPE_BITMASK) == | 122 | return TRB_TYPE_LINK_LE32(link->control); |
124 | TRB_TYPE(TRB_LINK)); | ||
125 | } | 123 | } |
126 | 124 | ||
127 | /* Updates trb to point to the next TRB in the ring, and updates seg if the next | 125 | /* Updates trb to point to the next TRB in the ring, and updates seg if the next |
@@ -187,7 +185,7 @@ static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring, bool consumer | |||
187 | * prepare_transfer()? | 185 | * prepare_transfer()? |
188 | */ | 186 | */ |
189 | static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring, | 187 | static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring, |
190 | bool consumer, bool more_trbs_coming) | 188 | bool consumer, bool more_trbs_coming, bool isoc) |
191 | { | 189 | { |
192 | u32 chain; | 190 | u32 chain; |
193 | union xhci_trb *next; | 191 | union xhci_trb *next; |
@@ -214,11 +212,13 @@ static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring, | |||
214 | if (!chain && !more_trbs_coming) | 212 | if (!chain && !more_trbs_coming) |
215 | break; | 213 | break; |
216 | 214 | ||
217 | /* If we're not dealing with 0.95 hardware, | 215 | /* If we're not dealing with 0.95 hardware or |
216 | * isoc rings on AMD 0.96 host, | ||
218 | * carry over the chain bit of the previous TRB | 217 | * carry over the chain bit of the previous TRB |
219 | * (which may mean the chain bit is cleared). | 218 | * (which may mean the chain bit is cleared). |
220 | */ | 219 | */ |
221 | if (!xhci_link_trb_quirk(xhci)) { | 220 | if (!(isoc && (xhci->quirks & XHCI_AMD_0x96_HOST)) |
221 | && !xhci_link_trb_quirk(xhci)) { | ||
222 | next->link.control &= | 222 | next->link.control &= |
223 | cpu_to_le32(~TRB_CHAIN); | 223 | cpu_to_le32(~TRB_CHAIN); |
224 | next->link.control |= | 224 | next->link.control |= |
@@ -372,7 +372,7 @@ static struct xhci_segment *find_trb_seg( | |||
372 | while (cur_seg->trbs > trb || | 372 | while (cur_seg->trbs > trb || |
373 | &cur_seg->trbs[TRBS_PER_SEGMENT - 1] < trb) { | 373 | &cur_seg->trbs[TRBS_PER_SEGMENT - 1] < trb) { |
374 | generic_trb = &cur_seg->trbs[TRBS_PER_SEGMENT - 1].generic; | 374 | generic_trb = &cur_seg->trbs[TRBS_PER_SEGMENT - 1].generic; |
375 | if (le32_to_cpu(generic_trb->field[3]) & LINK_TOGGLE) | 375 | if (generic_trb->field[3] & cpu_to_le32(LINK_TOGGLE)) |
376 | *cycle_state ^= 0x1; | 376 | *cycle_state ^= 0x1; |
377 | cur_seg = cur_seg->next; | 377 | cur_seg = cur_seg->next; |
378 | if (cur_seg == start_seg) | 378 | if (cur_seg == start_seg) |
@@ -489,8 +489,8 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci, | |||
489 | } | 489 | } |
490 | 490 | ||
491 | trb = &state->new_deq_ptr->generic; | 491 | trb = &state->new_deq_ptr->generic; |
492 | if ((le32_to_cpu(trb->field[3]) & TRB_TYPE_BITMASK) == | 492 | if (TRB_TYPE_LINK_LE32(trb->field[3]) && |
493 | TRB_TYPE(TRB_LINK) && (le32_to_cpu(trb->field[3]) & LINK_TOGGLE)) | 493 | (trb->field[3] & cpu_to_le32(LINK_TOGGLE))) |
494 | state->new_cycle_state ^= 0x1; | 494 | state->new_cycle_state ^= 0x1; |
495 | next_trb(xhci, ep_ring, &state->new_deq_seg, &state->new_deq_ptr); | 495 | next_trb(xhci, ep_ring, &state->new_deq_seg, &state->new_deq_ptr); |
496 | 496 | ||
@@ -516,8 +516,12 @@ void xhci_find_new_dequeue_state(struct xhci_hcd *xhci, | |||
516 | (unsigned long long) addr); | 516 | (unsigned long long) addr); |
517 | } | 517 | } |
518 | 518 | ||
519 | /* flip_cycle means flip the cycle bit of all but the first and last TRB. | ||
520 | * (The last TRB actually points to the ring enqueue pointer, which is not part | ||
521 | * of this TD.) This is used to remove partially enqueued isoc TDs from a ring. | ||
522 | */ | ||
519 | static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring, | 523 | static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring, |
520 | struct xhci_td *cur_td) | 524 | struct xhci_td *cur_td, bool flip_cycle) |
521 | { | 525 | { |
522 | struct xhci_segment *cur_seg; | 526 | struct xhci_segment *cur_seg; |
523 | union xhci_trb *cur_trb; | 527 | union xhci_trb *cur_trb; |
@@ -525,12 +529,17 @@ static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring, | |||
525 | for (cur_seg = cur_td->start_seg, cur_trb = cur_td->first_trb; | 529 | for (cur_seg = cur_td->start_seg, cur_trb = cur_td->first_trb; |
526 | true; | 530 | true; |
527 | next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) { | 531 | next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) { |
528 | if ((le32_to_cpu(cur_trb->generic.field[3]) & TRB_TYPE_BITMASK) | 532 | if (TRB_TYPE_LINK_LE32(cur_trb->generic.field[3])) { |
529 | == TRB_TYPE(TRB_LINK)) { | ||
530 | /* Unchain any chained Link TRBs, but | 533 | /* Unchain any chained Link TRBs, but |
531 | * leave the pointers intact. | 534 | * leave the pointers intact. |
532 | */ | 535 | */ |
533 | cur_trb->generic.field[3] &= cpu_to_le32(~TRB_CHAIN); | 536 | cur_trb->generic.field[3] &= cpu_to_le32(~TRB_CHAIN); |
537 | /* Flip the cycle bit (link TRBs can't be the first | ||
538 | * or last TRB). | ||
539 | */ | ||
540 | if (flip_cycle) | ||
541 | cur_trb->generic.field[3] ^= | ||
542 | cpu_to_le32(TRB_CYCLE); | ||
534 | xhci_dbg(xhci, "Cancel (unchain) link TRB\n"); | 543 | xhci_dbg(xhci, "Cancel (unchain) link TRB\n"); |
535 | xhci_dbg(xhci, "Address = %p (0x%llx dma); " | 544 | xhci_dbg(xhci, "Address = %p (0x%llx dma); " |
536 | "in seg %p (0x%llx dma)\n", | 545 | "in seg %p (0x%llx dma)\n", |
@@ -544,6 +553,11 @@ static void td_to_noop(struct xhci_hcd *xhci, struct xhci_ring *ep_ring, | |||
544 | cur_trb->generic.field[2] = 0; | 553 | cur_trb->generic.field[2] = 0; |
545 | /* Preserve only the cycle bit of this TRB */ | 554 | /* Preserve only the cycle bit of this TRB */ |
546 | cur_trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE); | 555 | cur_trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE); |
556 | /* Flip the cycle bit except on the first or last TRB */ | ||
557 | if (flip_cycle && cur_trb != cur_td->first_trb && | ||
558 | cur_trb != cur_td->last_trb) | ||
559 | cur_trb->generic.field[3] ^= | ||
560 | cpu_to_le32(TRB_CYCLE); | ||
547 | cur_trb->generic.field[3] |= cpu_to_le32( | 561 | cur_trb->generic.field[3] |= cpu_to_le32( |
548 | TRB_TYPE(TRB_TR_NOOP)); | 562 | TRB_TYPE(TRB_TR_NOOP)); |
549 | xhci_dbg(xhci, "Cancel TRB %p (0x%llx dma) " | 563 | xhci_dbg(xhci, "Cancel TRB %p (0x%llx dma) " |
@@ -722,14 +736,14 @@ static void handle_stopped_endpoint(struct xhci_hcd *xhci, | |||
722 | cur_td->urb->stream_id, | 736 | cur_td->urb->stream_id, |
723 | cur_td, &deq_state); | 737 | cur_td, &deq_state); |
724 | else | 738 | else |
725 | td_to_noop(xhci, ep_ring, cur_td); | 739 | td_to_noop(xhci, ep_ring, cur_td, false); |
726 | remove_finished_td: | 740 | remove_finished_td: |
727 | /* | 741 | /* |
728 | * The event handler won't see a completion for this TD anymore, | 742 | * The event handler won't see a completion for this TD anymore, |
729 | * so remove it from the endpoint ring's TD list. Keep it in | 743 | * so remove it from the endpoint ring's TD list. Keep it in |
730 | * the cancelled TD list for URB completion later. | 744 | * the cancelled TD list for URB completion later. |
731 | */ | 745 | */ |
732 | list_del(&cur_td->td_list); | 746 | list_del_init(&cur_td->td_list); |
733 | } | 747 | } |
734 | last_unlinked_td = cur_td; | 748 | last_unlinked_td = cur_td; |
735 | xhci_stop_watchdog_timer_in_irq(xhci, ep); | 749 | xhci_stop_watchdog_timer_in_irq(xhci, ep); |
@@ -757,7 +771,7 @@ remove_finished_td: | |||
757 | do { | 771 | do { |
758 | cur_td = list_entry(ep->cancelled_td_list.next, | 772 | cur_td = list_entry(ep->cancelled_td_list.next, |
759 | struct xhci_td, cancelled_td_list); | 773 | struct xhci_td, cancelled_td_list); |
760 | list_del(&cur_td->cancelled_td_list); | 774 | list_del_init(&cur_td->cancelled_td_list); |
761 | 775 | ||
762 | /* Clean up the cancelled URB */ | 776 | /* Clean up the cancelled URB */ |
763 | /* Doesn't matter what we pass for status, since the core will | 777 | /* Doesn't matter what we pass for status, since the core will |
@@ -802,23 +816,24 @@ void xhci_stop_endpoint_command_watchdog(unsigned long arg) | |||
802 | struct xhci_ring *ring; | 816 | struct xhci_ring *ring; |
803 | struct xhci_td *cur_td; | 817 | struct xhci_td *cur_td; |
804 | int ret, i, j; | 818 | int ret, i, j; |
819 | unsigned long flags; | ||
805 | 820 | ||
806 | ep = (struct xhci_virt_ep *) arg; | 821 | ep = (struct xhci_virt_ep *) arg; |
807 | xhci = ep->xhci; | 822 | xhci = ep->xhci; |
808 | 823 | ||
809 | spin_lock(&xhci->lock); | 824 | spin_lock_irqsave(&xhci->lock, flags); |
810 | 825 | ||
811 | ep->stop_cmds_pending--; | 826 | ep->stop_cmds_pending--; |
812 | if (xhci->xhc_state & XHCI_STATE_DYING) { | 827 | if (xhci->xhc_state & XHCI_STATE_DYING) { |
813 | xhci_dbg(xhci, "Stop EP timer ran, but another timer marked " | 828 | xhci_dbg(xhci, "Stop EP timer ran, but another timer marked " |
814 | "xHCI as DYING, exiting.\n"); | 829 | "xHCI as DYING, exiting.\n"); |
815 | spin_unlock(&xhci->lock); | 830 | spin_unlock_irqrestore(&xhci->lock, flags); |
816 | return; | 831 | return; |
817 | } | 832 | } |
818 | if (!(ep->stop_cmds_pending == 0 && (ep->ep_state & EP_HALT_PENDING))) { | 833 | if (!(ep->stop_cmds_pending == 0 && (ep->ep_state & EP_HALT_PENDING))) { |
819 | xhci_dbg(xhci, "Stop EP timer ran, but no command pending, " | 834 | xhci_dbg(xhci, "Stop EP timer ran, but no command pending, " |
820 | "exiting.\n"); | 835 | "exiting.\n"); |
821 | spin_unlock(&xhci->lock); | 836 | spin_unlock_irqrestore(&xhci->lock, flags); |
822 | return; | 837 | return; |
823 | } | 838 | } |
824 | 839 | ||
@@ -830,11 +845,11 @@ void xhci_stop_endpoint_command_watchdog(unsigned long arg) | |||
830 | xhci->xhc_state |= XHCI_STATE_DYING; | 845 | xhci->xhc_state |= XHCI_STATE_DYING; |
831 | /* Disable interrupts from the host controller and start halting it */ | 846 | /* Disable interrupts from the host controller and start halting it */ |
832 | xhci_quiesce(xhci); | 847 | xhci_quiesce(xhci); |
833 | spin_unlock(&xhci->lock); | 848 | spin_unlock_irqrestore(&xhci->lock, flags); |
834 | 849 | ||
835 | ret = xhci_halt(xhci); | 850 | ret = xhci_halt(xhci); |
836 | 851 | ||
837 | spin_lock(&xhci->lock); | 852 | spin_lock_irqsave(&xhci->lock, flags); |
838 | if (ret < 0) { | 853 | if (ret < 0) { |
839 | /* This is bad; the host is not responding to commands and it's | 854 | /* This is bad; the host is not responding to commands and it's |
840 | * not allowing itself to be halted. At least interrupts are | 855 | * not allowing itself to be halted. At least interrupts are |
@@ -865,9 +880,9 @@ void xhci_stop_endpoint_command_watchdog(unsigned long arg) | |||
865 | cur_td = list_first_entry(&ring->td_list, | 880 | cur_td = list_first_entry(&ring->td_list, |
866 | struct xhci_td, | 881 | struct xhci_td, |
867 | td_list); | 882 | td_list); |
868 | list_del(&cur_td->td_list); | 883 | list_del_init(&cur_td->td_list); |
869 | if (!list_empty(&cur_td->cancelled_td_list)) | 884 | if (!list_empty(&cur_td->cancelled_td_list)) |
870 | list_del(&cur_td->cancelled_td_list); | 885 | list_del_init(&cur_td->cancelled_td_list); |
871 | xhci_giveback_urb_in_irq(xhci, cur_td, | 886 | xhci_giveback_urb_in_irq(xhci, cur_td, |
872 | -ESHUTDOWN, "killed"); | 887 | -ESHUTDOWN, "killed"); |
873 | } | 888 | } |
@@ -876,13 +891,13 @@ void xhci_stop_endpoint_command_watchdog(unsigned long arg) | |||
876 | &temp_ep->cancelled_td_list, | 891 | &temp_ep->cancelled_td_list, |
877 | struct xhci_td, | 892 | struct xhci_td, |
878 | cancelled_td_list); | 893 | cancelled_td_list); |
879 | list_del(&cur_td->cancelled_td_list); | 894 | list_del_init(&cur_td->cancelled_td_list); |
880 | xhci_giveback_urb_in_irq(xhci, cur_td, | 895 | xhci_giveback_urb_in_irq(xhci, cur_td, |
881 | -ESHUTDOWN, "killed"); | 896 | -ESHUTDOWN, "killed"); |
882 | } | 897 | } |
883 | } | 898 | } |
884 | } | 899 | } |
885 | spin_unlock(&xhci->lock); | 900 | spin_unlock_irqrestore(&xhci->lock, flags); |
886 | xhci_dbg(xhci, "Calling usb_hc_died()\n"); | 901 | xhci_dbg(xhci, "Calling usb_hc_died()\n"); |
887 | usb_hc_died(xhci_to_hcd(xhci)->primary_hcd); | 902 | usb_hc_died(xhci_to_hcd(xhci)->primary_hcd); |
888 | xhci_dbg(xhci, "xHCI host controller is dead.\n"); | 903 | xhci_dbg(xhci, "xHCI host controller is dead.\n"); |
@@ -1000,7 +1015,7 @@ static void handle_reset_ep_completion(struct xhci_hcd *xhci, | |||
1000 | * but we don't care. | 1015 | * but we don't care. |
1001 | */ | 1016 | */ |
1002 | xhci_dbg(xhci, "Ignoring reset ep completion code of %u\n", | 1017 | xhci_dbg(xhci, "Ignoring reset ep completion code of %u\n", |
1003 | (unsigned int) GET_COMP_CODE(le32_to_cpu(event->status))); | 1018 | GET_COMP_CODE(le32_to_cpu(event->status))); |
1004 | 1019 | ||
1005 | /* HW with the reset endpoint quirk needs to have a configure endpoint | 1020 | /* HW with the reset endpoint quirk needs to have a configure endpoint |
1006 | * command complete before the endpoint can be used. Queue that here | 1021 | * command complete before the endpoint can be used. Queue that here |
@@ -1200,6 +1215,7 @@ static void handle_vendor_event(struct xhci_hcd *xhci, | |||
1200 | * | 1215 | * |
1201 | * Returns a zero-based port number, which is suitable for indexing into each of | 1216 | * Returns a zero-based port number, which is suitable for indexing into each of |
1202 | * the split roothubs' port arrays and bus state arrays. | 1217 | * the split roothubs' port arrays and bus state arrays. |
1218 | * Add one to it in order to call xhci_find_slot_id_by_port. | ||
1203 | */ | 1219 | */ |
1204 | static unsigned int find_faked_portnum_from_hw_portnum(struct usb_hcd *hcd, | 1220 | static unsigned int find_faked_portnum_from_hw_portnum(struct usb_hcd *hcd, |
1205 | struct xhci_hcd *xhci, u32 port_id) | 1221 | struct xhci_hcd *xhci, u32 port_id) |
@@ -1322,7 +1338,7 @@ static void handle_port_status(struct xhci_hcd *xhci, | |||
1322 | temp |= PORT_LINK_STROBE | XDEV_U0; | 1338 | temp |= PORT_LINK_STROBE | XDEV_U0; |
1323 | xhci_writel(xhci, temp, port_array[faked_port_index]); | 1339 | xhci_writel(xhci, temp, port_array[faked_port_index]); |
1324 | slot_id = xhci_find_slot_id_by_port(hcd, xhci, | 1340 | slot_id = xhci_find_slot_id_by_port(hcd, xhci, |
1325 | faked_port_index); | 1341 | faked_port_index + 1); |
1326 | if (!slot_id) { | 1342 | if (!slot_id) { |
1327 | xhci_dbg(xhci, "slot_id is zero\n"); | 1343 | xhci_dbg(xhci, "slot_id is zero\n"); |
1328 | goto cleanup; | 1344 | goto cleanup; |
@@ -1330,10 +1346,8 @@ static void handle_port_status(struct xhci_hcd *xhci, | |||
1330 | xhci_ring_device(xhci, slot_id); | 1346 | xhci_ring_device(xhci, slot_id); |
1331 | xhci_dbg(xhci, "resume SS port %d finished\n", port_id); | 1347 | xhci_dbg(xhci, "resume SS port %d finished\n", port_id); |
1332 | /* Clear PORT_PLC */ | 1348 | /* Clear PORT_PLC */ |
1333 | temp = xhci_readl(xhci, port_array[faked_port_index]); | 1349 | xhci_test_and_clear_bit(xhci, port_array, |
1334 | temp = xhci_port_state_to_neutral(temp); | 1350 | faked_port_index, PORT_PLC); |
1335 | temp |= PORT_PLC; | ||
1336 | xhci_writel(xhci, temp, port_array[faked_port_index]); | ||
1337 | } else { | 1351 | } else { |
1338 | xhci_dbg(xhci, "resume HS port %d\n", port_id); | 1352 | xhci_dbg(xhci, "resume HS port %d\n", port_id); |
1339 | bus_state->resume_done[faked_port_index] = jiffies + | 1353 | bus_state->resume_done[faked_port_index] = jiffies + |
@@ -1344,6 +1358,10 @@ static void handle_port_status(struct xhci_hcd *xhci, | |||
1344 | } | 1358 | } |
1345 | } | 1359 | } |
1346 | 1360 | ||
1361 | if (hcd->speed != HCD_USB3) | ||
1362 | xhci_test_and_clear_bit(xhci, port_array, faked_port_index, | ||
1363 | PORT_PLC); | ||
1364 | |||
1347 | cleanup: | 1365 | cleanup: |
1348 | /* Update event ring dequeue pointer before dropping the lock */ | 1366 | /* Update event ring dequeue pointer before dropping the lock */ |
1349 | inc_deq(xhci, xhci->event_ring, true); | 1367 | inc_deq(xhci, xhci->event_ring, true); |
@@ -1458,7 +1476,8 @@ static int xhci_requires_manual_halt_cleanup(struct xhci_hcd *xhci, | |||
1458 | * endpoint anyway. Check if a babble halted the | 1476 | * endpoint anyway. Check if a babble halted the |
1459 | * endpoint. | 1477 | * endpoint. |
1460 | */ | 1478 | */ |
1461 | if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) == EP_STATE_HALTED) | 1479 | if ((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) == |
1480 | cpu_to_le32(EP_STATE_HALTED)) | ||
1462 | return 1; | 1481 | return 1; |
1463 | 1482 | ||
1464 | return 0; | 1483 | return 0; |
@@ -1567,10 +1586,10 @@ td_cleanup: | |||
1567 | else | 1586 | else |
1568 | *status = 0; | 1587 | *status = 0; |
1569 | } | 1588 | } |
1570 | list_del(&td->td_list); | 1589 | list_del_init(&td->td_list); |
1571 | /* Was this TD slated to be cancelled but completed anyway? */ | 1590 | /* Was this TD slated to be cancelled but completed anyway? */ |
1572 | if (!list_empty(&td->cancelled_td_list)) | 1591 | if (!list_empty(&td->cancelled_td_list)) |
1573 | list_del(&td->cancelled_td_list); | 1592 | list_del_init(&td->cancelled_td_list); |
1574 | 1593 | ||
1575 | urb_priv->td_cnt++; | 1594 | urb_priv->td_cnt++; |
1576 | /* Giveback the urb when all the tds are completed */ | 1595 | /* Giveback the urb when all the tds are completed */ |
@@ -1753,10 +1772,8 @@ static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td, | |||
1753 | for (cur_trb = ep_ring->dequeue, | 1772 | for (cur_trb = ep_ring->dequeue, |
1754 | cur_seg = ep_ring->deq_seg; cur_trb != event_trb; | 1773 | cur_seg = ep_ring->deq_seg; cur_trb != event_trb; |
1755 | next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) { | 1774 | next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) { |
1756 | if ((le32_to_cpu(cur_trb->generic.field[3]) & | 1775 | if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) && |
1757 | TRB_TYPE_BITMASK) != TRB_TYPE(TRB_TR_NOOP) && | 1776 | !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3])) |
1758 | (le32_to_cpu(cur_trb->generic.field[3]) & | ||
1759 | TRB_TYPE_BITMASK) != TRB_TYPE(TRB_LINK)) | ||
1760 | len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])); | 1777 | len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])); |
1761 | } | 1778 | } |
1762 | len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) - | 1779 | len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) - |
@@ -1885,10 +1902,8 @@ static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td, | |||
1885 | for (cur_trb = ep_ring->dequeue, cur_seg = ep_ring->deq_seg; | 1902 | for (cur_trb = ep_ring->dequeue, cur_seg = ep_ring->deq_seg; |
1886 | cur_trb != event_trb; | 1903 | cur_trb != event_trb; |
1887 | next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) { | 1904 | next_trb(xhci, ep_ring, &cur_seg, &cur_trb)) { |
1888 | if ((le32_to_cpu(cur_trb->generic.field[3]) & | 1905 | if (!TRB_TYPE_NOOP_LE32(cur_trb->generic.field[3]) && |
1889 | TRB_TYPE_BITMASK) != TRB_TYPE(TRB_TR_NOOP) && | 1906 | !TRB_TYPE_LINK_LE32(cur_trb->generic.field[3])) |
1890 | (le32_to_cpu(cur_trb->generic.field[3]) & | ||
1891 | TRB_TYPE_BITMASK) != TRB_TYPE(TRB_LINK)) | ||
1892 | td->urb->actual_length += | 1907 | td->urb->actual_length += |
1893 | TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])); | 1908 | TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])); |
1894 | } | 1909 | } |
@@ -1925,8 +1940,10 @@ static int handle_tx_event(struct xhci_hcd *xhci, | |||
1925 | int status = -EINPROGRESS; | 1940 | int status = -EINPROGRESS; |
1926 | struct urb_priv *urb_priv; | 1941 | struct urb_priv *urb_priv; |
1927 | struct xhci_ep_ctx *ep_ctx; | 1942 | struct xhci_ep_ctx *ep_ctx; |
1943 | struct list_head *tmp; | ||
1928 | u32 trb_comp_code; | 1944 | u32 trb_comp_code; |
1929 | int ret = 0; | 1945 | int ret = 0; |
1946 | int td_num = 0; | ||
1930 | 1947 | ||
1931 | slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags)); | 1948 | slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags)); |
1932 | xdev = xhci->devs[slot_id]; | 1949 | xdev = xhci->devs[slot_id]; |
@@ -1948,6 +1965,12 @@ static int handle_tx_event(struct xhci_hcd *xhci, | |||
1948 | return -ENODEV; | 1965 | return -ENODEV; |
1949 | } | 1966 | } |
1950 | 1967 | ||
1968 | /* Count current td numbers if ep->skip is set */ | ||
1969 | if (ep->skip) { | ||
1970 | list_for_each(tmp, &ep_ring->td_list) | ||
1971 | td_num++; | ||
1972 | } | ||
1973 | |||
1951 | event_dma = le64_to_cpu(event->buffer); | 1974 | event_dma = le64_to_cpu(event->buffer); |
1952 | trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); | 1975 | trb_comp_code = GET_COMP_CODE(le32_to_cpu(event->transfer_len)); |
1953 | /* Look for common error cases */ | 1976 | /* Look for common error cases */ |
@@ -2047,8 +2070,8 @@ static int handle_tx_event(struct xhci_hcd *xhci, | |||
2047 | TRB_TO_SLOT_ID(le32_to_cpu(event->flags)), | 2070 | TRB_TO_SLOT_ID(le32_to_cpu(event->flags)), |
2048 | ep_index); | 2071 | ep_index); |
2049 | xhci_dbg(xhci, "Event TRB with TRB type ID %u\n", | 2072 | xhci_dbg(xhci, "Event TRB with TRB type ID %u\n", |
2050 | (unsigned int) (le32_to_cpu(event->flags) | 2073 | (le32_to_cpu(event->flags) & |
2051 | & TRB_TYPE_BITMASK)>>10); | 2074 | TRB_TYPE_BITMASK)>>10); |
2052 | xhci_print_trb_offsets(xhci, (union xhci_trb *) event); | 2075 | xhci_print_trb_offsets(xhci, (union xhci_trb *) event); |
2053 | if (ep->skip) { | 2076 | if (ep->skip) { |
2054 | ep->skip = false; | 2077 | ep->skip = false; |
@@ -2059,7 +2082,18 @@ static int handle_tx_event(struct xhci_hcd *xhci, | |||
2059 | goto cleanup; | 2082 | goto cleanup; |
2060 | } | 2083 | } |
2061 | 2084 | ||
2085 | /* We've skipped all the TDs on the ep ring when ep->skip set */ | ||
2086 | if (ep->skip && td_num == 0) { | ||
2087 | ep->skip = false; | ||
2088 | xhci_dbg(xhci, "All tds on the ep_ring skipped. " | ||
2089 | "Clear skip flag.\n"); | ||
2090 | ret = 0; | ||
2091 | goto cleanup; | ||
2092 | } | ||
2093 | |||
2062 | td = list_entry(ep_ring->td_list.next, struct xhci_td, td_list); | 2094 | td = list_entry(ep_ring->td_list.next, struct xhci_td, td_list); |
2095 | if (ep->skip) | ||
2096 | td_num--; | ||
2063 | 2097 | ||
2064 | /* Is this a TRB in the currently executing TD? */ | 2098 | /* Is this a TRB in the currently executing TD? */ |
2065 | event_seg = trb_in_td(ep_ring->deq_seg, ep_ring->dequeue, | 2099 | event_seg = trb_in_td(ep_ring->deq_seg, ep_ring->dequeue, |
@@ -2119,9 +2153,7 @@ static int handle_tx_event(struct xhci_hcd *xhci, | |||
2119 | * corresponding TD has been cancelled. Just ignore | 2153 | * corresponding TD has been cancelled. Just ignore |
2120 | * the TD. | 2154 | * the TD. |
2121 | */ | 2155 | */ |
2122 | if ((le32_to_cpu(event_trb->generic.field[3]) | 2156 | if (TRB_TYPE_NOOP_LE32(event_trb->generic.field[3])) { |
2123 | & TRB_TYPE_BITMASK) | ||
2124 | == TRB_TYPE(TRB_TR_NOOP)) { | ||
2125 | xhci_dbg(xhci, | 2157 | xhci_dbg(xhci, |
2126 | "event_trb is a no-op TRB. Skip it\n"); | 2158 | "event_trb is a no-op TRB. Skip it\n"); |
2127 | goto cleanup; | 2159 | goto cleanup; |
@@ -2383,7 +2415,7 @@ irqreturn_t xhci_msi_irq(int irq, struct usb_hcd *hcd) | |||
2383 | * prepare_transfer()? | 2415 | * prepare_transfer()? |
2384 | */ | 2416 | */ |
2385 | static void queue_trb(struct xhci_hcd *xhci, struct xhci_ring *ring, | 2417 | static void queue_trb(struct xhci_hcd *xhci, struct xhci_ring *ring, |
2386 | bool consumer, bool more_trbs_coming, | 2418 | bool consumer, bool more_trbs_coming, bool isoc, |
2387 | u32 field1, u32 field2, u32 field3, u32 field4) | 2419 | u32 field1, u32 field2, u32 field3, u32 field4) |
2388 | { | 2420 | { |
2389 | struct xhci_generic_trb *trb; | 2421 | struct xhci_generic_trb *trb; |
@@ -2393,7 +2425,7 @@ static void queue_trb(struct xhci_hcd *xhci, struct xhci_ring *ring, | |||
2393 | trb->field[1] = cpu_to_le32(field2); | 2425 | trb->field[1] = cpu_to_le32(field2); |
2394 | trb->field[2] = cpu_to_le32(field3); | 2426 | trb->field[2] = cpu_to_le32(field3); |
2395 | trb->field[3] = cpu_to_le32(field4); | 2427 | trb->field[3] = cpu_to_le32(field4); |
2396 | inc_enq(xhci, ring, consumer, more_trbs_coming); | 2428 | inc_enq(xhci, ring, consumer, more_trbs_coming, isoc); |
2397 | } | 2429 | } |
2398 | 2430 | ||
2399 | /* | 2431 | /* |
@@ -2401,7 +2433,7 @@ static void queue_trb(struct xhci_hcd *xhci, struct xhci_ring *ring, | |||
2401 | * FIXME allocate segments if the ring is full. | 2433 | * FIXME allocate segments if the ring is full. |
2402 | */ | 2434 | */ |
2403 | static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring, | 2435 | static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring, |
2404 | u32 ep_state, unsigned int num_trbs, gfp_t mem_flags) | 2436 | u32 ep_state, unsigned int num_trbs, bool isoc, gfp_t mem_flags) |
2405 | { | 2437 | { |
2406 | /* Make sure the endpoint has been added to xHC schedule */ | 2438 | /* Make sure the endpoint has been added to xHC schedule */ |
2407 | switch (ep_state) { | 2439 | switch (ep_state) { |
@@ -2443,16 +2475,17 @@ static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring, | |||
2443 | next = ring->enqueue; | 2475 | next = ring->enqueue; |
2444 | 2476 | ||
2445 | while (last_trb(xhci, ring, ring->enq_seg, next)) { | 2477 | while (last_trb(xhci, ring, ring->enq_seg, next)) { |
2446 | /* If we're not dealing with 0.95 hardware, | 2478 | /* If we're not dealing with 0.95 hardware or isoc rings |
2447 | * clear the chain bit. | 2479 | * on AMD 0.96 host, clear the chain bit. |
2448 | */ | 2480 | */ |
2449 | if (!xhci_link_trb_quirk(xhci)) | 2481 | if (!xhci_link_trb_quirk(xhci) && !(isoc && |
2482 | (xhci->quirks & XHCI_AMD_0x96_HOST))) | ||
2450 | next->link.control &= cpu_to_le32(~TRB_CHAIN); | 2483 | next->link.control &= cpu_to_le32(~TRB_CHAIN); |
2451 | else | 2484 | else |
2452 | next->link.control |= cpu_to_le32(TRB_CHAIN); | 2485 | next->link.control |= cpu_to_le32(TRB_CHAIN); |
2453 | 2486 | ||
2454 | wmb(); | 2487 | wmb(); |
2455 | next->link.control ^= cpu_to_le32((u32) TRB_CYCLE); | 2488 | next->link.control ^= cpu_to_le32(TRB_CYCLE); |
2456 | 2489 | ||
2457 | /* Toggle the cycle bit after the last ring segment. */ | 2490 | /* Toggle the cycle bit after the last ring segment. */ |
2458 | if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) { | 2491 | if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) { |
@@ -2479,6 +2512,7 @@ static int prepare_transfer(struct xhci_hcd *xhci, | |||
2479 | unsigned int num_trbs, | 2512 | unsigned int num_trbs, |
2480 | struct urb *urb, | 2513 | struct urb *urb, |
2481 | unsigned int td_index, | 2514 | unsigned int td_index, |
2515 | bool isoc, | ||
2482 | gfp_t mem_flags) | 2516 | gfp_t mem_flags) |
2483 | { | 2517 | { |
2484 | int ret; | 2518 | int ret; |
@@ -2496,7 +2530,7 @@ static int prepare_transfer(struct xhci_hcd *xhci, | |||
2496 | 2530 | ||
2497 | ret = prepare_ring(xhci, ep_ring, | 2531 | ret = prepare_ring(xhci, ep_ring, |
2498 | le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK, | 2532 | le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK, |
2499 | num_trbs, mem_flags); | 2533 | num_trbs, isoc, mem_flags); |
2500 | if (ret) | 2534 | if (ret) |
2501 | return ret; | 2535 | return ret; |
2502 | 2536 | ||
@@ -2508,11 +2542,8 @@ static int prepare_transfer(struct xhci_hcd *xhci, | |||
2508 | 2542 | ||
2509 | if (td_index == 0) { | 2543 | if (td_index == 0) { |
2510 | ret = usb_hcd_link_urb_to_ep(bus_to_hcd(urb->dev->bus), urb); | 2544 | ret = usb_hcd_link_urb_to_ep(bus_to_hcd(urb->dev->bus), urb); |
2511 | if (unlikely(ret)) { | 2545 | if (unlikely(ret)) |
2512 | xhci_urb_free_priv(xhci, urb_priv); | ||
2513 | urb->hcpriv = NULL; | ||
2514 | return ret; | 2546 | return ret; |
2515 | } | ||
2516 | } | 2547 | } |
2517 | 2548 | ||
2518 | td->urb = urb; | 2549 | td->urb = urb; |
@@ -2532,7 +2563,7 @@ static unsigned int count_sg_trbs_needed(struct xhci_hcd *xhci, struct urb *urb) | |||
2532 | struct scatterlist *sg; | 2563 | struct scatterlist *sg; |
2533 | 2564 | ||
2534 | sg = NULL; | 2565 | sg = NULL; |
2535 | num_sgs = urb->num_sgs; | 2566 | num_sgs = urb->num_mapped_sgs; |
2536 | temp = urb->transfer_buffer_length; | 2567 | temp = urb->transfer_buffer_length; |
2537 | 2568 | ||
2538 | xhci_dbg(xhci, "count sg list trbs: \n"); | 2569 | xhci_dbg(xhci, "count sg list trbs: \n"); |
@@ -2680,6 +2711,10 @@ static u32 xhci_v1_0_td_remainder(int running_total, int trb_buff_len, | |||
2680 | { | 2711 | { |
2681 | int packets_transferred; | 2712 | int packets_transferred; |
2682 | 2713 | ||
2714 | /* One TRB with a zero-length data packet. */ | ||
2715 | if (running_total == 0 && trb_buff_len == 0) | ||
2716 | return 0; | ||
2717 | |||
2683 | /* All the TRB queueing functions don't count the current TRB in | 2718 | /* All the TRB queueing functions don't count the current TRB in |
2684 | * running_total. | 2719 | * running_total. |
2685 | */ | 2720 | */ |
@@ -2712,13 +2747,13 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2712 | return -EINVAL; | 2747 | return -EINVAL; |
2713 | 2748 | ||
2714 | num_trbs = count_sg_trbs_needed(xhci, urb); | 2749 | num_trbs = count_sg_trbs_needed(xhci, urb); |
2715 | num_sgs = urb->num_sgs; | 2750 | num_sgs = urb->num_mapped_sgs; |
2716 | total_packet_count = roundup(urb->transfer_buffer_length, | 2751 | total_packet_count = roundup(urb->transfer_buffer_length, |
2717 | le16_to_cpu(urb->ep->desc.wMaxPacketSize)); | 2752 | le16_to_cpu(urb->ep->desc.wMaxPacketSize)); |
2718 | 2753 | ||
2719 | trb_buff_len = prepare_transfer(xhci, xhci->devs[slot_id], | 2754 | trb_buff_len = prepare_transfer(xhci, xhci->devs[slot_id], |
2720 | ep_index, urb->stream_id, | 2755 | ep_index, urb->stream_id, |
2721 | num_trbs, urb, 0, mem_flags); | 2756 | num_trbs, urb, 0, false, mem_flags); |
2722 | if (trb_buff_len < 0) | 2757 | if (trb_buff_len < 0) |
2723 | return trb_buff_len; | 2758 | return trb_buff_len; |
2724 | 2759 | ||
@@ -2813,7 +2848,7 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2813 | more_trbs_coming = true; | 2848 | more_trbs_coming = true; |
2814 | else | 2849 | else |
2815 | more_trbs_coming = false; | 2850 | more_trbs_coming = false; |
2816 | queue_trb(xhci, ep_ring, false, more_trbs_coming, | 2851 | queue_trb(xhci, ep_ring, false, more_trbs_coming, false, |
2817 | lower_32_bits(addr), | 2852 | lower_32_bits(addr), |
2818 | upper_32_bits(addr), | 2853 | upper_32_bits(addr), |
2819 | length_field, | 2854 | length_field, |
@@ -2904,7 +2939,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2904 | 2939 | ||
2905 | ret = prepare_transfer(xhci, xhci->devs[slot_id], | 2940 | ret = prepare_transfer(xhci, xhci->devs[slot_id], |
2906 | ep_index, urb->stream_id, | 2941 | ep_index, urb->stream_id, |
2907 | num_trbs, urb, 0, mem_flags); | 2942 | num_trbs, urb, 0, false, mem_flags); |
2908 | if (ret < 0) | 2943 | if (ret < 0) |
2909 | return ret; | 2944 | return ret; |
2910 | 2945 | ||
@@ -2976,7 +3011,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2976 | more_trbs_coming = true; | 3011 | more_trbs_coming = true; |
2977 | else | 3012 | else |
2978 | more_trbs_coming = false; | 3013 | more_trbs_coming = false; |
2979 | queue_trb(xhci, ep_ring, false, more_trbs_coming, | 3014 | queue_trb(xhci, ep_ring, false, more_trbs_coming, false, |
2980 | lower_32_bits(addr), | 3015 | lower_32_bits(addr), |
2981 | upper_32_bits(addr), | 3016 | upper_32_bits(addr), |
2982 | length_field, | 3017 | length_field, |
@@ -3036,7 +3071,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
3036 | num_trbs++; | 3071 | num_trbs++; |
3037 | ret = prepare_transfer(xhci, xhci->devs[slot_id], | 3072 | ret = prepare_transfer(xhci, xhci->devs[slot_id], |
3038 | ep_index, urb->stream_id, | 3073 | ep_index, urb->stream_id, |
3039 | num_trbs, urb, 0, mem_flags); | 3074 | num_trbs, urb, 0, false, mem_flags); |
3040 | if (ret < 0) | 3075 | if (ret < 0) |
3041 | return ret; | 3076 | return ret; |
3042 | 3077 | ||
@@ -3069,7 +3104,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
3069 | } | 3104 | } |
3070 | } | 3105 | } |
3071 | 3106 | ||
3072 | queue_trb(xhci, ep_ring, false, true, | 3107 | queue_trb(xhci, ep_ring, false, true, false, |
3073 | setup->bRequestType | setup->bRequest << 8 | le16_to_cpu(setup->wValue) << 16, | 3108 | setup->bRequestType | setup->bRequest << 8 | le16_to_cpu(setup->wValue) << 16, |
3074 | le16_to_cpu(setup->wIndex) | le16_to_cpu(setup->wLength) << 16, | 3109 | le16_to_cpu(setup->wIndex) | le16_to_cpu(setup->wLength) << 16, |
3075 | TRB_LEN(8) | TRB_INTR_TARGET(0), | 3110 | TRB_LEN(8) | TRB_INTR_TARGET(0), |
@@ -3089,7 +3124,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
3089 | if (urb->transfer_buffer_length > 0) { | 3124 | if (urb->transfer_buffer_length > 0) { |
3090 | if (setup->bRequestType & USB_DIR_IN) | 3125 | if (setup->bRequestType & USB_DIR_IN) |
3091 | field |= TRB_DIR_IN; | 3126 | field |= TRB_DIR_IN; |
3092 | queue_trb(xhci, ep_ring, false, true, | 3127 | queue_trb(xhci, ep_ring, false, true, false, |
3093 | lower_32_bits(urb->transfer_dma), | 3128 | lower_32_bits(urb->transfer_dma), |
3094 | upper_32_bits(urb->transfer_dma), | 3129 | upper_32_bits(urb->transfer_dma), |
3095 | length_field, | 3130 | length_field, |
@@ -3105,7 +3140,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
3105 | field = 0; | 3140 | field = 0; |
3106 | else | 3141 | else |
3107 | field = TRB_DIR_IN; | 3142 | field = TRB_DIR_IN; |
3108 | queue_trb(xhci, ep_ring, false, false, | 3143 | queue_trb(xhci, ep_ring, false, false, false, |
3109 | 0, | 3144 | 0, |
3110 | 0, | 3145 | 0, |
3111 | TRB_INTR_TARGET(0), | 3146 | TRB_INTR_TARGET(0), |
@@ -3121,21 +3156,16 @@ static int count_isoc_trbs_needed(struct xhci_hcd *xhci, | |||
3121 | struct urb *urb, int i) | 3156 | struct urb *urb, int i) |
3122 | { | 3157 | { |
3123 | int num_trbs = 0; | 3158 | int num_trbs = 0; |
3124 | u64 addr, td_len, running_total; | 3159 | u64 addr, td_len; |
3125 | 3160 | ||
3126 | addr = (u64) (urb->transfer_dma + urb->iso_frame_desc[i].offset); | 3161 | addr = (u64) (urb->transfer_dma + urb->iso_frame_desc[i].offset); |
3127 | td_len = urb->iso_frame_desc[i].length; | 3162 | td_len = urb->iso_frame_desc[i].length; |
3128 | 3163 | ||
3129 | running_total = TRB_MAX_BUFF_SIZE - (addr & (TRB_MAX_BUFF_SIZE - 1)); | 3164 | num_trbs = DIV_ROUND_UP(td_len + (addr & (TRB_MAX_BUFF_SIZE - 1)), |
3130 | running_total &= TRB_MAX_BUFF_SIZE - 1; | 3165 | TRB_MAX_BUFF_SIZE); |
3131 | if (running_total != 0) | 3166 | if (num_trbs == 0) |
3132 | num_trbs++; | 3167 | num_trbs++; |
3133 | 3168 | ||
3134 | while (running_total < td_len) { | ||
3135 | num_trbs++; | ||
3136 | running_total += TRB_MAX_BUFF_SIZE; | ||
3137 | } | ||
3138 | |||
3139 | return num_trbs; | 3169 | return num_trbs; |
3140 | } | 3170 | } |
3141 | 3171 | ||
@@ -3234,6 +3264,7 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
3234 | start_trb = &ep_ring->enqueue->generic; | 3264 | start_trb = &ep_ring->enqueue->generic; |
3235 | start_cycle = ep_ring->cycle_state; | 3265 | start_cycle = ep_ring->cycle_state; |
3236 | 3266 | ||
3267 | urb_priv = urb->hcpriv; | ||
3237 | /* Queue the first TRB, even if it's zero-length */ | 3268 | /* Queue the first TRB, even if it's zero-length */ |
3238 | for (i = 0; i < num_tds; i++) { | 3269 | for (i = 0; i < num_tds; i++) { |
3239 | unsigned int total_packet_count; | 3270 | unsigned int total_packet_count; |
@@ -3245,9 +3276,11 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
3245 | addr = start_addr + urb->iso_frame_desc[i].offset; | 3276 | addr = start_addr + urb->iso_frame_desc[i].offset; |
3246 | td_len = urb->iso_frame_desc[i].length; | 3277 | td_len = urb->iso_frame_desc[i].length; |
3247 | td_remain_len = td_len; | 3278 | td_remain_len = td_len; |
3248 | /* FIXME: Ignoring zero-length packets, can those happen? */ | ||
3249 | total_packet_count = roundup(td_len, | 3279 | total_packet_count = roundup(td_len, |
3250 | le16_to_cpu(urb->ep->desc.wMaxPacketSize)); | 3280 | le16_to_cpu(urb->ep->desc.wMaxPacketSize)); |
3281 | /* A zero-length transfer still involves at least one packet. */ | ||
3282 | if (total_packet_count == 0) | ||
3283 | total_packet_count++; | ||
3251 | burst_count = xhci_get_burst_count(xhci, urb->dev, urb, | 3284 | burst_count = xhci_get_burst_count(xhci, urb->dev, urb, |
3252 | total_packet_count); | 3285 | total_packet_count); |
3253 | residue = xhci_get_last_burst_packet_count(xhci, | 3286 | residue = xhci_get_last_burst_packet_count(xhci, |
@@ -3256,13 +3289,15 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
3256 | trbs_per_td = count_isoc_trbs_needed(xhci, urb, i); | 3289 | trbs_per_td = count_isoc_trbs_needed(xhci, urb, i); |
3257 | 3290 | ||
3258 | ret = prepare_transfer(xhci, xhci->devs[slot_id], ep_index, | 3291 | ret = prepare_transfer(xhci, xhci->devs[slot_id], ep_index, |
3259 | urb->stream_id, trbs_per_td, urb, i, mem_flags); | 3292 | urb->stream_id, trbs_per_td, urb, i, true, |
3260 | if (ret < 0) | 3293 | mem_flags); |
3261 | return ret; | 3294 | if (ret < 0) { |
3295 | if (i == 0) | ||
3296 | return ret; | ||
3297 | goto cleanup; | ||
3298 | } | ||
3262 | 3299 | ||
3263 | urb_priv = urb->hcpriv; | ||
3264 | td = urb_priv->td[i]; | 3300 | td = urb_priv->td[i]; |
3265 | |||
3266 | for (j = 0; j < trbs_per_td; j++) { | 3301 | for (j = 0; j < trbs_per_td; j++) { |
3267 | u32 remainder = 0; | 3302 | u32 remainder = 0; |
3268 | field = TRB_TBC(burst_count) | TRB_TLBPC(residue); | 3303 | field = TRB_TBC(burst_count) | TRB_TLBPC(residue); |
@@ -3325,7 +3360,7 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
3325 | remainder | | 3360 | remainder | |
3326 | TRB_INTR_TARGET(0); | 3361 | TRB_INTR_TARGET(0); |
3327 | 3362 | ||
3328 | queue_trb(xhci, ep_ring, false, more_trbs_coming, | 3363 | queue_trb(xhci, ep_ring, false, more_trbs_coming, true, |
3329 | lower_32_bits(addr), | 3364 | lower_32_bits(addr), |
3330 | upper_32_bits(addr), | 3365 | upper_32_bits(addr), |
3331 | length_field, | 3366 | length_field, |
@@ -3339,7 +3374,8 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
3339 | /* Check TD length */ | 3374 | /* Check TD length */ |
3340 | if (running_total != td_len) { | 3375 | if (running_total != td_len) { |
3341 | xhci_err(xhci, "ISOC TD length unmatch\n"); | 3376 | xhci_err(xhci, "ISOC TD length unmatch\n"); |
3342 | return -EINVAL; | 3377 | ret = -EINVAL; |
3378 | goto cleanup; | ||
3343 | } | 3379 | } |
3344 | } | 3380 | } |
3345 | 3381 | ||
@@ -3352,6 +3388,27 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
3352 | giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id, | 3388 | giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id, |
3353 | start_cycle, start_trb); | 3389 | start_cycle, start_trb); |
3354 | return 0; | 3390 | return 0; |
3391 | cleanup: | ||
3392 | /* Clean up a partially enqueued isoc transfer. */ | ||
3393 | |||
3394 | for (i--; i >= 0; i--) | ||
3395 | list_del_init(&urb_priv->td[i]->td_list); | ||
3396 | |||
3397 | /* Use the first TD as a temporary variable to turn the TDs we've queued | ||
3398 | * into No-ops with a software-owned cycle bit. That way the hardware | ||
3399 | * won't accidentally start executing bogus TDs when we partially | ||
3400 | * overwrite them. td->first_trb and td->start_seg are already set. | ||
3401 | */ | ||
3402 | urb_priv->td[0]->last_trb = ep_ring->enqueue; | ||
3403 | /* Every TRB except the first & last will have its cycle bit flipped. */ | ||
3404 | td_to_noop(xhci, ep_ring, urb_priv->td[0], true); | ||
3405 | |||
3406 | /* Reset the ring enqueue back to the first TRB and its cycle bit. */ | ||
3407 | ep_ring->enqueue = urb_priv->td[0]->first_trb; | ||
3408 | ep_ring->enq_seg = urb_priv->td[0]->start_seg; | ||
3409 | ep_ring->cycle_state = start_cycle; | ||
3410 | usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb->dev->bus), urb); | ||
3411 | return ret; | ||
3355 | } | 3412 | } |
3356 | 3413 | ||
3357 | /* | 3414 | /* |
@@ -3386,7 +3443,7 @@ int xhci_queue_isoc_tx_prepare(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
3386 | * Do not insert any td of the urb to the ring if the check failed. | 3443 | * Do not insert any td of the urb to the ring if the check failed. |
3387 | */ | 3444 | */ |
3388 | ret = prepare_ring(xhci, ep_ring, le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK, | 3445 | ret = prepare_ring(xhci, ep_ring, le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK, |
3389 | num_trbs, mem_flags); | 3446 | num_trbs, true, mem_flags); |
3390 | if (ret) | 3447 | if (ret) |
3391 | return ret; | 3448 | return ret; |
3392 | 3449 | ||
@@ -3445,7 +3502,7 @@ static int queue_command(struct xhci_hcd *xhci, u32 field1, u32 field2, | |||
3445 | reserved_trbs++; | 3502 | reserved_trbs++; |
3446 | 3503 | ||
3447 | ret = prepare_ring(xhci, xhci->cmd_ring, EP_STATE_RUNNING, | 3504 | ret = prepare_ring(xhci, xhci->cmd_ring, EP_STATE_RUNNING, |
3448 | reserved_trbs, GFP_ATOMIC); | 3505 | reserved_trbs, false, GFP_ATOMIC); |
3449 | if (ret < 0) { | 3506 | if (ret < 0) { |
3450 | xhci_err(xhci, "ERR: No room for command on command ring\n"); | 3507 | xhci_err(xhci, "ERR: No room for command on command ring\n"); |
3451 | if (command_must_succeed) | 3508 | if (command_must_succeed) |
@@ -3453,8 +3510,8 @@ static int queue_command(struct xhci_hcd *xhci, u32 field1, u32 field2, | |||
3453 | "unfailable commands failed.\n"); | 3510 | "unfailable commands failed.\n"); |
3454 | return ret; | 3511 | return ret; |
3455 | } | 3512 | } |
3456 | queue_trb(xhci, xhci->cmd_ring, false, false, field1, field2, field3, | 3513 | queue_trb(xhci, xhci->cmd_ring, false, false, false, field1, field2, |
3457 | field4 | xhci->cmd_ring->cycle_state); | 3514 | field3, field4 | xhci->cmd_ring->cycle_state); |
3458 | return 0; | 3515 | return 0; |
3459 | } | 3516 | } |
3460 | 3517 | ||
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index f5fe1ac301a..5fc595f01b3 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c | |||
@@ -345,7 +345,8 @@ static void xhci_event_ring_work(unsigned long arg) | |||
345 | spin_lock_irqsave(&xhci->lock, flags); | 345 | spin_lock_irqsave(&xhci->lock, flags); |
346 | temp = xhci_readl(xhci, &xhci->op_regs->status); | 346 | temp = xhci_readl(xhci, &xhci->op_regs->status); |
347 | xhci_dbg(xhci, "op reg status = 0x%x\n", temp); | 347 | xhci_dbg(xhci, "op reg status = 0x%x\n", temp); |
348 | if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) { | 348 | if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) || |
349 | (xhci->xhc_state & XHCI_STATE_HALTED)) { | ||
349 | xhci_dbg(xhci, "HW died, polling stopped.\n"); | 350 | xhci_dbg(xhci, "HW died, polling stopped.\n"); |
350 | spin_unlock_irqrestore(&xhci->lock, flags); | 351 | spin_unlock_irqrestore(&xhci->lock, flags); |
351 | return; | 352 | return; |
@@ -656,7 +657,10 @@ static void xhci_clear_command_ring(struct xhci_hcd *xhci) | |||
656 | ring = xhci->cmd_ring; | 657 | ring = xhci->cmd_ring; |
657 | seg = ring->deq_seg; | 658 | seg = ring->deq_seg; |
658 | do { | 659 | do { |
659 | memset(seg->trbs, 0, SEGMENT_SIZE); | 660 | memset(seg->trbs, 0, |
661 | sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1)); | ||
662 | seg->trbs[TRBS_PER_SEGMENT - 1].link.control &= | ||
663 | cpu_to_le32(~TRB_CYCLE); | ||
660 | seg = seg->next; | 664 | seg = seg->next; |
661 | } while (seg != ring->deq_seg); | 665 | } while (seg != ring->deq_seg); |
662 | 666 | ||
@@ -748,7 +752,7 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated) | |||
748 | u32 command, temp = 0; | 752 | u32 command, temp = 0; |
749 | struct usb_hcd *hcd = xhci_to_hcd(xhci); | 753 | struct usb_hcd *hcd = xhci_to_hcd(xhci); |
750 | struct usb_hcd *secondary_hcd; | 754 | struct usb_hcd *secondary_hcd; |
751 | int retval; | 755 | int retval = 0; |
752 | 756 | ||
753 | /* Wait a bit if either of the roothubs need to settle from the | 757 | /* Wait a bit if either of the roothubs need to settle from the |
754 | * transition into bus suspend. | 758 | * transition into bus suspend. |
@@ -758,6 +762,9 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated) | |||
758 | xhci->bus_state[1].next_statechange)) | 762 | xhci->bus_state[1].next_statechange)) |
759 | msleep(100); | 763 | msleep(100); |
760 | 764 | ||
765 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | ||
766 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags); | ||
767 | |||
761 | spin_lock_irq(&xhci->lock); | 768 | spin_lock_irq(&xhci->lock); |
762 | if (xhci->quirks & XHCI_RESET_ON_RESUME) | 769 | if (xhci->quirks & XHCI_RESET_ON_RESUME) |
763 | hibernated = true; | 770 | hibernated = true; |
@@ -827,20 +834,13 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated) | |||
827 | return retval; | 834 | return retval; |
828 | xhci_dbg(xhci, "Start the primary HCD\n"); | 835 | xhci_dbg(xhci, "Start the primary HCD\n"); |
829 | retval = xhci_run(hcd->primary_hcd); | 836 | retval = xhci_run(hcd->primary_hcd); |
830 | if (retval) | ||
831 | goto failed_restart; | ||
832 | |||
833 | xhci_dbg(xhci, "Start the secondary HCD\n"); | ||
834 | retval = xhci_run(secondary_hcd); | ||
835 | if (!retval) { | 837 | if (!retval) { |
836 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | 838 | xhci_dbg(xhci, "Start the secondary HCD\n"); |
837 | set_bit(HCD_FLAG_HW_ACCESSIBLE, | 839 | retval = xhci_run(secondary_hcd); |
838 | &xhci->shared_hcd->flags); | ||
839 | } | 840 | } |
840 | failed_restart: | ||
841 | hcd->state = HC_STATE_SUSPENDED; | 841 | hcd->state = HC_STATE_SUSPENDED; |
842 | xhci->shared_hcd->state = HC_STATE_SUSPENDED; | 842 | xhci->shared_hcd->state = HC_STATE_SUSPENDED; |
843 | return retval; | 843 | goto done; |
844 | } | 844 | } |
845 | 845 | ||
846 | /* step 4: set Run/Stop bit */ | 846 | /* step 4: set Run/Stop bit */ |
@@ -859,11 +859,14 @@ failed_restart: | |||
859 | * Running endpoints by ringing their doorbells | 859 | * Running endpoints by ringing their doorbells |
860 | */ | 860 | */ |
861 | 861 | ||
862 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); | ||
863 | set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags); | ||
864 | |||
865 | spin_unlock_irq(&xhci->lock); | 862 | spin_unlock_irq(&xhci->lock); |
866 | return 0; | 863 | |
864 | done: | ||
865 | if (retval == 0) { | ||
866 | usb_hcd_resume_root_hub(hcd); | ||
867 | usb_hcd_resume_root_hub(xhci->shared_hcd); | ||
868 | } | ||
869 | return retval; | ||
867 | } | 870 | } |
868 | #endif /* CONFIG_PM */ | 871 | #endif /* CONFIG_PM */ |
869 | 872 | ||
@@ -939,8 +942,11 @@ static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev, | |||
939 | return 0; | 942 | return 0; |
940 | } | 943 | } |
941 | 944 | ||
945 | xhci = hcd_to_xhci(hcd); | ||
946 | if (xhci->xhc_state & XHCI_STATE_HALTED) | ||
947 | return -ENODEV; | ||
948 | |||
942 | if (check_virt_dev) { | 949 | if (check_virt_dev) { |
943 | xhci = hcd_to_xhci(hcd); | ||
944 | if (!udev->slot_id || !xhci->devs | 950 | if (!udev->slot_id || !xhci->devs |
945 | || !xhci->devs[udev->slot_id]) { | 951 | || !xhci->devs[udev->slot_id]) { |
946 | printk(KERN_DEBUG "xHCI %s called with unaddressed " | 952 | printk(KERN_DEBUG "xHCI %s called with unaddressed " |
@@ -1081,8 +1087,11 @@ int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags) | |||
1081 | if (urb->dev->speed == USB_SPEED_FULL) { | 1087 | if (urb->dev->speed == USB_SPEED_FULL) { |
1082 | ret = xhci_check_maxpacket(xhci, slot_id, | 1088 | ret = xhci_check_maxpacket(xhci, slot_id, |
1083 | ep_index, urb); | 1089 | ep_index, urb); |
1084 | if (ret < 0) | 1090 | if (ret < 0) { |
1091 | xhci_urb_free_priv(xhci, urb_priv); | ||
1092 | urb->hcpriv = NULL; | ||
1085 | return ret; | 1093 | return ret; |
1094 | } | ||
1086 | } | 1095 | } |
1087 | 1096 | ||
1088 | /* We have a spinlock and interrupts disabled, so we must pass | 1097 | /* We have a spinlock and interrupts disabled, so we must pass |
@@ -1093,6 +1102,8 @@ int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags) | |||
1093 | goto dying; | 1102 | goto dying; |
1094 | ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb, | 1103 | ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb, |
1095 | slot_id, ep_index); | 1104 | slot_id, ep_index); |
1105 | if (ret) | ||
1106 | goto free_priv; | ||
1096 | spin_unlock_irqrestore(&xhci->lock, flags); | 1107 | spin_unlock_irqrestore(&xhci->lock, flags); |
1097 | } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) { | 1108 | } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) { |
1098 | spin_lock_irqsave(&xhci->lock, flags); | 1109 | spin_lock_irqsave(&xhci->lock, flags); |
@@ -1113,6 +1124,8 @@ int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags) | |||
1113 | ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb, | 1124 | ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb, |
1114 | slot_id, ep_index); | 1125 | slot_id, ep_index); |
1115 | } | 1126 | } |
1127 | if (ret) | ||
1128 | goto free_priv; | ||
1116 | spin_unlock_irqrestore(&xhci->lock, flags); | 1129 | spin_unlock_irqrestore(&xhci->lock, flags); |
1117 | } else if (usb_endpoint_xfer_int(&urb->ep->desc)) { | 1130 | } else if (usb_endpoint_xfer_int(&urb->ep->desc)) { |
1118 | spin_lock_irqsave(&xhci->lock, flags); | 1131 | spin_lock_irqsave(&xhci->lock, flags); |
@@ -1120,6 +1133,8 @@ int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags) | |||
1120 | goto dying; | 1133 | goto dying; |
1121 | ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb, | 1134 | ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb, |
1122 | slot_id, ep_index); | 1135 | slot_id, ep_index); |
1136 | if (ret) | ||
1137 | goto free_priv; | ||
1123 | spin_unlock_irqrestore(&xhci->lock, flags); | 1138 | spin_unlock_irqrestore(&xhci->lock, flags); |
1124 | } else { | 1139 | } else { |
1125 | spin_lock_irqsave(&xhci->lock, flags); | 1140 | spin_lock_irqsave(&xhci->lock, flags); |
@@ -1127,18 +1142,22 @@ int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags) | |||
1127 | goto dying; | 1142 | goto dying; |
1128 | ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb, | 1143 | ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb, |
1129 | slot_id, ep_index); | 1144 | slot_id, ep_index); |
1145 | if (ret) | ||
1146 | goto free_priv; | ||
1130 | spin_unlock_irqrestore(&xhci->lock, flags); | 1147 | spin_unlock_irqrestore(&xhci->lock, flags); |
1131 | } | 1148 | } |
1132 | exit: | 1149 | exit: |
1133 | return ret; | 1150 | return ret; |
1134 | dying: | 1151 | dying: |
1135 | xhci_urb_free_priv(xhci, urb_priv); | ||
1136 | urb->hcpriv = NULL; | ||
1137 | xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for " | 1152 | xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for " |
1138 | "non-responsive xHCI host.\n", | 1153 | "non-responsive xHCI host.\n", |
1139 | urb->ep->desc.bEndpointAddress, urb); | 1154 | urb->ep->desc.bEndpointAddress, urb); |
1155 | ret = -ESHUTDOWN; | ||
1156 | free_priv: | ||
1157 | xhci_urb_free_priv(xhci, urb_priv); | ||
1158 | urb->hcpriv = NULL; | ||
1140 | spin_unlock_irqrestore(&xhci->lock, flags); | 1159 | spin_unlock_irqrestore(&xhci->lock, flags); |
1141 | return -ESHUTDOWN; | 1160 | return ret; |
1142 | } | 1161 | } |
1143 | 1162 | ||
1144 | /* Get the right ring for the given URB. | 1163 | /* Get the right ring for the given URB. |
@@ -1235,6 +1254,13 @@ int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) | |||
1235 | if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) { | 1254 | if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) { |
1236 | xhci_dbg(xhci, "HW died, freeing TD.\n"); | 1255 | xhci_dbg(xhci, "HW died, freeing TD.\n"); |
1237 | urb_priv = urb->hcpriv; | 1256 | urb_priv = urb->hcpriv; |
1257 | for (i = urb_priv->td_cnt; i < urb_priv->length; i++) { | ||
1258 | td = urb_priv->td[i]; | ||
1259 | if (!list_empty(&td->td_list)) | ||
1260 | list_del_init(&td->td_list); | ||
1261 | if (!list_empty(&td->cancelled_td_list)) | ||
1262 | list_del_init(&td->cancelled_td_list); | ||
1263 | } | ||
1238 | 1264 | ||
1239 | usb_hcd_unlink_urb_from_ep(hcd, urb); | 1265 | usb_hcd_unlink_urb_from_ep(hcd, urb); |
1240 | spin_unlock_irqrestore(&xhci->lock, flags); | 1266 | spin_unlock_irqrestore(&xhci->lock, flags); |
@@ -1242,7 +1268,8 @@ int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) | |||
1242 | xhci_urb_free_priv(xhci, urb_priv); | 1268 | xhci_urb_free_priv(xhci, urb_priv); |
1243 | return ret; | 1269 | return ret; |
1244 | } | 1270 | } |
1245 | if (xhci->xhc_state & XHCI_STATE_DYING) { | 1271 | if ((xhci->xhc_state & XHCI_STATE_DYING) || |
1272 | (xhci->xhc_state & XHCI_STATE_HALTED)) { | ||
1246 | xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on " | 1273 | xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on " |
1247 | "non-responsive xHCI host.\n", | 1274 | "non-responsive xHCI host.\n", |
1248 | urb->ep->desc.bEndpointAddress, urb); | 1275 | urb->ep->desc.bEndpointAddress, urb); |
@@ -1342,8 +1369,8 @@ int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev, | |||
1342 | /* If the HC already knows the endpoint is disabled, | 1369 | /* If the HC already knows the endpoint is disabled, |
1343 | * or the HCD has noted it is disabled, ignore this request | 1370 | * or the HCD has noted it is disabled, ignore this request |
1344 | */ | 1371 | */ |
1345 | if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) == | 1372 | if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) == |
1346 | EP_STATE_DISABLED || | 1373 | cpu_to_le32(EP_STATE_DISABLED)) || |
1347 | le32_to_cpu(ctrl_ctx->drop_flags) & | 1374 | le32_to_cpu(ctrl_ctx->drop_flags) & |
1348 | xhci_get_endpoint_flag(&ep->desc)) { | 1375 | xhci_get_endpoint_flag(&ep->desc)) { |
1349 | xhci_warn(xhci, "xHCI %s called with disabled ep %p\n", | 1376 | xhci_warn(xhci, "xHCI %s called with disabled ep %p\n", |
@@ -1541,6 +1568,7 @@ static int xhci_configure_endpoint_result(struct xhci_hcd *xhci, | |||
1541 | /* FIXME: can we allocate more resources for the HC? */ | 1568 | /* FIXME: can we allocate more resources for the HC? */ |
1542 | break; | 1569 | break; |
1543 | case COMP_BW_ERR: | 1570 | case COMP_BW_ERR: |
1571 | case COMP_2ND_BW_ERR: | ||
1544 | dev_warn(&udev->dev, "Not enough bandwidth " | 1572 | dev_warn(&udev->dev, "Not enough bandwidth " |
1545 | "for new device state.\n"); | 1573 | "for new device state.\n"); |
1546 | ret = -ENOSPC; | 1574 | ret = -ENOSPC; |
@@ -1758,8 +1786,7 @@ static int xhci_configure_endpoint(struct xhci_hcd *xhci, | |||
1758 | /* Enqueue pointer can be left pointing to the link TRB, | 1786 | /* Enqueue pointer can be left pointing to the link TRB, |
1759 | * we must handle that | 1787 | * we must handle that |
1760 | */ | 1788 | */ |
1761 | if ((le32_to_cpu(command->command_trb->link.control) | 1789 | if (TRB_TYPE_LINK_LE32(command->command_trb->link.control)) |
1762 | & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK)) | ||
1763 | command->command_trb = | 1790 | command->command_trb = |
1764 | xhci->cmd_ring->enq_seg->next->trbs; | 1791 | xhci->cmd_ring->enq_seg->next->trbs; |
1765 | 1792 | ||
@@ -1864,6 +1891,12 @@ int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev) | |||
1864 | ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); | 1891 | ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); |
1865 | ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG); | 1892 | ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG); |
1866 | ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG)); | 1893 | ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG)); |
1894 | |||
1895 | /* Don't issue the command if there's no endpoints to update. */ | ||
1896 | if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) && | ||
1897 | ctrl_ctx->drop_flags == 0) | ||
1898 | return 0; | ||
1899 | |||
1867 | xhci_dbg(xhci, "New Input Control Context:\n"); | 1900 | xhci_dbg(xhci, "New Input Control Context:\n"); |
1868 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); | 1901 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx); |
1869 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, | 1902 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, |
@@ -2150,8 +2183,7 @@ static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci, | |||
2150 | if (ret < 0) | 2183 | if (ret < 0) |
2151 | return ret; | 2184 | return ret; |
2152 | 2185 | ||
2153 | max_streams = USB_SS_MAX_STREAMS( | 2186 | max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp); |
2154 | eps[i]->ss_ep_comp.bmAttributes); | ||
2155 | if (max_streams < (*num_streams - 1)) { | 2187 | if (max_streams < (*num_streams - 1)) { |
2156 | xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n", | 2188 | xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n", |
2157 | eps[i]->desc.bEndpointAddress, | 2189 | eps[i]->desc.bEndpointAddress, |
@@ -2559,8 +2591,7 @@ int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev) | |||
2559 | /* Enqueue pointer can be left pointing to the link TRB, | 2591 | /* Enqueue pointer can be left pointing to the link TRB, |
2560 | * we must handle that | 2592 | * we must handle that |
2561 | */ | 2593 | */ |
2562 | if ((le32_to_cpu(reset_device_cmd->command_trb->link.control) | 2594 | if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control)) |
2563 | & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK)) | ||
2564 | reset_device_cmd->command_trb = | 2595 | reset_device_cmd->command_trb = |
2565 | xhci->cmd_ring->enq_seg->next->trbs; | 2596 | xhci->cmd_ring->enq_seg->next->trbs; |
2566 | 2597 | ||
@@ -2667,7 +2698,10 @@ void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev) | |||
2667 | int i, ret; | 2698 | int i, ret; |
2668 | 2699 | ||
2669 | ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__); | 2700 | ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__); |
2670 | if (ret <= 0) | 2701 | /* If the host is halted due to driver unload, we still need to free the |
2702 | * device. | ||
2703 | */ | ||
2704 | if (ret <= 0 && ret != -ENODEV) | ||
2671 | return; | 2705 | return; |
2672 | 2706 | ||
2673 | virt_dev = xhci->devs[udev->slot_id]; | 2707 | virt_dev = xhci->devs[udev->slot_id]; |
@@ -2681,7 +2715,8 @@ void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev) | |||
2681 | spin_lock_irqsave(&xhci->lock, flags); | 2715 | spin_lock_irqsave(&xhci->lock, flags); |
2682 | /* Don't disable the slot if the host controller is dead. */ | 2716 | /* Don't disable the slot if the host controller is dead. */ |
2683 | state = xhci_readl(xhci, &xhci->op_regs->status); | 2717 | state = xhci_readl(xhci, &xhci->op_regs->status); |
2684 | if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) { | 2718 | if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) || |
2719 | (xhci->xhc_state & XHCI_STATE_HALTED)) { | ||
2685 | xhci_free_virt_device(xhci, udev->slot_id); | 2720 | xhci_free_virt_device(xhci, udev->slot_id); |
2686 | spin_unlock_irqrestore(&xhci->lock, flags); | 2721 | spin_unlock_irqrestore(&xhci->lock, flags); |
2687 | return; | 2722 | return; |
@@ -2840,6 +2875,10 @@ int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev) | |||
2840 | /* Otherwise, update the control endpoint ring enqueue pointer. */ | 2875 | /* Otherwise, update the control endpoint ring enqueue pointer. */ |
2841 | else | 2876 | else |
2842 | xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev); | 2877 | xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev); |
2878 | ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx); | ||
2879 | ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG); | ||
2880 | ctrl_ctx->drop_flags = 0; | ||
2881 | |||
2843 | xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id); | 2882 | xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id); |
2844 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2); | 2883 | xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2); |
2845 | 2884 | ||
@@ -2921,7 +2960,6 @@ int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev) | |||
2921 | virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK) | 2960 | virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK) |
2922 | + 1; | 2961 | + 1; |
2923 | /* Zero the input context control for later use */ | 2962 | /* Zero the input context control for later use */ |
2924 | ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx); | ||
2925 | ctrl_ctx->add_flags = 0; | 2963 | ctrl_ctx->add_flags = 0; |
2926 | ctrl_ctx->drop_flags = 0; | 2964 | ctrl_ctx->drop_flags = 0; |
2927 | 2965 | ||
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index d8bbf5ccb10..c149d200415 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h | |||
@@ -900,7 +900,6 @@ struct xhci_transfer_event { | |||
900 | /* Invalid Stream ID Error */ | 900 | /* Invalid Stream ID Error */ |
901 | #define COMP_STRID_ERR 34 | 901 | #define COMP_STRID_ERR 34 |
902 | /* Secondary Bandwidth Error - may be returned by a Configure Endpoint cmd */ | 902 | /* Secondary Bandwidth Error - may be returned by a Configure Endpoint cmd */ |
903 | /* FIXME - check for this */ | ||
904 | #define COMP_2ND_BW_ERR 35 | 903 | #define COMP_2ND_BW_ERR 35 |
905 | /* Split Transaction Error */ | 904 | /* Split Transaction Error */ |
906 | #define COMP_SPLIT_ERR 36 | 905 | #define COMP_SPLIT_ERR 36 |
@@ -1072,6 +1071,13 @@ union xhci_trb { | |||
1072 | /* Get NEC firmware revision. */ | 1071 | /* Get NEC firmware revision. */ |
1073 | #define TRB_NEC_GET_FW 49 | 1072 | #define TRB_NEC_GET_FW 49 |
1074 | 1073 | ||
1074 | #define TRB_TYPE_LINK(x) (((x) & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK)) | ||
1075 | /* Above, but for __le32 types -- can avoid work by swapping constants: */ | ||
1076 | #define TRB_TYPE_LINK_LE32(x) (((x) & cpu_to_le32(TRB_TYPE_BITMASK)) == \ | ||
1077 | cpu_to_le32(TRB_TYPE(TRB_LINK))) | ||
1078 | #define TRB_TYPE_NOOP_LE32(x) (((x) & cpu_to_le32(TRB_TYPE_BITMASK)) == \ | ||
1079 | cpu_to_le32(TRB_TYPE(TRB_TR_NOOP))) | ||
1080 | |||
1075 | #define NEC_FW_MINOR(p) (((p) >> 0) & 0xff) | 1081 | #define NEC_FW_MINOR(p) (((p) >> 0) & 0xff) |
1076 | #define NEC_FW_MAJOR(p) (((p) >> 8) & 0xff) | 1082 | #define NEC_FW_MAJOR(p) (((p) >> 8) & 0xff) |
1077 | 1083 | ||
@@ -1311,6 +1317,7 @@ struct xhci_hcd { | |||
1311 | #define XHCI_EP_LIMIT_QUIRK (1 << 5) | 1317 | #define XHCI_EP_LIMIT_QUIRK (1 << 5) |
1312 | #define XHCI_BROKEN_MSI (1 << 6) | 1318 | #define XHCI_BROKEN_MSI (1 << 6) |
1313 | #define XHCI_RESET_ON_RESUME (1 << 7) | 1319 | #define XHCI_RESET_ON_RESUME (1 << 7) |
1320 | #define XHCI_AMD_0x96_HOST (1 << 9) | ||
1314 | unsigned int num_active_eps; | 1321 | unsigned int num_active_eps; |
1315 | unsigned int limit_active_eps; | 1322 | unsigned int limit_active_eps; |
1316 | /* There are two roothubs to keep track of bus suspend info for */ | 1323 | /* There are two roothubs to keep track of bus suspend info for */ |
@@ -1565,6 +1572,8 @@ void xhci_ring_ep_doorbell(struct xhci_hcd *xhci, unsigned int slot_id, | |||
1565 | unsigned int ep_index, unsigned int stream_id); | 1572 | unsigned int ep_index, unsigned int stream_id); |
1566 | 1573 | ||
1567 | /* xHCI roothub code */ | 1574 | /* xHCI roothub code */ |
1575 | void xhci_test_and_clear_bit(struct xhci_hcd *xhci, __le32 __iomem **port_array, | ||
1576 | int port_id, u32 port_bit); | ||
1568 | int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, u16 wIndex, | 1577 | int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, u16 wIndex, |
1569 | char *buf, u16 wLength); | 1578 | char *buf, u16 wLength); |
1570 | int xhci_hub_status_data(struct usb_hcd *hcd, char *buf); | 1579 | int xhci_hub_status_data(struct usb_hcd *hcd, char *buf); |