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-rw-r--r--drivers/usb/c67x00/Makefile9
-rw-r--r--drivers/usb/c67x00/c67x00-drv.c243
-rw-r--r--drivers/usb/c67x00/c67x00-hcd.c412
-rw-r--r--drivers/usb/c67x00/c67x00-hcd.h133
-rw-r--r--drivers/usb/c67x00/c67x00-ll-hpi.c480
-rw-r--r--drivers/usb/c67x00/c67x00-sched.c1170
-rw-r--r--drivers/usb/c67x00/c67x00.h294
7 files changed, 2741 insertions, 0 deletions
diff --git a/drivers/usb/c67x00/Makefile b/drivers/usb/c67x00/Makefile
new file mode 100644
index 00000000000..868bc41b598
--- /dev/null
+++ b/drivers/usb/c67x00/Makefile
@@ -0,0 +1,9 @@
1#
2# Makefile for Cypress C67X00 USB Controller
3#
4
5ccflags-$(CONFIG_USB_DEBUG) += -DDEBUG
6
7obj-$(CONFIG_USB_C67X00_HCD) += c67x00.o
8
9c67x00-objs := c67x00-drv.o c67x00-ll-hpi.o c67x00-hcd.o c67x00-sched.o
diff --git a/drivers/usb/c67x00/c67x00-drv.c b/drivers/usb/c67x00/c67x00-drv.c
new file mode 100644
index 00000000000..5633bc5c8bf
--- /dev/null
+++ b/drivers/usb/c67x00/c67x00-drv.c
@@ -0,0 +1,243 @@
1/*
2 * c67x00-drv.c: Cypress C67X00 USB Common infrastructure
3 *
4 * Copyright (C) 2006-2008 Barco N.V.
5 * Derived from the Cypress cy7c67200/300 ezusb linux driver and
6 * based on multiple host controller drivers inside the linux kernel.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 * MA 02110-1301 USA.
22 */
23
24/*
25 * This file implements the common infrastructure for using the c67x00.
26 * It is both the link between the platform configuration and subdrivers and
27 * the link between the common hardware parts and the subdrivers (e.g.
28 * interrupt handling).
29 *
30 * The c67x00 has 2 SIE's (serial interface engine) wich can be configured
31 * to be host, device or OTG (with some limitations, E.G. only SIE1 can be OTG).
32 *
33 * Depending on the platform configuration, the SIE's are created and
34 * the corresponding subdriver is initialized (c67x00_probe_sie).
35 */
36
37#include <linux/device.h>
38#include <linux/io.h>
39#include <linux/list.h>
40#include <linux/usb.h>
41#include <linux/usb/c67x00.h>
42
43#include "c67x00.h"
44#include "c67x00-hcd.h"
45
46static void c67x00_probe_sie(struct c67x00_sie *sie,
47 struct c67x00_device *dev, int sie_num)
48{
49 spin_lock_init(&sie->lock);
50 sie->dev = dev;
51 sie->sie_num = sie_num;
52 sie->mode = c67x00_sie_config(dev->pdata->sie_config, sie_num);
53
54 switch (sie->mode) {
55 case C67X00_SIE_HOST:
56 c67x00_hcd_probe(sie);
57 break;
58
59 case C67X00_SIE_UNUSED:
60 dev_info(sie_dev(sie),
61 "Not using SIE %d as requested\n", sie->sie_num);
62 break;
63
64 default:
65 dev_err(sie_dev(sie),
66 "Unsupported configuration: 0x%x for SIE %d\n",
67 sie->mode, sie->sie_num);
68 break;
69 }
70}
71
72static void c67x00_remove_sie(struct c67x00_sie *sie)
73{
74 switch (sie->mode) {
75 case C67X00_SIE_HOST:
76 c67x00_hcd_remove(sie);
77 break;
78
79 default:
80 break;
81 }
82}
83
84static irqreturn_t c67x00_irq(int irq, void *__dev)
85{
86 struct c67x00_device *c67x00 = __dev;
87 struct c67x00_sie *sie;
88 u16 msg, int_status;
89 int i, count = 8;
90
91 int_status = c67x00_ll_hpi_status(c67x00);
92 if (!int_status)
93 return IRQ_NONE;
94
95 while (int_status != 0 && (count-- >= 0)) {
96 c67x00_ll_irq(c67x00, int_status);
97 for (i = 0; i < C67X00_SIES; i++) {
98 sie = &c67x00->sie[i];
99 msg = 0;
100 if (int_status & SIEMSG_FLG(i))
101 msg = c67x00_ll_fetch_siemsg(c67x00, i);
102 if (sie->irq)
103 sie->irq(sie, int_status, msg);
104 }
105 int_status = c67x00_ll_hpi_status(c67x00);
106 }
107
108 if (int_status)
109 dev_warn(&c67x00->pdev->dev, "Not all interrupts handled! "
110 "status = 0x%04x\n", int_status);
111
112 return IRQ_HANDLED;
113}
114
115/* ------------------------------------------------------------------------- */
116
117static int __devinit c67x00_drv_probe(struct platform_device *pdev)
118{
119 struct c67x00_device *c67x00;
120 struct c67x00_platform_data *pdata;
121 struct resource *res, *res2;
122 int ret, i;
123
124 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
125 if (!res)
126 return -ENODEV;
127
128 res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
129 if (!res2)
130 return -ENODEV;
131
132 pdata = pdev->dev.platform_data;
133 if (!pdata)
134 return -ENODEV;
135
136 c67x00 = kzalloc(sizeof(*c67x00), GFP_KERNEL);
137 if (!c67x00)
138 return -ENOMEM;
139
140 if (!request_mem_region(res->start, res->end - res->start + 1,
141 pdev->name)) {
142 dev_err(&pdev->dev, "Memory region busy\n");
143 ret = -EBUSY;
144 goto request_mem_failed;
145 }
146 c67x00->hpi.base = ioremap(res->start, res->end - res->start + 1);
147 if (!c67x00->hpi.base) {
148 dev_err(&pdev->dev, "Unable to map HPI registers\n");
149 ret = -EIO;
150 goto map_failed;
151 }
152
153 spin_lock_init(&c67x00->hpi.lock);
154 c67x00->hpi.regstep = pdata->hpi_regstep;
155 c67x00->pdata = pdev->dev.platform_data;
156 c67x00->pdev = pdev;
157
158 c67x00_ll_init(c67x00);
159 c67x00_ll_hpi_reg_init(c67x00);
160
161 ret = request_irq(res2->start, c67x00_irq, 0, pdev->name, c67x00);
162 if (ret) {
163 dev_err(&pdev->dev, "Cannot claim IRQ\n");
164 goto request_irq_failed;
165 }
166
167 ret = c67x00_ll_reset(c67x00);
168 if (ret) {
169 dev_err(&pdev->dev, "Device reset failed\n");
170 goto reset_failed;
171 }
172
173 for (i = 0; i < C67X00_SIES; i++)
174 c67x00_probe_sie(&c67x00->sie[i], c67x00, i);
175
176 platform_set_drvdata(pdev, c67x00);
177
178 return 0;
179
180 reset_failed:
181 free_irq(res2->start, c67x00);
182 request_irq_failed:
183 iounmap(c67x00->hpi.base);
184 map_failed:
185 release_mem_region(res->start, res->end - res->start + 1);
186 request_mem_failed:
187 kfree(c67x00);
188
189 return ret;
190}
191
192static int __devexit c67x00_drv_remove(struct platform_device *pdev)
193{
194 struct c67x00_device *c67x00 = platform_get_drvdata(pdev);
195 struct resource *res;
196 int i;
197
198 for (i = 0; i < C67X00_SIES; i++)
199 c67x00_remove_sie(&c67x00->sie[i]);
200
201 c67x00_ll_release(c67x00);
202
203 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
204 if (res)
205 free_irq(res->start, c67x00);
206
207 iounmap(c67x00->hpi.base);
208
209 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
210 if (res)
211 release_mem_region(res->start, res->end - res->start + 1);
212
213 kfree(c67x00);
214
215 return 0;
216}
217
218static struct platform_driver c67x00_driver = {
219 .probe = c67x00_drv_probe,
220 .remove = __devexit_p(c67x00_drv_remove),
221 .driver = {
222 .owner = THIS_MODULE,
223 .name = "c67x00",
224 },
225};
226MODULE_ALIAS("platform:c67x00");
227
228static int __init c67x00_init(void)
229{
230 return platform_driver_register(&c67x00_driver);
231}
232
233static void __exit c67x00_exit(void)
234{
235 platform_driver_unregister(&c67x00_driver);
236}
237
238module_init(c67x00_init);
239module_exit(c67x00_exit);
240
241MODULE_AUTHOR("Peter Korsgaard, Jan Veldeman, Grant Likely");
242MODULE_DESCRIPTION("Cypress C67X00 USB Controller Driver");
243MODULE_LICENSE("GPL");
diff --git a/drivers/usb/c67x00/c67x00-hcd.c b/drivers/usb/c67x00/c67x00-hcd.c
new file mode 100644
index 00000000000..a22b887f4e9
--- /dev/null
+++ b/drivers/usb/c67x00/c67x00-hcd.c
@@ -0,0 +1,412 @@
1/*
2 * c67x00-hcd.c: Cypress C67X00 USB Host Controller Driver
3 *
4 * Copyright (C) 2006-2008 Barco N.V.
5 * Derived from the Cypress cy7c67200/300 ezusb linux driver and
6 * based on multiple host controller drivers inside the linux kernel.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 * MA 02110-1301 USA.
22 */
23
24#include <linux/device.h>
25#include <linux/platform_device.h>
26#include <linux/usb.h>
27
28#include "c67x00.h"
29#include "c67x00-hcd.h"
30
31/* --------------------------------------------------------------------------
32 * Root Hub Support
33 */
34
35static __u8 c67x00_hub_des[] = {
36 0x09, /* __u8 bLength; */
37 0x29, /* __u8 bDescriptorType; Hub-descriptor */
38 0x02, /* __u8 bNbrPorts; */
39 0x00, /* __u16 wHubCharacteristics; */
40 0x00, /* (per-port OC, no power switching) */
41 0x32, /* __u8 bPwrOn2pwrGood; 2ms */
42 0x00, /* __u8 bHubContrCurrent; 0 mA */
43 0x00, /* __u8 DeviceRemovable; ** 7 Ports max ** */
44 0xff, /* __u8 PortPwrCtrlMask; ** 7 ports max ** */
45};
46
47static void c67x00_hub_reset_host_port(struct c67x00_sie *sie, int port)
48{
49 struct c67x00_hcd *c67x00 = sie->private_data;
50 unsigned long flags;
51
52 c67x00_ll_husb_reset(sie, port);
53
54 spin_lock_irqsave(&c67x00->lock, flags);
55 c67x00_ll_husb_reset_port(sie, port);
56 spin_unlock_irqrestore(&c67x00->lock, flags);
57
58 c67x00_ll_set_husb_eot(sie->dev, DEFAULT_EOT);
59}
60
61static int c67x00_hub_status_data(struct usb_hcd *hcd, char *buf)
62{
63 struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd);
64 struct c67x00_sie *sie = c67x00->sie;
65 u16 status;
66 int i;
67
68 *buf = 0;
69 status = c67x00_ll_usb_get_status(sie);
70 for (i = 0; i < C67X00_PORTS; i++)
71 if (status & PORT_CONNECT_CHANGE(i))
72 *buf |= (1 << i);
73
74 /* bit 0 denotes hub change, b1..n port change */
75 *buf <<= 1;
76
77 return !!*buf;
78}
79
80static int c67x00_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
81 u16 wIndex, char *buf, u16 wLength)
82{
83 struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd);
84 struct c67x00_sie *sie = c67x00->sie;
85 u16 status, usb_status;
86 int len = 0;
87 unsigned int port = wIndex-1;
88 u16 wPortChange, wPortStatus;
89
90 switch (typeReq) {
91
92 case GetHubStatus:
93 *(__le32 *) buf = cpu_to_le32(0);
94 len = 4; /* hub power */
95 break;
96
97 case GetPortStatus:
98 if (wIndex > C67X00_PORTS)
99 return -EPIPE;
100
101 status = c67x00_ll_usb_get_status(sie);
102 usb_status = c67x00_ll_get_usb_ctl(sie);
103
104 wPortChange = 0;
105 if (status & PORT_CONNECT_CHANGE(port))
106 wPortChange |= USB_PORT_STAT_C_CONNECTION;
107
108 wPortStatus = USB_PORT_STAT_POWER;
109 if (!(status & PORT_SE0_STATUS(port)))
110 wPortStatus |= USB_PORT_STAT_CONNECTION;
111 if (usb_status & LOW_SPEED_PORT(port)) {
112 wPortStatus |= USB_PORT_STAT_LOW_SPEED;
113 c67x00->low_speed_ports |= (1 << port);
114 } else
115 c67x00->low_speed_ports &= ~(1 << port);
116
117 if (usb_status & SOF_EOP_EN(port))
118 wPortStatus |= USB_PORT_STAT_ENABLE;
119
120 *(__le16 *) buf = cpu_to_le16(wPortStatus);
121 *(__le16 *) (buf + 2) = cpu_to_le16(wPortChange);
122 len = 4;
123 break;
124
125 case SetHubFeature: /* We don't implement these */
126 case ClearHubFeature:
127 switch (wValue) {
128 case C_HUB_OVER_CURRENT:
129 case C_HUB_LOCAL_POWER:
130 len = 0;
131 break;
132
133 default:
134 return -EPIPE;
135 }
136 break;
137
138 case SetPortFeature:
139 if (wIndex > C67X00_PORTS)
140 return -EPIPE;
141
142 switch (wValue) {
143 case USB_PORT_FEAT_SUSPEND:
144 dev_dbg(c67x00_hcd_dev(c67x00),
145 "SetPortFeature %d (SUSPEND)\n", port);
146 len = 0;
147 break;
148
149 case USB_PORT_FEAT_RESET:
150 c67x00_hub_reset_host_port(sie, port);
151 len = 0;
152 break;
153
154 case USB_PORT_FEAT_POWER:
155 /* Power always enabled */
156 len = 0;
157 break;
158
159 default:
160 dev_dbg(c67x00_hcd_dev(c67x00),
161 "%s: SetPortFeature %d (0x%04x) Error!\n",
162 __func__, port, wValue);
163 return -EPIPE;
164 }
165 break;
166
167 case ClearPortFeature:
168 if (wIndex > C67X00_PORTS)
169 return -EPIPE;
170
171 switch (wValue) {
172 case USB_PORT_FEAT_ENABLE:
173 /* Reset the port so that the c67x00 also notices the
174 * disconnect */
175 c67x00_hub_reset_host_port(sie, port);
176 len = 0;
177 break;
178
179 case USB_PORT_FEAT_C_ENABLE:
180 dev_dbg(c67x00_hcd_dev(c67x00),
181 "ClearPortFeature (%d): C_ENABLE\n", port);
182 len = 0;
183 break;
184
185 case USB_PORT_FEAT_SUSPEND:
186 dev_dbg(c67x00_hcd_dev(c67x00),
187 "ClearPortFeature (%d): SUSPEND\n", port);
188 len = 0;
189 break;
190
191 case USB_PORT_FEAT_C_SUSPEND:
192 dev_dbg(c67x00_hcd_dev(c67x00),
193 "ClearPortFeature (%d): C_SUSPEND\n", port);
194 len = 0;
195 break;
196
197 case USB_PORT_FEAT_POWER:
198 dev_dbg(c67x00_hcd_dev(c67x00),
199 "ClearPortFeature (%d): POWER\n", port);
200 return -EPIPE;
201
202 case USB_PORT_FEAT_C_CONNECTION:
203 c67x00_ll_usb_clear_status(sie,
204 PORT_CONNECT_CHANGE(port));
205 len = 0;
206 break;
207
208 case USB_PORT_FEAT_C_OVER_CURRENT:
209 dev_dbg(c67x00_hcd_dev(c67x00),
210 "ClearPortFeature (%d): OVER_CURRENT\n", port);
211 len = 0;
212 break;
213
214 case USB_PORT_FEAT_C_RESET:
215 dev_dbg(c67x00_hcd_dev(c67x00),
216 "ClearPortFeature (%d): C_RESET\n", port);
217 len = 0;
218 break;
219
220 default:
221 dev_dbg(c67x00_hcd_dev(c67x00),
222 "%s: ClearPortFeature %d (0x%04x) Error!\n",
223 __func__, port, wValue);
224 return -EPIPE;
225 }
226 break;
227
228 case GetHubDescriptor:
229 len = min_t(unsigned int, sizeof(c67x00_hub_des), wLength);
230 memcpy(buf, c67x00_hub_des, len);
231 break;
232
233 default:
234 dev_dbg(c67x00_hcd_dev(c67x00), "%s: unknown\n", __func__);
235 return -EPIPE;
236 }
237
238 return 0;
239}
240
241/* ---------------------------------------------------------------------
242 * Main part of host controller driver
243 */
244
245/**
246 * c67x00_hcd_irq
247 *
248 * This function is called from the interrupt handler in c67x00-drv.c
249 */
250static void c67x00_hcd_irq(struct c67x00_sie *sie, u16 int_status, u16 msg)
251{
252 struct c67x00_hcd *c67x00 = sie->private_data;
253 struct usb_hcd *hcd = c67x00_hcd_to_hcd(c67x00);
254
255 /* Handle sie message flags */
256 if (msg) {
257 if (msg & HUSB_TDListDone)
258 c67x00_sched_kick(c67x00);
259 else
260 dev_warn(c67x00_hcd_dev(c67x00),
261 "Unknown SIE msg flag(s): 0x%04x\n", msg);
262 }
263
264 if (unlikely(hcd->state == HC_STATE_HALT))
265 return;
266
267 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
268 return;
269
270 /* Handle Start of frame events */
271 if (int_status & SOFEOP_FLG(sie->sie_num)) {
272 c67x00_ll_usb_clear_status(sie, SOF_EOP_IRQ_FLG);
273 c67x00_sched_kick(c67x00);
274 set_bit(HCD_FLAG_SAW_IRQ, &hcd->flags);
275 }
276}
277
278/**
279 * c67x00_hcd_start: Host controller start hook
280 */
281static int c67x00_hcd_start(struct usb_hcd *hcd)
282{
283 hcd->uses_new_polling = 1;
284 hcd->state = HC_STATE_RUNNING;
285 hcd->poll_rh = 1;
286
287 return 0;
288}
289
290/**
291 * c67x00_hcd_stop: Host controller stop hook
292 */
293static void c67x00_hcd_stop(struct usb_hcd *hcd)
294{
295 /* Nothing to do */
296}
297
298static int c67x00_hcd_get_frame(struct usb_hcd *hcd)
299{
300 struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd);
301 u16 temp_val;
302
303 dev_dbg(c67x00_hcd_dev(c67x00), "%s\n", __func__);
304 temp_val = c67x00_ll_husb_get_frame(c67x00->sie);
305 temp_val &= HOST_FRAME_MASK;
306 return temp_val ? (temp_val - 1) : HOST_FRAME_MASK;
307}
308
309static struct hc_driver c67x00_hc_driver = {
310 .description = "c67x00-hcd",
311 .product_desc = "Cypress C67X00 Host Controller",
312 .hcd_priv_size = sizeof(struct c67x00_hcd),
313 .flags = HCD_USB11 | HCD_MEMORY,
314
315 /*
316 * basic lifecycle operations
317 */
318 .start = c67x00_hcd_start,
319 .stop = c67x00_hcd_stop,
320
321 /*
322 * managing i/o requests and associated device resources
323 */
324 .urb_enqueue = c67x00_urb_enqueue,
325 .urb_dequeue = c67x00_urb_dequeue,
326 .endpoint_disable = c67x00_endpoint_disable,
327
328 /*
329 * scheduling support
330 */
331 .get_frame_number = c67x00_hcd_get_frame,
332
333 /*
334 * root hub support
335 */
336 .hub_status_data = c67x00_hub_status_data,
337 .hub_control = c67x00_hub_control,
338};
339
340/* ---------------------------------------------------------------------
341 * Setup/Teardown routines
342 */
343
344int c67x00_hcd_probe(struct c67x00_sie *sie)
345{
346 struct c67x00_hcd *c67x00;
347 struct usb_hcd *hcd;
348 unsigned long flags;
349 int retval;
350
351 if (usb_disabled())
352 return -ENODEV;
353
354 hcd = usb_create_hcd(&c67x00_hc_driver, sie_dev(sie), "c67x00_sie");
355 if (!hcd) {
356 retval = -ENOMEM;
357 goto err0;
358 }
359 c67x00 = hcd_to_c67x00_hcd(hcd);
360
361 spin_lock_init(&c67x00->lock);
362 c67x00->sie = sie;
363
364 INIT_LIST_HEAD(&c67x00->list[PIPE_ISOCHRONOUS]);
365 INIT_LIST_HEAD(&c67x00->list[PIPE_INTERRUPT]);
366 INIT_LIST_HEAD(&c67x00->list[PIPE_CONTROL]);
367 INIT_LIST_HEAD(&c67x00->list[PIPE_BULK]);
368 c67x00->urb_count = 0;
369 INIT_LIST_HEAD(&c67x00->td_list);
370 c67x00->td_base_addr = CY_HCD_BUF_ADDR + SIE_TD_OFFSET(sie->sie_num);
371 c67x00->buf_base_addr = CY_HCD_BUF_ADDR + SIE_BUF_OFFSET(sie->sie_num);
372 c67x00->max_frame_bw = MAX_FRAME_BW_STD;
373
374 c67x00_ll_husb_init_host_port(sie);
375
376 init_completion(&c67x00->endpoint_disable);
377 retval = c67x00_sched_start_scheduler(c67x00);
378 if (retval)
379 goto err1;
380
381 retval = usb_add_hcd(hcd, 0, 0);
382 if (retval) {
383 dev_dbg(sie_dev(sie), "%s: usb_add_hcd returned %d\n",
384 __func__, retval);
385 goto err2;
386 }
387
388 spin_lock_irqsave(&sie->lock, flags);
389 sie->private_data = c67x00;
390 sie->irq = c67x00_hcd_irq;
391 spin_unlock_irqrestore(&sie->lock, flags);
392
393 return retval;
394
395 err2:
396 c67x00_sched_stop_scheduler(c67x00);
397 err1:
398 usb_put_hcd(hcd);
399 err0:
400 return retval;
401}
402
403/* may be called with controller, bus, and devices active */
404void c67x00_hcd_remove(struct c67x00_sie *sie)
405{
406 struct c67x00_hcd *c67x00 = sie->private_data;
407 struct usb_hcd *hcd = c67x00_hcd_to_hcd(c67x00);
408
409 c67x00_sched_stop_scheduler(c67x00);
410 usb_remove_hcd(hcd);
411 usb_put_hcd(hcd);
412}
diff --git a/drivers/usb/c67x00/c67x00-hcd.h b/drivers/usb/c67x00/c67x00-hcd.h
new file mode 100644
index 00000000000..e8c6d94b251
--- /dev/null
+++ b/drivers/usb/c67x00/c67x00-hcd.h
@@ -0,0 +1,133 @@
1/*
2 * c67x00-hcd.h: Cypress C67X00 USB HCD
3 *
4 * Copyright (C) 2006-2008 Barco N.V.
5 * Derived from the Cypress cy7c67200/300 ezusb linux driver and
6 * based on multiple host controller drivers inside the linux kernel.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 * MA 02110-1301 USA.
22 */
23
24#ifndef _USB_C67X00_HCD_H
25#define _USB_C67X00_HCD_H
26
27#include <linux/kernel.h>
28#include <linux/spinlock.h>
29#include <linux/list.h>
30#include <linux/usb.h>
31#include "../core/hcd.h"
32#include "c67x00.h"
33
34/*
35 * The following parameters depend on the CPU speed, bus speed, ...
36 * These can be tuned for specific use cases, e.g. if isochronous transfers
37 * are very important, bandwith can be sacrificed to guarantee that the
38 * 1ms deadline will be met.
39 * If bulk transfers are important, the MAX_FRAME_BW can be increased,
40 * but some (or many) isochronous deadlines might not be met.
41 *
42 * The values are specified in bittime.
43 */
44
45/*
46 * The current implementation switches between _STD (default) and _ISO (when
47 * isochronous transfers are scheduled), in order to optimize the throughput
48 * in normal cicrumstances, but also provide good isochronous behaviour.
49 *
50 * Bandwidth is described in bit time so with a 12MHz USB clock and 1ms
51 * frames; there are 12000 bit times per frame.
52 */
53
54#define TOTAL_FRAME_BW 12000
55#define DEFAULT_EOT 2250
56
57#define MAX_FRAME_BW_STD (TOTAL_FRAME_BW - DEFAULT_EOT)
58#define MAX_FRAME_BW_ISO 2400
59
60/*
61 * Periodic transfers may only use 90% of the full frame, but as
62 * we currently don't even use 90% of the full frame, we may
63 * use the full usable time for periodic transfers.
64 */
65#define MAX_PERIODIC_BW(full_bw) full_bw
66
67/* -------------------------------------------------------------------------- */
68
69struct c67x00_hcd {
70 spinlock_t lock;
71 struct c67x00_sie *sie;
72 unsigned int low_speed_ports; /* bitmask of low speed ports */
73 unsigned int urb_count;
74 unsigned int urb_iso_count;
75
76 struct list_head list[4]; /* iso, int, ctrl, bulk */
77#if PIPE_BULK != 3
78#error "Sanity check failed, this code presumes PIPE_... to range from 0 to 3"
79#endif
80
81 /* USB bandwidth allocated to td_list */
82 int bandwidth_allocated;
83 /* USB bandwidth allocated for isoc/int transfer */
84 int periodic_bw_allocated;
85 struct list_head td_list;
86 int max_frame_bw;
87
88 u16 td_base_addr;
89 u16 buf_base_addr;
90 u16 next_td_addr;
91 u16 next_buf_addr;
92
93 struct tasklet_struct tasklet;
94
95 struct completion endpoint_disable;
96
97 u16 current_frame;
98 u16 last_frame;
99};
100
101static inline struct c67x00_hcd *hcd_to_c67x00_hcd(struct usb_hcd *hcd)
102{
103 return (struct c67x00_hcd *)(hcd->hcd_priv);
104}
105
106static inline struct usb_hcd *c67x00_hcd_to_hcd(struct c67x00_hcd *c67x00)
107{
108 return container_of((void *)c67x00, struct usb_hcd, hcd_priv);
109}
110
111/* ---------------------------------------------------------------------
112 * Functions used by c67x00-drv
113 */
114
115int c67x00_hcd_probe(struct c67x00_sie *sie);
116void c67x00_hcd_remove(struct c67x00_sie *sie);
117
118/* ---------------------------------------------------------------------
119 * Transfer Descriptor scheduling functions
120 */
121int c67x00_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags);
122int c67x00_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status);
123void c67x00_endpoint_disable(struct usb_hcd *hcd,
124 struct usb_host_endpoint *ep);
125
126void c67x00_hcd_msg_received(struct c67x00_sie *sie, u16 msg);
127void c67x00_sched_kick(struct c67x00_hcd *c67x00);
128int c67x00_sched_start_scheduler(struct c67x00_hcd *c67x00);
129void c67x00_sched_stop_scheduler(struct c67x00_hcd *c67x00);
130
131#define c67x00_hcd_dev(x) (c67x00_hcd_to_hcd(x)->self.controller)
132
133#endif /* _USB_C67X00_HCD_H */
diff --git a/drivers/usb/c67x00/c67x00-ll-hpi.c b/drivers/usb/c67x00/c67x00-ll-hpi.c
new file mode 100644
index 00000000000..f3430b372f0
--- /dev/null
+++ b/drivers/usb/c67x00/c67x00-ll-hpi.c
@@ -0,0 +1,480 @@
1/*
2 * c67x00-ll-hpi.c: Cypress C67X00 USB Low level interface using HPI
3 *
4 * Copyright (C) 2006-2008 Barco N.V.
5 * Derived from the Cypress cy7c67200/300 ezusb linux driver and
6 * based on multiple host controller drivers inside the linux kernel.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 * MA 02110-1301 USA.
22 */
23
24#include <asm/byteorder.h>
25#include <linux/io.h>
26#include <linux/usb/c67x00.h>
27#include "c67x00.h"
28
29#define COMM_REGS 14
30
31struct c67x00_lcp_int_data {
32 u16 regs[COMM_REGS];
33};
34
35/* -------------------------------------------------------------------------- */
36/* Interface definitions */
37
38#define COMM_ACK 0x0FED
39#define COMM_NAK 0xDEAD
40
41#define COMM_RESET 0xFA50
42#define COMM_EXEC_INT 0xCE01
43#define COMM_INT_NUM 0x01C2
44
45/* Registers 0 to COMM_REGS-1 */
46#define COMM_R(x) (0x01C4 + 2 * (x))
47
48#define HUSB_SIE_pCurrentTDPtr(x) ((x) ? 0x01B2 : 0x01B0)
49#define HUSB_SIE_pTDListDone_Sem(x) ((x) ? 0x01B8 : 0x01B6)
50#define HUSB_pEOT 0x01B4
51
52/* Software interrupts */
53/* 114, 115: */
54#define HUSB_SIE_INIT_INT(x) ((x) ? 0x0073 : 0x0072)
55#define HUSB_RESET_INT 0x0074
56
57#define SUSB_INIT_INT 0x0071
58#define SUSB_INIT_INT_LOC (SUSB_INIT_INT * 2)
59
60/* -----------------------------------------------------------------------
61 * HPI implementation
62 *
63 * The c67x00 chip also support control via SPI or HSS serial
64 * interfaces. However, this driver assumes that register access can
65 * be performed from IRQ context. While this is a safe assuption with
66 * the HPI interface, it is not true for the serial interfaces.
67 */
68
69/* HPI registers */
70#define HPI_DATA 0
71#define HPI_MAILBOX 1
72#define HPI_ADDR 2
73#define HPI_STATUS 3
74
75static inline u16 hpi_read_reg(struct c67x00_device *dev, int reg)
76{
77 return __raw_readw(dev->hpi.base + reg * dev->hpi.regstep);
78}
79
80static inline void hpi_write_reg(struct c67x00_device *dev, int reg, u16 value)
81{
82 __raw_writew(value, dev->hpi.base + reg * dev->hpi.regstep);
83}
84
85static inline u16 hpi_read_word_nolock(struct c67x00_device *dev, u16 reg)
86{
87 hpi_write_reg(dev, HPI_ADDR, reg);
88 return hpi_read_reg(dev, HPI_DATA);
89}
90
91static u16 hpi_read_word(struct c67x00_device *dev, u16 reg)
92{
93 u16 value;
94 unsigned long flags;
95
96 spin_lock_irqsave(&dev->hpi.lock, flags);
97 value = hpi_read_word_nolock(dev, reg);
98 spin_unlock_irqrestore(&dev->hpi.lock, flags);
99
100 return value;
101}
102
103static void hpi_write_word_nolock(struct c67x00_device *dev, u16 reg, u16 value)
104{
105 hpi_write_reg(dev, HPI_ADDR, reg);
106 hpi_write_reg(dev, HPI_DATA, value);
107}
108
109static void hpi_write_word(struct c67x00_device *dev, u16 reg, u16 value)
110{
111 unsigned long flags;
112
113 spin_lock_irqsave(&dev->hpi.lock, flags);
114 hpi_write_word_nolock(dev, reg, value);
115 spin_unlock_irqrestore(&dev->hpi.lock, flags);
116}
117
118/*
119 * Only data is little endian, addr has cpu endianess
120 */
121static void hpi_write_words_le16(struct c67x00_device *dev, u16 addr,
122 u16 *data, u16 count)
123{
124 unsigned long flags;
125 int i;
126
127 spin_lock_irqsave(&dev->hpi.lock, flags);
128
129 hpi_write_reg(dev, HPI_ADDR, addr);
130 for (i = 0; i < count; i++)
131 hpi_write_reg(dev, HPI_DATA, cpu_to_le16(*data++));
132
133 spin_unlock_irqrestore(&dev->hpi.lock, flags);
134}
135
136/*
137 * Only data is little endian, addr has cpu endianess
138 */
139static void hpi_read_words_le16(struct c67x00_device *dev, u16 addr,
140 u16 *data, u16 count)
141{
142 unsigned long flags;
143 int i;
144
145 spin_lock_irqsave(&dev->hpi.lock, flags);
146 hpi_write_reg(dev, HPI_ADDR, addr);
147 for (i = 0; i < count; i++)
148 *data++ = le16_to_cpu(hpi_read_reg(dev, HPI_DATA));
149
150 spin_unlock_irqrestore(&dev->hpi.lock, flags);
151}
152
153static void hpi_set_bits(struct c67x00_device *dev, u16 reg, u16 mask)
154{
155 u16 value;
156 unsigned long flags;
157
158 spin_lock_irqsave(&dev->hpi.lock, flags);
159 value = hpi_read_word_nolock(dev, reg);
160 hpi_write_word_nolock(dev, reg, value | mask);
161 spin_unlock_irqrestore(&dev->hpi.lock, flags);
162}
163
164static void hpi_clear_bits(struct c67x00_device *dev, u16 reg, u16 mask)
165{
166 u16 value;
167 unsigned long flags;
168
169 spin_lock_irqsave(&dev->hpi.lock, flags);
170 value = hpi_read_word_nolock(dev, reg);
171 hpi_write_word_nolock(dev, reg, value & ~mask);
172 spin_unlock_irqrestore(&dev->hpi.lock, flags);
173}
174
175static u16 hpi_recv_mbox(struct c67x00_device *dev)
176{
177 u16 value;
178 unsigned long flags;
179
180 spin_lock_irqsave(&dev->hpi.lock, flags);
181 value = hpi_read_reg(dev, HPI_MAILBOX);
182 spin_unlock_irqrestore(&dev->hpi.lock, flags);
183
184 return value;
185}
186
187static u16 hpi_send_mbox(struct c67x00_device *dev, u16 value)
188{
189 unsigned long flags;
190
191 spin_lock_irqsave(&dev->hpi.lock, flags);
192 hpi_write_reg(dev, HPI_MAILBOX, value);
193 spin_unlock_irqrestore(&dev->hpi.lock, flags);
194
195 return value;
196}
197
198u16 c67x00_ll_hpi_status(struct c67x00_device *dev)
199{
200 u16 value;
201 unsigned long flags;
202
203 spin_lock_irqsave(&dev->hpi.lock, flags);
204 value = hpi_read_reg(dev, HPI_STATUS);
205 spin_unlock_irqrestore(&dev->hpi.lock, flags);
206
207 return value;
208}
209
210void c67x00_ll_hpi_reg_init(struct c67x00_device *dev)
211{
212 int i;
213
214 hpi_recv_mbox(dev);
215 c67x00_ll_hpi_status(dev);
216 hpi_write_word(dev, HPI_IRQ_ROUTING_REG, 0);
217
218 for (i = 0; i < C67X00_SIES; i++) {
219 hpi_write_word(dev, SIEMSG_REG(i), 0);
220 hpi_read_word(dev, SIEMSG_REG(i));
221 }
222}
223
224void c67x00_ll_hpi_enable_sofeop(struct c67x00_sie *sie)
225{
226 hpi_set_bits(sie->dev, HPI_IRQ_ROUTING_REG,
227 SOFEOP_TO_HPI_EN(sie->sie_num));
228}
229
230void c67x00_ll_hpi_disable_sofeop(struct c67x00_sie *sie)
231{
232 hpi_clear_bits(sie->dev, HPI_IRQ_ROUTING_REG,
233 SOFEOP_TO_HPI_EN(sie->sie_num));
234}
235
236/* -------------------------------------------------------------------------- */
237/* Transactions */
238
239static inline u16 ll_recv_msg(struct c67x00_device *dev)
240{
241 u16 res;
242
243 res = wait_for_completion_timeout(&dev->hpi.lcp.msg_received, 5 * HZ);
244 WARN_ON(!res);
245
246 return (res == 0) ? -EIO : 0;
247}
248
249/* -------------------------------------------------------------------------- */
250/* General functions */
251
252u16 c67x00_ll_fetch_siemsg(struct c67x00_device *dev, int sie_num)
253{
254 u16 val;
255
256 val = hpi_read_word(dev, SIEMSG_REG(sie_num));
257 /* clear register to allow next message */
258 hpi_write_word(dev, SIEMSG_REG(sie_num), 0);
259
260 return val;
261}
262
263u16 c67x00_ll_get_usb_ctl(struct c67x00_sie *sie)
264{
265 return hpi_read_word(sie->dev, USB_CTL_REG(sie->sie_num));
266}
267
268/**
269 * c67x00_ll_usb_clear_status - clear the USB status bits
270 */
271void c67x00_ll_usb_clear_status(struct c67x00_sie *sie, u16 bits)
272{
273 hpi_write_word(sie->dev, USB_STAT_REG(sie->sie_num), bits);
274}
275
276u16 c67x00_ll_usb_get_status(struct c67x00_sie *sie)
277{
278 return hpi_read_word(sie->dev, USB_STAT_REG(sie->sie_num));
279}
280
281/* -------------------------------------------------------------------------- */
282
283static int c67x00_comm_exec_int(struct c67x00_device *dev, u16 nr,
284 struct c67x00_lcp_int_data *data)
285{
286 int i, rc;
287
288 mutex_lock(&dev->hpi.lcp.mutex);
289 hpi_write_word(dev, COMM_INT_NUM, nr);
290 for (i = 0; i < COMM_REGS; i++)
291 hpi_write_word(dev, COMM_R(i), data->regs[i]);
292 hpi_send_mbox(dev, COMM_EXEC_INT);
293 rc = ll_recv_msg(dev);
294 mutex_unlock(&dev->hpi.lcp.mutex);
295
296 return rc;
297}
298
299/* -------------------------------------------------------------------------- */
300/* Host specific functions */
301
302void c67x00_ll_set_husb_eot(struct c67x00_device *dev, u16 value)
303{
304 mutex_lock(&dev->hpi.lcp.mutex);
305 hpi_write_word(dev, HUSB_pEOT, value);
306 mutex_unlock(&dev->hpi.lcp.mutex);
307}
308
309static inline void c67x00_ll_husb_sie_init(struct c67x00_sie *sie)
310{
311 struct c67x00_device *dev = sie->dev;
312 struct c67x00_lcp_int_data data;
313 int rc;
314
315 rc = c67x00_comm_exec_int(dev, HUSB_SIE_INIT_INT(sie->sie_num), &data);
316 BUG_ON(rc); /* No return path for error code; crash spectacularly */
317}
318
319void c67x00_ll_husb_reset(struct c67x00_sie *sie, int port)
320{
321 struct c67x00_device *dev = sie->dev;
322 struct c67x00_lcp_int_data data;
323 int rc;
324
325 data.regs[0] = 50; /* Reset USB port for 50ms */
326 data.regs[1] = port | (sie->sie_num << 1);
327 rc = c67x00_comm_exec_int(dev, HUSB_RESET_INT, &data);
328 BUG_ON(rc); /* No return path for error code; crash spectacularly */
329}
330
331void c67x00_ll_husb_set_current_td(struct c67x00_sie *sie, u16 addr)
332{
333 hpi_write_word(sie->dev, HUSB_SIE_pCurrentTDPtr(sie->sie_num), addr);
334}
335
336u16 c67x00_ll_husb_get_current_td(struct c67x00_sie *sie)
337{
338 return hpi_read_word(sie->dev, HUSB_SIE_pCurrentTDPtr(sie->sie_num));
339}
340
341u16 c67x00_ll_husb_get_frame(struct c67x00_sie *sie)
342{
343 return hpi_read_word(sie->dev, HOST_FRAME_REG(sie->sie_num));
344}
345
346void c67x00_ll_husb_init_host_port(struct c67x00_sie *sie)
347{
348 /* Set port into host mode */
349 hpi_set_bits(sie->dev, USB_CTL_REG(sie->sie_num), HOST_MODE);
350 c67x00_ll_husb_sie_init(sie);
351 /* Clear interrupts */
352 c67x00_ll_usb_clear_status(sie, HOST_STAT_MASK);
353 /* Check */
354 if (!(hpi_read_word(sie->dev, USB_CTL_REG(sie->sie_num)) & HOST_MODE))
355 dev_warn(sie_dev(sie),
356 "SIE %d not set to host mode\n", sie->sie_num);
357}
358
359void c67x00_ll_husb_reset_port(struct c67x00_sie *sie, int port)
360{
361 /* Clear connect change */
362 c67x00_ll_usb_clear_status(sie, PORT_CONNECT_CHANGE(port));
363
364 /* Enable interrupts */
365 hpi_set_bits(sie->dev, HPI_IRQ_ROUTING_REG,
366 SOFEOP_TO_CPU_EN(sie->sie_num));
367 hpi_set_bits(sie->dev, HOST_IRQ_EN_REG(sie->sie_num),
368 SOF_EOP_IRQ_EN | DONE_IRQ_EN);
369
370 /* Enable pull down transistors */
371 hpi_set_bits(sie->dev, USB_CTL_REG(sie->sie_num), PORT_RES_EN(port));
372}
373
374/* -------------------------------------------------------------------------- */
375
376void c67x00_ll_irq(struct c67x00_device *dev, u16 int_status)
377{
378 if ((int_status & MBX_OUT_FLG) == 0)
379 return;
380
381 dev->hpi.lcp.last_msg = hpi_recv_mbox(dev);
382 complete(&dev->hpi.lcp.msg_received);
383}
384
385/* -------------------------------------------------------------------------- */
386
387int c67x00_ll_reset(struct c67x00_device *dev)
388{
389 int rc;
390
391 mutex_lock(&dev->hpi.lcp.mutex);
392 hpi_send_mbox(dev, COMM_RESET);
393 rc = ll_recv_msg(dev);
394 mutex_unlock(&dev->hpi.lcp.mutex);
395
396 return rc;
397}
398
399/* -------------------------------------------------------------------------- */
400
401/**
402 * c67x00_ll_write_mem_le16 - write into c67x00 memory
403 * Only data is little endian, addr has cpu endianess.
404 */
405void c67x00_ll_write_mem_le16(struct c67x00_device *dev, u16 addr,
406 void *data, int len)
407{
408 u8 *buf = data;
409
410 /* Sanity check */
411 if (addr + len > 0xffff) {
412 dev_err(&dev->pdev->dev,
413 "Trying to write beyond writable region!\n");
414 return;
415 }
416
417 if (addr & 0x01) {
418 /* unaligned access */
419 u16 tmp;
420 tmp = hpi_read_word(dev, addr - 1);
421 tmp = (tmp & 0x00ff) | (*buf++ << 8);
422 hpi_write_word(dev, addr - 1, tmp);
423 addr++;
424 len--;
425 }
426
427 hpi_write_words_le16(dev, addr, (u16 *)buf, len / 2);
428 buf += len & ~0x01;
429 addr += len & ~0x01;
430 len &= 0x01;
431
432 if (len) {
433 u16 tmp;
434 tmp = hpi_read_word(dev, addr);
435 tmp = (tmp & 0xff00) | *buf;
436 hpi_write_word(dev, addr, tmp);
437 }
438}
439
440/**
441 * c67x00_ll_read_mem_le16 - read from c67x00 memory
442 * Only data is little endian, addr has cpu endianess.
443 */
444void c67x00_ll_read_mem_le16(struct c67x00_device *dev, u16 addr,
445 void *data, int len)
446{
447 u8 *buf = data;
448
449 if (addr & 0x01) {
450 /* unaligned access */
451 u16 tmp;
452 tmp = hpi_read_word(dev, addr - 1);
453 *buf++ = (tmp >> 8) & 0x00ff;
454 addr++;
455 len--;
456 }
457
458 hpi_read_words_le16(dev, addr, (u16 *)buf, len / 2);
459 buf += len & ~0x01;
460 addr += len & ~0x01;
461 len &= 0x01;
462
463 if (len) {
464 u16 tmp;
465 tmp = hpi_read_word(dev, addr);
466 *buf = tmp & 0x00ff;
467 }
468}
469
470/* -------------------------------------------------------------------------- */
471
472void c67x00_ll_init(struct c67x00_device *dev)
473{
474 mutex_init(&dev->hpi.lcp.mutex);
475 init_completion(&dev->hpi.lcp.msg_received);
476}
477
478void c67x00_ll_release(struct c67x00_device *dev)
479{
480}
diff --git a/drivers/usb/c67x00/c67x00-sched.c b/drivers/usb/c67x00/c67x00-sched.c
new file mode 100644
index 00000000000..85dfe296566
--- /dev/null
+++ b/drivers/usb/c67x00/c67x00-sched.c
@@ -0,0 +1,1170 @@
1/*
2 * c67x00-sched.c: Cypress C67X00 USB Host Controller Driver - TD scheduling
3 *
4 * Copyright (C) 2006-2008 Barco N.V.
5 * Derived from the Cypress cy7c67200/300 ezusb linux driver and
6 * based on multiple host controller drivers inside the linux kernel.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 * MA 02110-1301 USA.
22 */
23
24#include <linux/kthread.h>
25
26#include "c67x00.h"
27#include "c67x00-hcd.h"
28
29/*
30 * These are the stages for a control urb, they are kept
31 * in both urb->interval and td->privdata.
32 */
33#define SETUP_STAGE 0
34#define DATA_STAGE 1
35#define STATUS_STAGE 2
36
37/* -------------------------------------------------------------------------- */
38
39/**
40 * struct c67x00_ep_data: Host endpoint data structure
41 */
42struct c67x00_ep_data {
43 struct list_head queue;
44 struct list_head node;
45 struct usb_host_endpoint *hep;
46 struct usb_device *dev;
47 u16 next_frame; /* For int/isoc transactions */
48};
49
50/**
51 * struct c67x00_td
52 *
53 * Hardware parts are little endiannes, SW in CPU endianess.
54 */
55struct c67x00_td {
56 /* HW specific part */
57 __le16 ly_base_addr; /* Bytes 0-1 */
58 __le16 port_length; /* Bytes 2-3 */
59 u8 pid_ep; /* Byte 4 */
60 u8 dev_addr; /* Byte 5 */
61 u8 ctrl_reg; /* Byte 6 */
62 u8 status; /* Byte 7 */
63 u8 retry_cnt; /* Byte 8 */
64#define TT_OFFSET 2
65#define TT_CONTROL 0
66#define TT_ISOCHRONOUS 1
67#define TT_BULK 2
68#define TT_INTERRUPT 3
69 u8 residue; /* Byte 9 */
70 __le16 next_td_addr; /* Bytes 10-11 */
71 /* SW part */
72 struct list_head td_list;
73 u16 td_addr;
74 void *data;
75 struct urb *urb;
76 unsigned long privdata;
77
78 /* These are needed for handling the toggle bits:
79 * an urb can be dequeued while a td is in progress
80 * after checking the td, the toggle bit might need to
81 * be fixed */
82 struct c67x00_ep_data *ep_data;
83 unsigned int pipe;
84};
85
86struct c67x00_urb_priv {
87 struct list_head hep_node;
88 struct urb *urb;
89 int port;
90 int cnt; /* packet number for isoc */
91 int status;
92 struct c67x00_ep_data *ep_data;
93};
94
95#define td_udev(td) ((td)->ep_data->dev)
96
97#define CY_TD_SIZE 12
98
99#define TD_PIDEP_OFFSET 0x04
100#define TD_PIDEPMASK_PID 0xF0
101#define TD_PIDEPMASK_EP 0x0F
102#define TD_PORTLENMASK_DL 0x02FF
103#define TD_PORTLENMASK_PN 0xC000
104
105#define TD_STATUS_OFFSET 0x07
106#define TD_STATUSMASK_ACK 0x01
107#define TD_STATUSMASK_ERR 0x02
108#define TD_STATUSMASK_TMOUT 0x04
109#define TD_STATUSMASK_SEQ 0x08
110#define TD_STATUSMASK_SETUP 0x10
111#define TD_STATUSMASK_OVF 0x20
112#define TD_STATUSMASK_NAK 0x40
113#define TD_STATUSMASK_STALL 0x80
114
115#define TD_ERROR_MASK (TD_STATUSMASK_ERR | TD_STATUSMASK_TMOUT | \
116 TD_STATUSMASK_STALL)
117
118#define TD_RETRYCNT_OFFSET 0x08
119#define TD_RETRYCNTMASK_ACT_FLG 0x10
120#define TD_RETRYCNTMASK_TX_TYPE 0x0C
121#define TD_RETRYCNTMASK_RTY_CNT 0x03
122
123#define TD_RESIDUE_OVERFLOW 0x80
124
125#define TD_PID_IN 0x90
126
127/* Residue: signed 8bits, neg -> OVERFLOW, pos -> UNDERFLOW */
128#define td_residue(td) ((__s8)(td->residue))
129#define td_ly_base_addr(td) (__le16_to_cpu((td)->ly_base_addr))
130#define td_port_length(td) (__le16_to_cpu((td)->port_length))
131#define td_next_td_addr(td) (__le16_to_cpu((td)->next_td_addr))
132
133#define td_active(td) ((td)->retry_cnt & TD_RETRYCNTMASK_ACT_FLG)
134#define td_length(td) (td_port_length(td) & TD_PORTLENMASK_DL)
135
136#define td_sequence_ok(td) (!td->status || \
137 (!(td->status & TD_STATUSMASK_SEQ) == \
138 !(td->ctrl_reg & SEQ_SEL)))
139
140#define td_acked(td) (!td->status || \
141 (td->status & TD_STATUSMASK_ACK))
142#define td_actual_bytes(td) (td_length(td) - td_residue(td))
143
144/* -------------------------------------------------------------------------- */
145
146#ifdef DEBUG
147
148/**
149 * dbg_td - Dump the contents of the TD
150 */
151static void dbg_td(struct c67x00_hcd *c67x00, struct c67x00_td *td, char *msg)
152{
153 struct device *dev = c67x00_hcd_dev(c67x00);
154
155 dev_dbg(dev, "### %s at 0x%04x\n", msg, td->td_addr);
156 dev_dbg(dev, "urb: 0x%p\n", td->urb);
157 dev_dbg(dev, "endpoint: %4d\n", usb_pipeendpoint(td->pipe));
158 dev_dbg(dev, "pipeout: %4d\n", usb_pipeout(td->pipe));
159 dev_dbg(dev, "ly_base_addr: 0x%04x\n", td_ly_base_addr(td));
160 dev_dbg(dev, "port_length: 0x%04x\n", td_port_length(td));
161 dev_dbg(dev, "pid_ep: 0x%02x\n", td->pid_ep);
162 dev_dbg(dev, "dev_addr: 0x%02x\n", td->dev_addr);
163 dev_dbg(dev, "ctrl_reg: 0x%02x\n", td->ctrl_reg);
164 dev_dbg(dev, "status: 0x%02x\n", td->status);
165 dev_dbg(dev, "retry_cnt: 0x%02x\n", td->retry_cnt);
166 dev_dbg(dev, "residue: 0x%02x\n", td->residue);
167 dev_dbg(dev, "next_td_addr: 0x%04x\n", td_next_td_addr(td));
168 dev_dbg(dev, "data:");
169 print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 16, 1,
170 td->data, td_length(td), 1);
171}
172#else /* DEBUG */
173
174static inline void
175dbg_td(struct c67x00_hcd *c67x00, struct c67x00_td *td, char *msg) { }
176
177#endif /* DEBUG */
178
179/* -------------------------------------------------------------------------- */
180/* Helper functions */
181
182static inline u16 c67x00_get_current_frame_number(struct c67x00_hcd *c67x00)
183{
184 return c67x00_ll_husb_get_frame(c67x00->sie) & HOST_FRAME_MASK;
185}
186
187/**
188 * frame_add
189 * Software wraparound for framenumbers.
190 */
191static inline u16 frame_add(u16 a, u16 b)
192{
193 return (a + b) & HOST_FRAME_MASK;
194}
195
196/**
197 * frame_after - is frame a after frame b
198 */
199static inline int frame_after(u16 a, u16 b)
200{
201 return ((HOST_FRAME_MASK + a - b) & HOST_FRAME_MASK) <
202 (HOST_FRAME_MASK / 2);
203}
204
205/**
206 * frame_after_eq - is frame a after or equal to frame b
207 */
208static inline int frame_after_eq(u16 a, u16 b)
209{
210 return ((HOST_FRAME_MASK + 1 + a - b) & HOST_FRAME_MASK) <
211 (HOST_FRAME_MASK / 2);
212}
213
214/* -------------------------------------------------------------------------- */
215
216/**
217 * c67x00_release_urb - remove link from all tds to this urb
218 * Disconnects the urb from it's tds, so that it can be given back.
219 * pre: urb->hcpriv != NULL
220 */
221static void c67x00_release_urb(struct c67x00_hcd *c67x00, struct urb *urb)
222{
223 struct c67x00_td *td;
224 struct c67x00_urb_priv *urbp;
225
226 BUG_ON(!urb);
227
228 c67x00->urb_count--;
229
230 if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
231 c67x00->urb_iso_count--;
232 if (c67x00->urb_iso_count == 0)
233 c67x00->max_frame_bw = MAX_FRAME_BW_STD;
234 }
235
236 /* TODO this might be not so efficient when we've got many urbs!
237 * Alternatives:
238 * * only clear when needed
239 * * keep a list of tds with each urbp
240 */
241 list_for_each_entry(td, &c67x00->td_list, td_list)
242 if (urb == td->urb)
243 td->urb = NULL;
244
245 urbp = urb->hcpriv;
246 urb->hcpriv = NULL;
247 list_del(&urbp->hep_node);
248 kfree(urbp);
249}
250
251/* -------------------------------------------------------------------------- */
252
253static struct c67x00_ep_data *
254c67x00_ep_data_alloc(struct c67x00_hcd *c67x00, struct urb *urb)
255{
256 struct usb_host_endpoint *hep = urb->ep;
257 struct c67x00_ep_data *ep_data;
258 int type;
259
260 c67x00->current_frame = c67x00_get_current_frame_number(c67x00);
261
262 /* Check if endpoint already has a c67x00_ep_data struct allocated */
263 if (hep->hcpriv) {
264 ep_data = hep->hcpriv;
265 if (frame_after(c67x00->current_frame, ep_data->next_frame))
266 ep_data->next_frame =
267 frame_add(c67x00->current_frame, 1);
268 return hep->hcpriv;
269 }
270
271 /* Allocate and initialize a new c67x00 endpoint data structure */
272 ep_data = kzalloc(sizeof(*ep_data), GFP_ATOMIC);
273 if (!ep_data)
274 return NULL;
275
276 INIT_LIST_HEAD(&ep_data->queue);
277 INIT_LIST_HEAD(&ep_data->node);
278 ep_data->hep = hep;
279
280 /* hold a reference to udev as long as this endpoint lives,
281 * this is needed to possibly fix the data toggle */
282 ep_data->dev = usb_get_dev(urb->dev);
283 hep->hcpriv = ep_data;
284
285 /* For ISOC and INT endpoints, start ASAP: */
286 ep_data->next_frame = frame_add(c67x00->current_frame, 1);
287
288 /* Add the endpoint data to one of the pipe lists; must be added
289 in order of endpoint address */
290 type = usb_pipetype(urb->pipe);
291 if (list_empty(&ep_data->node)) {
292 list_add(&ep_data->node, &c67x00->list[type]);
293 } else {
294 struct c67x00_ep_data *prev;
295
296 list_for_each_entry(prev, &c67x00->list[type], node) {
297 if (prev->hep->desc.bEndpointAddress >
298 hep->desc.bEndpointAddress) {
299 list_add(&ep_data->node, prev->node.prev);
300 break;
301 }
302 }
303 }
304
305 return ep_data;
306}
307
308static int c67x00_ep_data_free(struct usb_host_endpoint *hep)
309{
310 struct c67x00_ep_data *ep_data = hep->hcpriv;
311
312 if (!ep_data)
313 return 0;
314
315 if (!list_empty(&ep_data->queue))
316 return -EBUSY;
317
318 usb_put_dev(ep_data->dev);
319 list_del(&ep_data->queue);
320 list_del(&ep_data->node);
321
322 kfree(ep_data);
323 hep->hcpriv = NULL;
324
325 return 0;
326}
327
328void c67x00_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
329{
330 struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd);
331 unsigned long flags;
332
333 if (!list_empty(&ep->urb_list))
334 dev_warn(c67x00_hcd_dev(c67x00), "error: urb list not empty\n");
335
336 spin_lock_irqsave(&c67x00->lock, flags);
337
338 /* loop waiting for all transfers in the endpoint queue to complete */
339 while (c67x00_ep_data_free(ep)) {
340 /* Drop the lock so we can sleep waiting for the hardware */
341 spin_unlock_irqrestore(&c67x00->lock, flags);
342
343 /* it could happen that we reinitialize this completion, while
344 * somebody was waiting for that completion. The timeout and
345 * while loop handle such cases, but this might be improved */
346 INIT_COMPLETION(c67x00->endpoint_disable);
347 c67x00_sched_kick(c67x00);
348 wait_for_completion_timeout(&c67x00->endpoint_disable, 1 * HZ);
349
350 spin_lock_irqsave(&c67x00->lock, flags);
351 }
352
353 spin_unlock_irqrestore(&c67x00->lock, flags);
354}
355
356/* -------------------------------------------------------------------------- */
357
358static inline int get_root_port(struct usb_device *dev)
359{
360 while (dev->parent->parent)
361 dev = dev->parent;
362 return dev->portnum;
363}
364
365int c67x00_urb_enqueue(struct usb_hcd *hcd,
366 struct urb *urb, gfp_t mem_flags)
367{
368 int ret;
369 unsigned long flags;
370 struct c67x00_urb_priv *urbp;
371 struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd);
372 int port = get_root_port(urb->dev)-1;
373
374 spin_lock_irqsave(&c67x00->lock, flags);
375
376 /* Make sure host controller is running */
377 if (!HC_IS_RUNNING(hcd->state)) {
378 ret = -ENODEV;
379 goto err_not_linked;
380 }
381
382 ret = usb_hcd_link_urb_to_ep(hcd, urb);
383 if (ret)
384 goto err_not_linked;
385
386 /* Allocate and initialize urb private data */
387 urbp = kzalloc(sizeof(*urbp), mem_flags);
388 if (!urbp) {
389 ret = -ENOMEM;
390 goto err_urbp;
391 }
392
393 INIT_LIST_HEAD(&urbp->hep_node);
394 urbp->urb = urb;
395 urbp->port = port;
396
397 urbp->ep_data = c67x00_ep_data_alloc(c67x00, urb);
398
399 if (!urbp->ep_data) {
400 ret = -ENOMEM;
401 goto err_epdata;
402 }
403
404 /* TODO claim bandwidth with usb_claim_bandwidth?
405 * also release it somewhere! */
406
407 urb->hcpriv = urbp;
408
409 urb->actual_length = 0; /* Nothing received/transmitted yet */
410
411 switch (usb_pipetype(urb->pipe)) {
412 case PIPE_CONTROL:
413 urb->interval = SETUP_STAGE;
414 break;
415 case PIPE_INTERRUPT:
416 break;
417 case PIPE_BULK:
418 break;
419 case PIPE_ISOCHRONOUS:
420 if (c67x00->urb_iso_count == 0)
421 c67x00->max_frame_bw = MAX_FRAME_BW_ISO;
422 c67x00->urb_iso_count++;
423 /* Assume always URB_ISO_ASAP, FIXME */
424 if (list_empty(&urbp->ep_data->queue))
425 urb->start_frame = urbp->ep_data->next_frame;
426 else {
427 /* Go right after the last one */
428 struct urb *last_urb;
429
430 last_urb = list_entry(urbp->ep_data->queue.prev,
431 struct c67x00_urb_priv,
432 hep_node)->urb;
433 urb->start_frame =
434 frame_add(last_urb->start_frame,
435 last_urb->number_of_packets *
436 last_urb->interval);
437 }
438 urbp->cnt = 0;
439 break;
440 }
441
442 /* Add the URB to the endpoint queue */
443 list_add_tail(&urbp->hep_node, &urbp->ep_data->queue);
444
445 /* If this is the only URB, kick start the controller */
446 if (!c67x00->urb_count++)
447 c67x00_ll_hpi_enable_sofeop(c67x00->sie);
448
449 c67x00_sched_kick(c67x00);
450 spin_unlock_irqrestore(&c67x00->lock, flags);
451
452 return 0;
453
454err_epdata:
455 kfree(urbp);
456err_urbp:
457 usb_hcd_unlink_urb_from_ep(hcd, urb);
458err_not_linked:
459 spin_unlock_irqrestore(&c67x00->lock, flags);
460
461 return ret;
462}
463
464int c67x00_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
465{
466 struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd);
467 unsigned long flags;
468 int rc;
469
470 spin_lock_irqsave(&c67x00->lock, flags);
471 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
472 if (rc)
473 goto done;
474
475 c67x00_release_urb(c67x00, urb);
476 usb_hcd_unlink_urb_from_ep(hcd, urb);
477
478 spin_unlock(&c67x00->lock);
479 usb_hcd_giveback_urb(hcd, urb, status);
480 spin_lock(&c67x00->lock);
481
482 spin_unlock_irqrestore(&c67x00->lock, flags);
483
484 return 0;
485
486 done:
487 spin_unlock_irqrestore(&c67x00->lock, flags);
488 return rc;
489}
490
491/* -------------------------------------------------------------------------- */
492
493/*
494 * pre: c67x00 locked, urb unlocked
495 */
496static void
497c67x00_giveback_urb(struct c67x00_hcd *c67x00, struct urb *urb, int status)
498{
499 struct c67x00_urb_priv *urbp;
500
501 if (!urb)
502 return;
503
504 urbp = urb->hcpriv;
505 urbp->status = status;
506
507 list_del_init(&urbp->hep_node);
508
509 c67x00_release_urb(c67x00, urb);
510 usb_hcd_unlink_urb_from_ep(c67x00_hcd_to_hcd(c67x00), urb);
511 spin_unlock(&c67x00->lock);
512 usb_hcd_giveback_urb(c67x00_hcd_to_hcd(c67x00), urb, urbp->status);
513 spin_lock(&c67x00->lock);
514}
515
516/* -------------------------------------------------------------------------- */
517
518static int c67x00_claim_frame_bw(struct c67x00_hcd *c67x00, struct urb *urb,
519 int len, int periodic)
520{
521 struct c67x00_urb_priv *urbp = urb->hcpriv;
522 int bit_time;
523
524 /* According to the C67x00 BIOS user manual, page 3-18,19, the
525 * following calculations provide the full speed bit times for
526 * a transaction.
527 *
528 * FS(in) = 112.5 + 9.36*BC + HOST_DELAY
529 * FS(in,iso) = 90.5 + 9.36*BC + HOST_DELAY
530 * FS(out) = 112.5 + 9.36*BC + HOST_DELAY
531 * FS(out,iso) = 78.4 + 9.36*BC + HOST_DELAY
532 * LS(in) = 802.4 + 75.78*BC + HOST_DELAY
533 * LS(out) = 802.6 + 74.67*BC + HOST_DELAY
534 *
535 * HOST_DELAY == 106 for the c67200 and c67300.
536 */
537
538 /* make calculations in 1/100 bit times to maintain resolution */
539 if (urbp->ep_data->dev->speed == USB_SPEED_LOW) {
540 /* Low speed pipe */
541 if (usb_pipein(urb->pipe))
542 bit_time = 80240 + 7578*len;
543 else
544 bit_time = 80260 + 7467*len;
545 } else {
546 /* FS pipes */
547 if (usb_pipeisoc(urb->pipe))
548 bit_time = usb_pipein(urb->pipe) ? 9050 : 7840;
549 else
550 bit_time = 11250;
551 bit_time += 936*len;
552 }
553
554 /* Scale back down to integer bit times. Use a host delay of 106.
555 * (this is the only place it is used) */
556 bit_time = ((bit_time+50) / 100) + 106;
557
558 if (unlikely(bit_time + c67x00->bandwidth_allocated >=
559 c67x00->max_frame_bw))
560 return -EMSGSIZE;
561
562 if (unlikely(c67x00->next_td_addr + CY_TD_SIZE >=
563 c67x00->td_base_addr + SIE_TD_SIZE))
564 return -EMSGSIZE;
565
566 if (unlikely(c67x00->next_buf_addr + len >=
567 c67x00->buf_base_addr + SIE_TD_BUF_SIZE))
568 return -EMSGSIZE;
569
570 if (periodic) {
571 if (unlikely(bit_time + c67x00->periodic_bw_allocated >=
572 MAX_PERIODIC_BW(c67x00->max_frame_bw)))
573 return -EMSGSIZE;
574 c67x00->periodic_bw_allocated += bit_time;
575 }
576
577 c67x00->bandwidth_allocated += bit_time;
578 return 0;
579}
580
581/* -------------------------------------------------------------------------- */
582
583/**
584 * td_addr and buf_addr must be word aligned
585 */
586static int c67x00_create_td(struct c67x00_hcd *c67x00, struct urb *urb,
587 void *data, int len, int pid, int toggle,
588 unsigned long privdata)
589{
590 struct c67x00_td *td;
591 struct c67x00_urb_priv *urbp = urb->hcpriv;
592 const __u8 active_flag = 1, retry_cnt = 1;
593 __u8 cmd = 0;
594 int tt = 0;
595
596 if (c67x00_claim_frame_bw(c67x00, urb, len, usb_pipeisoc(urb->pipe)
597 || usb_pipeint(urb->pipe)))
598 return -EMSGSIZE; /* Not really an error, but expected */
599
600 td = kzalloc(sizeof(*td), GFP_ATOMIC);
601 if (!td)
602 return -ENOMEM;
603
604 td->pipe = urb->pipe;
605 td->ep_data = urbp->ep_data;
606
607 if ((td_udev(td)->speed == USB_SPEED_LOW) &&
608 !(c67x00->low_speed_ports & (1 << urbp->port)))
609 cmd |= PREAMBLE_EN;
610
611 switch (usb_pipetype(td->pipe)) {
612 case PIPE_ISOCHRONOUS:
613 tt = TT_ISOCHRONOUS;
614 cmd |= ISO_EN;
615 break;
616 case PIPE_CONTROL:
617 tt = TT_CONTROL;
618 break;
619 case PIPE_BULK:
620 tt = TT_BULK;
621 break;
622 case PIPE_INTERRUPT:
623 tt = TT_INTERRUPT;
624 break;
625 }
626
627 if (toggle)
628 cmd |= SEQ_SEL;
629
630 cmd |= ARM_EN;
631
632 /* SW part */
633 td->td_addr = c67x00->next_td_addr;
634 c67x00->next_td_addr = c67x00->next_td_addr + CY_TD_SIZE;
635
636 /* HW part */
637 td->ly_base_addr = __cpu_to_le16(c67x00->next_buf_addr);
638 td->port_length = __cpu_to_le16((c67x00->sie->sie_num << 15) |
639 (urbp->port << 14) | (len & 0x3FF));
640 td->pid_ep = ((pid & 0xF) << TD_PIDEP_OFFSET) |
641 (usb_pipeendpoint(td->pipe) & 0xF);
642 td->dev_addr = usb_pipedevice(td->pipe) & 0x7F;
643 td->ctrl_reg = cmd;
644 td->status = 0;
645 td->retry_cnt = (tt << TT_OFFSET) | (active_flag << 4) | retry_cnt;
646 td->residue = 0;
647 td->next_td_addr = __cpu_to_le16(c67x00->next_td_addr);
648
649 /* SW part */
650 td->data = data;
651 td->urb = urb;
652 td->privdata = privdata;
653
654 c67x00->next_buf_addr += (len + 1) & ~0x01; /* properly align */
655
656 list_add_tail(&td->td_list, &c67x00->td_list);
657 return 0;
658}
659
660static inline void c67x00_release_td(struct c67x00_td *td)
661{
662 list_del_init(&td->td_list);
663 kfree(td);
664}
665
666/* -------------------------------------------------------------------------- */
667
668static int c67x00_add_data_urb(struct c67x00_hcd *c67x00, struct urb *urb)
669{
670 int remaining;
671 int toggle;
672 int pid;
673 int ret = 0;
674 int maxps;
675 int need_empty;
676
677 toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
678 usb_pipeout(urb->pipe));
679 remaining = urb->transfer_buffer_length - urb->actual_length;
680
681 maxps = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
682
683 need_empty = (urb->transfer_flags & URB_ZERO_PACKET) &&
684 usb_pipeout(urb->pipe) && !(remaining % maxps);
685
686 while (remaining || need_empty) {
687 int len;
688 char *td_buf;
689
690 len = (remaining > maxps) ? maxps : remaining;
691 if (!len)
692 need_empty = 0;
693
694 pid = usb_pipeout(urb->pipe) ? USB_PID_OUT : USB_PID_IN;
695 td_buf = urb->transfer_buffer + urb->transfer_buffer_length -
696 remaining;
697 ret = c67x00_create_td(c67x00, urb, td_buf, len, pid, toggle,
698 DATA_STAGE);
699 if (ret)
700 return ret; /* td wasn't created */
701
702 toggle ^= 1;
703 remaining -= len;
704 if (usb_pipecontrol(urb->pipe))
705 break;
706 }
707
708 return 0;
709}
710
711/**
712 * return 0 in case more bandwidth is available, else errorcode
713 */
714static int c67x00_add_ctrl_urb(struct c67x00_hcd *c67x00, struct urb *urb)
715{
716 int ret;
717 int pid;
718
719 switch (urb->interval) {
720 default:
721 case SETUP_STAGE:
722 ret = c67x00_create_td(c67x00, urb, urb->setup_packet,
723 8, USB_PID_SETUP, 0, SETUP_STAGE);
724 if (ret)
725 return ret;
726 urb->interval = SETUP_STAGE;
727 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
728 usb_pipeout(urb->pipe), 1);
729 break;
730 case DATA_STAGE:
731 if (urb->transfer_buffer_length) {
732 ret = c67x00_add_data_urb(c67x00, urb);
733 if (ret)
734 return ret;
735 break;
736 } /* else fallthrough */
737 case STATUS_STAGE:
738 pid = !usb_pipeout(urb->pipe) ? USB_PID_OUT : USB_PID_IN;
739 ret = c67x00_create_td(c67x00, urb, NULL, 0, pid, 1,
740 STATUS_STAGE);
741 if (ret)
742 return ret;
743 break;
744 }
745
746 return 0;
747}
748
749/*
750 * return 0 in case more bandwidth is available, else errorcode
751 */
752static int c67x00_add_int_urb(struct c67x00_hcd *c67x00, struct urb *urb)
753{
754 struct c67x00_urb_priv *urbp = urb->hcpriv;
755
756 if (frame_after_eq(c67x00->current_frame, urbp->ep_data->next_frame)) {
757 urbp->ep_data->next_frame =
758 frame_add(urbp->ep_data->next_frame, urb->interval);
759 return c67x00_add_data_urb(c67x00, urb);
760 }
761 return 0;
762}
763
764static int c67x00_add_iso_urb(struct c67x00_hcd *c67x00, struct urb *urb)
765{
766 struct c67x00_urb_priv *urbp = urb->hcpriv;
767
768 if (frame_after_eq(c67x00->current_frame, urbp->ep_data->next_frame)) {
769 char *td_buf;
770 int len, pid, ret;
771
772 BUG_ON(urbp->cnt >= urb->number_of_packets);
773
774 td_buf = urb->transfer_buffer +
775 urb->iso_frame_desc[urbp->cnt].offset;
776 len = urb->iso_frame_desc[urbp->cnt].length;
777 pid = usb_pipeout(urb->pipe) ? USB_PID_OUT : USB_PID_IN;
778
779 ret = c67x00_create_td(c67x00, urb, td_buf, len, pid, 0,
780 urbp->cnt);
781 if (ret) {
782 printk(KERN_DEBUG "create failed: %d\n", ret);
783 urb->iso_frame_desc[urbp->cnt].actual_length = 0;
784 urb->iso_frame_desc[urbp->cnt].status = ret;
785 if (urbp->cnt + 1 == urb->number_of_packets)
786 c67x00_giveback_urb(c67x00, urb, 0);
787 }
788
789 urbp->ep_data->next_frame =
790 frame_add(urbp->ep_data->next_frame, urb->interval);
791 urbp->cnt++;
792 }
793 return 0;
794}
795
796/* -------------------------------------------------------------------------- */
797
798static void c67x00_fill_from_list(struct c67x00_hcd *c67x00, int type,
799 int (*add)(struct c67x00_hcd *, struct urb *))
800{
801 struct c67x00_ep_data *ep_data;
802 struct urb *urb;
803
804 /* traverse every endpoint on the list */
805 list_for_each_entry(ep_data, &c67x00->list[type], node) {
806 if (!list_empty(&ep_data->queue)) {
807 /* and add the first urb */
808 /* isochronous transfer rely on this */
809 urb = list_entry(ep_data->queue.next,
810 struct c67x00_urb_priv,
811 hep_node)->urb;
812 add(c67x00, urb);
813 }
814 }
815}
816
817static void c67x00_fill_frame(struct c67x00_hcd *c67x00)
818{
819 struct c67x00_td *td, *ttd;
820
821 /* Check if we can proceed */
822 if (!list_empty(&c67x00->td_list)) {
823 dev_warn(c67x00_hcd_dev(c67x00),
824 "TD list not empty! This should not happen!\n");
825 list_for_each_entry_safe(td, ttd, &c67x00->td_list, td_list) {
826 dbg_td(c67x00, td, "Unprocessed td");
827 c67x00_release_td(td);
828 }
829 }
830
831 /* Reinitialize variables */
832 c67x00->bandwidth_allocated = 0;
833 c67x00->periodic_bw_allocated = 0;
834
835 c67x00->next_td_addr = c67x00->td_base_addr;
836 c67x00->next_buf_addr = c67x00->buf_base_addr;
837
838 /* Fill the list */
839 c67x00_fill_from_list(c67x00, PIPE_ISOCHRONOUS, c67x00_add_iso_urb);
840 c67x00_fill_from_list(c67x00, PIPE_INTERRUPT, c67x00_add_int_urb);
841 c67x00_fill_from_list(c67x00, PIPE_CONTROL, c67x00_add_ctrl_urb);
842 c67x00_fill_from_list(c67x00, PIPE_BULK, c67x00_add_data_urb);
843}
844
845/* -------------------------------------------------------------------------- */
846
847/**
848 * Get TD from C67X00
849 */
850static inline void
851c67x00_parse_td(struct c67x00_hcd *c67x00, struct c67x00_td *td)
852{
853 c67x00_ll_read_mem_le16(c67x00->sie->dev,
854 td->td_addr, td, CY_TD_SIZE);
855
856 if (usb_pipein(td->pipe) && td_actual_bytes(td))
857 c67x00_ll_read_mem_le16(c67x00->sie->dev, td_ly_base_addr(td),
858 td->data, td_actual_bytes(td));
859}
860
861static int c67x00_td_to_error(struct c67x00_hcd *c67x00, struct c67x00_td *td)
862{
863 if (td->status & TD_STATUSMASK_ERR) {
864 dbg_td(c67x00, td, "ERROR_FLAG");
865 return -EILSEQ;
866 }
867 if (td->status & TD_STATUSMASK_STALL) {
868 /* dbg_td(c67x00, td, "STALL"); */
869 return -EPIPE;
870 }
871 if (td->status & TD_STATUSMASK_TMOUT) {
872 dbg_td(c67x00, td, "TIMEOUT");
873 return -ETIMEDOUT;
874 }
875
876 return 0;
877}
878
879static inline int c67x00_end_of_data(struct c67x00_td *td)
880{
881 int maxps, need_empty, remaining;
882 struct urb *urb = td->urb;
883 int act_bytes;
884
885 act_bytes = td_actual_bytes(td);
886
887 if (unlikely(!act_bytes))
888 return 1; /* This was an empty packet */
889
890 maxps = usb_maxpacket(td_udev(td), td->pipe, usb_pipeout(td->pipe));
891
892 if (unlikely(act_bytes < maxps))
893 return 1; /* Smaller then full packet */
894
895 remaining = urb->transfer_buffer_length - urb->actual_length;
896 need_empty = (urb->transfer_flags & URB_ZERO_PACKET) &&
897 usb_pipeout(urb->pipe) && !(remaining % maxps);
898
899 if (unlikely(!remaining && !need_empty))
900 return 1;
901
902 return 0;
903}
904
905/* -------------------------------------------------------------------------- */
906
907/* Remove all td's from the list which come
908 * after last_td and are meant for the same pipe.
909 * This is used when a short packet has occured */
910static inline void c67x00_clear_pipe(struct c67x00_hcd *c67x00,
911 struct c67x00_td *last_td)
912{
913 struct c67x00_td *td, *tmp;
914 td = last_td;
915 tmp = last_td;
916 while (td->td_list.next != &c67x00->td_list) {
917 td = list_entry(td->td_list.next, struct c67x00_td, td_list);
918 if (td->pipe == last_td->pipe) {
919 c67x00_release_td(td);
920 td = tmp;
921 }
922 tmp = td;
923 }
924}
925
926/* -------------------------------------------------------------------------- */
927
928static void c67x00_handle_successful_td(struct c67x00_hcd *c67x00,
929 struct c67x00_td *td)
930{
931 struct urb *urb = td->urb;
932
933 if (!urb)
934 return;
935
936 urb->actual_length += td_actual_bytes(td);
937
938 switch (usb_pipetype(td->pipe)) {
939 /* isochronous tds are handled separately */
940 case PIPE_CONTROL:
941 switch (td->privdata) {
942 case SETUP_STAGE:
943 urb->interval =
944 urb->transfer_buffer_length ?
945 DATA_STAGE : STATUS_STAGE;
946 /* Don't count setup_packet with normal data: */
947 urb->actual_length = 0;
948 break;
949
950 case DATA_STAGE:
951 if (c67x00_end_of_data(td)) {
952 urb->interval = STATUS_STAGE;
953 c67x00_clear_pipe(c67x00, td);
954 }
955 break;
956
957 case STATUS_STAGE:
958 urb->interval = 0;
959 c67x00_giveback_urb(c67x00, urb, 0);
960 break;
961 }
962 break;
963
964 case PIPE_INTERRUPT:
965 case PIPE_BULK:
966 if (unlikely(c67x00_end_of_data(td))) {
967 c67x00_clear_pipe(c67x00, td);
968 c67x00_giveback_urb(c67x00, urb, 0);
969 }
970 break;
971 }
972}
973
974static void c67x00_handle_isoc(struct c67x00_hcd *c67x00, struct c67x00_td *td)
975{
976 struct urb *urb = td->urb;
977 struct c67x00_urb_priv *urbp;
978 int cnt;
979
980 if (!urb)
981 return;
982
983 urbp = urb->hcpriv;
984 cnt = td->privdata;
985
986 if (td->status & TD_ERROR_MASK)
987 urb->error_count++;
988
989 urb->iso_frame_desc[cnt].actual_length = td_actual_bytes(td);
990 urb->iso_frame_desc[cnt].status = c67x00_td_to_error(c67x00, td);
991 if (cnt + 1 == urb->number_of_packets) /* Last packet */
992 c67x00_giveback_urb(c67x00, urb, 0);
993}
994
995/* -------------------------------------------------------------------------- */
996
997/**
998 * c67x00_check_td_list - handle tds which have been processed by the c67x00
999 * pre: current_td == 0
1000 */
1001static inline void c67x00_check_td_list(struct c67x00_hcd *c67x00)
1002{
1003 struct c67x00_td *td, *tmp;
1004 struct urb *urb;
1005 int ack_ok;
1006 int clear_endpoint;
1007
1008 list_for_each_entry_safe(td, tmp, &c67x00->td_list, td_list) {
1009 /* get the TD */
1010 c67x00_parse_td(c67x00, td);
1011 urb = td->urb; /* urb can be NULL! */
1012 ack_ok = 0;
1013 clear_endpoint = 1;
1014
1015 /* Handle isochronous transfers separately */
1016 if (usb_pipeisoc(td->pipe)) {
1017 clear_endpoint = 0;
1018 c67x00_handle_isoc(c67x00, td);
1019 goto cont;
1020 }
1021
1022 /* When an error occurs, all td's for that pipe go into an
1023 * inactive state. This state matches successful transfers so
1024 * we must make sure not to service them. */
1025 if (td->status & TD_ERROR_MASK) {
1026 c67x00_giveback_urb(c67x00, urb,
1027 c67x00_td_to_error(c67x00, td));
1028 goto cont;
1029 }
1030
1031 if ((td->status & TD_STATUSMASK_NAK) || !td_sequence_ok(td) ||
1032 !td_acked(td))
1033 goto cont;
1034
1035 /* Sequence ok and acked, don't need to fix toggle */
1036 ack_ok = 1;
1037
1038 if (unlikely(td->status & TD_STATUSMASK_OVF)) {
1039 if (td_residue(td) & TD_RESIDUE_OVERFLOW) {
1040 /* Overflow */
1041 c67x00_giveback_urb(c67x00, urb, -EOVERFLOW);
1042 goto cont;
1043 }
1044 }
1045
1046 clear_endpoint = 0;
1047 c67x00_handle_successful_td(c67x00, td);
1048
1049cont:
1050 if (clear_endpoint)
1051 c67x00_clear_pipe(c67x00, td);
1052 if (ack_ok)
1053 usb_settoggle(td_udev(td), usb_pipeendpoint(td->pipe),
1054 usb_pipeout(td->pipe),
1055 !(td->ctrl_reg & SEQ_SEL));
1056 /* next in list could have been removed, due to clear_pipe! */
1057 tmp = list_entry(td->td_list.next, typeof(*td), td_list);
1058 c67x00_release_td(td);
1059 }
1060}
1061
1062/* -------------------------------------------------------------------------- */
1063
1064static inline int c67x00_all_tds_processed(struct c67x00_hcd *c67x00)
1065{
1066 /* If all tds are processed, we can check the previous frame (if
1067 * there was any) and start our next frame.
1068 */
1069 return !c67x00_ll_husb_get_current_td(c67x00->sie);
1070}
1071
1072/**
1073 * Send td to C67X00
1074 */
1075static void c67x00_send_td(struct c67x00_hcd *c67x00, struct c67x00_td *td)
1076{
1077 int len = td_length(td);
1078
1079 if (len && ((td->pid_ep & TD_PIDEPMASK_PID) != TD_PID_IN))
1080 c67x00_ll_write_mem_le16(c67x00->sie->dev, td_ly_base_addr(td),
1081 td->data, len);
1082
1083 c67x00_ll_write_mem_le16(c67x00->sie->dev,
1084 td->td_addr, td, CY_TD_SIZE);
1085}
1086
1087static void c67x00_send_frame(struct c67x00_hcd *c67x00)
1088{
1089 struct c67x00_td *td;
1090
1091 if (list_empty(&c67x00->td_list))
1092 dev_warn(c67x00_hcd_dev(c67x00),
1093 "%s: td list should not be empty here!\n",
1094 __func__);
1095
1096 list_for_each_entry(td, &c67x00->td_list, td_list) {
1097 if (td->td_list.next == &c67x00->td_list)
1098 td->next_td_addr = 0; /* Last td in list */
1099
1100 c67x00_send_td(c67x00, td);
1101 }
1102
1103 c67x00_ll_husb_set_current_td(c67x00->sie, c67x00->td_base_addr);
1104}
1105
1106/* -------------------------------------------------------------------------- */
1107
1108/**
1109 * c67x00_do_work - Schedulers state machine
1110 */
1111static void c67x00_do_work(struct c67x00_hcd *c67x00)
1112{
1113 spin_lock(&c67x00->lock);
1114 /* Make sure all tds are processed */
1115 if (!c67x00_all_tds_processed(c67x00))
1116 goto out;
1117
1118 c67x00_check_td_list(c67x00);
1119
1120 /* no td's are being processed (current == 0)
1121 * and all have been "checked" */
1122 complete(&c67x00->endpoint_disable);
1123
1124 if (!list_empty(&c67x00->td_list))
1125 goto out;
1126
1127 c67x00->current_frame = c67x00_get_current_frame_number(c67x00);
1128 if (c67x00->current_frame == c67x00->last_frame)
1129 goto out; /* Don't send tds in same frame */
1130 c67x00->last_frame = c67x00->current_frame;
1131
1132 /* If no urbs are scheduled, our work is done */
1133 if (!c67x00->urb_count) {
1134 c67x00_ll_hpi_disable_sofeop(c67x00->sie);
1135 goto out;
1136 }
1137
1138 c67x00_fill_frame(c67x00);
1139 if (!list_empty(&c67x00->td_list))
1140 /* TD's have been added to the frame */
1141 c67x00_send_frame(c67x00);
1142
1143 out:
1144 spin_unlock(&c67x00->lock);
1145}
1146
1147/* -------------------------------------------------------------------------- */
1148
1149static void c67x00_sched_tasklet(unsigned long __c67x00)
1150{
1151 struct c67x00_hcd *c67x00 = (struct c67x00_hcd *)__c67x00;
1152 c67x00_do_work(c67x00);
1153}
1154
1155void c67x00_sched_kick(struct c67x00_hcd *c67x00)
1156{
1157 tasklet_hi_schedule(&c67x00->tasklet);
1158}
1159
1160int c67x00_sched_start_scheduler(struct c67x00_hcd *c67x00)
1161{
1162 tasklet_init(&c67x00->tasklet, c67x00_sched_tasklet,
1163 (unsigned long)c67x00);
1164 return 0;
1165}
1166
1167void c67x00_sched_stop_scheduler(struct c67x00_hcd *c67x00)
1168{
1169 tasklet_kill(&c67x00->tasklet);
1170}
diff --git a/drivers/usb/c67x00/c67x00.h b/drivers/usb/c67x00/c67x00.h
new file mode 100644
index 00000000000..a26e9ded0f3
--- /dev/null
+++ b/drivers/usb/c67x00/c67x00.h
@@ -0,0 +1,294 @@
1/*
2 * c67x00.h: Cypress C67X00 USB register and field definitions
3 *
4 * Copyright (C) 2006-2008 Barco N.V.
5 * Derived from the Cypress cy7c67200/300 ezusb linux driver and
6 * based on multiple host controller drivers inside the linux kernel.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 * MA 02110-1301 USA.
22 */
23
24#ifndef _USB_C67X00_H
25#define _USB_C67X00_H
26
27#include <linux/spinlock.h>
28#include <linux/platform_device.h>
29#include <linux/completion.h>
30#include <linux/mutex.h>
31
32/* ---------------------------------------------------------------------
33 * Cypress C67x00 register definitions
34 */
35
36/* Hardware Revision Register */
37#define HW_REV_REG 0xC004
38
39/* General USB registers */
40/* ===================== */
41
42/* USB Control Register */
43#define USB_CTL_REG(x) ((x) ? 0xC0AA : 0xC08A)
44
45#define LOW_SPEED_PORT(x) ((x) ? 0x0800 : 0x0400)
46#define HOST_MODE 0x0200
47#define PORT_RES_EN(x) ((x) ? 0x0100 : 0x0080)
48#define SOF_EOP_EN(x) ((x) ? 0x0002 : 0x0001)
49
50/* USB status register - Notice it has different content in hcd/udc mode */
51#define USB_STAT_REG(x) ((x) ? 0xC0B0 : 0xC090)
52
53#define EP0_IRQ_FLG 0x0001
54#define EP1_IRQ_FLG 0x0002
55#define EP2_IRQ_FLG 0x0004
56#define EP3_IRQ_FLG 0x0008
57#define EP4_IRQ_FLG 0x0010
58#define EP5_IRQ_FLG 0x0020
59#define EP6_IRQ_FLG 0x0040
60#define EP7_IRQ_FLG 0x0080
61#define RESET_IRQ_FLG 0x0100
62#define SOF_EOP_IRQ_FLG 0x0200
63#define ID_IRQ_FLG 0x4000
64#define VBUS_IRQ_FLG 0x8000
65
66/* USB Host only registers */
67/* ======================= */
68
69/* Host n Control Register */
70#define HOST_CTL_REG(x) ((x) ? 0xC0A0 : 0xC080)
71
72#define PREAMBLE_EN 0x0080 /* Preamble enable */
73#define SEQ_SEL 0x0040 /* Data Toggle Sequence Bit Select */
74#define ISO_EN 0x0010 /* Isochronous enable */
75#define ARM_EN 0x0001 /* Arm operation */
76
77/* Host n Interrupt Enable Register */
78#define HOST_IRQ_EN_REG(x) ((x) ? 0xC0AC : 0xC08C)
79
80#define SOF_EOP_IRQ_EN 0x0200 /* SOF/EOP Interrupt Enable */
81#define SOF_EOP_TMOUT_IRQ_EN 0x0800 /* SOF/EOP Timeout Interrupt Enable */
82#define ID_IRQ_EN 0x4000 /* ID interrupt enable */
83#define VBUS_IRQ_EN 0x8000 /* VBUS interrupt enable */
84#define DONE_IRQ_EN 0x0001 /* Done Interrupt Enable */
85
86/* USB status register */
87#define HOST_STAT_MASK 0x02FD
88#define PORT_CONNECT_CHANGE(x) ((x) ? 0x0020 : 0x0010)
89#define PORT_SE0_STATUS(x) ((x) ? 0x0008 : 0x0004)
90
91/* Host Frame Register */
92#define HOST_FRAME_REG(x) ((x) ? 0xC0B6 : 0xC096)
93
94#define HOST_FRAME_MASK 0x07FF
95
96/* USB Peripheral only registers */
97/* ============================= */
98
99/* Device n Port Sel reg */
100#define DEVICE_N_PORT_SEL(x) ((x) ? 0xC0A4 : 0xC084)
101
102/* Device n Interrupt Enable Register */
103#define DEVICE_N_IRQ_EN_REG(x) ((x) ? 0xC0AC : 0xC08C)
104
105#define DEVICE_N_ENDPOINT_N_CTL_REG(dev, ep) ((dev) \
106 ? (0x0280 + (ep << 4)) \
107 : (0x0200 + (ep << 4)))
108#define DEVICE_N_ENDPOINT_N_STAT_REG(dev, ep) ((dev) \
109 ? (0x0286 + (ep << 4)) \
110 : (0x0206 + (ep << 4)))
111
112#define DEVICE_N_ADDRESS(dev) ((dev) ? (0xC0AE) : (0xC08E))
113
114/* HPI registers */
115/* ============= */
116
117/* HPI Status register */
118#define SOFEOP_FLG(x) (1 << ((x) ? 12 : 10))
119#define SIEMSG_FLG(x) (1 << (4 + (x)))
120#define RESET_FLG(x) ((x) ? 0x0200 : 0x0002)
121#define DONE_FLG(x) (1 << (2 + (x)))
122#define RESUME_FLG(x) (1 << (6 + (x)))
123#define MBX_OUT_FLG 0x0001 /* Message out available */
124#define MBX_IN_FLG 0x0100
125#define ID_FLG 0x4000
126#define VBUS_FLG 0x8000
127
128/* Interrupt routing register */
129#define HPI_IRQ_ROUTING_REG 0x0142
130
131#define HPI_SWAP_ENABLE(x) ((x) ? 0x0100 : 0x0001)
132#define RESET_TO_HPI_ENABLE(x) ((x) ? 0x0200 : 0x0002)
133#define DONE_TO_HPI_ENABLE(x) ((x) ? 0x0008 : 0x0004)
134#define RESUME_TO_HPI_ENABLE(x) ((x) ? 0x0080 : 0x0040)
135#define SOFEOP_TO_HPI_EN(x) ((x) ? 0x2000 : 0x0800)
136#define SOFEOP_TO_CPU_EN(x) ((x) ? 0x1000 : 0x0400)
137#define ID_TO_HPI_ENABLE 0x4000
138#define VBUS_TO_HPI_ENABLE 0x8000
139
140/* SIE msg registers */
141#define SIEMSG_REG(x) ((x) ? 0x0148 : 0x0144)
142
143#define HUSB_TDListDone 0x1000
144
145#define SUSB_EP0_MSG 0x0001
146#define SUSB_EP1_MSG 0x0002
147#define SUSB_EP2_MSG 0x0004
148#define SUSB_EP3_MSG 0x0008
149#define SUSB_EP4_MSG 0x0010
150#define SUSB_EP5_MSG 0x0020
151#define SUSB_EP6_MSG 0x0040
152#define SUSB_EP7_MSG 0x0080
153#define SUSB_RST_MSG 0x0100
154#define SUSB_SOF_MSG 0x0200
155#define SUSB_CFG_MSG 0x0400
156#define SUSB_SUS_MSG 0x0800
157#define SUSB_ID_MSG 0x4000
158#define SUSB_VBUS_MSG 0x8000
159
160/* BIOS interrupt routines */
161
162#define SUSBx_RECEIVE_INT(x) ((x) ? 97 : 81)
163#define SUSBx_SEND_INT(x) ((x) ? 96 : 80)
164
165#define SUSBx_DEV_DESC_VEC(x) ((x) ? 0x00D4 : 0x00B4)
166#define SUSBx_CONF_DESC_VEC(x) ((x) ? 0x00D6 : 0x00B6)
167#define SUSBx_STRING_DESC_VEC(x) ((x) ? 0x00D8 : 0x00B8)
168
169#define CY_HCD_BUF_ADDR 0x500 /* Base address for host */
170#define SIE_TD_SIZE 0x200 /* size of the td list */
171#define SIE_TD_BUF_SIZE 0x400 /* size of the data buffer */
172
173#define SIE_TD_OFFSET(host) ((host) ? (SIE_TD_SIZE+SIE_TD_BUF_SIZE) : 0)
174#define SIE_BUF_OFFSET(host) (SIE_TD_OFFSET(host) + SIE_TD_SIZE)
175
176/* Base address of HCD + 2 x TD_SIZE + 2 x TD_BUF_SIZE */
177#define CY_UDC_REQ_HEADER_BASE 0x1100
178/* 8- byte request headers for IN/OUT transfers */
179#define CY_UDC_REQ_HEADER_SIZE 8
180
181#define CY_UDC_REQ_HEADER_ADDR(ep_num) (CY_UDC_REQ_HEADER_BASE + \
182 ((ep_num) * CY_UDC_REQ_HEADER_SIZE))
183#define CY_UDC_DESC_BASE_ADDRESS (CY_UDC_REQ_HEADER_ADDR(8))
184
185#define CY_UDC_BIOS_REPLACE_BASE 0x1800
186#define CY_UDC_REQ_BUFFER_BASE 0x2000
187#define CY_UDC_REQ_BUFFER_SIZE 0x0400
188#define CY_UDC_REQ_BUFFER_ADDR(ep_num) (CY_UDC_REQ_BUFFER_BASE + \
189 ((ep_num) * CY_UDC_REQ_BUFFER_SIZE))
190
191/* ---------------------------------------------------------------------
192 * Driver data structures
193 */
194
195struct c67x00_device;
196
197/**
198 * struct c67x00_sie - Common data associated with a SIE
199 * @lock: lock to protect this struct and the associated chip registers
200 * @private_data: subdriver dependent data
201 * @irq: subdriver dependent irq handler, set NULL when not used
202 * @dev: link to common driver structure
203 * @sie_num: SIE number on chip, starting from 0
204 * @mode: SIE mode (host/peripheral/otg/not used)
205 */
206struct c67x00_sie {
207 /* Entries to be used by the subdrivers */
208 spinlock_t lock; /* protect this structure */
209 void *private_data;
210 void (*irq) (struct c67x00_sie *sie, u16 int_status, u16 msg);
211
212 /* Read only: */
213 struct c67x00_device *dev;
214 int sie_num;
215 int mode;
216};
217
218#define sie_dev(s) (&(s)->dev->pdev->dev)
219
220/**
221 * struct c67x00_lcp
222 */
223struct c67x00_lcp {
224 /* Internal use only */
225 struct mutex mutex;
226 struct completion msg_received;
227 u16 last_msg;
228};
229
230/*
231 * struct c67x00_hpi
232 */
233struct c67x00_hpi {
234 void __iomem *base;
235 int regstep;
236 spinlock_t lock;
237 struct c67x00_lcp lcp;
238};
239
240#define C67X00_SIES 2
241#define C67X00_PORTS 2
242
243/**
244 * struct c67x00_device - Common data associated with a c67x00 instance
245 * @hpi: hpi addresses
246 * @sie: array of sie's on this chip
247 * @pdev: platform device of instance
248 * @pdata: configuration provided by the platform
249 */
250struct c67x00_device {
251 struct c67x00_hpi hpi;
252 struct c67x00_sie sie[C67X00_SIES];
253 struct platform_device *pdev;
254 struct c67x00_platform_data *pdata;
255};
256
257/* ---------------------------------------------------------------------
258 * Low level interface functions
259 */
260
261/* Host Port Interface (HPI) functions */
262u16 c67x00_ll_hpi_status(struct c67x00_device *dev);
263void c67x00_ll_hpi_reg_init(struct c67x00_device *dev);
264void c67x00_ll_hpi_enable_sofeop(struct c67x00_sie *sie);
265void c67x00_ll_hpi_disable_sofeop(struct c67x00_sie *sie);
266
267/* General functions */
268u16 c67x00_ll_fetch_siemsg(struct c67x00_device *dev, int sie_num);
269u16 c67x00_ll_get_usb_ctl(struct c67x00_sie *sie);
270void c67x00_ll_usb_clear_status(struct c67x00_sie *sie, u16 bits);
271u16 c67x00_ll_usb_get_status(struct c67x00_sie *sie);
272void c67x00_ll_write_mem_le16(struct c67x00_device *dev, u16 addr,
273 void *data, int len);
274void c67x00_ll_read_mem_le16(struct c67x00_device *dev, u16 addr,
275 void *data, int len);
276
277/* Host specific functions */
278void c67x00_ll_set_husb_eot(struct c67x00_device *dev, u16 value);
279void c67x00_ll_husb_reset(struct c67x00_sie *sie, int port);
280void c67x00_ll_husb_set_current_td(struct c67x00_sie *sie, u16 addr);
281u16 c67x00_ll_husb_get_current_td(struct c67x00_sie *sie);
282u16 c67x00_ll_husb_get_frame(struct c67x00_sie *sie);
283void c67x00_ll_husb_init_host_port(struct c67x00_sie *sie);
284void c67x00_ll_husb_reset_port(struct c67x00_sie *sie, int port);
285
286/* Called by c67x00_irq to handle lcp interrupts */
287void c67x00_ll_irq(struct c67x00_device *dev, u16 int_status);
288
289/* Setup and teardown */
290void c67x00_ll_init(struct c67x00_device *dev);
291void c67x00_ll_release(struct c67x00_device *dev);
292int c67x00_ll_reset(struct c67x00_device *dev);
293
294#endif /* _USB_C67X00_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-23 01:39:48 -0400