diff options
Diffstat (limited to 'drivers/staging/brcm80211/include/bcmdefs.h')
-rw-r--r-- | drivers/staging/brcm80211/include/bcmdefs.h | 108 |
1 files changed, 2 insertions, 106 deletions
diff --git a/drivers/staging/brcm80211/include/bcmdefs.h b/drivers/staging/brcm80211/include/bcmdefs.h index 76138458c62..cf9dc0e132d 100644 --- a/drivers/staging/brcm80211/include/bcmdefs.h +++ b/drivers/staging/brcm80211/include/bcmdefs.h | |||
@@ -25,7 +25,6 @@ | |||
25 | #define USB_BUS 5 | 25 | #define USB_BUS 5 |
26 | #define SPI_BUS 6 | 26 | #define SPI_BUS 6 |
27 | 27 | ||
28 | |||
29 | #ifndef OFF | 28 | #ifndef OFF |
30 | #define OFF 0 | 29 | #define OFF 0 |
31 | #endif | 30 | #endif |
@@ -36,96 +35,6 @@ | |||
36 | 35 | ||
37 | #define AUTO (-1) /* Auto = -1 */ | 36 | #define AUTO (-1) /* Auto = -1 */ |
38 | 37 | ||
39 | /* Bus types */ | ||
40 | #define SI_BUS 0 /* SOC Interconnect */ | ||
41 | #define PCI_BUS 1 /* PCI target */ | ||
42 | #define SDIO_BUS 3 /* SDIO target */ | ||
43 | #define JTAG_BUS 4 /* JTAG */ | ||
44 | #define USB_BUS 5 /* USB (does not support R/W REG) */ | ||
45 | #define SPI_BUS 6 /* gSPI target */ | ||
46 | #define RPC_BUS 7 /* RPC target */ | ||
47 | |||
48 | |||
49 | /* Defines for DMA Address Width - Shared between OSL and HNDDMA */ | ||
50 | #define DMADDR_MASK_32 0x0 /* Address mask for 32-bits */ | ||
51 | #define DMADDR_MASK_30 0xc0000000 /* Address mask for 30-bits */ | ||
52 | #define DMADDR_MASK_0 0xffffffff /* Address mask for 0-bits (hi-part) */ | ||
53 | |||
54 | #define DMADDRWIDTH_30 30 /* 30-bit addressing capability */ | ||
55 | #define DMADDRWIDTH_32 32 /* 32-bit addressing capability */ | ||
56 | #define DMADDRWIDTH_63 63 /* 64-bit addressing capability */ | ||
57 | #define DMADDRWIDTH_64 64 /* 64-bit addressing capability */ | ||
58 | |||
59 | #ifdef BCMDMA64OSL | ||
60 | typedef struct { | ||
61 | u32 loaddr; | ||
62 | u32 hiaddr; | ||
63 | } dma64addr_t; | ||
64 | |||
65 | typedef dma64addr_t dmaaddr_t; | ||
66 | #define PHYSADDRHI(_pa) ((_pa).hiaddr) | ||
67 | #define PHYSADDRHISET(_pa, _val) \ | ||
68 | do { \ | ||
69 | (_pa).hiaddr = (_val); \ | ||
70 | } while (0) | ||
71 | #define PHYSADDRLO(_pa) ((_pa).loaddr) | ||
72 | #define PHYSADDRLOSET(_pa, _val) \ | ||
73 | do { \ | ||
74 | (_pa).loaddr = (_val); \ | ||
75 | } while (0) | ||
76 | |||
77 | #else | ||
78 | typedef unsigned long dmaaddr_t; | ||
79 | #define PHYSADDRHI(_pa) (0) | ||
80 | #define PHYSADDRHISET(_pa, _val) | ||
81 | #define PHYSADDRLO(_pa) ((_pa)) | ||
82 | #define PHYSADDRLOSET(_pa, _val) \ | ||
83 | do { \ | ||
84 | (_pa) = (_val); \ | ||
85 | } while (0) | ||
86 | #endif /* BCMDMA64OSL */ | ||
87 | |||
88 | /* One physical DMA segment */ | ||
89 | typedef struct { | ||
90 | dmaaddr_t addr; | ||
91 | u32 length; | ||
92 | } dma_seg_t; | ||
93 | |||
94 | #define MAX_DMA_SEGS 4 | ||
95 | |||
96 | typedef struct { | ||
97 | void *oshdmah; /* Opaque handle for OSL to store its information */ | ||
98 | uint origsize; /* Size of the virtual packet */ | ||
99 | uint nsegs; | ||
100 | dma_seg_t segs[MAX_DMA_SEGS]; | ||
101 | } dma_seg_map_t; | ||
102 | |||
103 | /* packet headroom necessary to accommodate the largest header in the system, (i.e TXOFF). | ||
104 | * By doing, we avoid the need to allocate an extra buffer for the header when bridging to WL. | ||
105 | * There is a compile time check in wlc.c which ensure that this value is at least as big | ||
106 | * as TXOFF. This value is used in dma_rxfill (dma.c). | ||
107 | */ | ||
108 | |||
109 | #define BCMEXTRAHDROOM 172 | ||
110 | |||
111 | /* Macros for doing definition and get/set of bitfields | ||
112 | * Usage example, e.g. a three-bit field (bits 4-6): | ||
113 | * #define <NAME>_M BITFIELD_MASK(3) | ||
114 | * #define <NAME>_S 4 | ||
115 | * ... | ||
116 | * regval = R_REG(osh, ®s->regfoo); | ||
117 | * field = GFIELD(regval, <NAME>); | ||
118 | * regval = SFIELD(regval, <NAME>, 1); | ||
119 | * W_REG(osh, ®s->regfoo, regval); | ||
120 | */ | ||
121 | #define BITFIELD_MASK(width) \ | ||
122 | (((unsigned)1 << (width)) - 1) | ||
123 | #define GFIELD(val, field) \ | ||
124 | (((val) >> field ## _S) & field ## _M) | ||
125 | #define SFIELD(val, field, bits) \ | ||
126 | (((val) & (~(field ## _M << field ## _S))) | \ | ||
127 | ((unsigned)(bits) << field ## _S)) | ||
128 | |||
129 | /* | 38 | /* |
130 | * Priority definitions according 802.1D | 39 | * Priority definitions according 802.1D |
131 | */ | 40 | */ |
@@ -137,17 +46,12 @@ typedef struct { | |||
137 | #define PRIO_8021D_VI 5 | 46 | #define PRIO_8021D_VI 5 |
138 | #define PRIO_8021D_VO 6 | 47 | #define PRIO_8021D_VO 6 |
139 | #define PRIO_8021D_NC 7 | 48 | #define PRIO_8021D_NC 7 |
49 | |||
140 | #define MAXPRIO 7 | 50 | #define MAXPRIO 7 |
141 | #define NUMPRIO (MAXPRIO + 1) | 51 | #define NUMPRIO (MAXPRIO + 1) |
142 | 52 | ||
143 | /* Max. nvram variable table size */ | ||
144 | #define MAXSZ_NVRAM_VARS 4096 | ||
145 | |||
146 | /* handle forward declaration */ | ||
147 | struct wl_info; | ||
148 | struct wlc_bsscfg; | ||
149 | |||
150 | #define WL_NUMRATES 16 /* max # of rates in a rateset */ | 53 | #define WL_NUMRATES 16 /* max # of rates in a rateset */ |
54 | |||
151 | typedef struct wl_rateset { | 55 | typedef struct wl_rateset { |
152 | u32 count; /* # rates in this set */ | 56 | u32 count; /* # rates in this set */ |
153 | u8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ | 57 | u8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ |
@@ -187,16 +91,8 @@ typedef struct wl_rateset { | |||
187 | #define WL_ERROR_VAL 0x00000001 | 91 | #define WL_ERROR_VAL 0x00000001 |
188 | #define WL_TRACE_VAL 0x00000002 | 92 | #define WL_TRACE_VAL 0x00000002 |
189 | 93 | ||
190 | #define NFIFO 6 /* # tx/rx fifopairs */ | ||
191 | |||
192 | #define PM_OFF 0 | 94 | #define PM_OFF 0 |
193 | #define PM_MAX 1 | 95 | #define PM_MAX 1 |
194 | #define PM_FAST 2 | 96 | #define PM_FAST 2 |
195 | 97 | ||
196 | /* band range returned by band_range iovar */ | ||
197 | #define WL_CHAN_FREQ_RANGE_2G 0 | ||
198 | #define WL_CHAN_FREQ_RANGE_5GL 1 | ||
199 | #define WL_CHAN_FREQ_RANGE_5GM 2 | ||
200 | #define WL_CHAN_FREQ_RANGE_5GH 3 | ||
201 | |||
202 | #endif /* _bcmdefs_h_ */ | 98 | #endif /* _bcmdefs_h_ */ |