diff options
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2800lib.c')
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2800lib.c | 54 |
1 files changed, 44 insertions, 10 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c index 5f00e00789d..75631614aba 100644 --- a/drivers/net/wireless/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/rt2x00/rt2800lib.c | |||
@@ -277,13 +277,17 @@ int rt2800_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev) | |||
277 | unsigned int i; | 277 | unsigned int i; |
278 | u32 reg; | 278 | u32 reg; |
279 | 279 | ||
280 | /* | ||
281 | * Some devices are really slow to respond here. Wait a whole second | ||
282 | * before timing out. | ||
283 | */ | ||
280 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | 284 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
281 | rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, ®); | 285 | rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, ®); |
282 | if (!rt2x00_get_field32(reg, WPDMA_GLO_CFG_TX_DMA_BUSY) && | 286 | if (!rt2x00_get_field32(reg, WPDMA_GLO_CFG_TX_DMA_BUSY) && |
283 | !rt2x00_get_field32(reg, WPDMA_GLO_CFG_RX_DMA_BUSY)) | 287 | !rt2x00_get_field32(reg, WPDMA_GLO_CFG_RX_DMA_BUSY)) |
284 | return 0; | 288 | return 0; |
285 | 289 | ||
286 | msleep(1); | 290 | msleep(10); |
287 | } | 291 | } |
288 | 292 | ||
289 | ERROR(rt2x00dev, "WPDMA TX/RX busy, aborting.\n"); | 293 | ERROR(rt2x00dev, "WPDMA TX/RX busy, aborting.\n"); |
@@ -483,7 +487,7 @@ void rt2800_write_tx_data(struct queue_entry *entry, | |||
483 | txdesc->key_idx : 0xff); | 487 | txdesc->key_idx : 0xff); |
484 | rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT, | 488 | rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT, |
485 | txdesc->length); | 489 | txdesc->length); |
486 | rt2x00_set_field32(&word, TXWI_W1_PACKETID_QUEUE, txdesc->qid); | 490 | rt2x00_set_field32(&word, TXWI_W1_PACKETID_QUEUE, entry->queue->qid); |
487 | rt2x00_set_field32(&word, TXWI_W1_PACKETID_ENTRY, (entry->entry_idx % 3) + 1); | 491 | rt2x00_set_field32(&word, TXWI_W1_PACKETID_ENTRY, (entry->entry_idx % 3) + 1); |
488 | rt2x00_desc_write(txwi, 1, word); | 492 | rt2x00_desc_write(txwi, 1, word); |
489 | 493 | ||
@@ -727,7 +731,7 @@ void rt2800_txdone(struct rt2x00_dev *rt2x00dev) | |||
727 | * that the TX_STA_FIFO stack has a size of 16. We stick to our | 731 | * that the TX_STA_FIFO stack has a size of 16. We stick to our |
728 | * tx ring size for now. | 732 | * tx ring size for now. |
729 | */ | 733 | */ |
730 | for (i = 0; i < TX_ENTRIES; i++) { | 734 | for (i = 0; i < rt2x00dev->ops->tx->entry_num; i++) { |
731 | rt2800_register_read(rt2x00dev, TX_STA_FIFO, ®); | 735 | rt2800_register_read(rt2x00dev, TX_STA_FIFO, ®); |
732 | if (!rt2x00_get_field32(reg, TX_STA_FIFO_VALID)) | 736 | if (!rt2x00_get_field32(reg, TX_STA_FIFO_VALID)) |
733 | break; | 737 | break; |
@@ -824,7 +828,7 @@ void rt2800_write_beacon(struct queue_entry *entry, struct txentry_desc *txdesc) | |||
824 | } | 828 | } |
825 | EXPORT_SYMBOL_GPL(rt2800_write_beacon); | 829 | EXPORT_SYMBOL_GPL(rt2800_write_beacon); |
826 | 830 | ||
827 | static void inline rt2800_clear_beacon(struct rt2x00_dev *rt2x00dev, | 831 | static inline void rt2800_clear_beacon(struct rt2x00_dev *rt2x00dev, |
828 | unsigned int beacon_base) | 832 | unsigned int beacon_base) |
829 | { | 833 | { |
830 | int i; | 834 | int i; |
@@ -1144,6 +1148,7 @@ void rt2800_config_intf(struct rt2x00_dev *rt2x00dev, struct rt2x00_intf *intf, | |||
1144 | struct rt2x00intf_conf *conf, const unsigned int flags) | 1148 | struct rt2x00intf_conf *conf, const unsigned int flags) |
1145 | { | 1149 | { |
1146 | u32 reg; | 1150 | u32 reg; |
1151 | bool update_bssid = false; | ||
1147 | 1152 | ||
1148 | if (flags & CONFIG_UPDATE_TYPE) { | 1153 | if (flags & CONFIG_UPDATE_TYPE) { |
1149 | /* | 1154 | /* |
@@ -1173,6 +1178,16 @@ void rt2800_config_intf(struct rt2x00_dev *rt2x00dev, struct rt2x00_intf *intf, | |||
1173 | } | 1178 | } |
1174 | 1179 | ||
1175 | if (flags & CONFIG_UPDATE_MAC) { | 1180 | if (flags & CONFIG_UPDATE_MAC) { |
1181 | if (flags & CONFIG_UPDATE_TYPE && | ||
1182 | conf->sync == TSF_SYNC_AP_NONE) { | ||
1183 | /* | ||
1184 | * The BSSID register has to be set to our own mac | ||
1185 | * address in AP mode. | ||
1186 | */ | ||
1187 | memcpy(conf->bssid, conf->mac, sizeof(conf->mac)); | ||
1188 | update_bssid = true; | ||
1189 | } | ||
1190 | |||
1176 | if (!is_zero_ether_addr((const u8 *)conf->mac)) { | 1191 | if (!is_zero_ether_addr((const u8 *)conf->mac)) { |
1177 | reg = le32_to_cpu(conf->mac[1]); | 1192 | reg = le32_to_cpu(conf->mac[1]); |
1178 | rt2x00_set_field32(®, MAC_ADDR_DW1_UNICAST_TO_ME_MASK, 0xff); | 1193 | rt2x00_set_field32(®, MAC_ADDR_DW1_UNICAST_TO_ME_MASK, 0xff); |
@@ -1183,7 +1198,7 @@ void rt2800_config_intf(struct rt2x00_dev *rt2x00dev, struct rt2x00_intf *intf, | |||
1183 | conf->mac, sizeof(conf->mac)); | 1198 | conf->mac, sizeof(conf->mac)); |
1184 | } | 1199 | } |
1185 | 1200 | ||
1186 | if (flags & CONFIG_UPDATE_BSSID) { | 1201 | if ((flags & CONFIG_UPDATE_BSSID) || update_bssid) { |
1187 | if (!is_zero_ether_addr((const u8 *)conf->bssid)) { | 1202 | if (!is_zero_ether_addr((const u8 *)conf->bssid)) { |
1188 | reg = le32_to_cpu(conf->bssid[1]); | 1203 | reg = le32_to_cpu(conf->bssid[1]); |
1189 | rt2x00_set_field32(®, MAC_BSSID_DW1_BSS_ID_MASK, 3); | 1204 | rt2x00_set_field32(®, MAC_BSSID_DW1_BSS_ID_MASK, 3); |
@@ -1529,7 +1544,8 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, | |||
1529 | rt2x00_rf(rt2x00dev, RF3020) || | 1544 | rt2x00_rf(rt2x00dev, RF3020) || |
1530 | rt2x00_rf(rt2x00dev, RF3021) || | 1545 | rt2x00_rf(rt2x00dev, RF3021) || |
1531 | rt2x00_rf(rt2x00dev, RF3022) || | 1546 | rt2x00_rf(rt2x00dev, RF3022) || |
1532 | rt2x00_rf(rt2x00dev, RF3052)) | 1547 | rt2x00_rf(rt2x00dev, RF3052) || |
1548 | rt2x00_rf(rt2x00dev, RF3320)) | ||
1533 | rt2800_config_channel_rf3xxx(rt2x00dev, conf, rf, info); | 1549 | rt2800_config_channel_rf3xxx(rt2x00dev, conf, rf, info); |
1534 | else | 1550 | else |
1535 | rt2800_config_channel_rf2xxx(rt2x00dev, conf, rf, info); | 1551 | rt2800_config_channel_rf2xxx(rt2x00dev, conf, rf, info); |
@@ -2097,7 +2113,23 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) | |||
2097 | rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg); | 2113 | rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg); |
2098 | } | 2114 | } |
2099 | 2115 | ||
2100 | rt2800_register_write(rt2x00dev, TXOP_CTRL_CFG, 0x0000583f); | 2116 | /* |
2117 | * The legacy driver also sets TXOP_CTRL_CFG_RESERVED_TRUN_EN to 1 | ||
2118 | * although it is reserved. | ||
2119 | */ | ||
2120 | rt2800_register_read(rt2x00dev, TXOP_CTRL_CFG, ®); | ||
2121 | rt2x00_set_field32(®, TXOP_CTRL_CFG_TIMEOUT_TRUN_EN, 1); | ||
2122 | rt2x00_set_field32(®, TXOP_CTRL_CFG_AC_TRUN_EN, 1); | ||
2123 | rt2x00_set_field32(®, TXOP_CTRL_CFG_TXRATEGRP_TRUN_EN, 1); | ||
2124 | rt2x00_set_field32(®, TXOP_CTRL_CFG_USER_MODE_TRUN_EN, 1); | ||
2125 | rt2x00_set_field32(®, TXOP_CTRL_CFG_MIMO_PS_TRUN_EN, 1); | ||
2126 | rt2x00_set_field32(®, TXOP_CTRL_CFG_RESERVED_TRUN_EN, 1); | ||
2127 | rt2x00_set_field32(®, TXOP_CTRL_CFG_LSIG_TXOP_EN, 0); | ||
2128 | rt2x00_set_field32(®, TXOP_CTRL_CFG_EXT_CCA_EN, 0); | ||
2129 | rt2x00_set_field32(®, TXOP_CTRL_CFG_EXT_CCA_DLY, 88); | ||
2130 | rt2x00_set_field32(®, TXOP_CTRL_CFG_EXT_CWMIN, 0); | ||
2131 | rt2800_register_write(rt2x00dev, TXOP_CTRL_CFG, reg); | ||
2132 | |||
2101 | rt2800_register_write(rt2x00dev, TXOP_HLDR_ET, 0x00000002); | 2133 | rt2800_register_write(rt2x00dev, TXOP_HLDR_ET, 0x00000002); |
2102 | 2134 | ||
2103 | rt2800_register_read(rt2x00dev, TX_RTS_CFG, ®); | 2135 | rt2800_register_read(rt2x00dev, TX_RTS_CFG, ®); |
@@ -2134,7 +2166,7 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) | |||
2134 | SHARED_KEY_MODE_ENTRY(i), 0); | 2166 | SHARED_KEY_MODE_ENTRY(i), 0); |
2135 | 2167 | ||
2136 | for (i = 0; i < 256; i++) { | 2168 | for (i = 0; i < 256; i++) { |
2137 | u32 wcid[2] = { 0xffffffff, 0x00ffffff }; | 2169 | static const u32 wcid[2] = { 0xffffffff, 0x00ffffff }; |
2138 | rt2800_register_multiwrite(rt2x00dev, MAC_WCID_ENTRY(i), | 2170 | rt2800_register_multiwrite(rt2x00dev, MAC_WCID_ENTRY(i), |
2139 | wcid, sizeof(wcid)); | 2171 | wcid, sizeof(wcid)); |
2140 | 2172 | ||
@@ -2981,7 +3013,8 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev) | |||
2981 | !rt2x00_rf(rt2x00dev, RF2020) && | 3013 | !rt2x00_rf(rt2x00dev, RF2020) && |
2982 | !rt2x00_rf(rt2x00dev, RF3021) && | 3014 | !rt2x00_rf(rt2x00dev, RF3021) && |
2983 | !rt2x00_rf(rt2x00dev, RF3022) && | 3015 | !rt2x00_rf(rt2x00dev, RF3022) && |
2984 | !rt2x00_rf(rt2x00dev, RF3052)) { | 3016 | !rt2x00_rf(rt2x00dev, RF3052) && |
3017 | !rt2x00_rf(rt2x00dev, RF3320)) { | ||
2985 | ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); | 3018 | ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); |
2986 | return -ENODEV; | 3019 | return -ENODEV; |
2987 | } | 3020 | } |
@@ -3245,7 +3278,8 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
3245 | } else if (rt2x00_rf(rt2x00dev, RF3020) || | 3278 | } else if (rt2x00_rf(rt2x00dev, RF3020) || |
3246 | rt2x00_rf(rt2x00dev, RF2020) || | 3279 | rt2x00_rf(rt2x00dev, RF2020) || |
3247 | rt2x00_rf(rt2x00dev, RF3021) || | 3280 | rt2x00_rf(rt2x00dev, RF3021) || |
3248 | rt2x00_rf(rt2x00dev, RF3022)) { | 3281 | rt2x00_rf(rt2x00dev, RF3022) || |
3282 | rt2x00_rf(rt2x00dev, RF3320)) { | ||
3249 | spec->num_channels = 14; | 3283 | spec->num_channels = 14; |
3250 | spec->channels = rf_vals_3x; | 3284 | spec->channels = rf_vals_3x; |
3251 | } else if (rt2x00_rf(rt2x00dev, RF3052)) { | 3285 | } else if (rt2x00_rf(rt2x00dev, RF3052)) { |