diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath9k')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar5008_phy.c | 7 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/eeprom_9287.c | 6 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/eeprom_def.c | 7 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.h | 10 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/phy.h | 2 |
5 files changed, 27 insertions, 5 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c index ffcf44a4058..94acce59f51 100644 --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c | |||
@@ -729,6 +729,7 @@ static int ar5008_hw_process_ini(struct ath_hw *ah, | |||
729 | struct ath9k_channel *chan) | 729 | struct ath9k_channel *chan) |
730 | { | 730 | { |
731 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); | 731 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); |
732 | struct ath_common *common = ath9k_hw_common(ah); | ||
732 | int i, regWrites = 0; | 733 | int i, regWrites = 0; |
733 | struct ieee80211_channel *channel = chan->chan; | 734 | struct ieee80211_channel *channel = chan->chan; |
734 | u32 modesIndex, freqIndex; | 735 | u32 modesIndex, freqIndex; |
@@ -805,7 +806,8 @@ static int ar5008_hw_process_ini(struct ath_hw *ah, | |||
805 | REG_WRITE(ah, reg, val); | 806 | REG_WRITE(ah, reg, val); |
806 | 807 | ||
807 | if (reg >= 0x7800 && reg < 0x78a0 | 808 | if (reg >= 0x7800 && reg < 0x78a0 |
808 | && ah->config.analog_shiftreg) { | 809 | && ah->config.analog_shiftreg |
810 | && (common->bus_ops->ath_bus_type != ATH_USB)) { | ||
809 | udelay(100); | 811 | udelay(100); |
810 | } | 812 | } |
811 | 813 | ||
@@ -835,7 +837,8 @@ static int ar5008_hw_process_ini(struct ath_hw *ah, | |||
835 | REG_WRITE(ah, reg, val); | 837 | REG_WRITE(ah, reg, val); |
836 | 838 | ||
837 | if (reg >= 0x7800 && reg < 0x78a0 | 839 | if (reg >= 0x7800 && reg < 0x78a0 |
838 | && ah->config.analog_shiftreg) { | 840 | && ah->config.analog_shiftreg |
841 | && (common->bus_ops->ath_bus_type != ATH_USB)) { | ||
839 | udelay(100); | 842 | udelay(100); |
840 | } | 843 | } |
841 | 844 | ||
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_9287.c b/drivers/net/wireless/ath/ath9k/eeprom_9287.c index 8cd8333cc08..2f0712ea49a 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c +++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c | |||
@@ -392,6 +392,8 @@ static void ath9k_hw_set_ar9287_power_cal_table(struct ath_hw *ah, | |||
392 | numXpdGain); | 392 | numXpdGain); |
393 | } | 393 | } |
394 | 394 | ||
395 | ENABLE_REGWRITE_BUFFER(ah); | ||
396 | |||
395 | if (i == 0) { | 397 | if (i == 0) { |
396 | if (!ath9k_hw_ar9287_get_eeprom(ah, | 398 | if (!ath9k_hw_ar9287_get_eeprom(ah, |
397 | EEP_OL_PWRCTRL)) { | 399 | EEP_OL_PWRCTRL)) { |
@@ -442,6 +444,7 @@ static void ath9k_hw_set_ar9287_power_cal_table(struct ath_hw *ah, | |||
442 | regOffset += 4; | 444 | regOffset += 4; |
443 | } | 445 | } |
444 | } | 446 | } |
447 | REGWRITE_BUFFER_FLUSH(ah); | ||
445 | } | 448 | } |
446 | } | 449 | } |
447 | 450 | ||
@@ -757,6 +760,8 @@ static void ath9k_hw_ar9287_set_txpower(struct ath_hw *ah, | |||
757 | ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2; | 760 | ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2; |
758 | } | 761 | } |
759 | 762 | ||
763 | ENABLE_REGWRITE_BUFFER(ah); | ||
764 | |||
760 | /* OFDM power per rate */ | 765 | /* OFDM power per rate */ |
761 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE1, | 766 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE1, |
762 | ATH9K_POW_SM(ratesArray[rate18mb], 24) | 767 | ATH9K_POW_SM(ratesArray[rate18mb], 24) |
@@ -840,6 +845,7 @@ static void ath9k_hw_ar9287_set_txpower(struct ath_hw *ah, | |||
840 | | ATH9K_POW_SM(ratesArray[rateDupOfdm], 8) | 845 | | ATH9K_POW_SM(ratesArray[rateDupOfdm], 8) |
841 | | ATH9K_POW_SM(ratesArray[rateDupCck], 0)); | 846 | | ATH9K_POW_SM(ratesArray[rateDupCck], 0)); |
842 | } | 847 | } |
848 | REGWRITE_BUFFER_FLUSH(ah); | ||
843 | } | 849 | } |
844 | 850 | ||
845 | static void ath9k_hw_ar9287_set_addac(struct ath_hw *ah, | 851 | static void ath9k_hw_ar9287_set_addac(struct ath_hw *ah, |
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_def.c b/drivers/net/wireless/ath/ath9k/eeprom_def.c index fccd87df730..995949ddd63 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom_def.c +++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c | |||
@@ -799,6 +799,8 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah, | |||
799 | pwr_table_offset, | 799 | pwr_table_offset, |
800 | &diff); | 800 | &diff); |
801 | 801 | ||
802 | ENABLE_REGWRITE_BUFFER(ah); | ||
803 | |||
802 | if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) { | 804 | if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) { |
803 | if (OLC_FOR_AR9280_20_LATER) { | 805 | if (OLC_FOR_AR9280_20_LATER) { |
804 | REG_WRITE(ah, | 806 | REG_WRITE(ah, |
@@ -847,6 +849,7 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah, | |||
847 | 849 | ||
848 | regOffset += 4; | 850 | regOffset += 4; |
849 | } | 851 | } |
852 | REGWRITE_BUFFER_FLUSH(ah); | ||
850 | } | 853 | } |
851 | } | 854 | } |
852 | 855 | ||
@@ -1205,6 +1208,8 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah, | |||
1205 | } | 1208 | } |
1206 | } | 1209 | } |
1207 | 1210 | ||
1211 | ENABLE_REGWRITE_BUFFER(ah); | ||
1212 | |||
1208 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE1, | 1213 | REG_WRITE(ah, AR_PHY_POWER_TX_RATE1, |
1209 | ATH9K_POW_SM(ratesArray[rate18mb], 24) | 1214 | ATH9K_POW_SM(ratesArray[rate18mb], 24) |
1210 | | ATH9K_POW_SM(ratesArray[rate12mb], 16) | 1215 | | ATH9K_POW_SM(ratesArray[rate12mb], 16) |
@@ -1291,6 +1296,8 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah, | |||
1291 | REG_WRITE(ah, AR_PHY_POWER_TX_SUB, | 1296 | REG_WRITE(ah, AR_PHY_POWER_TX_SUB, |
1292 | ATH9K_POW_SM(pModal->pwrDecreaseFor3Chain, 6) | 1297 | ATH9K_POW_SM(pModal->pwrDecreaseFor3Chain, 6) |
1293 | | ATH9K_POW_SM(pModal->pwrDecreaseFor2Chain, 0)); | 1298 | | ATH9K_POW_SM(pModal->pwrDecreaseFor2Chain, 0)); |
1299 | |||
1300 | REGWRITE_BUFFER_FLUSH(ah); | ||
1294 | } | 1301 | } |
1295 | 1302 | ||
1296 | static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz) | 1303 | static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz) |
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index 6650fd48415..c86eea28a88 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h | |||
@@ -99,18 +99,22 @@ | |||
99 | #define REG_CLR_BIT(_a, _r, _f) \ | 99 | #define REG_CLR_BIT(_a, _r, _f) \ |
100 | REG_WRITE(_a, _r, REG_READ(_a, _r) & ~(_f)) | 100 | REG_WRITE(_a, _r, REG_READ(_a, _r) & ~(_f)) |
101 | 101 | ||
102 | #define DO_DELAY(x) do { \ | 102 | #define DO_DELAY(x) do { \ |
103 | if ((++(x) % 64) == 0) \ | 103 | if (((++(x) % 64) == 0) && \ |
104 | udelay(1); \ | 104 | (ath9k_hw_common(ah)->bus_ops->ath_bus_type \ |
105 | != ATH_USB)) \ | ||
106 | udelay(1); \ | ||
105 | } while (0) | 107 | } while (0) |
106 | 108 | ||
107 | #define REG_WRITE_ARRAY(iniarray, column, regWr) do { \ | 109 | #define REG_WRITE_ARRAY(iniarray, column, regWr) do { \ |
108 | int r; \ | 110 | int r; \ |
111 | ENABLE_REGWRITE_BUFFER(ah); \ | ||
109 | for (r = 0; r < ((iniarray)->ia_rows); r++) { \ | 112 | for (r = 0; r < ((iniarray)->ia_rows); r++) { \ |
110 | REG_WRITE(ah, INI_RA((iniarray), (r), 0), \ | 113 | REG_WRITE(ah, INI_RA((iniarray), (r), 0), \ |
111 | INI_RA((iniarray), r, (column))); \ | 114 | INI_RA((iniarray), r, (column))); \ |
112 | DO_DELAY(regWr); \ | 115 | DO_DELAY(regWr); \ |
113 | } \ | 116 | } \ |
117 | REGWRITE_BUFFER_FLUSH(ah); \ | ||
114 | } while (0) | 118 | } while (0) |
115 | 119 | ||
116 | #define AR_GPIO_OUTPUT_MUX_AS_OUTPUT 0 | 120 | #define AR_GPIO_OUTPUT_MUX_AS_OUTPUT 0 |
diff --git a/drivers/net/wireless/ath/ath9k/phy.h b/drivers/net/wireless/ath/ath9k/phy.h index 5e3d7496986..e4029325c78 100644 --- a/drivers/net/wireless/ath/ath9k/phy.h +++ b/drivers/net/wireless/ath/ath9k/phy.h | |||
@@ -40,10 +40,12 @@ | |||
40 | 40 | ||
41 | #define REG_WRITE_RF_ARRAY(iniarray, regData, regWr) do { \ | 41 | #define REG_WRITE_RF_ARRAY(iniarray, regData, regWr) do { \ |
42 | int r; \ | 42 | int r; \ |
43 | ENABLE_REGWRITE_BUFFER(ah); \ | ||
43 | for (r = 0; r < ((iniarray)->ia_rows); r++) { \ | 44 | for (r = 0; r < ((iniarray)->ia_rows); r++) { \ |
44 | REG_WRITE(ah, INI_RA((iniarray), r, 0), (regData)[r]); \ | 45 | REG_WRITE(ah, INI_RA((iniarray), r, 0), (regData)[r]); \ |
45 | DO_DELAY(regWr); \ | 46 | DO_DELAY(regWr); \ |
46 | } \ | 47 | } \ |
48 | REGWRITE_BUFFER_FLUSH(ah); \ | ||
47 | } while (0) | 49 | } while (0) |
48 | 50 | ||
49 | #define ANTSWAP_AB 0x0001 | 51 | #define ANTSWAP_AB 0x0001 |