diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9002_phy.c')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9002_phy.c | 69 |
1 files changed, 32 insertions, 37 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_phy.c b/drivers/net/wireless/ath/ath9k/ar9002_phy.c index ed314e89bfe..4922b8d4a93 100644 --- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c | |||
@@ -471,52 +471,45 @@ static u32 ar9002_hw_compute_pll_control(struct ath_hw *ah, | |||
471 | static void ar9002_hw_do_getnf(struct ath_hw *ah, | 471 | static void ar9002_hw_do_getnf(struct ath_hw *ah, |
472 | int16_t nfarray[NUM_NF_READINGS]) | 472 | int16_t nfarray[NUM_NF_READINGS]) |
473 | { | 473 | { |
474 | struct ath_common *common = ath9k_hw_common(ah); | ||
475 | int16_t nf; | 474 | int16_t nf; |
476 | 475 | ||
477 | nf = MS(REG_READ(ah, AR_PHY_CCA), AR9280_PHY_MINCCA_PWR); | 476 | nf = MS(REG_READ(ah, AR_PHY_CCA), AR9280_PHY_MINCCA_PWR); |
478 | 477 | nfarray[0] = sign_extend(nf, 9); | |
479 | if (nf & 0x100) | ||
480 | nf = 0 - ((nf ^ 0x1ff) + 1); | ||
481 | ath_print(common, ATH_DBG_CALIBRATE, | ||
482 | "NF calibrated [ctl] [chain 0] is %d\n", nf); | ||
483 | |||
484 | if (AR_SREV_9271(ah) && (nf >= -114)) | ||
485 | nf = -116; | ||
486 | |||
487 | nfarray[0] = nf; | ||
488 | |||
489 | if (!AR_SREV_9285(ah) && !AR_SREV_9271(ah)) { | ||
490 | nf = MS(REG_READ(ah, AR_PHY_CH1_CCA), | ||
491 | AR9280_PHY_CH1_MINCCA_PWR); | ||
492 | |||
493 | if (nf & 0x100) | ||
494 | nf = 0 - ((nf ^ 0x1ff) + 1); | ||
495 | ath_print(common, ATH_DBG_CALIBRATE, | ||
496 | "NF calibrated [ctl] [chain 1] is %d\n", nf); | ||
497 | nfarray[1] = nf; | ||
498 | } | ||
499 | 478 | ||
500 | nf = MS(REG_READ(ah, AR_PHY_EXT_CCA), AR9280_PHY_EXT_MINCCA_PWR); | 479 | nf = MS(REG_READ(ah, AR_PHY_EXT_CCA), AR9280_PHY_EXT_MINCCA_PWR); |
501 | if (nf & 0x100) | 480 | nfarray[3] = sign_extend(nf, 9); |
502 | nf = 0 - ((nf ^ 0x1ff) + 1); | ||
503 | ath_print(common, ATH_DBG_CALIBRATE, | ||
504 | "NF calibrated [ext] [chain 0] is %d\n", nf); | ||
505 | 481 | ||
506 | if (AR_SREV_9271(ah) && (nf >= -114)) | 482 | if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) |
507 | nf = -116; | 483 | return; |
508 | 484 | ||
509 | nfarray[3] = nf; | 485 | nf = MS(REG_READ(ah, AR_PHY_CH1_CCA), AR9280_PHY_CH1_MINCCA_PWR); |
486 | nfarray[1] = sign_extend(nf, 9); | ||
510 | 487 | ||
511 | if (!AR_SREV_9285(ah) && !AR_SREV_9271(ah)) { | 488 | nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA), AR9280_PHY_CH1_EXT_MINCCA_PWR); |
512 | nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA), | 489 | nfarray[4] = sign_extend(nf, 9); |
513 | AR9280_PHY_CH1_EXT_MINCCA_PWR); | 490 | } |
514 | 491 | ||
515 | if (nf & 0x100) | 492 | static void ar9002_hw_set_nf_limits(struct ath_hw *ah) |
516 | nf = 0 - ((nf ^ 0x1ff) + 1); | 493 | { |
517 | ath_print(common, ATH_DBG_CALIBRATE, | 494 | if (AR_SREV_9285(ah)) { |
518 | "NF calibrated [ext] [chain 1] is %d\n", nf); | 495 | ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9285_2GHZ; |
519 | nfarray[4] = nf; | 496 | ah->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9285_2GHZ; |
497 | ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9285_2GHZ; | ||
498 | } else if (AR_SREV_9287(ah)) { | ||
499 | ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9287_2GHZ; | ||
500 | ah->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9287_2GHZ; | ||
501 | ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9287_2GHZ; | ||
502 | } else if (AR_SREV_9271(ah)) { | ||
503 | ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9271_2GHZ; | ||
504 | ah->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9271_2GHZ; | ||
505 | ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9271_2GHZ; | ||
506 | } else { | ||
507 | ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9280_2GHZ; | ||
508 | ah->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_9280_2GHZ; | ||
509 | ah->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_9280_2GHZ; | ||
510 | ah->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_9280_5GHZ; | ||
511 | ah->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_9280_5GHZ; | ||
512 | ah->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_9280_5GHZ; | ||
520 | } | 513 | } |
521 | } | 514 | } |
522 | 515 | ||
@@ -532,4 +525,6 @@ void ar9002_hw_attach_phy_ops(struct ath_hw *ah) | |||
532 | priv_ops->olc_init = ar9002_olc_init; | 525 | priv_ops->olc_init = ar9002_olc_init; |
533 | priv_ops->compute_pll_control = ar9002_hw_compute_pll_control; | 526 | priv_ops->compute_pll_control = ar9002_hw_compute_pll_control; |
534 | priv_ops->do_getnf = ar9002_hw_do_getnf; | 527 | priv_ops->do_getnf = ar9002_hw_do_getnf; |
528 | |||
529 | ar9002_hw_set_nf_limits(ah); | ||
535 | } | 530 | } |