1 files changed, 11 insertions, 5 deletions

diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index d62c8d937c8..73884b69b74 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -4,7 +4,7 @@
  * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com)
  * Copyright (C) 2001 Jeff Garzik (jgarzik@pobox.com)
  * Copyright (C) 2004 Sun Microsystems Inc.
- * Copyright (C) 2007-2010 Broadcom Corporation.
+ * Copyright (C) 2007-2011 Broadcom Corporation.
  */
 
 #ifndef _T3_H
@@ -141,6 +141,7 @@
 #define  CHIPREV_ID_57780_A1             0x57780001
 #define  CHIPREV_ID_5717_A0              0x05717000
 #define  CHIPREV_ID_57765_A0             0x57785000
+#define  CHIPREV_ID_5719_A0              0x05719000
 #define  GET_ASIC_REV(CHIP_REV_ID)      ((CHIP_REV_ID) >> 12)
 #define   ASIC_REV_5700                  0x07
 #define   ASIC_REV_5701                  0x00
@@ -1105,7 +1106,7 @@
 #define  TG3_CPMU_DBTMR1_PCIEXIT_2047US  0x07ff0000
 #define  TG3_CPMU_DBTMR1_LNKIDLE_2047US  0x000070ff
 #define TG3_CPMU_EEE_DBTMR2             0x000036b8
-#define  TG3_CPMU_DBTMR1_APE_TX_2047US   0x07ff0000
+#define  TG3_CPMU_DBTMR2_APE_TX_2047US   0x07ff0000
 #define  TG3_CPMU_DBTMR2_TXIDXEQ_2047US  0x000070ff
 #define TG3_CPMU_EEE_LNKIDL_CTRL        0x000036bc
 #define  TG3_CPMU_EEE_LNKIDL_PCIE_NL0    0x01000000
@@ -1333,6 +1334,10 @@
 
 #define TG3_RDMA_RSRVCTRL_REG           0x00004900
 #define TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX  0x00000004
+#define TG3_RDMA_RSRVCTRL_FIFO_LWM_1_5K  0x00000c00
+#define TG3_RDMA_RSRVCTRL_FIFO_LWM_MASK  0x00000ff0
+#define TG3_RDMA_RSRVCTRL_FIFO_HWM_1_5K  0x000c0000
+#define TG3_RDMA_RSRVCTRL_FIFO_HWM_MASK  0x000ff000
 #define TG3_RDMA_RSRVCTRL_TXMRGN_320B    0x28000000
 #define TG3_RDMA_RSRVCTRL_TXMRGN_MASK    0xffe00000
 /* 0x4904 --> 0x4910 unused */
@@ -2108,6 +2113,10 @@
 
 #define MII_TG3_DSP_TAP1                0x0001
 #define  MII_TG3_DSP_TAP1_AGCTGT_DFLT   0x0007
+#define MII_TG3_DSP_TAP26               0x001a
+#define  MII_TG3_DSP_TAP26_ALNOKO       0x0001
+#define  MII_TG3_DSP_TAP26_RMRXSTO      0x0002
+#define  MII_TG3_DSP_TAP26_OPCSINPT     0x0004
 #define MII_TG3_DSP_AADJ1CH0            0x001f
 #define MII_TG3_DSP_CH34TP2             0x4022
 #define MII_TG3_DSP_CH34TP2_HIBW01      0x0010
@@ -2808,9 +2817,6 @@ struct tg3 {
         u32                             rx_std_max_post;
         u32                             rx_offset;
         u32                             rx_pkt_map_sz;
-#if TG3_VLAN_TAG_USED
-        struct vlan_group               *vlgrp;
-#endif
 
 
         /* begin "everything else" cacheline(s) section */