7 files changed, 199 insertions, 58 deletions

diff --git a/drivers/net/ixgbe/ixgbe.h b/drivers/net/ixgbe/ixgbe.h
index cd22323cfd2..e11d83d5852 100644
--- a/drivers/net/ixgbe/ixgbe.h
+++ b/drivers/net/ixgbe/ixgbe.h
@@ -96,6 +96,8 @@
 #define IXGBE_TX_FLAGS_VLAN_PRIO_MASK   0x0000e000
 #define IXGBE_TX_FLAGS_VLAN_SHIFT       16
 
+#define IXGBE_MAX_RSC_INT_RATE          162760
+
 /* wrapper around a pointer to a socket buffer,
  * so a DMA handle can be stored along with the buffer */
 struct ixgbe_tx_buffer {
@@ -327,6 +329,7 @@ struct ixgbe_adapter {
 #define IXGBE_FLAG_IN_SFP_MOD_TASK              (u32)(1 << 25)
 #define IXGBE_FLAG_FDIR_HASH_CAPABLE            (u32)(1 << 26)
 #define IXGBE_FLAG_FDIR_PERFECT_CAPABLE         (u32)(1 << 27)
+#define IXGBE_FLAG_FCOE_CAPABLE                 (u32)(1 << 28)
 #define IXGBE_FLAG_FCOE_ENABLED                 (u32)(1 << 29)
 
         u32 flags2;
diff --git a/drivers/net/ixgbe/ixgbe_82598.c b/drivers/net/ixgbe/ixgbe_82598.c
index b9923047ce1..522c03bc1da 100644
--- a/drivers/net/ixgbe/ixgbe_82598.c
+++ b/drivers/net/ixgbe/ixgbe_82598.c
@@ -50,6 +50,51 @@ static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
                                        u8 *eeprom_data);
 
 /**
+ *  ixgbe_set_pcie_completion_timeout - set pci-e completion timeout
+ *  @hw: pointer to the HW structure
+ *
+ *  The defaults for 82598 should be in the range of 50us to 50ms,
+ *  however the hardware default for these parts is 500us to 1ms which is less
+ *  than the 10ms recommended by the pci-e spec.  To address this we need to
+ *  increase the value to either 10ms to 250ms for capability version 1 config,
+ *  or 16ms to 55ms for version 2.
+ **/
+void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw)
+{
+        struct ixgbe_adapter *adapter = hw->back;
+        u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR);
+        u16 pcie_devctl2;
+
+        /* only take action if timeout value is defaulted to 0 */
+        if (gcr & IXGBE_GCR_CMPL_TMOUT_MASK)
+                goto out;
+
+        /*
+         * if capababilities version is type 1 we can write the
+         * timeout of 10ms to 250ms through the GCR register
+         */
+        if (!(gcr & IXGBE_GCR_CAP_VER2)) {
+                gcr |= IXGBE_GCR_CMPL_TMOUT_10ms;
+                goto out;
+        }
+
+        /*
+         * for version 2 capabilities we need to write the config space
+         * directly in order to set the completion timeout value for
+         * 16ms to 55ms
+         */
+        pci_read_config_word(adapter->pdev,
+                             IXGBE_PCI_DEVICE_CONTROL2, &pcie_devctl2);
+        pcie_devctl2 |= IXGBE_PCI_DEVICE_CONTROL2_16ms;
+        pci_write_config_word(adapter->pdev,
+                              IXGBE_PCI_DEVICE_CONTROL2, pcie_devctl2);
+out:
+        /* disable completion timeout resend */
+        gcr &= ~IXGBE_GCR_CMPL_TMOUT_RESEND;
+        IXGBE_WRITE_REG(hw, IXGBE_GCR, gcr);
+}
+
+/**
  *  ixgbe_get_pcie_msix_count_82598 - Gets MSI-X vector count
  *  @hw: pointer to hardware structure
  *
@@ -153,6 +198,26 @@ out:
 }
 
 /**
+ *  ixgbe_start_hw_82598 - Prepare hardware for Tx/Rx
+ *  @hw: pointer to hardware structure
+ *
+ *  Starts the hardware using the generic start_hw function.
+ *  Then set pcie completion timeout
+ **/
+s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw)
+{
+        s32 ret_val = 0;
+
+        ret_val = ixgbe_start_hw_generic(hw);
+
+        /* set the completion timeout for interface */
+        if (ret_val == 0)
+                ixgbe_set_pcie_completion_timeout(hw);
+
+        return ret_val;
+}
+
+/**
  *  ixgbe_get_link_capabilities_82598 - Determines link capabilities
  *  @hw: pointer to hardware structure
  *  @speed: pointer to link speed
@@ -1085,7 +1150,7 @@ out:
 static struct ixgbe_mac_operations mac_ops_82598 = {
         .init_hw                = &ixgbe_init_hw_generic,
         .reset_hw               = &ixgbe_reset_hw_82598,
-        .start_hw               = &ixgbe_start_hw_generic,
+        .start_hw               = &ixgbe_start_hw_82598,
         .clear_hw_cntrs         = &ixgbe_clear_hw_cntrs_generic,
         .get_media_type         = &ixgbe_get_media_type_82598,
         .get_supported_physical_layer = &ixgbe_get_supported_physical_layer_82598,
diff --git a/drivers/net/ixgbe/ixgbe_dcb_nl.c b/drivers/net/ixgbe/ixgbe_dcb_nl.c
index d56890f5c9d..1c726573290 100644
--- a/drivers/net/ixgbe/ixgbe_dcb_nl.c
+++ b/drivers/net/ixgbe/ixgbe_dcb_nl.c
@@ -106,8 +106,6 @@ static u8 ixgbe_dcbnl_get_state(struct net_device *netdev)
 {
         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 
-        DPRINTK(DRV, INFO, "Get DCB Admin Mode.\n");
-
         return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED);
 }
 
@@ -116,8 +114,6 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
         u8 err = 0;
         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 
-        DPRINTK(DRV, INFO, "Set DCB Admin Mode.\n");
-
         if (state > 0) {
                 /* Turn on DCB */
                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
@@ -138,7 +134,23 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
                 }
                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
+                if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
+                        adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
+                        adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
+                }
                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
+#ifdef IXGBE_FCOE
+                /* Turn on FCoE offload */
+                if ((adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) &&
+                    (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))) {
+                        adapter->flags |= IXGBE_FLAG_FCOE_ENABLED;
+                        adapter->ring_feature[RING_F_FCOE].indices =
+                                IXGBE_FCRETA_SIZE;
+                        netdev->features |= NETIF_F_FCOE_CRC;
+                        netdev->features |= NETIF_F_FSO;
+                        netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1;
+                }
+#endif /* IXGBE_FCOE */
                 ixgbe_init_interrupt_scheme(adapter);
                 if (netif_running(netdev))
                         netdev->netdev_ops->ndo_open(netdev);
@@ -154,6 +166,20 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
                         adapter->dcb_cfg.pfc_mode_enable = false;
                         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
                         adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
+                        if (adapter->hw.mac.type == ixgbe_mac_82599EB)
+                                adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
+
+#ifdef IXGBE_FCOE
+                        /* Turn off FCoE offload */
+                        if (adapter->flags & (IXGBE_FLAG_FCOE_CAPABLE |
+                             IXGBE_FLAG_FCOE_ENABLED)) {
+                                adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
+                                adapter->ring_feature[RING_F_FCOE].indices = 0;
+                                netdev->features &= ~NETIF_F_FCOE_CRC;
+                                netdev->features &= ~NETIF_F_FSO;
+                                netdev->fcoe_ddp_xid = 0;
+                        }
+#endif /* IXGBE_FCOE */
                         ixgbe_init_interrupt_scheme(adapter);
                         if (netif_running(netdev))
                                 netdev->netdev_ops->ndo_open(netdev);
@@ -169,6 +195,8 @@ static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
         struct ixgbe_adapter *adapter = netdev_priv(netdev);
         int i, j;
 
+        memset(perm_addr, 0xff, MAX_ADDR_LEN);
+
         for (i = 0; i < netdev->addr_len; i++)
                 perm_addr[i] = adapter->hw.mac.perm_addr[i];
 
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c
index 0f7b6a3a2e6..79144e950a3 100644
--- a/drivers/net/ixgbe/ixgbe_ethtool.c
+++ b/drivers/net/ixgbe/ixgbe_ethtool.c
@@ -1830,7 +1830,6 @@ static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
                 break;
         default:
                 wol->supported = 0;
-                retval = 0;
         }
 
         return retval;
@@ -1976,7 +1975,10 @@ static int ixgbe_set_coalesce(struct net_device *netdev,
                  * any other value means disable eitr, which is best
                  * served by setting the interrupt rate very high
                  */
-                adapter->eitr_param = IXGBE_MAX_INT_RATE;
+                if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
+                        adapter->eitr_param = IXGBE_MAX_RSC_INT_RATE;
+                else
+                        adapter->eitr_param = IXGBE_MAX_INT_RATE;
                 adapter->itr_setting = 0;
         }
 
@@ -2000,13 +2002,13 @@ static int ixgbe_set_flags(struct net_device *netdev, u32 data)
 
         ethtool_op_set_flags(netdev, data);
 
-        if (!(adapter->flags & IXGBE_FLAG2_RSC_CAPABLE))
+        if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
                 return 0;
 
         /* if state changes we need to update adapter->flags and reset */
         if ((!!(data & ETH_FLAG_LRO)) != 
-            (!!(adapter->flags & IXGBE_FLAG2_RSC_ENABLED))) {
-                adapter->flags ^= IXGBE_FLAG2_RSC_ENABLED;
+            (!!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))) {
+                adapter->flags2 ^= IXGBE_FLAG2_RSC_ENABLED;
                 if (netif_running(netdev))
                         ixgbe_reinit_locked(adapter);
                 else
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 5588ef493a3..110c65ab5cb 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -34,6 +34,7 @@
 #include <linux/in.h>
 #include <linux/ip.h>
 #include <linux/tcp.h>
+#include <linux/pkt_sched.h>
 #include <linux/ipv6.h>
 #include <net/checksum.h>
 #include <net/ip6_checksum.h>
@@ -510,8 +511,11 @@ static void ixgbe_receive_skb(struct ixgbe_q_vector *q_vector,
  * @skb: skb currently being received and modified
  **/
 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
-                                     u32 status_err, struct sk_buff *skb)
+                                     union ixgbe_adv_rx_desc *rx_desc,
+                                     struct sk_buff *skb)
 {
+        u32 status_err = le32_to_cpu(rx_desc->wb.upper.status_error);
+
         skb->ip_summed = CHECKSUM_NONE;
 
         /* Rx csum disabled */
@@ -529,6 +533,16 @@ static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
                 return;
 
         if (status_err & IXGBE_RXDADV_ERR_TCPE) {
+                u16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
+
+                /*
+                 * 82599 errata, UDP frames with a 0 checksum can be marked as
+                 * checksum errors.
+                 */
+                if ((pkt_info & IXGBE_RXDADV_PKTTYPE_UDP) &&
+                    (adapter->hw.mac.type == ixgbe_mac_82599EB))
+                        return;
+
                 adapter->hw_csum_rx_error++;
                 return;
         }
@@ -766,7 +780,7 @@ static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
                 prefetch(next_rxd);
                 cleaned_count++;
 
-                if (adapter->flags & IXGBE_FLAG2_RSC_CAPABLE)
+                if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
                         rsc_count = ixgbe_get_rsc_count(rx_desc);
 
                 if (rsc_count) {
@@ -802,7 +816,7 @@ static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
                         goto next_desc;
                 }
 
-                ixgbe_rx_checksum(adapter, staterr, skb);
+                ixgbe_rx_checksum(adapter, rx_desc, skb);
 
                 /* probably a little skewed due to removing CRC */
                 total_rx_bytes += skb->len;
@@ -2022,7 +2036,7 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
                         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype);
                 }
         } else {
-                if (!(adapter->flags & IXGBE_FLAG2_RSC_ENABLED) &&
+                if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) &&
                     (netdev->mtu <= ETH_DATA_LEN))
                         rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
                 else
@@ -2151,7 +2165,7 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
                 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
         }
 
-        if (adapter->flags & IXGBE_FLAG2_RSC_ENABLED) {
+        if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
                 /* Enable 82599 HW-RSC */
                 for (i = 0; i < adapter->num_rx_queues; i++) {
                         j = adapter->rx_ring[i].reg_idx;
@@ -2697,19 +2711,23 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
 
         /*
          * For hot-pluggable SFP+ devices, a new SFP+ module may have
-         * arrived before interrupts were enabled.  We need to kick off
-         * the SFP+ module setup first, then try to bring up link.
+         * arrived before interrupts were enabled but after probe.  Such
+         * devices wouldn't have their type identified yet. We need to
+         * kick off the SFP+ module setup first, then try to bring up link.
          * If we're not hot-pluggable SFP+, we just need to configure link
          * and bring it up.
          */
-        err = hw->phy.ops.identify(hw);
-        if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
-                dev_err(&adapter->pdev->dev, "failed to initialize because "
-                        "an unsupported SFP+ module type was detected.\n"
-                        "Reload the driver after installing a supported "
-                        "module.\n");
-                ixgbe_down(adapter);
-                return err;
+        if (hw->phy.type == ixgbe_phy_unknown) {
+                err = hw->phy.ops.identify(hw);
+                if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
+                        /*
+                         * Take the device down and schedule the sfp tasklet
+                         * which will unregister_netdev and log it.
+                         */
+                        ixgbe_down(adapter);
+                        schedule_work(&adapter->sfp_config_module_task);
+                        return err;
+                }
         }
 
         if (ixgbe_is_sfp(hw)) {
@@ -3126,7 +3144,11 @@ static inline bool ixgbe_set_fcoe_queues(struct ixgbe_adapter *adapter)
 #endif
                 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
                         DPRINTK(PROBE, INFO, "FCOE enabled with RSS \n");
-                        ixgbe_set_rss_queues(adapter);
+                        if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
+                            (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
+                                ixgbe_set_fdir_queues(adapter);
+                        else
+                                ixgbe_set_rss_queues(adapter);
                 }
                 /* adding FCoE rx rings to the end */
                 f->mask = adapter->num_rx_queues;
@@ -3384,7 +3406,12 @@ static inline bool ixgbe_cache_ring_fcoe(struct ixgbe_adapter *adapter)
                 }
 #endif /* CONFIG_IXGBE_DCB */
                 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
-                        ixgbe_cache_ring_rss(adapter);
+                        if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
+                            (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
+                                ixgbe_cache_ring_fdir(adapter);
+                        else
+                                ixgbe_cache_ring_rss(adapter);
+
                         fcoe_i = f->mask;
                 }
                 for (i = 0; i < f->indices; i++, fcoe_i++)
@@ -3724,7 +3751,7 @@ static void ixgbe_sfp_task(struct work_struct *work)
         if ((hw->phy.type == ixgbe_phy_nl) &&
             (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
                 s32 ret = hw->phy.ops.identify_sfp(hw);
-                if (ret)
+                if (ret == IXGBE_ERR_SFP_NOT_PRESENT)
                         goto reschedule;
                 ret = hw->phy.ops.reset(hw);
                 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
@@ -3785,16 +3812,17 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
                 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598;
         } else if (hw->mac.type == ixgbe_mac_82599EB) {
                 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599;
-                adapter->flags |= IXGBE_FLAG2_RSC_CAPABLE;
-                adapter->flags |= IXGBE_FLAG2_RSC_ENABLED;
+                adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
+                adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
                 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
                 adapter->ring_feature[RING_F_FDIR].indices =
                                                          IXGBE_MAX_FDIR_INDICES;
                 adapter->atr_sample_rate = 20;
                 adapter->fdir_pballoc = 0;
 #ifdef IXGBE_FCOE
-                adapter->flags |= IXGBE_FLAG_FCOE_ENABLED;
-                adapter->ring_feature[RING_F_FCOE].indices = IXGBE_FCRETA_SIZE;
+                adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
+                adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
+                adapter->ring_feature[RING_F_FCOE].indices = 0;
 #endif /* IXGBE_FCOE */
         }
 
@@ -4534,13 +4562,17 @@ static void ixgbe_sfp_config_module_task(struct work_struct *work)
         u32 err;
 
         adapter->flags |= IXGBE_FLAG_IN_SFP_MOD_TASK;
+
+        /* Time for electrical oscillations to settle down */
+        msleep(100);
         err = hw->phy.ops.identify_sfp(hw);
+
         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
                 dev_err(&adapter->pdev->dev, "failed to initialize because "
                         "an unsupported SFP+ module type was detected.\n"
                         "Reload the driver after installing a supported "
                         "module.\n");
-                ixgbe_down(adapter);
+                unregister_netdev(adapter->netdev);
                 return;
         }
         hw->mac.ops.setup_sfp(hw);
@@ -5108,9 +5140,6 @@ static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
         int count = 0;
         unsigned int f;
 
-        r_idx = skb->queue_mapping;
-        tx_ring = &adapter->tx_ring[r_idx];
-
         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
                 tx_flags |= vlan_tx_tag_get(skb);
                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
@@ -5120,11 +5149,19 @@ static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
                 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
         } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
-                tx_flags |= (skb->queue_mapping << 13);
-                tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
-                tx_flags |= IXGBE_TX_FLAGS_VLAN;
+                if (skb->priority != TC_PRIO_CONTROL) {
+                        tx_flags |= (skb->queue_mapping << 13);
+                        tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
+                        tx_flags |= IXGBE_TX_FLAGS_VLAN;
+                } else {
+                        skb->queue_mapping =
+                                adapter->ring_feature[RING_F_DCB].indices-1;
+                }
         }
 
+        r_idx = skb->queue_mapping;
+        tx_ring = &adapter->tx_ring[r_idx];
+
         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
             (skb->protocol == htons(ETH_P_FCOE)))
                 tx_flags |= IXGBE_TX_FLAGS_FCOE;
@@ -5323,12 +5360,19 @@ static int ixgbe_del_sanmac_netdev(struct net_device *dev)
 static void ixgbe_netpoll(struct net_device *netdev)
 {
         struct ixgbe_adapter *adapter = netdev_priv(netdev);
+        int i;
 
-        disable_irq(adapter->pdev->irq);
         adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
-        ixgbe_intr(adapter->pdev->irq, netdev);
+        if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
+                int num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
+                for (i = 0; i < num_q_vectors; i++) {
+                        struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
+                        ixgbe_msix_clean_many(0, q_vector);
+                }
+        } else {
+                ixgbe_intr(adapter->pdev->irq, netdev);
+        }
         adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
-        enable_irq(adapter->pdev->irq);
 }
 #endif
 
@@ -5563,29 +5607,18 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
 #endif
 
 #ifdef IXGBE_FCOE
-        if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
+        if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
                 if (hw->mac.ops.get_device_caps) {
                         hw->mac.ops.get_device_caps(hw, &device_caps);
-                        if (!(device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)) {
-                                netdev->features |= NETIF_F_FCOE_CRC;
-                                netdev->features |= NETIF_F_FSO;
-                                netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1;
-                                DPRINTK(DRV, INFO, "FCoE enabled, "
-                                        "disabling Flow Director\n");
-                                adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
-                                adapter->flags &=
-                                        ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
-                                adapter->atr_sample_rate = 0;
-                        } else {
-                                adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
-                        }
+                        if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
+                                adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
                 }
         }
 #endif /* IXGBE_FCOE */
         if (pci_using_dac)
                 netdev->features |= NETIF_F_HIGHDMA;
 
-        if (adapter->flags & IXGBE_FLAG2_RSC_ENABLED)
+        if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
                 netdev->features |= NETIF_F_LRO;
 
         /* make sure the EEPROM is good */
@@ -5627,7 +5660,6 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
                 adapter->wol = 0;
                 break;
         }
-        device_init_wakeup(&adapter->pdev->dev, true);
         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
 
         /* pick up the PCI bus settings for reporting later */
diff --git a/drivers/net/ixgbe/ixgbe_phy.c b/drivers/net/ixgbe/ixgbe_phy.c
index 453e966762f..9ecad17522c 100644
--- a/drivers/net/ixgbe/ixgbe_phy.c
+++ b/drivers/net/ixgbe/ixgbe_phy.c
@@ -60,6 +60,7 @@ s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw)
 
         if (hw->phy.type == ixgbe_phy_unknown) {
                 for (phy_addr = 0; phy_addr < IXGBE_MAX_PHY_ADDR; phy_addr++) {
+                        hw->phy.mdio.prtad = phy_addr;
                         if (mdio45_probe(&hw->phy.mdio, phy_addr) == 0) {
                                 ixgbe_get_phy_id(hw);
                                 hw->phy.type =
@@ -68,6 +69,8 @@ s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw)
                                 break;
                         }
                 }
+                /* clear value if nothing found */
+                hw->phy.mdio.prtad = 0;
         } else {
                 status = 0;
         }
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index fa87309dc08..be90eb4575f 100644
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -718,6 +718,12 @@
 #define IXGBE_ECC_STATUS_82599  0x110E0
 #define IXGBE_BAR_CTRL_82599    0x110F4
 
+/* PCI Express Control */
+#define IXGBE_GCR_CMPL_TMOUT_MASK       0x0000F000
+#define IXGBE_GCR_CMPL_TMOUT_10ms       0x00001000
+#define IXGBE_GCR_CMPL_TMOUT_RESEND     0x00010000
+#define IXGBE_GCR_CAP_VER2              0x00040000
+
 /* Time Sync Registers */
 #define IXGBE_TSYNCRXCTL 0x05188 /* Rx Time Sync Control register - RW */
 #define IXGBE_TSYNCTXCTL 0x08C00 /* Tx Time Sync Control register - RW */
@@ -1521,6 +1527,7 @@
 
 /* PCI Bus Info */
 #define IXGBE_PCI_LINK_STATUS     0xB2
+#define IXGBE_PCI_DEVICE_CONTROL2 0xC8
 #define IXGBE_PCI_LINK_WIDTH      0x3F0
 #define IXGBE_PCI_LINK_WIDTH_1    0x10
 #define IXGBE_PCI_LINK_WIDTH_2    0x20
@@ -1531,6 +1538,7 @@
 #define IXGBE_PCI_LINK_SPEED_5000 0x2
 #define IXGBE_PCI_HEADER_TYPE_REGISTER  0x0E
 #define IXGBE_PCI_HEADER_TYPE_MULTIFUNC 0x80
+#define IXGBE_PCI_DEVICE_CONTROL2_16ms  0x0005
 
 /* Number of 100 microseconds we wait for PCI Express master disable */
 #define IXGBE_PCI_MASTER_DISABLE_TIMEOUT 800