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Diffstat (limited to 'drivers/net/ixgbe/ixgbe_type.h')
-rw-r--r--drivers/net/ixgbe/ixgbe_type.h47
1 files changed, 39 insertions, 8 deletions
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index f011c57c920..237c688f8b6 100644
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2008 Intel Corporation. 4 Copyright(c) 1999 - 2009 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
@@ -34,6 +34,8 @@
34#define IXGBE_INTEL_VENDOR_ID 0x8086 34#define IXGBE_INTEL_VENDOR_ID 0x8086
35 35
36/* Device IDs */ 36/* Device IDs */
37#define IXGBE_DEV_ID_82598 0x10B6
38#define IXGBE_DEV_ID_82598_BX 0x1508
37#define IXGBE_DEV_ID_82598AF_DUAL_PORT 0x10C6 39#define IXGBE_DEV_ID_82598AF_DUAL_PORT 0x10C6
38#define IXGBE_DEV_ID_82598AF_SINGLE_PORT 0x10C7 40#define IXGBE_DEV_ID_82598AF_SINGLE_PORT 0x10C7
39#define IXGBE_DEV_ID_82598EB_SFP_LOM 0x10DB 41#define IXGBE_DEV_ID_82598EB_SFP_LOM 0x10DB
@@ -719,6 +721,7 @@
719#define IXGBE_LED_OFF 0xF 721#define IXGBE_LED_OFF 0xF
720 722
721/* AUTOC Bit Masks */ 723/* AUTOC Bit Masks */
724#define IXGBE_AUTOC_KX4_KX_SUPP_MASK 0xC0000000
722#define IXGBE_AUTOC_KX4_SUPP 0x80000000 725#define IXGBE_AUTOC_KX4_SUPP 0x80000000
723#define IXGBE_AUTOC_KX_SUPP 0x40000000 726#define IXGBE_AUTOC_KX_SUPP 0x40000000
724#define IXGBE_AUTOC_PAUSE 0x30000000 727#define IXGBE_AUTOC_PAUSE 0x30000000
@@ -768,6 +771,28 @@
768#define IXGBE_LINK_UP_TIME 90 /* 9.0 Seconds */ 771#define IXGBE_LINK_UP_TIME 90 /* 9.0 Seconds */
769#define IXGBE_AUTO_NEG_TIME 45 /* 4.5 Seconds */ 772#define IXGBE_AUTO_NEG_TIME 45 /* 4.5 Seconds */
770 773
774#define FIBER_LINK_UP_LIMIT 50
775
776/* PCS1GLSTA Bit Masks */
777#define IXGBE_PCS1GLSTA_LINK_OK 1
778#define IXGBE_PCS1GLSTA_SYNK_OK 0x10
779#define IXGBE_PCS1GLSTA_AN_COMPLETE 0x10000
780#define IXGBE_PCS1GLSTA_AN_PAGE_RX 0x20000
781#define IXGBE_PCS1GLSTA_AN_TIMED_OUT 0x40000
782#define IXGBE_PCS1GLSTA_AN_REMOTE_FAULT 0x80000
783#define IXGBE_PCS1GLSTA_AN_ERROR_RWS 0x100000
784
785#define IXGBE_PCS1GANA_SYM_PAUSE 0x80
786#define IXGBE_PCS1GANA_ASM_PAUSE 0x100
787
788/* PCS1GLCTL Bit Masks */
789#define IXGBE_PCS1GLCTL_AN_1G_TIMEOUT_EN 0x00040000 /* PCS 1G autoneg to en */
790#define IXGBE_PCS1GLCTL_FLV_LINK_UP 1
791#define IXGBE_PCS1GLCTL_FORCE_LINK 0x20
792#define IXGBE_PCS1GLCTL_LOW_LINK_LATCH 0x40
793#define IXGBE_PCS1GLCTL_AN_ENABLE 0x10000
794#define IXGBE_PCS1GLCTL_AN_RESTART 0x20000
795
771/* SW Semaphore Register bitmasks */ 796/* SW Semaphore Register bitmasks */
772#define IXGBE_SWSM_SMBI 0x00000001 /* Driver Semaphore bit */ 797#define IXGBE_SWSM_SMBI 0x00000001 /* Driver Semaphore bit */
773#define IXGBE_SWSM_SWESMBI 0x00000002 /* FW Semaphore bit */ 798#define IXGBE_SWSM_SWESMBI 0x00000002 /* FW Semaphore bit */
@@ -819,6 +844,10 @@
819#define IXGBE_FW_PTR 0x0F 844#define IXGBE_FW_PTR 0x0F
820#define IXGBE_PBANUM0_PTR 0x15 845#define IXGBE_PBANUM0_PTR 0x15
821#define IXGBE_PBANUM1_PTR 0x16 846#define IXGBE_PBANUM1_PTR 0x16
847#define IXGBE_PCIE_MSIX_82598_CAPS 0x62
848
849/* MSI-X capability fields masks */
850#define IXGBE_PCIE_MSIX_TBL_SZ_MASK 0x7FF
822 851
823/* Legacy EEPROM word offsets */ 852/* Legacy EEPROM word offsets */
824#define IXGBE_ISCSI_BOOT_CAPS 0x0033 853#define IXGBE_ISCSI_BOOT_CAPS 0x0033
@@ -1263,7 +1292,7 @@ enum ixgbe_media_type {
1263}; 1292};
1264 1293
1265/* Flow Control Settings */ 1294/* Flow Control Settings */
1266enum ixgbe_fc_type { 1295enum ixgbe_fc_mode {
1267 ixgbe_fc_none = 0, 1296 ixgbe_fc_none = 0,
1268 ixgbe_fc_rx_pause, 1297 ixgbe_fc_rx_pause,
1269 ixgbe_fc_tx_pause, 1298 ixgbe_fc_tx_pause,
@@ -1287,8 +1316,8 @@ struct ixgbe_fc_info {
1287 u16 pause_time; /* Flow Control Pause timer */ 1316 u16 pause_time; /* Flow Control Pause timer */
1288 bool send_xon; /* Flow control send XON */ 1317 bool send_xon; /* Flow control send XON */
1289 bool strict_ieee; /* Strict IEEE mode */ 1318 bool strict_ieee; /* Strict IEEE mode */
1290 enum ixgbe_fc_type type; /* Type of flow control */ 1319 enum ixgbe_fc_mode current_mode; /* FC mode in effect */
1291 enum ixgbe_fc_type original_type; 1320 enum ixgbe_fc_mode requested_mode; /* FC mode requested by caller */
1292}; 1321};
1293 1322
1294/* Statistics counters collected by the MAC */ 1323/* Statistics counters collected by the MAC */
@@ -1449,11 +1478,12 @@ struct ixgbe_mac_info {
1449 u32 num_rar_entries; 1478 u32 num_rar_entries;
1450 u32 max_tx_queues; 1479 u32 max_tx_queues;
1451 u32 max_rx_queues; 1480 u32 max_rx_queues;
1452 u32 link_attach_type; 1481 u32 max_msix_vectors;
1453 u32 link_mode_select; 1482 u32 orig_autoc;
1454 bool link_settings_loaded; 1483 u32 orig_autoc2;
1484 bool orig_link_settings_stored;
1455 bool autoneg; 1485 bool autoneg;
1456 bool autoneg_failed; 1486 bool autoneg_succeeded;
1457}; 1487};
1458 1488
1459struct ixgbe_phy_info { 1489struct ixgbe_phy_info {
@@ -1467,6 +1497,7 @@ struct ixgbe_phy_info {
1467 bool reset_disable; 1497 bool reset_disable;
1468 ixgbe_autoneg_advertised autoneg_advertised; 1498 ixgbe_autoneg_advertised autoneg_advertised;
1469 bool autoneg_wait_to_complete; 1499 bool autoneg_wait_to_complete;
1500 bool multispeed_fiber;
1470}; 1501};
1471 1502
1472struct ixgbe_hw { 1503struct ixgbe_hw {