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path: root/drivers/mtd/nand/nand_base.c
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Diffstat (limited to 'drivers/mtd/nand/nand_base.c')
-rw-r--r--drivers/mtd/nand/nand_base.c1109
1 files changed, 558 insertions, 551 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index a46e9bb847b..3ed9c5e4d34 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -21,7 +21,7 @@
21 * TODO: 21 * TODO:
22 * Enable cached programming for 2k page size chips 22 * Enable cached programming for 2k page size chips
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW 23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
24 * if we have HW ecc support. 24 * if we have HW ECC support.
25 * The AG-AND chips have nice features for speed improvement, 25 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go. 26 * which are not supported yet. Read / program 4 pages in one go.
27 * BBT table is not serialized, has to be fixed 27 * BBT table is not serialized, has to be fixed
@@ -113,21 +113,19 @@ static int check_offs_len(struct mtd_info *mtd,
113 113
114 /* Start address must align on block boundary */ 114 /* Start address must align on block boundary */
115 if (ofs & ((1 << chip->phys_erase_shift) - 1)) { 115 if (ofs & ((1 << chip->phys_erase_shift) - 1)) {
116 DEBUG(MTD_DEBUG_LEVEL0, "%s: Unaligned address\n", __func__); 116 pr_debug("%s: unaligned address\n", __func__);
117 ret = -EINVAL; 117 ret = -EINVAL;
118 } 118 }
119 119
120 /* Length must align on block boundary */ 120 /* Length must align on block boundary */
121 if (len & ((1 << chip->phys_erase_shift) - 1)) { 121 if (len & ((1 << chip->phys_erase_shift) - 1)) {
122 DEBUG(MTD_DEBUG_LEVEL0, "%s: Length not block aligned\n", 122 pr_debug("%s: length not block aligned\n", __func__);
123 __func__);
124 ret = -EINVAL; 123 ret = -EINVAL;
125 } 124 }
126 125
127 /* Do not allow past end of device */ 126 /* Do not allow past end of device */
128 if (ofs + len > mtd->size) { 127 if (ofs + len > mtd->size) {
129 DEBUG(MTD_DEBUG_LEVEL0, "%s: Past end of device\n", 128 pr_debug("%s: past end of device\n", __func__);
130 __func__);
131 ret = -EINVAL; 129 ret = -EINVAL;
132 } 130 }
133 131
@@ -136,9 +134,9 @@ static int check_offs_len(struct mtd_info *mtd,
136 134
137/** 135/**
138 * nand_release_device - [GENERIC] release chip 136 * nand_release_device - [GENERIC] release chip
139 * @mtd: MTD device structure 137 * @mtd: MTD device structure
140 * 138 *
141 * Deselect, release chip lock and wake up anyone waiting on the device 139 * Deselect, release chip lock and wake up anyone waiting on the device.
142 */ 140 */
143static void nand_release_device(struct mtd_info *mtd) 141static void nand_release_device(struct mtd_info *mtd)
144{ 142{
@@ -157,9 +155,9 @@ static void nand_release_device(struct mtd_info *mtd)
157 155
158/** 156/**
159 * nand_read_byte - [DEFAULT] read one byte from the chip 157 * nand_read_byte - [DEFAULT] read one byte from the chip
160 * @mtd: MTD device structure 158 * @mtd: MTD device structure
161 * 159 *
162 * Default read function for 8bit buswith 160 * Default read function for 8bit buswidth
163 */ 161 */
164static uint8_t nand_read_byte(struct mtd_info *mtd) 162static uint8_t nand_read_byte(struct mtd_info *mtd)
165{ 163{
@@ -169,10 +167,11 @@ static uint8_t nand_read_byte(struct mtd_info *mtd)
169 167
170/** 168/**
171 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip 169 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
172 * @mtd: MTD device structure 170 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
171 * @mtd: MTD device structure
172 *
173 * Default read function for 16bit buswidth with endianness conversion.
173 * 174 *
174 * Default read function for 16bit buswith with
175 * endianess conversion
176 */ 175 */
177static uint8_t nand_read_byte16(struct mtd_info *mtd) 176static uint8_t nand_read_byte16(struct mtd_info *mtd)
178{ 177{
@@ -182,10 +181,9 @@ static uint8_t nand_read_byte16(struct mtd_info *mtd)
182 181
183/** 182/**
184 * nand_read_word - [DEFAULT] read one word from the chip 183 * nand_read_word - [DEFAULT] read one word from the chip
185 * @mtd: MTD device structure 184 * @mtd: MTD device structure
186 * 185 *
187 * Default read function for 16bit buswith without 186 * Default read function for 16bit buswidth without endianness conversion.
188 * endianess conversion
189 */ 187 */
190static u16 nand_read_word(struct mtd_info *mtd) 188static u16 nand_read_word(struct mtd_info *mtd)
191{ 189{
@@ -195,8 +193,8 @@ static u16 nand_read_word(struct mtd_info *mtd)
195 193
196/** 194/**
197 * nand_select_chip - [DEFAULT] control CE line 195 * nand_select_chip - [DEFAULT] control CE line
198 * @mtd: MTD device structure 196 * @mtd: MTD device structure
199 * @chipnr: chipnumber to select, -1 for deselect 197 * @chipnr: chipnumber to select, -1 for deselect
200 * 198 *
201 * Default select function for 1 chip devices. 199 * Default select function for 1 chip devices.
202 */ 200 */
@@ -218,11 +216,11 @@ static void nand_select_chip(struct mtd_info *mtd, int chipnr)
218 216
219/** 217/**
220 * nand_write_buf - [DEFAULT] write buffer to chip 218 * nand_write_buf - [DEFAULT] write buffer to chip
221 * @mtd: MTD device structure 219 * @mtd: MTD device structure
222 * @buf: data buffer 220 * @buf: data buffer
223 * @len: number of bytes to write 221 * @len: number of bytes to write
224 * 222 *
225 * Default write function for 8bit buswith 223 * Default write function for 8bit buswidth.
226 */ 224 */
227static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) 225static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
228{ 226{
@@ -235,11 +233,11 @@ static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
235 233
236/** 234/**
237 * nand_read_buf - [DEFAULT] read chip data into buffer 235 * nand_read_buf - [DEFAULT] read chip data into buffer
238 * @mtd: MTD device structure 236 * @mtd: MTD device structure
239 * @buf: buffer to store date 237 * @buf: buffer to store date
240 * @len: number of bytes to read 238 * @len: number of bytes to read
241 * 239 *
242 * Default read function for 8bit buswith 240 * Default read function for 8bit buswidth.
243 */ 241 */
244static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) 242static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
245{ 243{
@@ -252,11 +250,11 @@ static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
252 250
253/** 251/**
254 * nand_verify_buf - [DEFAULT] Verify chip data against buffer 252 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
255 * @mtd: MTD device structure 253 * @mtd: MTD device structure
256 * @buf: buffer containing the data to compare 254 * @buf: buffer containing the data to compare
257 * @len: number of bytes to compare 255 * @len: number of bytes to compare
258 * 256 *
259 * Default verify function for 8bit buswith 257 * Default verify function for 8bit buswidth.
260 */ 258 */
261static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len) 259static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
262{ 260{
@@ -271,11 +269,11 @@ static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
271 269
272/** 270/**
273 * nand_write_buf16 - [DEFAULT] write buffer to chip 271 * nand_write_buf16 - [DEFAULT] write buffer to chip
274 * @mtd: MTD device structure 272 * @mtd: MTD device structure
275 * @buf: data buffer 273 * @buf: data buffer
276 * @len: number of bytes to write 274 * @len: number of bytes to write
277 * 275 *
278 * Default write function for 16bit buswith 276 * Default write function for 16bit buswidth.
279 */ 277 */
280static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) 278static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
281{ 279{
@@ -291,11 +289,11 @@ static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
291 289
292/** 290/**
293 * nand_read_buf16 - [DEFAULT] read chip data into buffer 291 * nand_read_buf16 - [DEFAULT] read chip data into buffer
294 * @mtd: MTD device structure 292 * @mtd: MTD device structure
295 * @buf: buffer to store date 293 * @buf: buffer to store date
296 * @len: number of bytes to read 294 * @len: number of bytes to read
297 * 295 *
298 * Default read function for 16bit buswith 296 * Default read function for 16bit buswidth.
299 */ 297 */
300static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) 298static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
301{ 299{
@@ -310,11 +308,11 @@ static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
310 308
311/** 309/**
312 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer 310 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
313 * @mtd: MTD device structure 311 * @mtd: MTD device structure
314 * @buf: buffer containing the data to compare 312 * @buf: buffer containing the data to compare
315 * @len: number of bytes to compare 313 * @len: number of bytes to compare
316 * 314 *
317 * Default verify function for 16bit buswith 315 * Default verify function for 16bit buswidth.
318 */ 316 */
319static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) 317static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
320{ 318{
@@ -332,9 +330,9 @@ static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
332 330
333/** 331/**
334 * nand_block_bad - [DEFAULT] Read bad block marker from the chip 332 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
335 * @mtd: MTD device structure 333 * @mtd: MTD device structure
336 * @ofs: offset from device start 334 * @ofs: offset from device start
337 * @getchip: 0, if the chip is already selected 335 * @getchip: 0, if the chip is already selected
338 * 336 *
339 * Check, if the block is bad. 337 * Check, if the block is bad.
340 */ 338 */
@@ -344,7 +342,7 @@ static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
344 struct nand_chip *chip = mtd->priv; 342 struct nand_chip *chip = mtd->priv;
345 u16 bad; 343 u16 bad;
346 344
347 if (chip->options & NAND_BBT_SCANLASTPAGE) 345 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
348 ofs += mtd->erasesize - mtd->writesize; 346 ofs += mtd->erasesize - mtd->writesize;
349 347
350 page = (int)(ofs >> chip->page_shift) & chip->pagemask; 348 page = (int)(ofs >> chip->page_shift) & chip->pagemask;
@@ -384,11 +382,11 @@ static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
384 382
385/** 383/**
386 * nand_default_block_markbad - [DEFAULT] mark a block bad 384 * nand_default_block_markbad - [DEFAULT] mark a block bad
387 * @mtd: MTD device structure 385 * @mtd: MTD device structure
388 * @ofs: offset from device start 386 * @ofs: offset from device start
389 * 387 *
390 * This is the default implementation, which can be overridden by 388 * This is the default implementation, which can be overridden by a hardware
391 * a hardware specific driver. 389 * specific driver.
392*/ 390*/
393static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) 391static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
394{ 392{
@@ -396,7 +394,7 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
396 uint8_t buf[2] = { 0, 0 }; 394 uint8_t buf[2] = { 0, 0 };
397 int block, ret, i = 0; 395 int block, ret, i = 0;
398 396
399 if (chip->options & NAND_BBT_SCANLASTPAGE) 397 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
400 ofs += mtd->erasesize - mtd->writesize; 398 ofs += mtd->erasesize - mtd->writesize;
401 399
402 /* Get block number */ 400 /* Get block number */
@@ -404,33 +402,31 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
404 if (chip->bbt) 402 if (chip->bbt)
405 chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); 403 chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
406 404
407 /* Do we have a flash based bad block table ? */ 405 /* Do we have a flash based bad block table? */
408 if (chip->options & NAND_USE_FLASH_BBT) 406 if (chip->bbt_options & NAND_BBT_USE_FLASH)
409 ret = nand_update_bbt(mtd, ofs); 407 ret = nand_update_bbt(mtd, ofs);
410 else { 408 else {
409 struct mtd_oob_ops ops;
410
411 nand_get_device(chip, mtd, FL_WRITING); 411 nand_get_device(chip, mtd, FL_WRITING);
412 412
413 /* Write to first two pages and to byte 1 and 6 if necessary. 413 /*
414 * If we write to more than one location, the first error 414 * Write to first two pages if necessary. If we write to more
415 * encountered quits the procedure. We write two bytes per 415 * than one location, the first error encountered quits the
416 * location, so we dont have to mess with 16 bit access. 416 * procedure. We write two bytes per location, so we dont have
417 * to mess with 16 bit access.
417 */ 418 */
419 ops.len = ops.ooblen = 2;
420 ops.datbuf = NULL;
421 ops.oobbuf = buf;
422 ops.ooboffs = chip->badblockpos & ~0x01;
423 ops.mode = MTD_OPS_PLACE_OOB;
418 do { 424 do {
419 chip->ops.len = chip->ops.ooblen = 2; 425 ret = nand_do_write_oob(mtd, ofs, &ops);
420 chip->ops.datbuf = NULL;
421 chip->ops.oobbuf = buf;
422 chip->ops.ooboffs = chip->badblockpos & ~0x01;
423
424 ret = nand_do_write_oob(mtd, ofs, &chip->ops);
425 426
426 if (!ret && (chip->options & NAND_BBT_SCANBYTE1AND6)) {
427 chip->ops.ooboffs = NAND_SMALL_BADBLOCK_POS
428 & ~0x01;
429 ret = nand_do_write_oob(mtd, ofs, &chip->ops);
430 }
431 i++; 427 i++;
432 ofs += mtd->writesize; 428 ofs += mtd->writesize;
433 } while (!ret && (chip->options & NAND_BBT_SCAN2NDPAGE) && 429 } while (!ret && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE) &&
434 i < 2); 430 i < 2);
435 431
436 nand_release_device(mtd); 432 nand_release_device(mtd);
@@ -443,16 +439,16 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
443 439
444/** 440/**
445 * nand_check_wp - [GENERIC] check if the chip is write protected 441 * nand_check_wp - [GENERIC] check if the chip is write protected
446 * @mtd: MTD device structure 442 * @mtd: MTD device structure
447 * Check, if the device is write protected
448 * 443 *
449 * The function expects, that the device is already selected 444 * Check, if the device is write protected. The function expects, that the
445 * device is already selected.
450 */ 446 */
451static int nand_check_wp(struct mtd_info *mtd) 447static int nand_check_wp(struct mtd_info *mtd)
452{ 448{
453 struct nand_chip *chip = mtd->priv; 449 struct nand_chip *chip = mtd->priv;
454 450
455 /* broken xD cards report WP despite being writable */ 451 /* Broken xD cards report WP despite being writable */
456 if (chip->options & NAND_BROKEN_XD) 452 if (chip->options & NAND_BROKEN_XD)
457 return 0; 453 return 0;
458 454
@@ -463,10 +459,10 @@ static int nand_check_wp(struct mtd_info *mtd)
463 459
464/** 460/**
465 * nand_block_checkbad - [GENERIC] Check if a block is marked bad 461 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
466 * @mtd: MTD device structure 462 * @mtd: MTD device structure
467 * @ofs: offset from device start 463 * @ofs: offset from device start
468 * @getchip: 0, if the chip is already selected 464 * @getchip: 0, if the chip is already selected
469 * @allowbbt: 1, if its allowed to access the bbt area 465 * @allowbbt: 1, if its allowed to access the bbt area
470 * 466 *
471 * Check, if the block is bad. Either by reading the bad block table or 467 * Check, if the block is bad. Either by reading the bad block table or
472 * calling of the scan function. 468 * calling of the scan function.
@@ -485,8 +481,8 @@ static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip,
485 481
486/** 482/**
487 * panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands. 483 * panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands.
488 * @mtd: MTD device structure 484 * @mtd: MTD device structure
489 * @timeo: Timeout 485 * @timeo: Timeout
490 * 486 *
491 * Helper function for nand_wait_ready used when needing to wait in interrupt 487 * Helper function for nand_wait_ready used when needing to wait in interrupt
492 * context. 488 * context.
@@ -505,10 +501,7 @@ static void panic_nand_wait_ready(struct mtd_info *mtd, unsigned long timeo)
505 } 501 }
506} 502}
507 503
508/* 504/* Wait for the ready pin, after a command. The timeout is caught later. */
509 * Wait for the ready pin, after a command
510 * The timeout is catched later.
511 */
512void nand_wait_ready(struct mtd_info *mtd) 505void nand_wait_ready(struct mtd_info *mtd)
513{ 506{
514 struct nand_chip *chip = mtd->priv; 507 struct nand_chip *chip = mtd->priv;
@@ -519,7 +512,7 @@ void nand_wait_ready(struct mtd_info *mtd)
519 return panic_nand_wait_ready(mtd, 400); 512 return panic_nand_wait_ready(mtd, 400);
520 513
521 led_trigger_event(nand_led_trigger, LED_FULL); 514 led_trigger_event(nand_led_trigger, LED_FULL);
522 /* wait until command is processed or timeout occures */ 515 /* Wait until command is processed or timeout occurs */
523 do { 516 do {
524 if (chip->dev_ready(mtd)) 517 if (chip->dev_ready(mtd))
525 break; 518 break;
@@ -531,13 +524,13 @@ EXPORT_SYMBOL_GPL(nand_wait_ready);
531 524
532/** 525/**
533 * nand_command - [DEFAULT] Send command to NAND device 526 * nand_command - [DEFAULT] Send command to NAND device
534 * @mtd: MTD device structure 527 * @mtd: MTD device structure
535 * @command: the command to be sent 528 * @command: the command to be sent
536 * @column: the column address for this command, -1 if none 529 * @column: the column address for this command, -1 if none
537 * @page_addr: the page address for this command, -1 if none 530 * @page_addr: the page address for this command, -1 if none
538 * 531 *
539 * Send command to NAND device. This function is used for small page 532 * Send command to NAND device. This function is used for small page devices
540 * devices (256/512 Bytes per page) 533 * (256/512 Bytes per page).
541 */ 534 */
542static void nand_command(struct mtd_info *mtd, unsigned int command, 535static void nand_command(struct mtd_info *mtd, unsigned int command,
543 int column, int page_addr) 536 int column, int page_addr)
@@ -545,9 +538,7 @@ static void nand_command(struct mtd_info *mtd, unsigned int command,
545 register struct nand_chip *chip = mtd->priv; 538 register struct nand_chip *chip = mtd->priv;
546 int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE; 539 int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
547 540
548 /* 541 /* Write out the command to the device */
549 * Write out the command to the device.
550 */
551 if (command == NAND_CMD_SEQIN) { 542 if (command == NAND_CMD_SEQIN) {
552 int readcmd; 543 int readcmd;
553 544
@@ -567,9 +558,7 @@ static void nand_command(struct mtd_info *mtd, unsigned int command,
567 } 558 }
568 chip->cmd_ctrl(mtd, command, ctrl); 559 chip->cmd_ctrl(mtd, command, ctrl);
569 560
570 /* 561 /* Address cycle, when necessary */
571 * Address cycle, when necessary
572 */
573 ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE; 562 ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;
574 /* Serially input address */ 563 /* Serially input address */
575 if (column != -1) { 564 if (column != -1) {
@@ -590,8 +579,8 @@ static void nand_command(struct mtd_info *mtd, unsigned int command,
590 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); 579 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
591 580
592 /* 581 /*
593 * program and erase have their own busy handlers 582 * Program and erase have their own busy handlers status and sequential
594 * status and sequential in needs no delay 583 * in needs no delay
595 */ 584 */
596 switch (command) { 585 switch (command) {
597 586
@@ -625,8 +614,10 @@ static void nand_command(struct mtd_info *mtd, unsigned int command,
625 return; 614 return;
626 } 615 }
627 } 616 }
628 /* Apply this short delay always to ensure that we do wait tWB in 617 /*
629 * any case on any machine. */ 618 * Apply this short delay always to ensure that we do wait tWB in
619 * any case on any machine.
620 */
630 ndelay(100); 621 ndelay(100);
631 622
632 nand_wait_ready(mtd); 623 nand_wait_ready(mtd);
@@ -634,14 +625,14 @@ static void nand_command(struct mtd_info *mtd, unsigned int command,
634 625
635/** 626/**
636 * nand_command_lp - [DEFAULT] Send command to NAND large page device 627 * nand_command_lp - [DEFAULT] Send command to NAND large page device
637 * @mtd: MTD device structure 628 * @mtd: MTD device structure
638 * @command: the command to be sent 629 * @command: the command to be sent
639 * @column: the column address for this command, -1 if none 630 * @column: the column address for this command, -1 if none
640 * @page_addr: the page address for this command, -1 if none 631 * @page_addr: the page address for this command, -1 if none
641 * 632 *
642 * Send command to NAND device. This is the version for the new large page 633 * Send command to NAND device. This is the version for the new large page
643 * devices We dont have the separate regions as we have in the small page 634 * devices. We don't have the separate regions as we have in the small page
644 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible. 635 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
645 */ 636 */
646static void nand_command_lp(struct mtd_info *mtd, unsigned int command, 637static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
647 int column, int page_addr) 638 int column, int page_addr)
@@ -683,8 +674,8 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
683 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); 674 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
684 675
685 /* 676 /*
686 * program and erase have their own busy handlers 677 * Program and erase have their own busy handlers status, sequential
687 * status, sequential in, and deplete1 need no delay 678 * in, and deplete1 need no delay.
688 */ 679 */
689 switch (command) { 680 switch (command) {
690 681
@@ -698,14 +689,12 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
698 case NAND_CMD_DEPLETE1: 689 case NAND_CMD_DEPLETE1:
699 return; 690 return;
700 691
701 /*
702 * read error status commands require only a short delay
703 */
704 case NAND_CMD_STATUS_ERROR: 692 case NAND_CMD_STATUS_ERROR:
705 case NAND_CMD_STATUS_ERROR0: 693 case NAND_CMD_STATUS_ERROR0:
706 case NAND_CMD_STATUS_ERROR1: 694 case NAND_CMD_STATUS_ERROR1:
707 case NAND_CMD_STATUS_ERROR2: 695 case NAND_CMD_STATUS_ERROR2:
708 case NAND_CMD_STATUS_ERROR3: 696 case NAND_CMD_STATUS_ERROR3:
697 /* Read error status commands require only a short delay */
709 udelay(chip->chip_delay); 698 udelay(chip->chip_delay);
710 return; 699 return;
711 700
@@ -739,7 +728,7 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
739 default: 728 default:
740 /* 729 /*
741 * If we don't have access to the busy pin, we apply the given 730 * If we don't have access to the busy pin, we apply the given
742 * command delay 731 * command delay.
743 */ 732 */
744 if (!chip->dev_ready) { 733 if (!chip->dev_ready) {
745 udelay(chip->chip_delay); 734 udelay(chip->chip_delay);
@@ -747,8 +736,10 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
747 } 736 }
748 } 737 }
749 738
750 /* Apply this short delay always to ensure that we do wait tWB in 739 /*
751 * any case on any machine. */ 740 * Apply this short delay always to ensure that we do wait tWB in
741 * any case on any machine.
742 */
752 ndelay(100); 743 ndelay(100);
753 744
754 nand_wait_ready(mtd); 745 nand_wait_ready(mtd);
@@ -756,25 +747,25 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
756 747
757/** 748/**
758 * panic_nand_get_device - [GENERIC] Get chip for selected access 749 * panic_nand_get_device - [GENERIC] Get chip for selected access
759 * @chip: the nand chip descriptor 750 * @chip: the nand chip descriptor
760 * @mtd: MTD device structure 751 * @mtd: MTD device structure
761 * @new_state: the state which is requested 752 * @new_state: the state which is requested
762 * 753 *
763 * Used when in panic, no locks are taken. 754 * Used when in panic, no locks are taken.
764 */ 755 */
765static void panic_nand_get_device(struct nand_chip *chip, 756static void panic_nand_get_device(struct nand_chip *chip,
766 struct mtd_info *mtd, int new_state) 757 struct mtd_info *mtd, int new_state)
767{ 758{
768 /* Hardware controller shared among independend devices */ 759 /* Hardware controller shared among independent devices */
769 chip->controller->active = chip; 760 chip->controller->active = chip;
770 chip->state = new_state; 761 chip->state = new_state;
771} 762}
772 763
773/** 764/**
774 * nand_get_device - [GENERIC] Get chip for selected access 765 * nand_get_device - [GENERIC] Get chip for selected access
775 * @chip: the nand chip descriptor 766 * @chip: the nand chip descriptor
776 * @mtd: MTD device structure 767 * @mtd: MTD device structure
777 * @new_state: the state which is requested 768 * @new_state: the state which is requested
778 * 769 *
779 * Get the device and lock it for exclusive access 770 * Get the device and lock it for exclusive access
780 */ 771 */
@@ -812,10 +803,10 @@ retry:
812} 803}
813 804
814/** 805/**
815 * panic_nand_wait - [GENERIC] wait until the command is done 806 * panic_nand_wait - [GENERIC] wait until the command is done
816 * @mtd: MTD device structure 807 * @mtd: MTD device structure
817 * @chip: NAND chip structure 808 * @chip: NAND chip structure
818 * @timeo: Timeout 809 * @timeo: timeout
819 * 810 *
820 * Wait for command done. This is a helper function for nand_wait used when 811 * Wait for command done. This is a helper function for nand_wait used when
821 * we are in interrupt context. May happen when in panic and trying to write 812 * we are in interrupt context. May happen when in panic and trying to write
@@ -838,13 +829,13 @@ static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,
838} 829}
839 830
840/** 831/**
841 * nand_wait - [DEFAULT] wait until the command is done 832 * nand_wait - [DEFAULT] wait until the command is done
842 * @mtd: MTD device structure 833 * @mtd: MTD device structure
843 * @chip: NAND chip structure 834 * @chip: NAND chip structure
844 * 835 *
845 * Wait for command done. This applies to erase and program only 836 * Wait for command done. This applies to erase and program only. Erase can
846 * Erase can take up to 400ms and program up to 20ms according to 837 * take up to 400ms and program up to 20ms according to general NAND and
847 * general NAND and SmartMedia specs 838 * SmartMedia specs.
848 */ 839 */
849static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip) 840static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
850{ 841{
@@ -859,8 +850,10 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
859 850
860 led_trigger_event(nand_led_trigger, LED_FULL); 851 led_trigger_event(nand_led_trigger, LED_FULL);
861 852
862 /* Apply this short delay always to ensure that we do wait tWB in 853 /*
863 * any case on any machine. */ 854 * Apply this short delay always to ensure that we do wait tWB in any
855 * case on any machine.
856 */
864 ndelay(100); 857 ndelay(100);
865 858
866 if ((state == FL_ERASING) && (chip->options & NAND_IS_AND)) 859 if ((state == FL_ERASING) && (chip->options & NAND_IS_AND))
@@ -890,16 +883,15 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
890 883
891/** 884/**
892 * __nand_unlock - [REPLACEABLE] unlocks specified locked blocks 885 * __nand_unlock - [REPLACEABLE] unlocks specified locked blocks
893 *
894 * @mtd: mtd info 886 * @mtd: mtd info
895 * @ofs: offset to start unlock from 887 * @ofs: offset to start unlock from
896 * @len: length to unlock 888 * @len: length to unlock
897 * @invert: when = 0, unlock the range of blocks within the lower and 889 * @invert: when = 0, unlock the range of blocks within the lower and
898 * upper boundary address 890 * upper boundary address
899 * when = 1, unlock the range of blocks outside the boundaries 891 * when = 1, unlock the range of blocks outside the boundaries
900 * of the lower and upper boundary address 892 * of the lower and upper boundary address
901 * 893 *
902 * return - unlock status 894 * Returs unlock status.
903 */ 895 */
904static int __nand_unlock(struct mtd_info *mtd, loff_t ofs, 896static int __nand_unlock(struct mtd_info *mtd, loff_t ofs,
905 uint64_t len, int invert) 897 uint64_t len, int invert)
@@ -919,10 +911,9 @@ static int __nand_unlock(struct mtd_info *mtd, loff_t ofs,
919 911
920 /* Call wait ready function */ 912 /* Call wait ready function */
921 status = chip->waitfunc(mtd, chip); 913 status = chip->waitfunc(mtd, chip);
922 udelay(1000);
923 /* See if device thinks it succeeded */ 914 /* See if device thinks it succeeded */
924 if (status & 0x01) { 915 if (status & 0x01) {
925 DEBUG(MTD_DEBUG_LEVEL0, "%s: Error status = 0x%08x\n", 916 pr_debug("%s: error status = 0x%08x\n",
926 __func__, status); 917 __func__, status);
927 ret = -EIO; 918 ret = -EIO;
928 } 919 }
@@ -932,12 +923,11 @@ static int __nand_unlock(struct mtd_info *mtd, loff_t ofs,
932 923
933/** 924/**
934 * nand_unlock - [REPLACEABLE] unlocks specified locked blocks 925 * nand_unlock - [REPLACEABLE] unlocks specified locked blocks
935 *
936 * @mtd: mtd info 926 * @mtd: mtd info
937 * @ofs: offset to start unlock from 927 * @ofs: offset to start unlock from
938 * @len: length to unlock 928 * @len: length to unlock
939 * 929 *
940 * return - unlock status 930 * Returns unlock status.
941 */ 931 */
942int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) 932int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
943{ 933{
@@ -945,7 +935,7 @@ int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
945 int chipnr; 935 int chipnr;
946 struct nand_chip *chip = mtd->priv; 936 struct nand_chip *chip = mtd->priv;
947 937
948 DEBUG(MTD_DEBUG_LEVEL3, "%s: start = 0x%012llx, len = %llu\n", 938 pr_debug("%s: start = 0x%012llx, len = %llu\n",
949 __func__, (unsigned long long)ofs, len); 939 __func__, (unsigned long long)ofs, len);
950 940
951 if (check_offs_len(mtd, ofs, len)) 941 if (check_offs_len(mtd, ofs, len))
@@ -964,7 +954,7 @@ int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
964 954
965 /* Check, if it is write protected */ 955 /* Check, if it is write protected */
966 if (nand_check_wp(mtd)) { 956 if (nand_check_wp(mtd)) {
967 DEBUG(MTD_DEBUG_LEVEL0, "%s: Device is write protected!!!\n", 957 pr_debug("%s: device is write protected!\n",
968 __func__); 958 __func__);
969 ret = -EIO; 959 ret = -EIO;
970 goto out; 960 goto out;
@@ -981,18 +971,16 @@ EXPORT_SYMBOL(nand_unlock);
981 971
982/** 972/**
983 * nand_lock - [REPLACEABLE] locks all blocks present in the device 973 * nand_lock - [REPLACEABLE] locks all blocks present in the device
984 *
985 * @mtd: mtd info 974 * @mtd: mtd info
986 * @ofs: offset to start unlock from 975 * @ofs: offset to start unlock from
987 * @len: length to unlock 976 * @len: length to unlock
988 * 977 *
989 * return - lock status 978 * This feature is not supported in many NAND parts. 'Micron' NAND parts do
979 * have this feature, but it allows only to lock all blocks, not for specified
980 * range for block. Implementing 'lock' feature by making use of 'unlock', for
981 * now.
990 * 982 *
991 * This feature is not supported in many NAND parts. 'Micron' NAND parts 983 * Returns lock status.
992 * do have this feature, but it allows only to lock all blocks, not for
993 * specified range for block.
994 *
995 * Implementing 'lock' feature by making use of 'unlock', for now.
996 */ 984 */
997int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) 985int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
998{ 986{
@@ -1000,7 +988,7 @@ int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
1000 int chipnr, status, page; 988 int chipnr, status, page;
1001 struct nand_chip *chip = mtd->priv; 989 struct nand_chip *chip = mtd->priv;
1002 990
1003 DEBUG(MTD_DEBUG_LEVEL3, "%s: start = 0x%012llx, len = %llu\n", 991 pr_debug("%s: start = 0x%012llx, len = %llu\n",
1004 __func__, (unsigned long long)ofs, len); 992 __func__, (unsigned long long)ofs, len);
1005 993
1006 if (check_offs_len(mtd, ofs, len)) 994 if (check_offs_len(mtd, ofs, len))
@@ -1015,7 +1003,7 @@ int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
1015 1003
1016 /* Check, if it is write protected */ 1004 /* Check, if it is write protected */
1017 if (nand_check_wp(mtd)) { 1005 if (nand_check_wp(mtd)) {
1018 DEBUG(MTD_DEBUG_LEVEL0, "%s: Device is write protected!!!\n", 1006 pr_debug("%s: device is write protected!\n",
1019 __func__); 1007 __func__);
1020 status = MTD_ERASE_FAILED; 1008 status = MTD_ERASE_FAILED;
1021 ret = -EIO; 1009 ret = -EIO;
@@ -1028,10 +1016,9 @@ int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
1028 1016
1029 /* Call wait ready function */ 1017 /* Call wait ready function */
1030 status = chip->waitfunc(mtd, chip); 1018 status = chip->waitfunc(mtd, chip);
1031 udelay(1000);
1032 /* See if device thinks it succeeded */ 1019 /* See if device thinks it succeeded */
1033 if (status & 0x01) { 1020 if (status & 0x01) {
1034 DEBUG(MTD_DEBUG_LEVEL0, "%s: Error status = 0x%08x\n", 1021 pr_debug("%s: error status = 0x%08x\n",
1035 __func__, status); 1022 __func__, status);
1036 ret = -EIO; 1023 ret = -EIO;
1037 goto out; 1024 goto out;
@@ -1047,13 +1034,13 @@ out:
1047EXPORT_SYMBOL(nand_lock); 1034EXPORT_SYMBOL(nand_lock);
1048 1035
1049/** 1036/**
1050 * nand_read_page_raw - [Intern] read raw page data without ecc 1037 * nand_read_page_raw - [INTERN] read raw page data without ecc
1051 * @mtd: mtd info structure 1038 * @mtd: mtd info structure
1052 * @chip: nand chip info structure 1039 * @chip: nand chip info structure
1053 * @buf: buffer to store read data 1040 * @buf: buffer to store read data
1054 * @page: page number to read 1041 * @page: page number to read
1055 * 1042 *
1056 * Not for syndrome calculating ecc controllers, which use a special oob layout 1043 * Not for syndrome calculating ECC controllers, which use a special oob layout.
1057 */ 1044 */
1058static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, 1045static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
1059 uint8_t *buf, int page) 1046 uint8_t *buf, int page)
@@ -1064,11 +1051,11 @@ static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
1064} 1051}
1065 1052
1066/** 1053/**
1067 * nand_read_page_raw_syndrome - [Intern] read raw page data without ecc 1054 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
1068 * @mtd: mtd info structure 1055 * @mtd: mtd info structure
1069 * @chip: nand chip info structure 1056 * @chip: nand chip info structure
1070 * @buf: buffer to store read data 1057 * @buf: buffer to store read data
1071 * @page: page number to read 1058 * @page: page number to read
1072 * 1059 *
1073 * We need a special oob layout and handling even when OOB isn't used. 1060 * We need a special oob layout and handling even when OOB isn't used.
1074 */ 1061 */
@@ -1107,11 +1094,11 @@ static int nand_read_page_raw_syndrome(struct mtd_info *mtd,
1107} 1094}
1108 1095
1109/** 1096/**
1110 * nand_read_page_swecc - [REPLACABLE] software ecc based page read function 1097 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
1111 * @mtd: mtd info structure 1098 * @mtd: mtd info structure
1112 * @chip: nand chip info structure 1099 * @chip: nand chip info structure
1113 * @buf: buffer to store read data 1100 * @buf: buffer to store read data
1114 * @page: page number to read 1101 * @page: page number to read
1115 */ 1102 */
1116static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, 1103static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
1117 uint8_t *buf, int page) 1104 uint8_t *buf, int page)
@@ -1148,12 +1135,12 @@ static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
1148} 1135}
1149 1136
1150/** 1137/**
1151 * nand_read_subpage - [REPLACABLE] software ecc based sub-page read function 1138 * nand_read_subpage - [REPLACEABLE] software ECC based sub-page read function
1152 * @mtd: mtd info structure 1139 * @mtd: mtd info structure
1153 * @chip: nand chip info structure 1140 * @chip: nand chip info structure
1154 * @data_offs: offset of requested data within the page 1141 * @data_offs: offset of requested data within the page
1155 * @readlen: data length 1142 * @readlen: data length
1156 * @bufpoi: buffer to store read data 1143 * @bufpoi: buffer to store read data
1157 */ 1144 */
1158static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, 1145static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
1159 uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi) 1146 uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi)
@@ -1166,12 +1153,12 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
1166 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1; 1153 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
1167 int index = 0; 1154 int index = 0;
1168 1155
1169 /* Column address wihin the page aligned to ECC size (256bytes). */ 1156 /* Column address within the page aligned to ECC size (256bytes) */
1170 start_step = data_offs / chip->ecc.size; 1157 start_step = data_offs / chip->ecc.size;
1171 end_step = (data_offs + readlen - 1) / chip->ecc.size; 1158 end_step = (data_offs + readlen - 1) / chip->ecc.size;
1172 num_steps = end_step - start_step + 1; 1159 num_steps = end_step - start_step + 1;
1173 1160
1174 /* Data size aligned to ECC ecc.size*/ 1161 /* Data size aligned to ECC ecc.size */
1175 datafrag_len = num_steps * chip->ecc.size; 1162 datafrag_len = num_steps * chip->ecc.size;
1176 eccfrag_len = num_steps * chip->ecc.bytes; 1163 eccfrag_len = num_steps * chip->ecc.bytes;
1177 1164
@@ -1183,13 +1170,14 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
1183 p = bufpoi + data_col_addr; 1170 p = bufpoi + data_col_addr;
1184 chip->read_buf(mtd, p, datafrag_len); 1171 chip->read_buf(mtd, p, datafrag_len);
1185 1172
1186 /* Calculate ECC */ 1173 /* Calculate ECC */
1187 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) 1174 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)
1188 chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]); 1175 chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]);
1189 1176
1190 /* The performance is faster if to position offsets 1177 /*
1191 according to ecc.pos. Let make sure here that 1178 * The performance is faster if we position offsets according to
1192 there are no gaps in ecc positions */ 1179 * ecc.pos. Let's make sure that there are no gaps in ECC positions.
1180 */
1193 for (i = 0; i < eccfrag_len - 1; i++) { 1181 for (i = 0; i < eccfrag_len - 1; i++) {
1194 if (eccpos[i + start_step * chip->ecc.bytes] + 1 != 1182 if (eccpos[i + start_step * chip->ecc.bytes] + 1 !=
1195 eccpos[i + start_step * chip->ecc.bytes + 1]) { 1183 eccpos[i + start_step * chip->ecc.bytes + 1]) {
@@ -1201,8 +1189,10 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
1201 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1); 1189 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
1202 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); 1190 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1203 } else { 1191 } else {
1204 /* send the command to read the particular ecc bytes */ 1192 /*
1205 /* take care about buswidth alignment in read_buf */ 1193 * Send the command to read the particular ECC bytes take care
1194 * about buswidth alignment in read_buf.
1195 */
1206 index = start_step * chip->ecc.bytes; 1196 index = start_step * chip->ecc.bytes;
1207 1197
1208 aligned_pos = eccpos[index] & ~(busw - 1); 1198 aligned_pos = eccpos[index] & ~(busw - 1);
@@ -1235,13 +1225,13 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
1235} 1225}
1236 1226
1237/** 1227/**
1238 * nand_read_page_hwecc - [REPLACABLE] hardware ecc based page read function 1228 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
1239 * @mtd: mtd info structure 1229 * @mtd: mtd info structure
1240 * @chip: nand chip info structure 1230 * @chip: nand chip info structure
1241 * @buf: buffer to store read data 1231 * @buf: buffer to store read data
1242 * @page: page number to read 1232 * @page: page number to read
1243 * 1233 *
1244 * Not for syndrome calculating ecc controllers which need a special oob layout 1234 * Not for syndrome calculating ECC controllers which need a special oob layout.
1245 */ 1235 */
1246static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, 1236static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
1247 uint8_t *buf, int page) 1237 uint8_t *buf, int page)
@@ -1280,18 +1270,17 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
1280} 1270}
1281 1271
1282/** 1272/**
1283 * nand_read_page_hwecc_oob_first - [REPLACABLE] hw ecc, read oob first 1273 * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first
1284 * @mtd: mtd info structure 1274 * @mtd: mtd info structure
1285 * @chip: nand chip info structure 1275 * @chip: nand chip info structure
1286 * @buf: buffer to store read data 1276 * @buf: buffer to store read data
1287 * @page: page number to read 1277 * @page: page number to read
1288 * 1278 *
1289 * Hardware ECC for large page chips, require OOB to be read first. 1279 * Hardware ECC for large page chips, require OOB to be read first. For this
1290 * For this ECC mode, the write_page method is re-used from ECC_HW. 1280 * ECC mode, the write_page method is re-used from ECC_HW. These methods
1291 * These methods read/write ECC from the OOB area, unlike the 1281 * read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with
1292 * ECC_HW_SYNDROME support with multiple ECC steps, follows the 1282 * multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from
1293 * "infix ECC" scheme and reads/writes ECC from the data area, by 1283 * the data area, by overwriting the NAND manufacturer bad block markings.
1294 * overwriting the NAND manufacturer bad block markings.
1295 */ 1284 */
1296static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd, 1285static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
1297 struct nand_chip *chip, uint8_t *buf, int page) 1286 struct nand_chip *chip, uint8_t *buf, int page)
@@ -1329,14 +1318,14 @@ static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
1329} 1318}
1330 1319
1331/** 1320/**
1332 * nand_read_page_syndrome - [REPLACABLE] hardware ecc syndrom based page read 1321 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
1333 * @mtd: mtd info structure 1322 * @mtd: mtd info structure
1334 * @chip: nand chip info structure 1323 * @chip: nand chip info structure
1335 * @buf: buffer to store read data 1324 * @buf: buffer to store read data
1336 * @page: page number to read 1325 * @page: page number to read
1337 * 1326 *
1338 * The hw generator calculates the error syndrome automatically. Therefor 1327 * The hw generator calculates the error syndrome automatically. Therefore we
1339 * we need a special oob layout and handling. 1328 * need a special oob layout and handling.
1340 */ 1329 */
1341static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip, 1330static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
1342 uint8_t *buf, int page) 1331 uint8_t *buf, int page)
@@ -1384,29 +1373,29 @@ static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
1384} 1373}
1385 1374
1386/** 1375/**
1387 * nand_transfer_oob - [Internal] Transfer oob to client buffer 1376 * nand_transfer_oob - [INTERN] Transfer oob to client buffer
1388 * @chip: nand chip structure 1377 * @chip: nand chip structure
1389 * @oob: oob destination address 1378 * @oob: oob destination address
1390 * @ops: oob ops structure 1379 * @ops: oob ops structure
1391 * @len: size of oob to transfer 1380 * @len: size of oob to transfer
1392 */ 1381 */
1393static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob, 1382static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
1394 struct mtd_oob_ops *ops, size_t len) 1383 struct mtd_oob_ops *ops, size_t len)
1395{ 1384{
1396 switch (ops->mode) { 1385 switch (ops->mode) {
1397 1386
1398 case MTD_OOB_PLACE: 1387 case MTD_OPS_PLACE_OOB:
1399 case MTD_OOB_RAW: 1388 case MTD_OPS_RAW:
1400 memcpy(oob, chip->oob_poi + ops->ooboffs, len); 1389 memcpy(oob, chip->oob_poi + ops->ooboffs, len);
1401 return oob + len; 1390 return oob + len;
1402 1391
1403 case MTD_OOB_AUTO: { 1392 case MTD_OPS_AUTO_OOB: {
1404 struct nand_oobfree *free = chip->ecc.layout->oobfree; 1393 struct nand_oobfree *free = chip->ecc.layout->oobfree;
1405 uint32_t boffs = 0, roffs = ops->ooboffs; 1394 uint32_t boffs = 0, roffs = ops->ooboffs;
1406 size_t bytes = 0; 1395 size_t bytes = 0;
1407 1396
1408 for (; free->length && len; free++, len -= bytes) { 1397 for (; free->length && len; free++, len -= bytes) {
1409 /* Read request not from offset 0 ? */ 1398 /* Read request not from offset 0? */
1410 if (unlikely(roffs)) { 1399 if (unlikely(roffs)) {
1411 if (roffs >= free->length) { 1400 if (roffs >= free->length) {
1412 roffs -= free->length; 1401 roffs -= free->length;
@@ -1432,11 +1421,10 @@ static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
1432} 1421}
1433 1422
1434/** 1423/**
1435 * nand_do_read_ops - [Internal] Read data with ECC 1424 * nand_do_read_ops - [INTERN] Read data with ECC
1436 * 1425 * @mtd: MTD device structure
1437 * @mtd: MTD device structure 1426 * @from: offset to read from
1438 * @from: offset to read from 1427 * @ops: oob ops structure
1439 * @ops: oob ops structure
1440 * 1428 *
1441 * Internal function. Called with chip held. 1429 * Internal function. Called with chip held.
1442 */ 1430 */
@@ -1451,7 +1439,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1451 int ret = 0; 1439 int ret = 0;
1452 uint32_t readlen = ops->len; 1440 uint32_t readlen = ops->len;
1453 uint32_t oobreadlen = ops->ooblen; 1441 uint32_t oobreadlen = ops->ooblen;
1454 uint32_t max_oobsize = ops->mode == MTD_OOB_AUTO ? 1442 uint32_t max_oobsize = ops->mode == MTD_OPS_AUTO_OOB ?
1455 mtd->oobavail : mtd->oobsize; 1443 mtd->oobavail : mtd->oobsize;
1456 1444
1457 uint8_t *bufpoi, *oob, *buf; 1445 uint8_t *bufpoi, *oob, *buf;
@@ -1473,7 +1461,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1473 bytes = min(mtd->writesize - col, readlen); 1461 bytes = min(mtd->writesize - col, readlen);
1474 aligned = (bytes == mtd->writesize); 1462 aligned = (bytes == mtd->writesize);
1475 1463
1476 /* Is the current page in the buffer ? */ 1464 /* Is the current page in the buffer? */
1477 if (realpage != chip->pagebuf || oob) { 1465 if (realpage != chip->pagebuf || oob) {
1478 bufpoi = aligned ? buf : chip->buffers->databuf; 1466 bufpoi = aligned ? buf : chip->buffers->databuf;
1479 1467
@@ -1483,7 +1471,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1483 } 1471 }
1484 1472
1485 /* Now read the page into the buffer */ 1473 /* Now read the page into the buffer */
1486 if (unlikely(ops->mode == MTD_OOB_RAW)) 1474 if (unlikely(ops->mode == MTD_OPS_RAW))
1487 ret = chip->ecc.read_page_raw(mtd, chip, 1475 ret = chip->ecc.read_page_raw(mtd, chip,
1488 bufpoi, page); 1476 bufpoi, page);
1489 else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob) 1477 else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob)
@@ -1492,14 +1480,22 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1492 else 1480 else
1493 ret = chip->ecc.read_page(mtd, chip, bufpoi, 1481 ret = chip->ecc.read_page(mtd, chip, bufpoi,
1494 page); 1482 page);
1495 if (ret < 0) 1483 if (ret < 0) {
1484 if (!aligned)
1485 /* Invalidate page cache */
1486 chip->pagebuf = -1;
1496 break; 1487 break;
1488 }
1497 1489
1498 /* Transfer not aligned data */ 1490 /* Transfer not aligned data */
1499 if (!aligned) { 1491 if (!aligned) {
1500 if (!NAND_SUBPAGE_READ(chip) && !oob && 1492 if (!NAND_SUBPAGE_READ(chip) && !oob &&
1501 !(mtd->ecc_stats.failed - stats.failed)) 1493 !(mtd->ecc_stats.failed - stats.failed) &&
1494 (ops->mode != MTD_OPS_RAW))
1502 chip->pagebuf = realpage; 1495 chip->pagebuf = realpage;
1496 else
1497 /* Invalidate page cache */
1498 chip->pagebuf = -1;
1503 memcpy(buf, chip->buffers->databuf + col, bytes); 1499 memcpy(buf, chip->buffers->databuf + col, bytes);
1504 } 1500 }
1505 1501
@@ -1539,7 +1535,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1539 if (!readlen) 1535 if (!readlen)
1540 break; 1536 break;
1541 1537
1542 /* For subsequent reads align to page boundary. */ 1538 /* For subsequent reads align to page boundary */
1543 col = 0; 1539 col = 0;
1544 /* Increment page address */ 1540 /* Increment page address */
1545 realpage++; 1541 realpage++;
@@ -1552,8 +1548,9 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1552 chip->select_chip(mtd, chipnr); 1548 chip->select_chip(mtd, chipnr);
1553 } 1549 }
1554 1550
1555 /* Check, if the chip supports auto page increment 1551 /*
1556 * or if we have hit a block boundary. 1552 * Check, if the chip supports auto page increment or if we
1553 * have hit a block boundary.
1557 */ 1554 */
1558 if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck)) 1555 if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck))
1559 sndcmd = 1; 1556 sndcmd = 1;
@@ -1574,18 +1571,19 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1574 1571
1575/** 1572/**
1576 * nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc 1573 * nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc
1577 * @mtd: MTD device structure 1574 * @mtd: MTD device structure
1578 * @from: offset to read from 1575 * @from: offset to read from
1579 * @len: number of bytes to read 1576 * @len: number of bytes to read
1580 * @retlen: pointer to variable to store the number of read bytes 1577 * @retlen: pointer to variable to store the number of read bytes
1581 * @buf: the databuffer to put data 1578 * @buf: the databuffer to put data
1582 * 1579 *
1583 * Get hold of the chip and call nand_do_read 1580 * Get hold of the chip and call nand_do_read.
1584 */ 1581 */
1585static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, 1582static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
1586 size_t *retlen, uint8_t *buf) 1583 size_t *retlen, uint8_t *buf)
1587{ 1584{
1588 struct nand_chip *chip = mtd->priv; 1585 struct nand_chip *chip = mtd->priv;
1586 struct mtd_oob_ops ops;
1589 int ret; 1587 int ret;
1590 1588
1591 /* Do not allow reads past end of device */ 1589 /* Do not allow reads past end of device */
@@ -1596,13 +1594,14 @@ static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
1596 1594
1597 nand_get_device(chip, mtd, FL_READING); 1595 nand_get_device(chip, mtd, FL_READING);
1598 1596
1599 chip->ops.len = len; 1597 ops.len = len;
1600 chip->ops.datbuf = buf; 1598 ops.datbuf = buf;
1601 chip->ops.oobbuf = NULL; 1599 ops.oobbuf = NULL;
1600 ops.mode = 0;
1602 1601
1603 ret = nand_do_read_ops(mtd, from, &chip->ops); 1602 ret = nand_do_read_ops(mtd, from, &ops);
1604 1603
1605 *retlen = chip->ops.retlen; 1604 *retlen = ops.retlen;
1606 1605
1607 nand_release_device(mtd); 1606 nand_release_device(mtd);
1608 1607
@@ -1610,11 +1609,11 @@ static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
1610} 1609}
1611 1610
1612/** 1611/**
1613 * nand_read_oob_std - [REPLACABLE] the most common OOB data read function 1612 * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
1614 * @mtd: mtd info structure 1613 * @mtd: mtd info structure
1615 * @chip: nand chip info structure 1614 * @chip: nand chip info structure
1616 * @page: page number to read 1615 * @page: page number to read
1617 * @sndcmd: flag whether to issue read command or not 1616 * @sndcmd: flag whether to issue read command or not
1618 */ 1617 */
1619static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip, 1618static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1620 int page, int sndcmd) 1619 int page, int sndcmd)
@@ -1628,12 +1627,12 @@ static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1628} 1627}
1629 1628
1630/** 1629/**
1631 * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC 1630 * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
1632 * with syndromes 1631 * with syndromes
1633 * @mtd: mtd info structure 1632 * @mtd: mtd info structure
1634 * @chip: nand chip info structure 1633 * @chip: nand chip info structure
1635 * @page: page number to read 1634 * @page: page number to read
1636 * @sndcmd: flag whether to issue read command or not 1635 * @sndcmd: flag whether to issue read command or not
1637 */ 1636 */
1638static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip, 1637static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
1639 int page, int sndcmd) 1638 int page, int sndcmd)
@@ -1667,10 +1666,10 @@ static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
1667} 1666}
1668 1667
1669/** 1668/**
1670 * nand_write_oob_std - [REPLACABLE] the most common OOB data write function 1669 * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function
1671 * @mtd: mtd info structure 1670 * @mtd: mtd info structure
1672 * @chip: nand chip info structure 1671 * @chip: nand chip info structure
1673 * @page: page number to write 1672 * @page: page number to write
1674 */ 1673 */
1675static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip, 1674static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1676 int page) 1675 int page)
@@ -1690,11 +1689,11 @@ static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1690} 1689}
1691 1690
1692/** 1691/**
1693 * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC 1692 * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
1694 * with syndrome - only for large page flash ! 1693 * with syndrome - only for large page flash
1695 * @mtd: mtd info structure 1694 * @mtd: mtd info structure
1696 * @chip: nand chip info structure 1695 * @chip: nand chip info structure
1697 * @page: page number to write 1696 * @page: page number to write
1698 */ 1697 */
1699static int nand_write_oob_syndrome(struct mtd_info *mtd, 1698static int nand_write_oob_syndrome(struct mtd_info *mtd,
1700 struct nand_chip *chip, int page) 1699 struct nand_chip *chip, int page)
@@ -1749,34 +1748,37 @@ static int nand_write_oob_syndrome(struct mtd_info *mtd,
1749} 1748}
1750 1749
1751/** 1750/**
1752 * nand_do_read_oob - [Intern] NAND read out-of-band 1751 * nand_do_read_oob - [INTERN] NAND read out-of-band
1753 * @mtd: MTD device structure 1752 * @mtd: MTD device structure
1754 * @from: offset to read from 1753 * @from: offset to read from
1755 * @ops: oob operations description structure 1754 * @ops: oob operations description structure
1756 * 1755 *
1757 * NAND read out-of-band data from the spare area 1756 * NAND read out-of-band data from the spare area.
1758 */ 1757 */
1759static int nand_do_read_oob(struct mtd_info *mtd, loff_t from, 1758static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
1760 struct mtd_oob_ops *ops) 1759 struct mtd_oob_ops *ops)
1761{ 1760{
1762 int page, realpage, chipnr, sndcmd = 1; 1761 int page, realpage, chipnr, sndcmd = 1;
1763 struct nand_chip *chip = mtd->priv; 1762 struct nand_chip *chip = mtd->priv;
1763 struct mtd_ecc_stats stats;
1764 int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; 1764 int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
1765 int readlen = ops->ooblen; 1765 int readlen = ops->ooblen;
1766 int len; 1766 int len;
1767 uint8_t *buf = ops->oobbuf; 1767 uint8_t *buf = ops->oobbuf;
1768 1768
1769 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08Lx, len = %i\n", 1769 pr_debug("%s: from = 0x%08Lx, len = %i\n",
1770 __func__, (unsigned long long)from, readlen); 1770 __func__, (unsigned long long)from, readlen);
1771 1771
1772 if (ops->mode == MTD_OOB_AUTO) 1772 stats = mtd->ecc_stats;
1773
1774 if (ops->mode == MTD_OPS_AUTO_OOB)
1773 len = chip->ecc.layout->oobavail; 1775 len = chip->ecc.layout->oobavail;
1774 else 1776 else
1775 len = mtd->oobsize; 1777 len = mtd->oobsize;
1776 1778
1777 if (unlikely(ops->ooboffs >= len)) { 1779 if (unlikely(ops->ooboffs >= len)) {
1778 DEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt to start read " 1780 pr_debug("%s: attempt to start read outside oob\n",
1779 "outside oob\n", __func__); 1781 __func__);
1780 return -EINVAL; 1782 return -EINVAL;
1781 } 1783 }
1782 1784
@@ -1784,8 +1786,8 @@ static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
1784 if (unlikely(from >= mtd->size || 1786 if (unlikely(from >= mtd->size ||
1785 ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) - 1787 ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) -
1786 (from >> chip->page_shift)) * len)) { 1788 (from >> chip->page_shift)) * len)) {
1787 DEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt read beyond end " 1789 pr_debug("%s: attempt to read beyond end of device\n",
1788 "of device\n", __func__); 1790 __func__);
1789 return -EINVAL; 1791 return -EINVAL;
1790 } 1792 }
1791 1793
@@ -1797,7 +1799,10 @@ static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
1797 page = realpage & chip->pagemask; 1799 page = realpage & chip->pagemask;
1798 1800
1799 while (1) { 1801 while (1) {
1800 sndcmd = chip->ecc.read_oob(mtd, chip, page, sndcmd); 1802 if (ops->mode == MTD_OPS_RAW)
1803 sndcmd = chip->ecc.read_oob_raw(mtd, chip, page, sndcmd);
1804 else
1805 sndcmd = chip->ecc.read_oob(mtd, chip, page, sndcmd);
1801 1806
1802 len = min(len, readlen); 1807 len = min(len, readlen);
1803 buf = nand_transfer_oob(chip, buf, ops, len); 1808 buf = nand_transfer_oob(chip, buf, ops, len);
@@ -1830,24 +1835,29 @@ static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
1830 chip->select_chip(mtd, chipnr); 1835 chip->select_chip(mtd, chipnr);
1831 } 1836 }
1832 1837
1833 /* Check, if the chip supports auto page increment 1838 /*
1834 * or if we have hit a block boundary. 1839 * Check, if the chip supports auto page increment or if we
1840 * have hit a block boundary.
1835 */ 1841 */
1836 if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck)) 1842 if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck))
1837 sndcmd = 1; 1843 sndcmd = 1;
1838 } 1844 }
1839 1845
1840 ops->oobretlen = ops->ooblen; 1846 ops->oobretlen = ops->ooblen;
1841 return 0; 1847
1848 if (mtd->ecc_stats.failed - stats.failed)
1849 return -EBADMSG;
1850
1851 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
1842} 1852}
1843 1853
1844/** 1854/**
1845 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band 1855 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
1846 * @mtd: MTD device structure 1856 * @mtd: MTD device structure
1847 * @from: offset to read from 1857 * @from: offset to read from
1848 * @ops: oob operation description structure 1858 * @ops: oob operation description structure
1849 * 1859 *
1850 * NAND read data and/or out-of-band data 1860 * NAND read data and/or out-of-band data.
1851 */ 1861 */
1852static int nand_read_oob(struct mtd_info *mtd, loff_t from, 1862static int nand_read_oob(struct mtd_info *mtd, loff_t from,
1853 struct mtd_oob_ops *ops) 1863 struct mtd_oob_ops *ops)
@@ -1859,17 +1869,17 @@ static int nand_read_oob(struct mtd_info *mtd, loff_t from,
1859 1869
1860 /* Do not allow reads past end of device */ 1870 /* Do not allow reads past end of device */
1861 if (ops->datbuf && (from + ops->len) > mtd->size) { 1871 if (ops->datbuf && (from + ops->len) > mtd->size) {
1862 DEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt read " 1872 pr_debug("%s: attempt to read beyond end of device\n",
1863 "beyond end of device\n", __func__); 1873 __func__);
1864 return -EINVAL; 1874 return -EINVAL;
1865 } 1875 }
1866 1876
1867 nand_get_device(chip, mtd, FL_READING); 1877 nand_get_device(chip, mtd, FL_READING);
1868 1878
1869 switch (ops->mode) { 1879 switch (ops->mode) {
1870 case MTD_OOB_PLACE: 1880 case MTD_OPS_PLACE_OOB:
1871 case MTD_OOB_AUTO: 1881 case MTD_OPS_AUTO_OOB:
1872 case MTD_OOB_RAW: 1882 case MTD_OPS_RAW:
1873 break; 1883 break;
1874 1884
1875 default: 1885 default:
@@ -1888,12 +1898,12 @@ out:
1888 1898
1889 1899
1890/** 1900/**
1891 * nand_write_page_raw - [Intern] raw page write function 1901 * nand_write_page_raw - [INTERN] raw page write function
1892 * @mtd: mtd info structure 1902 * @mtd: mtd info structure
1893 * @chip: nand chip info structure 1903 * @chip: nand chip info structure
1894 * @buf: data buffer 1904 * @buf: data buffer
1895 * 1905 *
1896 * Not for syndrome calculating ecc controllers, which use a special oob layout 1906 * Not for syndrome calculating ECC controllers, which use a special oob layout.
1897 */ 1907 */
1898static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, 1908static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
1899 const uint8_t *buf) 1909 const uint8_t *buf)
@@ -1903,10 +1913,10 @@ static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
1903} 1913}
1904 1914
1905/** 1915/**
1906 * nand_write_page_raw_syndrome - [Intern] raw page write function 1916 * nand_write_page_raw_syndrome - [INTERN] raw page write function
1907 * @mtd: mtd info structure 1917 * @mtd: mtd info structure
1908 * @chip: nand chip info structure 1918 * @chip: nand chip info structure
1909 * @buf: data buffer 1919 * @buf: data buffer
1910 * 1920 *
1911 * We need a special oob layout and handling even when ECC isn't checked. 1921 * We need a special oob layout and handling even when ECC isn't checked.
1912 */ 1922 */
@@ -1942,10 +1952,10 @@ static void nand_write_page_raw_syndrome(struct mtd_info *mtd,
1942 chip->write_buf(mtd, oob, size); 1952 chip->write_buf(mtd, oob, size);
1943} 1953}
1944/** 1954/**
1945 * nand_write_page_swecc - [REPLACABLE] software ecc based page write function 1955 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
1946 * @mtd: mtd info structure 1956 * @mtd: mtd info structure
1947 * @chip: nand chip info structure 1957 * @chip: nand chip info structure
1948 * @buf: data buffer 1958 * @buf: data buffer
1949 */ 1959 */
1950static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, 1960static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
1951 const uint8_t *buf) 1961 const uint8_t *buf)
@@ -1957,7 +1967,7 @@ static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
1957 const uint8_t *p = buf; 1967 const uint8_t *p = buf;
1958 uint32_t *eccpos = chip->ecc.layout->eccpos; 1968 uint32_t *eccpos = chip->ecc.layout->eccpos;
1959 1969
1960 /* Software ecc calculation */ 1970 /* Software ECC calculation */
1961 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) 1971 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
1962 chip->ecc.calculate(mtd, p, &ecc_calc[i]); 1972 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1963 1973
@@ -1968,10 +1978,10 @@ static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
1968} 1978}
1969 1979
1970/** 1980/**
1971 * nand_write_page_hwecc - [REPLACABLE] hardware ecc based page write function 1981 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
1972 * @mtd: mtd info structure 1982 * @mtd: mtd info structure
1973 * @chip: nand chip info structure 1983 * @chip: nand chip info structure
1974 * @buf: data buffer 1984 * @buf: data buffer
1975 */ 1985 */
1976static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, 1986static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
1977 const uint8_t *buf) 1987 const uint8_t *buf)
@@ -1996,13 +2006,13 @@ static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
1996} 2006}
1997 2007
1998/** 2008/**
1999 * nand_write_page_syndrome - [REPLACABLE] hardware ecc syndrom based page write 2009 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
2000 * @mtd: mtd info structure 2010 * @mtd: mtd info structure
2001 * @chip: nand chip info structure 2011 * @chip: nand chip info structure
2002 * @buf: data buffer 2012 * @buf: data buffer
2003 * 2013 *
2004 * The hw generator calculates the error syndrome automatically. Therefor 2014 * The hw generator calculates the error syndrome automatically. Therefore we
2005 * we need a special oob layout and handling. 2015 * need a special oob layout and handling.
2006 */ 2016 */
2007static void nand_write_page_syndrome(struct mtd_info *mtd, 2017static void nand_write_page_syndrome(struct mtd_info *mtd,
2008 struct nand_chip *chip, const uint8_t *buf) 2018 struct nand_chip *chip, const uint8_t *buf)
@@ -2041,12 +2051,12 @@ static void nand_write_page_syndrome(struct mtd_info *mtd,
2041 2051
2042/** 2052/**
2043 * nand_write_page - [REPLACEABLE] write one page 2053 * nand_write_page - [REPLACEABLE] write one page
2044 * @mtd: MTD device structure 2054 * @mtd: MTD device structure
2045 * @chip: NAND chip descriptor 2055 * @chip: NAND chip descriptor
2046 * @buf: the data to write 2056 * @buf: the data to write
2047 * @page: page number to write 2057 * @page: page number to write
2048 * @cached: cached programming 2058 * @cached: cached programming
2049 * @raw: use _raw version of write_page 2059 * @raw: use _raw version of write_page
2050 */ 2060 */
2051static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, 2061static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
2052 const uint8_t *buf, int page, int cached, int raw) 2062 const uint8_t *buf, int page, int cached, int raw)
@@ -2061,8 +2071,8 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
2061 chip->ecc.write_page(mtd, chip, buf); 2071 chip->ecc.write_page(mtd, chip, buf);
2062 2072
2063 /* 2073 /*
2064 * Cached progamming disabled for now, Not sure if its worth the 2074 * Cached progamming disabled for now. Not sure if it's worth the
2065 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s) 2075 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s).
2066 */ 2076 */
2067 cached = 0; 2077 cached = 0;
2068 2078
@@ -2072,7 +2082,7 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
2072 status = chip->waitfunc(mtd, chip); 2082 status = chip->waitfunc(mtd, chip);
2073 /* 2083 /*
2074 * See if operation failed and additional status checks are 2084 * See if operation failed and additional status checks are
2075 * available 2085 * available.
2076 */ 2086 */
2077 if ((status & NAND_STATUS_FAIL) && (chip->errstat)) 2087 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
2078 status = chip->errstat(mtd, chip, FL_WRITING, status, 2088 status = chip->errstat(mtd, chip, FL_WRITING, status,
@@ -2096,29 +2106,37 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
2096} 2106}
2097 2107
2098/** 2108/**
2099 * nand_fill_oob - [Internal] Transfer client buffer to oob 2109 * nand_fill_oob - [INTERN] Transfer client buffer to oob
2100 * @chip: nand chip structure 2110 * @mtd: MTD device structure
2101 * @oob: oob data buffer 2111 * @oob: oob data buffer
2102 * @len: oob data write length 2112 * @len: oob data write length
2103 * @ops: oob ops structure 2113 * @ops: oob ops structure
2104 */ 2114 */
2105static uint8_t *nand_fill_oob(struct nand_chip *chip, uint8_t *oob, size_t len, 2115static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len,
2106 struct mtd_oob_ops *ops) 2116 struct mtd_oob_ops *ops)
2107{ 2117{
2118 struct nand_chip *chip = mtd->priv;
2119
2120 /*
2121 * Initialise to all 0xFF, to avoid the possibility of left over OOB
2122 * data from a previous OOB read.
2123 */
2124 memset(chip->oob_poi, 0xff, mtd->oobsize);
2125
2108 switch (ops->mode) { 2126 switch (ops->mode) {
2109 2127
2110 case MTD_OOB_PLACE: 2128 case MTD_OPS_PLACE_OOB:
2111 case MTD_OOB_RAW: 2129 case MTD_OPS_RAW:
2112 memcpy(chip->oob_poi + ops->ooboffs, oob, len); 2130 memcpy(chip->oob_poi + ops->ooboffs, oob, len);
2113 return oob + len; 2131 return oob + len;
2114 2132
2115 case MTD_OOB_AUTO: { 2133 case MTD_OPS_AUTO_OOB: {
2116 struct nand_oobfree *free = chip->ecc.layout->oobfree; 2134 struct nand_oobfree *free = chip->ecc.layout->oobfree;
2117 uint32_t boffs = 0, woffs = ops->ooboffs; 2135 uint32_t boffs = 0, woffs = ops->ooboffs;
2118 size_t bytes = 0; 2136 size_t bytes = 0;
2119 2137
2120 for (; free->length && len; free++, len -= bytes) { 2138 for (; free->length && len; free++, len -= bytes) {
2121 /* Write request not from offset 0 ? */ 2139 /* Write request not from offset 0? */
2122 if (unlikely(woffs)) { 2140 if (unlikely(woffs)) {
2123 if (woffs >= free->length) { 2141 if (woffs >= free->length) {
2124 woffs -= free->length; 2142 woffs -= free->length;
@@ -2146,12 +2164,12 @@ static uint8_t *nand_fill_oob(struct nand_chip *chip, uint8_t *oob, size_t len,
2146#define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0) 2164#define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)
2147 2165
2148/** 2166/**
2149 * nand_do_write_ops - [Internal] NAND write with ECC 2167 * nand_do_write_ops - [INTERN] NAND write with ECC
2150 * @mtd: MTD device structure 2168 * @mtd: MTD device structure
2151 * @to: offset to write to 2169 * @to: offset to write to
2152 * @ops: oob operations description structure 2170 * @ops: oob operations description structure
2153 * 2171 *
2154 * NAND write with ECC 2172 * NAND write with ECC.
2155 */ 2173 */
2156static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, 2174static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
2157 struct mtd_oob_ops *ops) 2175 struct mtd_oob_ops *ops)
@@ -2161,7 +2179,7 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
2161 uint32_t writelen = ops->len; 2179 uint32_t writelen = ops->len;
2162 2180
2163 uint32_t oobwritelen = ops->ooblen; 2181 uint32_t oobwritelen = ops->ooblen;
2164 uint32_t oobmaxlen = ops->mode == MTD_OOB_AUTO ? 2182 uint32_t oobmaxlen = ops->mode == MTD_OPS_AUTO_OOB ?
2165 mtd->oobavail : mtd->oobsize; 2183 mtd->oobavail : mtd->oobsize;
2166 2184
2167 uint8_t *oob = ops->oobbuf; 2185 uint8_t *oob = ops->oobbuf;
@@ -2172,10 +2190,10 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
2172 if (!writelen) 2190 if (!writelen)
2173 return 0; 2191 return 0;
2174 2192
2175 /* reject writes, which are not page aligned */ 2193 /* Reject writes, which are not page aligned */
2176 if (NOTALIGNED(to) || NOTALIGNED(ops->len)) { 2194 if (NOTALIGNED(to) || NOTALIGNED(ops->len)) {
2177 printk(KERN_NOTICE "%s: Attempt to write not " 2195 pr_notice("%s: attempt to write non page aligned data\n",
2178 "page aligned data\n", __func__); 2196 __func__);
2179 return -EINVAL; 2197 return -EINVAL;
2180 } 2198 }
2181 2199
@@ -2201,10 +2219,6 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
2201 (chip->pagebuf << chip->page_shift) < (to + ops->len)) 2219 (chip->pagebuf << chip->page_shift) < (to + ops->len))
2202 chip->pagebuf = -1; 2220 chip->pagebuf = -1;
2203 2221
2204 /* If we're not given explicit OOB data, let it be 0xFF */
2205 if (likely(!oob))
2206 memset(chip->oob_poi, 0xff, mtd->oobsize);
2207
2208 /* Don't allow multipage oob writes with offset */ 2222 /* Don't allow multipage oob writes with offset */
2209 if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) 2223 if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen))
2210 return -EINVAL; 2224 return -EINVAL;
@@ -2214,7 +2228,7 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
2214 int cached = writelen > bytes && page != blockmask; 2228 int cached = writelen > bytes && page != blockmask;
2215 uint8_t *wbuf = buf; 2229 uint8_t *wbuf = buf;
2216 2230
2217 /* Partial page write ? */ 2231 /* Partial page write? */
2218 if (unlikely(column || writelen < (mtd->writesize - 1))) { 2232 if (unlikely(column || writelen < (mtd->writesize - 1))) {
2219 cached = 0; 2233 cached = 0;
2220 bytes = min_t(int, bytes - column, (int) writelen); 2234 bytes = min_t(int, bytes - column, (int) writelen);
@@ -2226,12 +2240,15 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
2226 2240
2227 if (unlikely(oob)) { 2241 if (unlikely(oob)) {
2228 size_t len = min(oobwritelen, oobmaxlen); 2242 size_t len = min(oobwritelen, oobmaxlen);
2229 oob = nand_fill_oob(chip, oob, len, ops); 2243 oob = nand_fill_oob(mtd, oob, len, ops);
2230 oobwritelen -= len; 2244 oobwritelen -= len;
2245 } else {
2246 /* We still need to erase leftover OOB data */
2247 memset(chip->oob_poi, 0xff, mtd->oobsize);
2231 } 2248 }
2232 2249
2233 ret = chip->write_page(mtd, chip, wbuf, page, cached, 2250 ret = chip->write_page(mtd, chip, wbuf, page, cached,
2234 (ops->mode == MTD_OOB_RAW)); 2251 (ops->mode == MTD_OPS_RAW));
2235 if (ret) 2252 if (ret)
2236 break; 2253 break;
2237 2254
@@ -2260,11 +2277,11 @@ static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
2260 2277
2261/** 2278/**
2262 * panic_nand_write - [MTD Interface] NAND write with ECC 2279 * panic_nand_write - [MTD Interface] NAND write with ECC
2263 * @mtd: MTD device structure 2280 * @mtd: MTD device structure
2264 * @to: offset to write to 2281 * @to: offset to write to
2265 * @len: number of bytes to write 2282 * @len: number of bytes to write
2266 * @retlen: pointer to variable to store the number of written bytes 2283 * @retlen: pointer to variable to store the number of written bytes
2267 * @buf: the data to write 2284 * @buf: the data to write
2268 * 2285 *
2269 * NAND write with ECC. Used when performing writes in interrupt context, this 2286 * NAND write with ECC. Used when performing writes in interrupt context, this
2270 * may for example be called by mtdoops when writing an oops while in panic. 2287 * may for example be called by mtdoops when writing an oops while in panic.
@@ -2273,6 +2290,7 @@ static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
2273 size_t *retlen, const uint8_t *buf) 2290 size_t *retlen, const uint8_t *buf)
2274{ 2291{
2275 struct nand_chip *chip = mtd->priv; 2292 struct nand_chip *chip = mtd->priv;
2293 struct mtd_oob_ops ops;
2276 int ret; 2294 int ret;
2277 2295
2278 /* Do not allow reads past end of device */ 2296 /* Do not allow reads past end of device */
@@ -2281,36 +2299,38 @@ static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
2281 if (!len) 2299 if (!len)
2282 return 0; 2300 return 0;
2283 2301
2284 /* Wait for the device to get ready. */ 2302 /* Wait for the device to get ready */
2285 panic_nand_wait(mtd, chip, 400); 2303 panic_nand_wait(mtd, chip, 400);
2286 2304
2287 /* Grab the device. */ 2305 /* Grab the device */
2288 panic_nand_get_device(chip, mtd, FL_WRITING); 2306 panic_nand_get_device(chip, mtd, FL_WRITING);
2289 2307
2290 chip->ops.len = len; 2308 ops.len = len;
2291 chip->ops.datbuf = (uint8_t *)buf; 2309 ops.datbuf = (uint8_t *)buf;
2292 chip->ops.oobbuf = NULL; 2310 ops.oobbuf = NULL;
2311 ops.mode = 0;
2293 2312
2294 ret = nand_do_write_ops(mtd, to, &chip->ops); 2313 ret = nand_do_write_ops(mtd, to, &ops);
2295 2314
2296 *retlen = chip->ops.retlen; 2315 *retlen = ops.retlen;
2297 return ret; 2316 return ret;
2298} 2317}
2299 2318
2300/** 2319/**
2301 * nand_write - [MTD Interface] NAND write with ECC 2320 * nand_write - [MTD Interface] NAND write with ECC
2302 * @mtd: MTD device structure 2321 * @mtd: MTD device structure
2303 * @to: offset to write to 2322 * @to: offset to write to
2304 * @len: number of bytes to write 2323 * @len: number of bytes to write
2305 * @retlen: pointer to variable to store the number of written bytes 2324 * @retlen: pointer to variable to store the number of written bytes
2306 * @buf: the data to write 2325 * @buf: the data to write
2307 * 2326 *
2308 * NAND write with ECC 2327 * NAND write with ECC.
2309 */ 2328 */
2310static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, 2329static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
2311 size_t *retlen, const uint8_t *buf) 2330 size_t *retlen, const uint8_t *buf)
2312{ 2331{
2313 struct nand_chip *chip = mtd->priv; 2332 struct nand_chip *chip = mtd->priv;
2333 struct mtd_oob_ops ops;
2314 int ret; 2334 int ret;
2315 2335
2316 /* Do not allow reads past end of device */ 2336 /* Do not allow reads past end of device */
@@ -2321,13 +2341,14 @@ static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
2321 2341
2322 nand_get_device(chip, mtd, FL_WRITING); 2342 nand_get_device(chip, mtd, FL_WRITING);
2323 2343
2324 chip->ops.len = len; 2344 ops.len = len;
2325 chip->ops.datbuf = (uint8_t *)buf; 2345 ops.datbuf = (uint8_t *)buf;
2326 chip->ops.oobbuf = NULL; 2346 ops.oobbuf = NULL;
2347 ops.mode = 0;
2327 2348
2328 ret = nand_do_write_ops(mtd, to, &chip->ops); 2349 ret = nand_do_write_ops(mtd, to, &ops);
2329 2350
2330 *retlen = chip->ops.retlen; 2351 *retlen = ops.retlen;
2331 2352
2332 nand_release_device(mtd); 2353 nand_release_device(mtd);
2333 2354
@@ -2336,11 +2357,11 @@ static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
2336 2357
2337/** 2358/**
2338 * nand_do_write_oob - [MTD Interface] NAND write out-of-band 2359 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
2339 * @mtd: MTD device structure 2360 * @mtd: MTD device structure
2340 * @to: offset to write to 2361 * @to: offset to write to
2341 * @ops: oob operation description structure 2362 * @ops: oob operation description structure
2342 * 2363 *
2343 * NAND write out-of-band 2364 * NAND write out-of-band.
2344 */ 2365 */
2345static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, 2366static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
2346 struct mtd_oob_ops *ops) 2367 struct mtd_oob_ops *ops)
@@ -2348,24 +2369,24 @@ static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
2348 int chipnr, page, status, len; 2369 int chipnr, page, status, len;
2349 struct nand_chip *chip = mtd->priv; 2370 struct nand_chip *chip = mtd->priv;
2350 2371
2351 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n", 2372 pr_debug("%s: to = 0x%08x, len = %i\n",
2352 __func__, (unsigned int)to, (int)ops->ooblen); 2373 __func__, (unsigned int)to, (int)ops->ooblen);
2353 2374
2354 if (ops->mode == MTD_OOB_AUTO) 2375 if (ops->mode == MTD_OPS_AUTO_OOB)
2355 len = chip->ecc.layout->oobavail; 2376 len = chip->ecc.layout->oobavail;
2356 else 2377 else
2357 len = mtd->oobsize; 2378 len = mtd->oobsize;
2358 2379
2359 /* Do not allow write past end of page */ 2380 /* Do not allow write past end of page */
2360 if ((ops->ooboffs + ops->ooblen) > len) { 2381 if ((ops->ooboffs + ops->ooblen) > len) {
2361 DEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt to write " 2382 pr_debug("%s: attempt to write past end of page\n",
2362 "past end of page\n", __func__); 2383 __func__);
2363 return -EINVAL; 2384 return -EINVAL;
2364 } 2385 }
2365 2386
2366 if (unlikely(ops->ooboffs >= len)) { 2387 if (unlikely(ops->ooboffs >= len)) {
2367 DEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt to start " 2388 pr_debug("%s: attempt to start write outside oob\n",
2368 "write outside oob\n", __func__); 2389 __func__);
2369 return -EINVAL; 2390 return -EINVAL;
2370 } 2391 }
2371 2392
@@ -2374,8 +2395,8 @@ static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
2374 ops->ooboffs + ops->ooblen > 2395 ops->ooboffs + ops->ooblen >
2375 ((mtd->size >> chip->page_shift) - 2396 ((mtd->size >> chip->page_shift) -
2376 (to >> chip->page_shift)) * len)) { 2397 (to >> chip->page_shift)) * len)) {
2377 DEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt write beyond " 2398 pr_debug("%s: attempt to write beyond end of device\n",
2378 "end of device\n", __func__); 2399 __func__);
2379 return -EINVAL; 2400 return -EINVAL;
2380 } 2401 }
2381 2402
@@ -2401,10 +2422,12 @@ static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
2401 if (page == chip->pagebuf) 2422 if (page == chip->pagebuf)
2402 chip->pagebuf = -1; 2423 chip->pagebuf = -1;
2403 2424
2404 memset(chip->oob_poi, 0xff, mtd->oobsize); 2425 nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops);
2405 nand_fill_oob(chip, ops->oobbuf, ops->ooblen, ops); 2426
2406 status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask); 2427 if (ops->mode == MTD_OPS_RAW)
2407 memset(chip->oob_poi, 0xff, mtd->oobsize); 2428 status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask);
2429 else
2430 status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);
2408 2431
2409 if (status) 2432 if (status)
2410 return status; 2433 return status;
@@ -2416,9 +2439,9 @@ static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
2416 2439
2417/** 2440/**
2418 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band 2441 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
2419 * @mtd: MTD device structure 2442 * @mtd: MTD device structure
2420 * @to: offset to write to 2443 * @to: offset to write to
2421 * @ops: oob operation description structure 2444 * @ops: oob operation description structure
2422 */ 2445 */
2423static int nand_write_oob(struct mtd_info *mtd, loff_t to, 2446static int nand_write_oob(struct mtd_info *mtd, loff_t to,
2424 struct mtd_oob_ops *ops) 2447 struct mtd_oob_ops *ops)
@@ -2430,17 +2453,17 @@ static int nand_write_oob(struct mtd_info *mtd, loff_t to,
2430 2453
2431 /* Do not allow writes past end of device */ 2454 /* Do not allow writes past end of device */
2432 if (ops->datbuf && (to + ops->len) > mtd->size) { 2455 if (ops->datbuf && (to + ops->len) > mtd->size) {
2433 DEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt write beyond " 2456 pr_debug("%s: attempt to write beyond end of device\n",
2434 "end of device\n", __func__); 2457 __func__);
2435 return -EINVAL; 2458 return -EINVAL;
2436 } 2459 }
2437 2460
2438 nand_get_device(chip, mtd, FL_WRITING); 2461 nand_get_device(chip, mtd, FL_WRITING);
2439 2462
2440 switch (ops->mode) { 2463 switch (ops->mode) {
2441 case MTD_OOB_PLACE: 2464 case MTD_OPS_PLACE_OOB:
2442 case MTD_OOB_AUTO: 2465 case MTD_OPS_AUTO_OOB:
2443 case MTD_OOB_RAW: 2466 case MTD_OPS_RAW:
2444 break; 2467 break;
2445 2468
2446 default: 2469 default:
@@ -2458,11 +2481,11 @@ out:
2458} 2481}
2459 2482
2460/** 2483/**
2461 * single_erease_cmd - [GENERIC] NAND standard block erase command function 2484 * single_erase_cmd - [GENERIC] NAND standard block erase command function
2462 * @mtd: MTD device structure 2485 * @mtd: MTD device structure
2463 * @page: the page address of the block which will be erased 2486 * @page: the page address of the block which will be erased
2464 * 2487 *
2465 * Standard erase command for NAND chips 2488 * Standard erase command for NAND chips.
2466 */ 2489 */
2467static void single_erase_cmd(struct mtd_info *mtd, int page) 2490static void single_erase_cmd(struct mtd_info *mtd, int page)
2468{ 2491{
@@ -2473,12 +2496,11 @@ static void single_erase_cmd(struct mtd_info *mtd, int page)
2473} 2496}
2474 2497
2475/** 2498/**
2476 * multi_erease_cmd - [GENERIC] AND specific block erase command function 2499 * multi_erase_cmd - [GENERIC] AND specific block erase command function
2477 * @mtd: MTD device structure 2500 * @mtd: MTD device structure
2478 * @page: the page address of the block which will be erased 2501 * @page: the page address of the block which will be erased
2479 * 2502 *
2480 * AND multi block erase command function 2503 * AND multi block erase command function. Erase 4 consecutive blocks.
2481 * Erase 4 consecutive blocks
2482 */ 2504 */
2483static void multi_erase_cmd(struct mtd_info *mtd, int page) 2505static void multi_erase_cmd(struct mtd_info *mtd, int page)
2484{ 2506{
@@ -2493,10 +2515,10 @@ static void multi_erase_cmd(struct mtd_info *mtd, int page)
2493 2515
2494/** 2516/**
2495 * nand_erase - [MTD Interface] erase block(s) 2517 * nand_erase - [MTD Interface] erase block(s)
2496 * @mtd: MTD device structure 2518 * @mtd: MTD device structure
2497 * @instr: erase instruction 2519 * @instr: erase instruction
2498 * 2520 *
2499 * Erase one ore more blocks 2521 * Erase one ore more blocks.
2500 */ 2522 */
2501static int nand_erase(struct mtd_info *mtd, struct erase_info *instr) 2523static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
2502{ 2524{
@@ -2505,12 +2527,12 @@ static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
2505 2527
2506#define BBT_PAGE_MASK 0xffffff3f 2528#define BBT_PAGE_MASK 0xffffff3f
2507/** 2529/**
2508 * nand_erase_nand - [Internal] erase block(s) 2530 * nand_erase_nand - [INTERN] erase block(s)
2509 * @mtd: MTD device structure 2531 * @mtd: MTD device structure
2510 * @instr: erase instruction 2532 * @instr: erase instruction
2511 * @allowbbt: allow erasing the bbt area 2533 * @allowbbt: allow erasing the bbt area
2512 * 2534 *
2513 * Erase one ore more blocks 2535 * Erase one ore more blocks.
2514 */ 2536 */
2515int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, 2537int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
2516 int allowbbt) 2538 int allowbbt)
@@ -2521,9 +2543,9 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
2521 unsigned int bbt_masked_page = 0xffffffff; 2543 unsigned int bbt_masked_page = 0xffffffff;
2522 loff_t len; 2544 loff_t len;
2523 2545
2524 DEBUG(MTD_DEBUG_LEVEL3, "%s: start = 0x%012llx, len = %llu\n", 2546 pr_debug("%s: start = 0x%012llx, len = %llu\n",
2525 __func__, (unsigned long long)instr->addr, 2547 __func__, (unsigned long long)instr->addr,
2526 (unsigned long long)instr->len); 2548 (unsigned long long)instr->len);
2527 2549
2528 if (check_offs_len(mtd, instr->addr, instr->len)) 2550 if (check_offs_len(mtd, instr->addr, instr->len))
2529 return -EINVAL; 2551 return -EINVAL;
@@ -2545,8 +2567,8 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
2545 2567
2546 /* Check, if it is write protected */ 2568 /* Check, if it is write protected */
2547 if (nand_check_wp(mtd)) { 2569 if (nand_check_wp(mtd)) {
2548 DEBUG(MTD_DEBUG_LEVEL0, "%s: Device is write protected!!!\n", 2570 pr_debug("%s: device is write protected!\n",
2549 __func__); 2571 __func__);
2550 instr->state = MTD_ERASE_FAILED; 2572 instr->state = MTD_ERASE_FAILED;
2551 goto erase_exit; 2573 goto erase_exit;
2552 } 2574 }
@@ -2555,7 +2577,7 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
2555 * If BBT requires refresh, set the BBT page mask to see if the BBT 2577 * If BBT requires refresh, set the BBT page mask to see if the BBT
2556 * should be rewritten. Otherwise the mask is set to 0xffffffff which 2578 * should be rewritten. Otherwise the mask is set to 0xffffffff which
2557 * can not be matched. This is also done when the bbt is actually 2579 * can not be matched. This is also done when the bbt is actually
2558 * erased to avoid recusrsive updates 2580 * erased to avoid recursive updates.
2559 */ 2581 */
2560 if (chip->options & BBT_AUTO_REFRESH && !allowbbt) 2582 if (chip->options & BBT_AUTO_REFRESH && !allowbbt)
2561 bbt_masked_page = chip->bbt_td->pages[chipnr] & BBT_PAGE_MASK; 2583 bbt_masked_page = chip->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
@@ -2566,20 +2588,18 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
2566 instr->state = MTD_ERASING; 2588 instr->state = MTD_ERASING;
2567 2589
2568 while (len) { 2590 while (len) {
2569 /* 2591 /* Heck if we have a bad block, we do not erase bad blocks! */
2570 * heck if we have a bad block, we do not erase bad blocks !
2571 */
2572 if (nand_block_checkbad(mtd, ((loff_t) page) << 2592 if (nand_block_checkbad(mtd, ((loff_t) page) <<
2573 chip->page_shift, 0, allowbbt)) { 2593 chip->page_shift, 0, allowbbt)) {
2574 printk(KERN_WARNING "%s: attempt to erase a bad block " 2594 pr_warn("%s: attempt to erase a bad block at page 0x%08x\n",
2575 "at page 0x%08x\n", __func__, page); 2595 __func__, page);
2576 instr->state = MTD_ERASE_FAILED; 2596 instr->state = MTD_ERASE_FAILED;
2577 goto erase_exit; 2597 goto erase_exit;
2578 } 2598 }
2579 2599
2580 /* 2600 /*
2581 * Invalidate the page cache, if we erase the block which 2601 * Invalidate the page cache, if we erase the block which
2582 * contains the current cached page 2602 * contains the current cached page.
2583 */ 2603 */
2584 if (page <= chip->pagebuf && chip->pagebuf < 2604 if (page <= chip->pagebuf && chip->pagebuf <
2585 (page + pages_per_block)) 2605 (page + pages_per_block))
@@ -2599,8 +2619,8 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
2599 2619
2600 /* See if block erase succeeded */ 2620 /* See if block erase succeeded */
2601 if (status & NAND_STATUS_FAIL) { 2621 if (status & NAND_STATUS_FAIL) {
2602 DEBUG(MTD_DEBUG_LEVEL0, "%s: Failed erase, " 2622 pr_debug("%s: failed erase, page 0x%08x\n",
2603 "page 0x%08x\n", __func__, page); 2623 __func__, page);
2604 instr->state = MTD_ERASE_FAILED; 2624 instr->state = MTD_ERASE_FAILED;
2605 instr->fail_addr = 2625 instr->fail_addr =
2606 ((loff_t)page << chip->page_shift); 2626 ((loff_t)page << chip->page_shift);
@@ -2609,7 +2629,7 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
2609 2629
2610 /* 2630 /*
2611 * If BBT requires refresh, set the BBT rewrite flag to the 2631 * If BBT requires refresh, set the BBT rewrite flag to the
2612 * page being erased 2632 * page being erased.
2613 */ 2633 */
2614 if (bbt_masked_page != 0xffffffff && 2634 if (bbt_masked_page != 0xffffffff &&
2615 (page & BBT_PAGE_MASK) == bbt_masked_page) 2635 (page & BBT_PAGE_MASK) == bbt_masked_page)
@@ -2628,7 +2648,7 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
2628 2648
2629 /* 2649 /*
2630 * If BBT requires refresh and BBT-PERCHIP, set the BBT 2650 * If BBT requires refresh and BBT-PERCHIP, set the BBT
2631 * page mask to see if this BBT should be rewritten 2651 * page mask to see if this BBT should be rewritten.
2632 */ 2652 */
2633 if (bbt_masked_page != 0xffffffff && 2653 if (bbt_masked_page != 0xffffffff &&
2634 (chip->bbt_td->options & NAND_BBT_PERCHIP)) 2654 (chip->bbt_td->options & NAND_BBT_PERCHIP))
@@ -2651,7 +2671,7 @@ erase_exit:
2651 2671
2652 /* 2672 /*
2653 * If BBT requires refresh and erase was successful, rewrite any 2673 * If BBT requires refresh and erase was successful, rewrite any
2654 * selected bad block tables 2674 * selected bad block tables.
2655 */ 2675 */
2656 if (bbt_masked_page == 0xffffffff || ret) 2676 if (bbt_masked_page == 0xffffffff || ret)
2657 return ret; 2677 return ret;
@@ -2659,10 +2679,10 @@ erase_exit:
2659 for (chipnr = 0; chipnr < chip->numchips; chipnr++) { 2679 for (chipnr = 0; chipnr < chip->numchips; chipnr++) {
2660 if (!rewrite_bbt[chipnr]) 2680 if (!rewrite_bbt[chipnr])
2661 continue; 2681 continue;
2662 /* update the BBT for chip */ 2682 /* Update the BBT for chip */
2663 DEBUG(MTD_DEBUG_LEVEL0, "%s: nand_update_bbt " 2683 pr_debug("%s: nand_update_bbt (%d:0x%0llx 0x%0x)\n",
2664 "(%d:0x%0llx 0x%0x)\n", __func__, chipnr, 2684 __func__, chipnr, rewrite_bbt[chipnr],
2665 rewrite_bbt[chipnr], chip->bbt_td->pages[chipnr]); 2685 chip->bbt_td->pages[chipnr]);
2666 nand_update_bbt(mtd, rewrite_bbt[chipnr]); 2686 nand_update_bbt(mtd, rewrite_bbt[chipnr]);
2667 } 2687 }
2668 2688
@@ -2672,15 +2692,15 @@ erase_exit:
2672 2692
2673/** 2693/**
2674 * nand_sync - [MTD Interface] sync 2694 * nand_sync - [MTD Interface] sync
2675 * @mtd: MTD device structure 2695 * @mtd: MTD device structure
2676 * 2696 *
2677 * Sync is actually a wait for chip ready function 2697 * Sync is actually a wait for chip ready function.
2678 */ 2698 */
2679static void nand_sync(struct mtd_info *mtd) 2699static void nand_sync(struct mtd_info *mtd)
2680{ 2700{
2681 struct nand_chip *chip = mtd->priv; 2701 struct nand_chip *chip = mtd->priv;
2682 2702
2683 DEBUG(MTD_DEBUG_LEVEL3, "%s: called\n", __func__); 2703 pr_debug("%s: called\n", __func__);
2684 2704
2685 /* Grab the lock and see if the device is available */ 2705 /* Grab the lock and see if the device is available */
2686 nand_get_device(chip, mtd, FL_SYNCING); 2706 nand_get_device(chip, mtd, FL_SYNCING);
@@ -2690,8 +2710,8 @@ static void nand_sync(struct mtd_info *mtd)
2690 2710
2691/** 2711/**
2692 * nand_block_isbad - [MTD Interface] Check if block at offset is bad 2712 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
2693 * @mtd: MTD device structure 2713 * @mtd: MTD device structure
2694 * @offs: offset relative to mtd start 2714 * @offs: offset relative to mtd start
2695 */ 2715 */
2696static int nand_block_isbad(struct mtd_info *mtd, loff_t offs) 2716static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)
2697{ 2717{
@@ -2704,8 +2724,8 @@ static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)
2704 2724
2705/** 2725/**
2706 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad 2726 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
2707 * @mtd: MTD device structure 2727 * @mtd: MTD device structure
2708 * @ofs: offset relative to mtd start 2728 * @ofs: offset relative to mtd start
2709 */ 2729 */
2710static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs) 2730static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
2711{ 2731{
@@ -2714,7 +2734,7 @@ static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
2714 2734
2715 ret = nand_block_isbad(mtd, ofs); 2735 ret = nand_block_isbad(mtd, ofs);
2716 if (ret) { 2736 if (ret) {
2717 /* If it was bad already, return success and do nothing. */ 2737 /* If it was bad already, return success and do nothing */
2718 if (ret > 0) 2738 if (ret > 0)
2719 return 0; 2739 return 0;
2720 return ret; 2740 return ret;
@@ -2725,7 +2745,7 @@ static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
2725 2745
2726/** 2746/**
2727 * nand_suspend - [MTD Interface] Suspend the NAND flash 2747 * nand_suspend - [MTD Interface] Suspend the NAND flash
2728 * @mtd: MTD device structure 2748 * @mtd: MTD device structure
2729 */ 2749 */
2730static int nand_suspend(struct mtd_info *mtd) 2750static int nand_suspend(struct mtd_info *mtd)
2731{ 2751{
@@ -2736,7 +2756,7 @@ static int nand_suspend(struct mtd_info *mtd)
2736 2756
2737/** 2757/**
2738 * nand_resume - [MTD Interface] Resume the NAND flash 2758 * nand_resume - [MTD Interface] Resume the NAND flash
2739 * @mtd: MTD device structure 2759 * @mtd: MTD device structure
2740 */ 2760 */
2741static void nand_resume(struct mtd_info *mtd) 2761static void nand_resume(struct mtd_info *mtd)
2742{ 2762{
@@ -2745,13 +2765,11 @@ static void nand_resume(struct mtd_info *mtd)
2745 if (chip->state == FL_PM_SUSPENDED) 2765 if (chip->state == FL_PM_SUSPENDED)
2746 nand_release_device(mtd); 2766 nand_release_device(mtd);
2747 else 2767 else
2748 printk(KERN_ERR "%s called for a chip which is not " 2768 pr_err("%s called for a chip which is not in suspended state\n",
2749 "in suspended state\n", __func__); 2769 __func__);
2750} 2770}
2751 2771
2752/* 2772/* Set default functions */
2753 * Set default functions
2754 */
2755static void nand_set_defaults(struct nand_chip *chip, int busw) 2773static void nand_set_defaults(struct nand_chip *chip, int busw)
2756{ 2774{
2757 /* check for proper chip_delay setup, set 20us if not */ 2775 /* check for proper chip_delay setup, set 20us if not */
@@ -2793,23 +2811,21 @@ static void nand_set_defaults(struct nand_chip *chip, int busw)
2793 2811
2794} 2812}
2795 2813
2796/* 2814/* Sanitize ONFI strings so we can safely print them */
2797 * sanitize ONFI strings so we can safely print them
2798 */
2799static void sanitize_string(uint8_t *s, size_t len) 2815static void sanitize_string(uint8_t *s, size_t len)
2800{ 2816{
2801 ssize_t i; 2817 ssize_t i;
2802 2818
2803 /* null terminate */ 2819 /* Null terminate */
2804 s[len - 1] = 0; 2820 s[len - 1] = 0;
2805 2821
2806 /* remove non printable chars */ 2822 /* Remove non printable chars */
2807 for (i = 0; i < len - 1; i++) { 2823 for (i = 0; i < len - 1; i++) {
2808 if (s[i] < ' ' || s[i] > 127) 2824 if (s[i] < ' ' || s[i] > 127)
2809 s[i] = '?'; 2825 s[i] = '?';
2810 } 2826 }
2811 2827
2812 /* remove trailing spaces */ 2828 /* Remove trailing spaces */
2813 strim(s); 2829 strim(s);
2814} 2830}
2815 2831
@@ -2826,28 +2842,28 @@ static u16 onfi_crc16(u16 crc, u8 const *p, size_t len)
2826} 2842}
2827 2843
2828/* 2844/*
2829 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise 2845 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.
2830 */ 2846 */
2831static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, 2847static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
2832 int busw) 2848 int *busw)
2833{ 2849{
2834 struct nand_onfi_params *p = &chip->onfi_params; 2850 struct nand_onfi_params *p = &chip->onfi_params;
2835 int i; 2851 int i;
2836 int val; 2852 int val;
2837 2853
2838 /* try ONFI for unknow chip or LP */ 2854 /* Try ONFI for unknown chip or LP */
2839 chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1); 2855 chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
2840 if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' || 2856 if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||
2841 chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I') 2857 chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I')
2842 return 0; 2858 return 0;
2843 2859
2844 printk(KERN_INFO "ONFI flash detected\n"); 2860 pr_info("ONFI flash detected\n");
2845 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1); 2861 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
2846 for (i = 0; i < 3; i++) { 2862 for (i = 0; i < 3; i++) {
2847 chip->read_buf(mtd, (uint8_t *)p, sizeof(*p)); 2863 chip->read_buf(mtd, (uint8_t *)p, sizeof(*p));
2848 if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) == 2864 if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==
2849 le16_to_cpu(p->crc)) { 2865 le16_to_cpu(p->crc)) {
2850 printk(KERN_INFO "ONFI param page %d valid\n", i); 2866 pr_info("ONFI param page %d valid\n", i);
2851 break; 2867 break;
2852 } 2868 }
2853 } 2869 }
@@ -2855,7 +2871,7 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
2855 if (i == 3) 2871 if (i == 3)
2856 return 0; 2872 return 0;
2857 2873
2858 /* check version */ 2874 /* Check version */
2859 val = le16_to_cpu(p->revision); 2875 val = le16_to_cpu(p->revision);
2860 if (val & (1 << 5)) 2876 if (val & (1 << 5))
2861 chip->onfi_version = 23; 2877 chip->onfi_version = 23;
@@ -2871,8 +2887,7 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
2871 chip->onfi_version = 0; 2887 chip->onfi_version = 0;
2872 2888
2873 if (!chip->onfi_version) { 2889 if (!chip->onfi_version) {
2874 printk(KERN_INFO "%s: unsupported ONFI version: %d\n", 2890 pr_info("%s: unsupported ONFI version: %d\n", __func__, val);
2875 __func__, val);
2876 return 0; 2891 return 0;
2877 } 2892 }
2878 2893
@@ -2884,9 +2899,9 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
2884 mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize; 2899 mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
2885 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); 2900 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
2886 chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize; 2901 chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize;
2887 busw = 0; 2902 *busw = 0;
2888 if (le16_to_cpu(p->features) & 1) 2903 if (le16_to_cpu(p->features) & 1)
2889 busw = NAND_BUSWIDTH_16; 2904 *busw = NAND_BUSWIDTH_16;
2890 2905
2891 chip->options &= ~NAND_CHIPOPTIONS_MSK; 2906 chip->options &= ~NAND_CHIPOPTIONS_MSK;
2892 chip->options |= (NAND_NO_READRDY | 2907 chip->options |= (NAND_NO_READRDY |
@@ -2896,7 +2911,7 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
2896} 2911}
2897 2912
2898/* 2913/*
2899 * Get the flash and manufacturer id and lookup if the type is supported 2914 * Get the flash and manufacturer id and lookup if the type is supported.
2900 */ 2915 */
2901static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, 2916static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
2902 struct nand_chip *chip, 2917 struct nand_chip *chip,
@@ -2913,7 +2928,7 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
2913 2928
2914 /* 2929 /*
2915 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx) 2930 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
2916 * after power-up 2931 * after power-up.
2917 */ 2932 */
2918 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); 2933 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
2919 2934
@@ -2924,7 +2939,8 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
2924 *maf_id = chip->read_byte(mtd); 2939 *maf_id = chip->read_byte(mtd);
2925 *dev_id = chip->read_byte(mtd); 2940 *dev_id = chip->read_byte(mtd);
2926 2941
2927 /* Try again to make sure, as some systems the bus-hold or other 2942 /*
2943 * Try again to make sure, as some systems the bus-hold or other
2928 * interface concerns can cause random data which looks like a 2944 * interface concerns can cause random data which looks like a
2929 * possibly credible NAND flash to appear. If the two results do 2945 * possibly credible NAND flash to appear. If the two results do
2930 * not match, ignore the device completely. 2946 * not match, ignore the device completely.
@@ -2936,9 +2952,9 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
2936 id_data[i] = chip->read_byte(mtd); 2952 id_data[i] = chip->read_byte(mtd);
2937 2953
2938 if (id_data[0] != *maf_id || id_data[1] != *dev_id) { 2954 if (id_data[0] != *maf_id || id_data[1] != *dev_id) {
2939 printk(KERN_INFO "%s: second ID read did not match " 2955 pr_info("%s: second ID read did not match "
2940 "%02x,%02x against %02x,%02x\n", __func__, 2956 "%02x,%02x against %02x,%02x\n", __func__,
2941 *maf_id, *dev_id, id_data[0], id_data[1]); 2957 *maf_id, *dev_id, id_data[0], id_data[1]);
2942 return ERR_PTR(-ENODEV); 2958 return ERR_PTR(-ENODEV);
2943 } 2959 }
2944 2960
@@ -2952,7 +2968,7 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
2952 chip->onfi_version = 0; 2968 chip->onfi_version = 0;
2953 if (!type->name || !type->pagesize) { 2969 if (!type->name || !type->pagesize) {
2954 /* Check is chip is ONFI compliant */ 2970 /* Check is chip is ONFI compliant */
2955 ret = nand_flash_detect_onfi(mtd, chip, busw); 2971 ret = nand_flash_detect_onfi(mtd, chip, &busw);
2956 if (ret) 2972 if (ret)
2957 goto ident_done; 2973 goto ident_done;
2958 } 2974 }
@@ -2973,7 +2989,7 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
2973 chip->chipsize = (uint64_t)type->chipsize << 20; 2989 chip->chipsize = (uint64_t)type->chipsize << 20;
2974 2990
2975 if (!type->pagesize && chip->init_size) { 2991 if (!type->pagesize && chip->init_size) {
2976 /* set the pagesize, oobsize, erasesize by the driver*/ 2992 /* Set the pagesize, oobsize, erasesize by the driver */
2977 busw = chip->init_size(mtd, chip, id_data); 2993 busw = chip->init_size(mtd, chip, id_data);
2978 } else if (!type->pagesize) { 2994 } else if (!type->pagesize) {
2979 int extid; 2995 int extid;
@@ -3033,7 +3049,7 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
3033 } 3049 }
3034 } else { 3050 } else {
3035 /* 3051 /*
3036 * Old devices have chip data hardcoded in the device id table 3052 * Old devices have chip data hardcoded in the device id table.
3037 */ 3053 */
3038 mtd->erasesize = type->erasesize; 3054 mtd->erasesize = type->erasesize;
3039 mtd->writesize = type->pagesize; 3055 mtd->writesize = type->pagesize;
@@ -3043,7 +3059,7 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
3043 /* 3059 /*
3044 * Check for Spansion/AMD ID + repeating 5th, 6th byte since 3060 * Check for Spansion/AMD ID + repeating 5th, 6th byte since
3045 * some Spansion chips have erasesize that conflicts with size 3061 * some Spansion chips have erasesize that conflicts with size
3046 * listed in nand_ids table 3062 * listed in nand_ids table.
3047 * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39) 3063 * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
3048 */ 3064 */
3049 if (*maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && 3065 if (*maf_id == NAND_MFR_AMD && id_data[4] != 0x00 &&
@@ -3057,15 +3073,16 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
3057 chip->options &= ~NAND_CHIPOPTIONS_MSK; 3073 chip->options &= ~NAND_CHIPOPTIONS_MSK;
3058 chip->options |= type->options & NAND_CHIPOPTIONS_MSK; 3074 chip->options |= type->options & NAND_CHIPOPTIONS_MSK;
3059 3075
3060 /* Check if chip is a not a samsung device. Do not clear the 3076 /*
3061 * options for chips which are not having an extended id. 3077 * Check if chip is not a Samsung device. Do not clear the
3078 * options for chips which do not have an extended id.
3062 */ 3079 */
3063 if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize) 3080 if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)
3064 chip->options &= ~NAND_SAMSUNG_LP_OPTIONS; 3081 chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;
3065ident_done: 3082ident_done:
3066 3083
3067 /* 3084 /*
3068 * Set chip as a default. Board drivers can override it, if necessary 3085 * Set chip as a default. Board drivers can override it, if necessary.
3069 */ 3086 */
3070 chip->options |= NAND_NO_AUTOINCR; 3087 chip->options |= NAND_NO_AUTOINCR;
3071 3088
@@ -3077,21 +3094,21 @@ ident_done:
3077 3094
3078 /* 3095 /*
3079 * Check, if buswidth is correct. Hardware drivers should set 3096 * Check, if buswidth is correct. Hardware drivers should set
3080 * chip correct ! 3097 * chip correct!
3081 */ 3098 */
3082 if (busw != (chip->options & NAND_BUSWIDTH_16)) { 3099 if (busw != (chip->options & NAND_BUSWIDTH_16)) {
3083 printk(KERN_INFO "NAND device: Manufacturer ID:" 3100 pr_info("NAND device: Manufacturer ID:"
3084 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, 3101 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id,
3085 *dev_id, nand_manuf_ids[maf_idx].name, mtd->name); 3102 *dev_id, nand_manuf_ids[maf_idx].name, mtd->name);
3086 printk(KERN_WARNING "NAND bus width %d instead %d bit\n", 3103 pr_warn("NAND bus width %d instead %d bit\n",
3087 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, 3104 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
3088 busw ? 16 : 8); 3105 busw ? 16 : 8);
3089 return ERR_PTR(-EINVAL); 3106 return ERR_PTR(-EINVAL);
3090 } 3107 }
3091 3108
3092 /* Calculate the address shift from the page size */ 3109 /* Calculate the address shift from the page size */
3093 chip->page_shift = ffs(mtd->writesize) - 1; 3110 chip->page_shift = ffs(mtd->writesize) - 1;
3094 /* Convert chipsize to number of pages per chip -1. */ 3111 /* Convert chipsize to number of pages per chip -1 */
3095 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; 3112 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
3096 3113
3097 chip->bbt_erase_shift = chip->phys_erase_shift = 3114 chip->bbt_erase_shift = chip->phys_erase_shift =
@@ -3121,7 +3138,7 @@ ident_done:
3121 if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) && 3138 if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3122 (*maf_id == NAND_MFR_SAMSUNG || 3139 (*maf_id == NAND_MFR_SAMSUNG ||
3123 *maf_id == NAND_MFR_HYNIX)) 3140 *maf_id == NAND_MFR_HYNIX))
3124 chip->options |= NAND_BBT_SCANLASTPAGE; 3141 chip->bbt_options |= NAND_BBT_SCANLASTPAGE;
3125 else if ((!(chip->cellinfo & NAND_CI_CELLTYPE_MSK) && 3142 else if ((!(chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
3126 (*maf_id == NAND_MFR_SAMSUNG || 3143 (*maf_id == NAND_MFR_SAMSUNG ||
3127 *maf_id == NAND_MFR_HYNIX || 3144 *maf_id == NAND_MFR_HYNIX ||
@@ -3129,17 +3146,7 @@ ident_done:
3129 *maf_id == NAND_MFR_AMD)) || 3146 *maf_id == NAND_MFR_AMD)) ||
3130 (mtd->writesize == 2048 && 3147 (mtd->writesize == 2048 &&
3131 *maf_id == NAND_MFR_MICRON)) 3148 *maf_id == NAND_MFR_MICRON))
3132 chip->options |= NAND_BBT_SCAN2NDPAGE; 3149 chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;
3133
3134 /*
3135 * Numonyx/ST 2K pages, x8 bus use BOTH byte 1 and 6
3136 */
3137 if (!(busw & NAND_BUSWIDTH_16) &&
3138 *maf_id == NAND_MFR_STMICRO &&
3139 mtd->writesize == 2048) {
3140 chip->options |= NAND_BBT_SCANBYTE1AND6;
3141 chip->badblockpos = 0;
3142 }
3143 3150
3144 /* Check for AND chips with 4 page planes */ 3151 /* Check for AND chips with 4 page planes */
3145 if (chip->options & NAND_4PAGE_ARRAY) 3152 if (chip->options & NAND_4PAGE_ARRAY)
@@ -3147,12 +3154,11 @@ ident_done:
3147 else 3154 else
3148 chip->erase_cmd = single_erase_cmd; 3155 chip->erase_cmd = single_erase_cmd;
3149 3156
3150 /* Do not replace user supplied command function ! */ 3157 /* Do not replace user supplied command function! */
3151 if (mtd->writesize > 512 && chip->cmdfunc == nand_command) 3158 if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
3152 chip->cmdfunc = nand_command_lp; 3159 chip->cmdfunc = nand_command_lp;
3153 3160
3154 /* TODO onfi flash name */ 3161 pr_info("NAND device: Manufacturer ID:"
3155 printk(KERN_INFO "NAND device: Manufacturer ID:"
3156 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, *dev_id, 3162 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, *dev_id,
3157 nand_manuf_ids[maf_idx].name, 3163 nand_manuf_ids[maf_idx].name,
3158 chip->onfi_version ? chip->onfi_params.model : type->name); 3164 chip->onfi_version ? chip->onfi_params.model : type->name);
@@ -3162,12 +3168,12 @@ ident_done:
3162 3168
3163/** 3169/**
3164 * nand_scan_ident - [NAND Interface] Scan for the NAND device 3170 * nand_scan_ident - [NAND Interface] Scan for the NAND device
3165 * @mtd: MTD device structure 3171 * @mtd: MTD device structure
3166 * @maxchips: Number of chips to scan for 3172 * @maxchips: number of chips to scan for
3167 * @table: Alternative NAND ID table 3173 * @table: alternative NAND ID table
3168 * 3174 *
3169 * This is the first phase of the normal nand_scan() function. It 3175 * This is the first phase of the normal nand_scan() function. It reads the
3170 * reads the flash ID and sets up MTD fields accordingly. 3176 * flash ID and sets up MTD fields accordingly.
3171 * 3177 *
3172 * The mtd->owner field must be set to the module of the caller. 3178 * The mtd->owner field must be set to the module of the caller.
3173 */ 3179 */
@@ -3189,7 +3195,7 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
3189 3195
3190 if (IS_ERR(type)) { 3196 if (IS_ERR(type)) {
3191 if (!(chip->options & NAND_SCAN_SILENT_NODEV)) 3197 if (!(chip->options & NAND_SCAN_SILENT_NODEV))
3192 printk(KERN_WARNING "No NAND device found.\n"); 3198 pr_warn("No NAND device found\n");
3193 chip->select_chip(mtd, -1); 3199 chip->select_chip(mtd, -1);
3194 return PTR_ERR(type); 3200 return PTR_ERR(type);
3195 } 3201 }
@@ -3207,7 +3213,7 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
3207 break; 3213 break;
3208 } 3214 }
3209 if (i > 1) 3215 if (i > 1)
3210 printk(KERN_INFO "%d NAND chips detected\n", i); 3216 pr_info("%d NAND chips detected\n", i);
3211 3217
3212 /* Store the number of chips and calc total size for mtd */ 3218 /* Store the number of chips and calc total size for mtd */
3213 chip->numchips = i; 3219 chip->numchips = i;
@@ -3220,11 +3226,11 @@ EXPORT_SYMBOL(nand_scan_ident);
3220 3226
3221/** 3227/**
3222 * nand_scan_tail - [NAND Interface] Scan for the NAND device 3228 * nand_scan_tail - [NAND Interface] Scan for the NAND device
3223 * @mtd: MTD device structure 3229 * @mtd: MTD device structure
3224 * 3230 *
3225 * This is the second phase of the normal nand_scan() function. It 3231 * This is the second phase of the normal nand_scan() function. It fills out
3226 * fills out all the uninitialized function pointers with the defaults 3232 * all the uninitialized function pointers with the defaults and scans for a
3227 * and scans for a bad block table if appropriate. 3233 * bad block table if appropriate.
3228 */ 3234 */
3229int nand_scan_tail(struct mtd_info *mtd) 3235int nand_scan_tail(struct mtd_info *mtd)
3230{ 3236{
@@ -3240,7 +3246,7 @@ int nand_scan_tail(struct mtd_info *mtd)
3240 chip->oob_poi = chip->buffers->databuf + mtd->writesize; 3246 chip->oob_poi = chip->buffers->databuf + mtd->writesize;
3241 3247
3242 /* 3248 /*
3243 * If no default placement scheme is given, select an appropriate one 3249 * If no default placement scheme is given, select an appropriate one.
3244 */ 3250 */
3245 if (!chip->ecc.layout && (chip->ecc.mode != NAND_ECC_SOFT_BCH)) { 3251 if (!chip->ecc.layout && (chip->ecc.mode != NAND_ECC_SOFT_BCH)) {
3246 switch (mtd->oobsize) { 3252 switch (mtd->oobsize) {
@@ -3257,8 +3263,8 @@ int nand_scan_tail(struct mtd_info *mtd)
3257 chip->ecc.layout = &nand_oob_128; 3263 chip->ecc.layout = &nand_oob_128;
3258 break; 3264 break;
3259 default: 3265 default:
3260 printk(KERN_WARNING "No oob scheme defined for " 3266 pr_warn("No oob scheme defined for oobsize %d\n",
3261 "oobsize %d\n", mtd->oobsize); 3267 mtd->oobsize);
3262 BUG(); 3268 BUG();
3263 } 3269 }
3264 } 3270 }
@@ -3267,7 +3273,7 @@ int nand_scan_tail(struct mtd_info *mtd)
3267 chip->write_page = nand_write_page; 3273 chip->write_page = nand_write_page;
3268 3274
3269 /* 3275 /*
3270 * check ECC mode, default to software if 3byte/512byte hardware ECC is 3276 * Check ECC mode, default to software if 3byte/512byte hardware ECC is
3271 * selected and we have 256 byte pagesize fallback to software ECC 3277 * selected and we have 256 byte pagesize fallback to software ECC
3272 */ 3278 */
3273 3279
@@ -3276,15 +3282,15 @@ int nand_scan_tail(struct mtd_info *mtd)
3276 /* Similar to NAND_ECC_HW, but a separate read_page handle */ 3282 /* Similar to NAND_ECC_HW, but a separate read_page handle */
3277 if (!chip->ecc.calculate || !chip->ecc.correct || 3283 if (!chip->ecc.calculate || !chip->ecc.correct ||
3278 !chip->ecc.hwctl) { 3284 !chip->ecc.hwctl) {
3279 printk(KERN_WARNING "No ECC functions supplied; " 3285 pr_warn("No ECC functions supplied; "
3280 "Hardware ECC not possible\n"); 3286 "hardware ECC not possible\n");
3281 BUG(); 3287 BUG();
3282 } 3288 }
3283 if (!chip->ecc.read_page) 3289 if (!chip->ecc.read_page)
3284 chip->ecc.read_page = nand_read_page_hwecc_oob_first; 3290 chip->ecc.read_page = nand_read_page_hwecc_oob_first;
3285 3291
3286 case NAND_ECC_HW: 3292 case NAND_ECC_HW:
3287 /* Use standard hwecc read page function ? */ 3293 /* Use standard hwecc read page function? */
3288 if (!chip->ecc.read_page) 3294 if (!chip->ecc.read_page)
3289 chip->ecc.read_page = nand_read_page_hwecc; 3295 chip->ecc.read_page = nand_read_page_hwecc;
3290 if (!chip->ecc.write_page) 3296 if (!chip->ecc.write_page)
@@ -3305,11 +3311,11 @@ int nand_scan_tail(struct mtd_info *mtd)
3305 chip->ecc.read_page == nand_read_page_hwecc || 3311 chip->ecc.read_page == nand_read_page_hwecc ||
3306 !chip->ecc.write_page || 3312 !chip->ecc.write_page ||
3307 chip->ecc.write_page == nand_write_page_hwecc)) { 3313 chip->ecc.write_page == nand_write_page_hwecc)) {
3308 printk(KERN_WARNING "No ECC functions supplied; " 3314 pr_warn("No ECC functions supplied; "
3309 "Hardware ECC not possible\n"); 3315 "hardware ECC not possible\n");
3310 BUG(); 3316 BUG();
3311 } 3317 }
3312 /* Use standard syndrome read/write page function ? */ 3318 /* Use standard syndrome read/write page function? */
3313 if (!chip->ecc.read_page) 3319 if (!chip->ecc.read_page)
3314 chip->ecc.read_page = nand_read_page_syndrome; 3320 chip->ecc.read_page = nand_read_page_syndrome;
3315 if (!chip->ecc.write_page) 3321 if (!chip->ecc.write_page)
@@ -3325,9 +3331,9 @@ int nand_scan_tail(struct mtd_info *mtd)
3325 3331
3326 if (mtd->writesize >= chip->ecc.size) 3332 if (mtd->writesize >= chip->ecc.size)
3327 break; 3333 break;
3328 printk(KERN_WARNING "%d byte HW ECC not possible on " 3334 pr_warn("%d byte HW ECC not possible on "
3329 "%d byte page size, fallback to SW ECC\n", 3335 "%d byte page size, fallback to SW ECC\n",
3330 chip->ecc.size, mtd->writesize); 3336 chip->ecc.size, mtd->writesize);
3331 chip->ecc.mode = NAND_ECC_SOFT; 3337 chip->ecc.mode = NAND_ECC_SOFT;
3332 3338
3333 case NAND_ECC_SOFT: 3339 case NAND_ECC_SOFT:
@@ -3347,7 +3353,7 @@ int nand_scan_tail(struct mtd_info *mtd)
3347 3353
3348 case NAND_ECC_SOFT_BCH: 3354 case NAND_ECC_SOFT_BCH:
3349 if (!mtd_nand_has_bch()) { 3355 if (!mtd_nand_has_bch()) {
3350 printk(KERN_WARNING "CONFIG_MTD_ECC_BCH not enabled\n"); 3356 pr_warn("CONFIG_MTD_ECC_BCH not enabled\n");
3351 BUG(); 3357 BUG();
3352 } 3358 }
3353 chip->ecc.calculate = nand_bch_calculate_ecc; 3359 chip->ecc.calculate = nand_bch_calculate_ecc;
@@ -3362,8 +3368,8 @@ int nand_scan_tail(struct mtd_info *mtd)
3362 /* 3368 /*
3363 * Board driver should supply ecc.size and ecc.bytes values to 3369 * Board driver should supply ecc.size and ecc.bytes values to
3364 * select how many bits are correctable; see nand_bch_init() 3370 * select how many bits are correctable; see nand_bch_init()
3365 * for details. 3371 * for details. Otherwise, default to 4 bits for large page
3366 * Otherwise, default to 4 bits for large page devices 3372 * devices.
3367 */ 3373 */
3368 if (!chip->ecc.size && (mtd->oobsize >= 64)) { 3374 if (!chip->ecc.size && (mtd->oobsize >= 64)) {
3369 chip->ecc.size = 512; 3375 chip->ecc.size = 512;
@@ -3374,14 +3380,14 @@ int nand_scan_tail(struct mtd_info *mtd)
3374 chip->ecc.bytes, 3380 chip->ecc.bytes,
3375 &chip->ecc.layout); 3381 &chip->ecc.layout);
3376 if (!chip->ecc.priv) { 3382 if (!chip->ecc.priv) {
3377 printk(KERN_WARNING "BCH ECC initialization failed!\n"); 3383 pr_warn("BCH ECC initialization failed!\n");
3378 BUG(); 3384 BUG();
3379 } 3385 }
3380 break; 3386 break;
3381 3387
3382 case NAND_ECC_NONE: 3388 case NAND_ECC_NONE:
3383 printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. " 3389 pr_warn("NAND_ECC_NONE selected by board driver. "
3384 "This is not recommended !!\n"); 3390 "This is not recommended!\n");
3385 chip->ecc.read_page = nand_read_page_raw; 3391 chip->ecc.read_page = nand_read_page_raw;
3386 chip->ecc.write_page = nand_write_page_raw; 3392 chip->ecc.write_page = nand_write_page_raw;
3387 chip->ecc.read_oob = nand_read_oob_std; 3393 chip->ecc.read_oob = nand_read_oob_std;
@@ -3393,14 +3399,19 @@ int nand_scan_tail(struct mtd_info *mtd)
3393 break; 3399 break;
3394 3400
3395 default: 3401 default:
3396 printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n", 3402 pr_warn("Invalid NAND_ECC_MODE %d\n", chip->ecc.mode);
3397 chip->ecc.mode);
3398 BUG(); 3403 BUG();
3399 } 3404 }
3400 3405
3406 /* For many systems, the standard OOB write also works for raw */
3407 if (!chip->ecc.read_oob_raw)
3408 chip->ecc.read_oob_raw = chip->ecc.read_oob;
3409 if (!chip->ecc.write_oob_raw)
3410 chip->ecc.write_oob_raw = chip->ecc.write_oob;
3411
3401 /* 3412 /*
3402 * The number of bytes available for a client to place data into 3413 * The number of bytes available for a client to place data into
3403 * the out of band area 3414 * the out of band area.
3404 */ 3415 */
3405 chip->ecc.layout->oobavail = 0; 3416 chip->ecc.layout->oobavail = 0;
3406 for (i = 0; chip->ecc.layout->oobfree[i].length 3417 for (i = 0; chip->ecc.layout->oobfree[i].length
@@ -3411,19 +3422,16 @@ int nand_scan_tail(struct mtd_info *mtd)
3411 3422
3412 /* 3423 /*
3413 * Set the number of read / write steps for one page depending on ECC 3424 * Set the number of read / write steps for one page depending on ECC
3414 * mode 3425 * mode.
3415 */ 3426 */
3416 chip->ecc.steps = mtd->writesize / chip->ecc.size; 3427 chip->ecc.steps = mtd->writesize / chip->ecc.size;
3417 if (chip->ecc.steps * chip->ecc.size != mtd->writesize) { 3428 if (chip->ecc.steps * chip->ecc.size != mtd->writesize) {
3418 printk(KERN_WARNING "Invalid ecc parameters\n"); 3429 pr_warn("Invalid ECC parameters\n");
3419 BUG(); 3430 BUG();
3420 } 3431 }
3421 chip->ecc.total = chip->ecc.steps * chip->ecc.bytes; 3432 chip->ecc.total = chip->ecc.steps * chip->ecc.bytes;
3422 3433
3423 /* 3434 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */
3424 * Allow subpage writes up to ecc.steps. Not possible for MLC
3425 * FLASH.
3426 */
3427 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && 3435 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
3428 !(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) { 3436 !(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
3429 switch (chip->ecc.steps) { 3437 switch (chip->ecc.steps) {
@@ -3481,9 +3489,11 @@ int nand_scan_tail(struct mtd_info *mtd)
3481} 3489}
3482EXPORT_SYMBOL(nand_scan_tail); 3490EXPORT_SYMBOL(nand_scan_tail);
3483 3491
3484/* is_module_text_address() isn't exported, and it's mostly a pointless 3492/*
3493 * is_module_text_address() isn't exported, and it's mostly a pointless
3485 * test if this is a module _anyway_ -- they'd have to try _really_ hard 3494 * test if this is a module _anyway_ -- they'd have to try _really_ hard
3486 * to call us from in-kernel code if the core NAND support is modular. */ 3495 * to call us from in-kernel code if the core NAND support is modular.
3496 */
3487#ifdef MODULE 3497#ifdef MODULE
3488#define caller_is_module() (1) 3498#define caller_is_module() (1)
3489#else 3499#else
@@ -3493,15 +3503,13 @@ EXPORT_SYMBOL(nand_scan_tail);
3493 3503
3494/** 3504/**
3495 * nand_scan - [NAND Interface] Scan for the NAND device 3505 * nand_scan - [NAND Interface] Scan for the NAND device
3496 * @mtd: MTD device structure 3506 * @mtd: MTD device structure
3497 * @maxchips: Number of chips to scan for 3507 * @maxchips: number of chips to scan for
3498 *
3499 * This fills out all the uninitialized function pointers
3500 * with the defaults.
3501 * The flash ID is read and the mtd/chip structures are
3502 * filled with the appropriate values.
3503 * The mtd->owner field must be set to the module of the caller
3504 * 3508 *
3509 * This fills out all the uninitialized function pointers with the defaults.
3510 * The flash ID is read and the mtd/chip structures are filled with the
3511 * appropriate values. The mtd->owner field must be set to the module of the
3512 * caller.
3505 */ 3513 */
3506int nand_scan(struct mtd_info *mtd, int maxchips) 3514int nand_scan(struct mtd_info *mtd, int maxchips)
3507{ 3515{
@@ -3509,8 +3517,7 @@ int nand_scan(struct mtd_info *mtd, int maxchips)
3509 3517
3510 /* Many callers got this wrong, so check for it for a while... */ 3518 /* Many callers got this wrong, so check for it for a while... */
3511 if (!mtd->owner && caller_is_module()) { 3519 if (!mtd->owner && caller_is_module()) {
3512 printk(KERN_CRIT "%s called with NULL mtd->owner!\n", 3520 pr_crit("%s called with NULL mtd->owner!\n", __func__);
3513 __func__);
3514 BUG(); 3521 BUG();
3515 } 3522 }
3516 3523
@@ -3523,8 +3530,8 @@ EXPORT_SYMBOL(nand_scan);
3523 3530
3524/** 3531/**
3525 * nand_release - [NAND Interface] Free resources held by the NAND device 3532 * nand_release - [NAND Interface] Free resources held by the NAND device
3526 * @mtd: MTD device structure 3533 * @mtd: MTD device structure
3527*/ 3534 */
3528void nand_release(struct mtd_info *mtd) 3535void nand_release(struct mtd_info *mtd)
3529{ 3536{
3530 struct nand_chip *chip = mtd->priv; 3537 struct nand_chip *chip = mtd->priv;
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-28 06:14:36 -0500