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path: root/drivers/mtd/nand/fsmc_nand.c
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Diffstat (limited to 'drivers/mtd/nand/fsmc_nand.c')
-rw-r--r--drivers/mtd/nand/fsmc_nand.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c
index 205b10b9f9b..0d45ef3883e 100644
--- a/drivers/mtd/nand/fsmc_nand.c
+++ b/drivers/mtd/nand/fsmc_nand.c
@@ -335,7 +335,7 @@ static void fsmc_enable_hwecc(struct mtd_info *mtd, int mode)
335 335
336/* 336/*
337 * fsmc_read_hwecc_ecc4 - Hardware ECC calculator for ecc4 option supported by 337 * fsmc_read_hwecc_ecc4 - Hardware ECC calculator for ecc4 option supported by
338 * FSMC. ECC is 13 bytes for 512 bytes of data (supports error correction upto 338 * FSMC. ECC is 13 bytes for 512 bytes of data (supports error correction up to
339 * max of 8-bits) 339 * max of 8-bits)
340 */ 340 */
341static int fsmc_read_hwecc_ecc4(struct mtd_info *mtd, const uint8_t *data, 341static int fsmc_read_hwecc_ecc4(struct mtd_info *mtd, const uint8_t *data,
@@ -381,7 +381,7 @@ static int fsmc_read_hwecc_ecc4(struct mtd_info *mtd, const uint8_t *data,
381 381
382/* 382/*
383 * fsmc_read_hwecc_ecc1 - Hardware ECC calculator for ecc1 option supported by 383 * fsmc_read_hwecc_ecc1 - Hardware ECC calculator for ecc1 option supported by
384 * FSMC. ECC is 3 bytes for 512 bytes of data (supports error correction upto 384 * FSMC. ECC is 3 bytes for 512 bytes of data (supports error correction up to
385 * max of 1-bit) 385 * max of 1-bit)
386 */ 386 */
387static int fsmc_read_hwecc_ecc1(struct mtd_info *mtd, const uint8_t *data, 387static int fsmc_read_hwecc_ecc1(struct mtd_info *mtd, const uint8_t *data,
@@ -408,10 +408,10 @@ static int fsmc_read_hwecc_ecc1(struct mtd_info *mtd, const uint8_t *data,
408 * @buf: buffer to store read data 408 * @buf: buffer to store read data
409 * @page: page number to read 409 * @page: page number to read
410 * 410 *
411 * This routine is needed for fsmc verison 8 as reading from NAND chip has to be 411 * This routine is needed for fsmc version 8 as reading from NAND chip has to be
412 * performed in a strict sequence as follows: 412 * performed in a strict sequence as follows:
413 * data(512 byte) -> ecc(13 byte) 413 * data(512 byte) -> ecc(13 byte)
414 * After this read, fsmc hardware generates and reports error data bits(upto a 414 * After this read, fsmc hardware generates and reports error data bits(up to a
415 * max of 8 bits) 415 * max of 8 bits)
416 */ 416 */
417static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, 417static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
@@ -686,7 +686,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
686 } 686 }
687 687
688 /* 688 /*
689 * Scan to find existance of the device 689 * Scan to find existence of the device
690 */ 690 */
691 if (nand_scan_ident(&host->mtd, 1, NULL)) { 691 if (nand_scan_ident(&host->mtd, 1, NULL)) {
692 ret = -ENXIO; 692 ret = -ENXIO;