diff options
Diffstat (limited to 'drivers/mfd')
-rw-r--r-- | drivers/mfd/wm831x-auxadc.c | 254 |
1 files changed, 177 insertions, 77 deletions
diff --git a/drivers/mfd/wm831x-auxadc.c b/drivers/mfd/wm831x-auxadc.c index 2fc9531b243..87210954a06 100644 --- a/drivers/mfd/wm831x-auxadc.c +++ b/drivers/mfd/wm831x-auxadc.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
18 | #include <linux/mfd/core.h> | 18 | #include <linux/mfd/core.h> |
19 | #include <linux/slab.h> | 19 | #include <linux/slab.h> |
20 | #include <linux/list.h> | ||
20 | 21 | ||
21 | #include <linux/mfd/wm831x/core.h> | 22 | #include <linux/mfd/wm831x/core.h> |
22 | #include <linux/mfd/wm831x/pdata.h> | 23 | #include <linux/mfd/wm831x/pdata.h> |
@@ -25,19 +26,139 @@ | |||
25 | #include <linux/mfd/wm831x/otp.h> | 26 | #include <linux/mfd/wm831x/otp.h> |
26 | #include <linux/mfd/wm831x/regulator.h> | 27 | #include <linux/mfd/wm831x/regulator.h> |
27 | 28 | ||
28 | /** | 29 | struct wm831x_auxadc_req { |
29 | * wm831x_auxadc_read: Read a value from the WM831x AUXADC | 30 | struct list_head list; |
30 | * | 31 | enum wm831x_auxadc input; |
31 | * @wm831x: Device to read from. | 32 | int val; |
32 | * @input: AUXADC input to read. | 33 | struct completion done; |
33 | */ | 34 | }; |
34 | int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input) | 35 | |
36 | static int wm831x_auxadc_read_irq(struct wm831x *wm831x, | ||
37 | enum wm831x_auxadc input) | ||
35 | { | 38 | { |
36 | int ret, src, irq_masked, timeout; | 39 | struct wm831x_auxadc_req *req; |
40 | int ret; | ||
41 | bool ena = false; | ||
42 | |||
43 | req = kzalloc(sizeof(*req), GFP_KERNEL); | ||
44 | if (!req) | ||
45 | return -ENOMEM; | ||
46 | |||
47 | init_completion(&req->done); | ||
48 | req->input = input; | ||
49 | req->val = -ETIMEDOUT; | ||
50 | |||
51 | mutex_lock(&wm831x->auxadc_lock); | ||
52 | |||
53 | /* Enqueue the request */ | ||
54 | list_add(&req->list, &wm831x->auxadc_pending); | ||
55 | |||
56 | ena = !wm831x->auxadc_active; | ||
57 | |||
58 | if (ena) { | ||
59 | ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL, | ||
60 | WM831X_AUX_ENA, WM831X_AUX_ENA); | ||
61 | if (ret != 0) { | ||
62 | dev_err(wm831x->dev, "Failed to enable AUXADC: %d\n", | ||
63 | ret); | ||
64 | goto out; | ||
65 | } | ||
66 | } | ||
67 | |||
68 | /* Enable the conversion if not already running */ | ||
69 | if (!(wm831x->auxadc_active & (1 << input))) { | ||
70 | ret = wm831x_set_bits(wm831x, WM831X_AUXADC_SOURCE, | ||
71 | 1 << input, 1 << input); | ||
72 | if (ret != 0) { | ||
73 | dev_err(wm831x->dev, | ||
74 | "Failed to set AUXADC source: %d\n", ret); | ||
75 | goto out; | ||
76 | } | ||
77 | |||
78 | wm831x->auxadc_active |= 1 << input; | ||
79 | } | ||
80 | |||
81 | /* We convert at the fastest rate possible */ | ||
82 | if (ena) { | ||
83 | ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL, | ||
84 | WM831X_AUX_CVT_ENA | | ||
85 | WM831X_AUX_RATE_MASK, | ||
86 | WM831X_AUX_CVT_ENA | | ||
87 | WM831X_AUX_RATE_MASK); | ||
88 | if (ret != 0) { | ||
89 | dev_err(wm831x->dev, "Failed to start AUXADC: %d\n", | ||
90 | ret); | ||
91 | goto out; | ||
92 | } | ||
93 | } | ||
94 | |||
95 | mutex_unlock(&wm831x->auxadc_lock); | ||
96 | |||
97 | /* Wait for an interrupt */ | ||
98 | wait_for_completion_timeout(&req->done, msecs_to_jiffies(500)); | ||
99 | |||
100 | mutex_lock(&wm831x->auxadc_lock); | ||
101 | |||
102 | list_del(&req->list); | ||
103 | ret = req->val; | ||
104 | |||
105 | out: | ||
106 | mutex_unlock(&wm831x->auxadc_lock); | ||
107 | |||
108 | kfree(req); | ||
109 | |||
110 | return ret; | ||
111 | } | ||
112 | |||
113 | static irqreturn_t wm831x_auxadc_irq(int irq, void *irq_data) | ||
114 | { | ||
115 | struct wm831x *wm831x = irq_data; | ||
116 | struct wm831x_auxadc_req *req; | ||
117 | int ret, input, val; | ||
118 | |||
119 | ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA); | ||
120 | if (ret < 0) { | ||
121 | dev_err(wm831x->dev, | ||
122 | "Failed to read AUXADC data: %d\n", ret); | ||
123 | return IRQ_NONE; | ||
124 | } | ||
125 | |||
126 | input = ((ret & WM831X_AUX_DATA_SRC_MASK) | ||
127 | >> WM831X_AUX_DATA_SRC_SHIFT) - 1; | ||
128 | |||
129 | if (input == 14) | ||
130 | input = WM831X_AUX_CAL; | ||
37 | 131 | ||
38 | /* Are we using the interrupt? */ | 132 | val = ret & WM831X_AUX_DATA_MASK; |
39 | irq_masked = wm831x_reg_read(wm831x, WM831X_INTERRUPT_STATUS_1_MASK); | 133 | |
40 | irq_masked &= WM831X_AUXADC_DATA_EINT; | 134 | mutex_lock(&wm831x->auxadc_lock); |
135 | |||
136 | /* Disable this conversion, we're about to complete all users */ | ||
137 | wm831x_set_bits(wm831x, WM831X_AUXADC_SOURCE, | ||
138 | 1 << input, 0); | ||
139 | wm831x->auxadc_active &= ~(1 << input); | ||
140 | |||
141 | /* Turn off the entire convertor if idle */ | ||
142 | if (!wm831x->auxadc_active) | ||
143 | wm831x_reg_write(wm831x, WM831X_AUXADC_CONTROL, 0); | ||
144 | |||
145 | /* Wake up any threads waiting for this request */ | ||
146 | list_for_each_entry(req, &wm831x->auxadc_pending, list) { | ||
147 | if (req->input == input) { | ||
148 | req->val = val; | ||
149 | complete(&req->done); | ||
150 | } | ||
151 | } | ||
152 | |||
153 | mutex_unlock(&wm831x->auxadc_lock); | ||
154 | |||
155 | return IRQ_HANDLED; | ||
156 | } | ||
157 | |||
158 | static int wm831x_auxadc_read_polled(struct wm831x *wm831x, | ||
159 | enum wm831x_auxadc input) | ||
160 | { | ||
161 | int ret, src, timeout; | ||
41 | 162 | ||
42 | mutex_lock(&wm831x->auxadc_lock); | 163 | mutex_lock(&wm831x->auxadc_lock); |
43 | 164 | ||
@@ -57,9 +178,6 @@ int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input) | |||
57 | goto out; | 178 | goto out; |
58 | } | 179 | } |
59 | 180 | ||
60 | /* Clear any notification from a very late arriving interrupt */ | ||
61 | try_wait_for_completion(&wm831x->auxadc_done); | ||
62 | |||
63 | ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL, | 181 | ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL, |
64 | WM831X_AUX_CVT_ENA, WM831X_AUX_CVT_ENA); | 182 | WM831X_AUX_CVT_ENA, WM831X_AUX_CVT_ENA); |
65 | if (ret < 0) { | 183 | if (ret < 0) { |
@@ -67,59 +185,42 @@ int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input) | |||
67 | goto disable; | 185 | goto disable; |
68 | } | 186 | } |
69 | 187 | ||
70 | if (irq_masked) { | 188 | /* If we're not using interrupts then poll the |
71 | /* If we're not using interrupts then poll the | 189 | * interrupt status register */ |
72 | * interrupt status register */ | 190 | timeout = 5; |
73 | timeout = 5; | 191 | while (timeout) { |
74 | while (timeout) { | 192 | msleep(1); |
75 | msleep(1); | ||
76 | |||
77 | ret = wm831x_reg_read(wm831x, | ||
78 | WM831X_INTERRUPT_STATUS_1); | ||
79 | if (ret < 0) { | ||
80 | dev_err(wm831x->dev, | ||
81 | "ISR 1 read failed: %d\n", ret); | ||
82 | goto disable; | ||
83 | } | ||
84 | |||
85 | /* Did it complete? */ | ||
86 | if (ret & WM831X_AUXADC_DATA_EINT) { | ||
87 | wm831x_reg_write(wm831x, | ||
88 | WM831X_INTERRUPT_STATUS_1, | ||
89 | WM831X_AUXADC_DATA_EINT); | ||
90 | break; | ||
91 | } else { | ||
92 | dev_err(wm831x->dev, | ||
93 | "AUXADC conversion timeout\n"); | ||
94 | ret = -EBUSY; | ||
95 | goto disable; | ||
96 | } | ||
97 | } | ||
98 | 193 | ||
99 | ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA); | 194 | ret = wm831x_reg_read(wm831x, |
195 | WM831X_INTERRUPT_STATUS_1); | ||
100 | if (ret < 0) { | 196 | if (ret < 0) { |
101 | dev_err(wm831x->dev, | 197 | dev_err(wm831x->dev, |
102 | "Failed to read AUXADC data: %d\n", ret); | 198 | "ISR 1 read failed: %d\n", ret); |
103 | goto disable; | 199 | goto disable; |
104 | } | 200 | } |
105 | 201 | ||
106 | wm831x->auxadc_data = ret; | 202 | /* Did it complete? */ |
107 | 203 | if (ret & WM831X_AUXADC_DATA_EINT) { | |
108 | } else { | 204 | wm831x_reg_write(wm831x, |
109 | /* If we are using interrupts then wait for the | 205 | WM831X_INTERRUPT_STATUS_1, |
110 | * interrupt to complete. Use an extremely long | 206 | WM831X_AUXADC_DATA_EINT); |
111 | * timeout to handle situations with heavy load where | 207 | break; |
112 | * the notification of the interrupt may be delayed by | 208 | } else { |
113 | * threaded IRQ handling. */ | 209 | dev_err(wm831x->dev, |
114 | if (!wait_for_completion_timeout(&wm831x->auxadc_done, | 210 | "AUXADC conversion timeout\n"); |
115 | msecs_to_jiffies(500))) { | ||
116 | dev_err(wm831x->dev, "Timed out waiting for AUXADC\n"); | ||
117 | ret = -EBUSY; | 211 | ret = -EBUSY; |
118 | goto disable; | 212 | goto disable; |
119 | } | 213 | } |
120 | } | 214 | } |
121 | 215 | ||
122 | src = ((wm831x->auxadc_data & WM831X_AUX_DATA_SRC_MASK) | 216 | ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA); |
217 | if (ret < 0) { | ||
218 | dev_err(wm831x->dev, | ||
219 | "Failed to read AUXADC data: %d\n", ret); | ||
220 | goto disable; | ||
221 | } | ||
222 | |||
223 | src = ((ret & WM831X_AUX_DATA_SRC_MASK) | ||
123 | >> WM831X_AUX_DATA_SRC_SHIFT) - 1; | 224 | >> WM831X_AUX_DATA_SRC_SHIFT) - 1; |
124 | 225 | ||
125 | if (src == 14) | 226 | if (src == 14) |
@@ -130,7 +231,7 @@ int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input) | |||
130 | src, input); | 231 | src, input); |
131 | ret = -EINVAL; | 232 | ret = -EINVAL; |
132 | } else { | 233 | } else { |
133 | ret = wm831x->auxadc_data & WM831X_AUX_DATA_MASK; | 234 | ret &= WM831X_AUX_DATA_MASK; |
134 | } | 235 | } |
135 | 236 | ||
136 | disable: | 237 | disable: |
@@ -139,26 +240,18 @@ out: | |||
139 | mutex_unlock(&wm831x->auxadc_lock); | 240 | mutex_unlock(&wm831x->auxadc_lock); |
140 | return ret; | 241 | return ret; |
141 | } | 242 | } |
142 | EXPORT_SYMBOL_GPL(wm831x_auxadc_read); | ||
143 | 243 | ||
144 | static irqreturn_t wm831x_auxadc_irq(int irq, void *irq_data) | 244 | /** |
245 | * wm831x_auxadc_read: Read a value from the WM831x AUXADC | ||
246 | * | ||
247 | * @wm831x: Device to read from. | ||
248 | * @input: AUXADC input to read. | ||
249 | */ | ||
250 | int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input) | ||
145 | { | 251 | { |
146 | struct wm831x *wm831x = irq_data; | 252 | return wm831x->auxadc_read(wm831x, input); |
147 | int ret; | ||
148 | |||
149 | ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA); | ||
150 | if (ret < 0) { | ||
151 | dev_err(wm831x->dev, | ||
152 | "Failed to read AUXADC data: %d\n", ret); | ||
153 | wm831x->auxadc_data = 0xffff; | ||
154 | } else { | ||
155 | wm831x->auxadc_data = ret; | ||
156 | } | ||
157 | |||
158 | complete(&wm831x->auxadc_done); | ||
159 | |||
160 | return IRQ_HANDLED; | ||
161 | } | 253 | } |
254 | EXPORT_SYMBOL_GPL(wm831x_auxadc_read); | ||
162 | 255 | ||
163 | /** | 256 | /** |
164 | * wm831x_auxadc_read_uv: Read a voltage from the WM831x AUXADC | 257 | * wm831x_auxadc_read_uv: Read a voltage from the WM831x AUXADC |
@@ -185,15 +278,22 @@ void wm831x_auxadc_init(struct wm831x *wm831x) | |||
185 | int ret; | 278 | int ret; |
186 | 279 | ||
187 | mutex_init(&wm831x->auxadc_lock); | 280 | mutex_init(&wm831x->auxadc_lock); |
188 | init_completion(&wm831x->auxadc_done); | 281 | INIT_LIST_HEAD(&wm831x->auxadc_pending); |
282 | |||
283 | if (wm831x->irq && wm831x->irq_base) { | ||
284 | wm831x->auxadc_read = wm831x_auxadc_read_irq; | ||
189 | 285 | ||
190 | if (wm831x->irq_base) { | ||
191 | ret = request_threaded_irq(wm831x->irq_base + | 286 | ret = request_threaded_irq(wm831x->irq_base + |
192 | WM831X_IRQ_AUXADC_DATA, | 287 | WM831X_IRQ_AUXADC_DATA, |
193 | NULL, wm831x_auxadc_irq, 0, | 288 | NULL, wm831x_auxadc_irq, 0, |
194 | "auxadc", wm831x); | 289 | "auxadc", wm831x); |
195 | if (ret < 0) | 290 | if (ret < 0) { |
196 | dev_err(wm831x->dev, "AUXADC IRQ request failed: %d\n", | 291 | dev_err(wm831x->dev, "AUXADC IRQ request failed: %d\n", |
197 | ret); | 292 | ret); |
293 | wm831x->auxadc_read = NULL; | ||
294 | } | ||
198 | } | 295 | } |
296 | |||
297 | if (!wm831x->auxadc_read) | ||
298 | wm831x->auxadc_read = wm831x_auxadc_read_polled; | ||
199 | } | 299 | } |