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-rw-r--r--drivers/gpu/drm/ast/ast_drv.c3
-rw-r--r--drivers/gpu/drm/cirrus/cirrus_drv.c4
-rw-r--r--drivers/gpu/drm/exynos/exynos_ddc.c2
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_buf.c79
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_buf.h22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_connector.c22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_connector.h22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_core.c22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_crtc.c52
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_crtc.h23
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_dmabuf.c29
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_dmabuf.h22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_drv.c24
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_drv.h22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_encoder.c22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_encoder.h22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fb.c22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fb.h22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fbdev.c44
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fbdev.h22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fimc.c130
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fimc.h22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fimd.c38
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_g2d.c6
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_gem.c22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_gem.h22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_gsc.c62
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_gsc.h22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_hdmi.c6
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_hdmi.h22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_iommu.c22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_iommu.h22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_ipp.c28
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_ipp.h26
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_rotator.c34
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_rotator.h22
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_vidi.c36
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_vidi.h22
-rw-r--r--drivers/gpu/drm/exynos/exynos_hdmi.c8
-rw-r--r--drivers/gpu/drm/exynos/exynos_hdmi.h22
-rw-r--r--drivers/gpu/drm/exynos/exynos_hdmiphy.c2
-rw-r--r--drivers/gpu/drm/exynos/exynos_mixer.c45
-rw-r--r--drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c4
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c3
-rw-r--r--drivers/gpu/drm/i915/i915_gem_dmabuf.c5
-rw-r--r--drivers/gpu/drm/mgag200/mgag200_drv.c3
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bo.c2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drm.c4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_pm.c4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_prime.c1
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c86
-rw-r--r--drivers/gpu/drm/radeon/evergreend.h14
-rw-r--r--drivers/gpu/drm/radeon/ni.c106
-rw-r--r--drivers/gpu/drm/radeon/nid.h3
-rw-r--r--drivers/gpu/drm/radeon/r600.c99
-rw-r--r--drivers/gpu/drm/radeon/r600_cs.c31
-rw-r--r--drivers/gpu/drm/radeon/radeon.h5
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h4
-rw-r--r--drivers/gpu/drm/radeon/radeon_combios.c51
-rw-r--r--drivers/gpu/drm/radeon/radeon_connectors.c10
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c28
-rw-r--r--drivers/gpu/drm/radeon/radeon_display.c13
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_i2c.c10
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h5
-rw-r--r--drivers/gpu/drm/radeon/radeon_prime.c1
-rw-r--r--drivers/gpu/drm/radeon/radeon_ring.c24
-rw-r--r--drivers/gpu/drm/radeon/rv770.c74
-rw-r--r--drivers/gpu/drm/radeon/si.c78
-rw-r--r--drivers/gpu/drm/radeon/sid.h18
-rw-r--r--drivers/gpu/drm/shmobile/shmob_drm_drv.c10
-rw-r--r--drivers/gpu/drm/ttm/ttm_bo_util.c4
73 files changed, 901 insertions, 950 deletions
diff --git a/drivers/gpu/drm/ast/ast_drv.c b/drivers/gpu/drm/ast/ast_drv.c
index 31123b6a0be..2d2c2f8d6dc 100644
--- a/drivers/gpu/drm/ast/ast_drv.c
+++ b/drivers/gpu/drm/ast/ast_drv.c
@@ -60,8 +60,7 @@ static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {
60 60
61MODULE_DEVICE_TABLE(pci, pciidlist); 61MODULE_DEVICE_TABLE(pci, pciidlist);
62 62
63static int __devinit 63static int ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
64ast_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
65{ 64{
66 return drm_get_pci_dev(pdev, ent, &driver); 65 return drm_get_pci_dev(pdev, ent, &driver);
67} 66}
diff --git a/drivers/gpu/drm/cirrus/cirrus_drv.c b/drivers/gpu/drm/cirrus/cirrus_drv.c
index dcd1a8c029e..8ecb601152e 100644
--- a/drivers/gpu/drm/cirrus/cirrus_drv.c
+++ b/drivers/gpu/drm/cirrus/cirrus_drv.c
@@ -56,8 +56,8 @@ static int cirrus_kick_out_firmware_fb(struct pci_dev *pdev)
56 return 0; 56 return 0;
57} 57}
58 58
59static int __devinit 59static int cirrus_pci_probe(struct pci_dev *pdev,
60cirrus_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 60 const struct pci_device_id *ent)
61{ 61{
62 int ret; 62 int ret;
63 63
diff --git a/drivers/gpu/drm/exynos/exynos_ddc.c b/drivers/gpu/drm/exynos/exynos_ddc.c
index bef43e0342a..4e9b5ba8edf 100644
--- a/drivers/gpu/drm/exynos/exynos_ddc.c
+++ b/drivers/gpu/drm/exynos/exynos_ddc.c
@@ -66,6 +66,6 @@ struct i2c_driver ddc_driver = {
66 }, 66 },
67 .id_table = ddc_idtable, 67 .id_table = ddc_idtable,
68 .probe = s5p_ddc_probe, 68 .probe = s5p_ddc_probe,
69 .remove = __devexit_p(s5p_ddc_remove), 69 .remove = s5p_ddc_remove,
70 .command = NULL, 70 .command = NULL,
71}; 71};
diff --git a/drivers/gpu/drm/exynos/exynos_drm_buf.c b/drivers/gpu/drm/exynos/exynos_drm_buf.c
index 9601bad47a2..57affae9568 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_buf.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_buf.c
@@ -3,24 +3,10 @@
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * Author: Inki Dae <inki.dae@samsung.com> 4 * Author: Inki Dae <inki.dae@samsung.com>
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * This program is free software; you can redistribute it and/or modify it
7 * copy of this software and associated documentation files (the "Software"), 7 * under the terms of the GNU General Public License as published by the
8 * to deal in the Software without restriction, including without limitation 8 * Free Software Foundation; either version 2 of the License, or (at your
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * option) any later version.
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
23 * OTHER DEALINGS IN THE SOFTWARE.
24 */ 10 */
25 11
26#include <drm/drmP.h> 12#include <drm/drmP.h>
@@ -29,6 +15,7 @@
29#include "exynos_drm_drv.h" 15#include "exynos_drm_drv.h"
30#include "exynos_drm_gem.h" 16#include "exynos_drm_gem.h"
31#include "exynos_drm_buf.h" 17#include "exynos_drm_buf.h"
18#include "exynos_drm_iommu.h"
32 19
33static int lowlevel_buffer_allocate(struct drm_device *dev, 20static int lowlevel_buffer_allocate(struct drm_device *dev,
34 unsigned int flags, struct exynos_drm_gem_buf *buf) 21 unsigned int flags, struct exynos_drm_gem_buf *buf)
@@ -51,7 +38,7 @@ static int lowlevel_buffer_allocate(struct drm_device *dev,
51 * region will be allocated else physically contiguous 38 * region will be allocated else physically contiguous
52 * as possible. 39 * as possible.
53 */ 40 */
54 if (flags & EXYNOS_BO_CONTIG) 41 if (!(flags & EXYNOS_BO_NONCONTIG))
55 dma_set_attr(DMA_ATTR_FORCE_CONTIGUOUS, &buf->dma_attrs); 42 dma_set_attr(DMA_ATTR_FORCE_CONTIGUOUS, &buf->dma_attrs);
56 43
57 /* 44 /*
@@ -66,14 +53,45 @@ static int lowlevel_buffer_allocate(struct drm_device *dev,
66 dma_set_attr(attr, &buf->dma_attrs); 53 dma_set_attr(attr, &buf->dma_attrs);
67 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &buf->dma_attrs); 54 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &buf->dma_attrs);
68 55
69 buf->pages = dma_alloc_attrs(dev->dev, buf->size, 56 nr_pages = buf->size >> PAGE_SHIFT;
70 &buf->dma_addr, GFP_KERNEL, &buf->dma_attrs); 57
71 if (!buf->pages) { 58 if (!is_drm_iommu_supported(dev)) {
72 DRM_ERROR("failed to allocate buffer.\n"); 59 dma_addr_t start_addr;
73 return -ENOMEM; 60 unsigned int i = 0;
61
62 buf->pages = kzalloc(sizeof(struct page) * nr_pages,
63 GFP_KERNEL);
64 if (!buf->pages) {
65 DRM_ERROR("failed to allocate pages.\n");
66 return -ENOMEM;
67 }
68
69 buf->kvaddr = dma_alloc_attrs(dev->dev, buf->size,
70 &buf->dma_addr, GFP_KERNEL,
71 &buf->dma_attrs);
72 if (!buf->kvaddr) {
73 DRM_ERROR("failed to allocate buffer.\n");
74 kfree(buf->pages);
75 return -ENOMEM;
76 }
77
78 start_addr = buf->dma_addr;
79 while (i < nr_pages) {
80 buf->pages[i] = phys_to_page(start_addr);
81 start_addr += PAGE_SIZE;
82 i++;
83 }
84 } else {
85
86 buf->pages = dma_alloc_attrs(dev->dev, buf->size,
87 &buf->dma_addr, GFP_KERNEL,
88 &buf->dma_attrs);
89 if (!buf->pages) {
90 DRM_ERROR("failed to allocate buffer.\n");
91 return -ENOMEM;
92 }
74 } 93 }
75 94
76 nr_pages = buf->size >> PAGE_SHIFT;
77 buf->sgt = drm_prime_pages_to_sg(buf->pages, nr_pages); 95 buf->sgt = drm_prime_pages_to_sg(buf->pages, nr_pages);
78 if (!buf->sgt) { 96 if (!buf->sgt) {
79 DRM_ERROR("failed to get sg table.\n"); 97 DRM_ERROR("failed to get sg table.\n");
@@ -92,6 +110,9 @@ err_free_attrs:
92 (dma_addr_t)buf->dma_addr, &buf->dma_attrs); 110 (dma_addr_t)buf->dma_addr, &buf->dma_attrs);
93 buf->dma_addr = (dma_addr_t)NULL; 111 buf->dma_addr = (dma_addr_t)NULL;
94 112
113 if (!is_drm_iommu_supported(dev))
114 kfree(buf->pages);
115
95 return ret; 116 return ret;
96} 117}
97 118
@@ -114,8 +135,14 @@ static void lowlevel_buffer_deallocate(struct drm_device *dev,
114 kfree(buf->sgt); 135 kfree(buf->sgt);
115 buf->sgt = NULL; 136 buf->sgt = NULL;
116 137
117 dma_free_attrs(dev->dev, buf->size, buf->pages, 138 if (!is_drm_iommu_supported(dev)) {
139 dma_free_attrs(dev->dev, buf->size, buf->kvaddr,
118 (dma_addr_t)buf->dma_addr, &buf->dma_attrs); 140 (dma_addr_t)buf->dma_addr, &buf->dma_attrs);
141 kfree(buf->pages);
142 } else
143 dma_free_attrs(dev->dev, buf->size, buf->pages,
144 (dma_addr_t)buf->dma_addr, &buf->dma_attrs);
145
119 buf->dma_addr = (dma_addr_t)NULL; 146 buf->dma_addr = (dma_addr_t)NULL;
120} 147}
121 148
diff --git a/drivers/gpu/drm/exynos/exynos_drm_buf.h b/drivers/gpu/drm/exynos/exynos_drm_buf.h
index 25cf1628503..a6412f19673 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_buf.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_buf.h
@@ -3,24 +3,10 @@
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * Author: Inki Dae <inki.dae@samsung.com> 4 * Author: Inki Dae <inki.dae@samsung.com>
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * This program is free software; you can redistribute it and/or modify it
7 * copy of this software and associated documentation files (the "Software"), 7 * under the terms of the GNU General Public License as published by the
8 * to deal in the Software without restriction, including without limitation 8 * Free Software Foundation; either version 2 of the License, or (at your
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * option) any later version.
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
23 * OTHER DEALINGS IN THE SOFTWARE.
24 */ 10 */
25 11
26#ifndef _EXYNOS_DRM_BUF_H_ 12#ifndef _EXYNOS_DRM_BUF_H_
diff --git a/drivers/gpu/drm/exynos/exynos_drm_connector.c b/drivers/gpu/drm/exynos/exynos_drm_connector.c
index 0f68a287267..ab37437bad8 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_connector.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_connector.c
@@ -5,24 +5,10 @@
5 * Joonyoung Shim <jy0922.shim@samsung.com> 5 * Joonyoung Shim <jy0922.shim@samsung.com>
6 * Seung-Woo Kim <sw0312.kim@samsung.com> 6 * Seung-Woo Kim <sw0312.kim@samsung.com>
7 * 7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a 8 * This program is free software; you can redistribute it and/or modify it
9 * copy of this software and associated documentation files (the "Software"), 9 * under the terms of the GNU General Public License as published by the
10 * to deal in the Software without restriction, including without limitation 10 * Free Software Foundation; either version 2 of the License, or (at your
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * option) any later version.
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 */ 12 */
27 13
28#include <drm/drmP.h> 14#include <drm/drmP.h>
diff --git a/drivers/gpu/drm/exynos/exynos_drm_connector.h b/drivers/gpu/drm/exynos/exynos_drm_connector.h
index 22f6cc442c3..547c6b59035 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_connector.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_connector.h
@@ -5,24 +5,10 @@
5 * Joonyoung Shim <jy0922.shim@samsung.com> 5 * Joonyoung Shim <jy0922.shim@samsung.com>
6 * Seung-Woo Kim <sw0312.kim@samsung.com> 6 * Seung-Woo Kim <sw0312.kim@samsung.com>
7 * 7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a 8 * This program is free software; you can redistribute it and/or modify it
9 * copy of this software and associated documentation files (the "Software"), 9 * under the terms of the GNU General Public License as published by the
10 * to deal in the Software without restriction, including without limitation 10 * Free Software Foundation; either version 2 of the License, or (at your
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * option) any later version.
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 */ 12 */
27 13
28#ifndef _EXYNOS_DRM_CONNECTOR_H_ 14#ifndef _EXYNOS_DRM_CONNECTOR_H_
diff --git a/drivers/gpu/drm/exynos/exynos_drm_core.c b/drivers/gpu/drm/exynos/exynos_drm_core.c
index 94026ad76a7..4667c9f67ac 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_core.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_core.c
@@ -6,24 +6,10 @@
6 * Joonyoung Shim <jy0922.shim@samsung.com> 6 * Joonyoung Shim <jy0922.shim@samsung.com>
7 * Seung-Woo Kim <sw0312.kim@samsung.com> 7 * Seung-Woo Kim <sw0312.kim@samsung.com>
8 * 8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a 9 * This program is free software; you can redistribute it and/or modify it
10 * copy of this software and associated documentation files (the "Software"), 10 * under the terms of the GNU General Public License as published by the
11 * to deal in the Software without restriction, including without limitation 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * option) any later version.
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
18 * Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
26 * OTHER DEALINGS IN THE SOFTWARE.
27 */ 13 */
28 14
29#include <drm/drmP.h> 15#include <drm/drmP.h>
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index 2efa4b031d7..e8894bc9e6d 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -6,24 +6,10 @@
6 * Joonyoung Shim <jy0922.shim@samsung.com> 6 * Joonyoung Shim <jy0922.shim@samsung.com>
7 * Seung-Woo Kim <sw0312.kim@samsung.com> 7 * Seung-Woo Kim <sw0312.kim@samsung.com>
8 * 8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a 9 * This program is free software; you can redistribute it and/or modify it
10 * copy of this software and associated documentation files (the "Software"), 10 * under the terms of the GNU General Public License as published by the
11 * to deal in the Software without restriction, including without limitation 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * option) any later version.
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
18 * Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
26 * OTHER DEALINGS IN THE SOFTWARE.
27 */ 13 */
28 14
29#include <drm/drmP.h> 15#include <drm/drmP.h>
@@ -407,3 +393,33 @@ void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int crtc)
407 exynos_drm_fn_encoder(private->crtc[crtc], &crtc, 393 exynos_drm_fn_encoder(private->crtc[crtc], &crtc,
408 exynos_drm_disable_vblank); 394 exynos_drm_disable_vblank);
409} 395}
396
397void exynos_drm_crtc_finish_pageflip(struct drm_device *dev, int crtc)
398{
399 struct exynos_drm_private *dev_priv = dev->dev_private;
400 struct drm_pending_vblank_event *e, *t;
401 struct timeval now;
402 unsigned long flags;
403
404 DRM_DEBUG_KMS("%s\n", __FILE__);
405
406 spin_lock_irqsave(&dev->event_lock, flags);
407
408 list_for_each_entry_safe(e, t, &dev_priv->pageflip_event_list,
409 base.link) {
410 /* if event's pipe isn't same as crtc then ignore it. */
411 if (crtc != e->pipe)
412 continue;
413
414 do_gettimeofday(&now);
415 e->event.sequence = 0;
416 e->event.tv_sec = now.tv_sec;
417 e->event.tv_usec = now.tv_usec;
418
419 list_move_tail(&e->base.link, &e->base.file_priv->event_list);
420 wake_up_interruptible(&e->base.file_priv->event_wait);
421 drm_vblank_put(dev, crtc);
422 }
423
424 spin_unlock_irqrestore(&dev->event_lock, flags);
425}
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.h b/drivers/gpu/drm/exynos/exynos_drm_crtc.h
index 6bae8d8c250..3e197e6ae7d 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.h
@@ -6,24 +6,10 @@
6 * Joonyoung Shim <jy0922.shim@samsung.com> 6 * Joonyoung Shim <jy0922.shim@samsung.com>
7 * Seung-Woo Kim <sw0312.kim@samsung.com> 7 * Seung-Woo Kim <sw0312.kim@samsung.com>
8 * 8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a 9 * This program is free software; you can redistribute it and/or modify it
10 * copy of this software and associated documentation files (the "Software"), 10 * under the terms of the GNU General Public License as published by the
11 * to deal in the Software without restriction, including without limitation 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * option) any later version.
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
18 * Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
26 * OTHER DEALINGS IN THE SOFTWARE.
27 */ 13 */
28 14
29#ifndef _EXYNOS_DRM_CRTC_H_ 15#ifndef _EXYNOS_DRM_CRTC_H_
@@ -32,5 +18,6 @@
32int exynos_drm_crtc_create(struct drm_device *dev, unsigned int nr); 18int exynos_drm_crtc_create(struct drm_device *dev, unsigned int nr);
33int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int crtc); 19int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int crtc);
34void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int crtc); 20void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int crtc);
21void exynos_drm_crtc_finish_pageflip(struct drm_device *dev, int crtc);
35 22
36#endif 23#endif
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
index 61d5a8402eb..9df97714b6c 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
@@ -3,24 +3,10 @@
3 * Copyright (c) 2012 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
4 * Author: Inki Dae <inki.dae@samsung.com> 4 * Author: Inki Dae <inki.dae@samsung.com>
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * This program is free software; you can redistribute it and/or modify it
7 * copy of this software and associated documentation files (the "Software"), 7 * under the terms of the GNU General Public License as published by the
8 * to deal in the Software without restriction, including without limitation 8 * Free Software Foundation; either version 2 of the License, or (at your
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * option) any later version.
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
23 * OTHER DEALINGS IN THE SOFTWARE.
24 */ 10 */
25 11
26#include <drm/drmP.h> 12#include <drm/drmP.h>
@@ -222,7 +208,7 @@ struct dma_buf *exynos_dmabuf_prime_export(struct drm_device *drm_dev,
222 struct exynos_drm_gem_obj *exynos_gem_obj = to_exynos_gem_obj(obj); 208 struct exynos_drm_gem_obj *exynos_gem_obj = to_exynos_gem_obj(obj);
223 209
224 return dma_buf_export(exynos_gem_obj, &exynos_dmabuf_ops, 210 return dma_buf_export(exynos_gem_obj, &exynos_dmabuf_ops,
225 exynos_gem_obj->base.size, 0600); 211 exynos_gem_obj->base.size, flags);
226} 212}
227 213
228struct drm_gem_object *exynos_dmabuf_prime_import(struct drm_device *drm_dev, 214struct drm_gem_object *exynos_dmabuf_prime_import(struct drm_device *drm_dev,
@@ -246,7 +232,12 @@ struct drm_gem_object *exynos_dmabuf_prime_import(struct drm_device *drm_dev,
246 232
247 /* is it from our device? */ 233 /* is it from our device? */
248 if (obj->dev == drm_dev) { 234 if (obj->dev == drm_dev) {
235 /*
236 * Importing dmabuf exported from out own gem increases
237 * refcount on gem itself instead of f_count of dmabuf.
238 */
249 drm_gem_object_reference(obj); 239 drm_gem_object_reference(obj);
240 dma_buf_put(dma_buf);
250 return obj; 241 return obj;
251 } 242 }
252 } 243 }
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.h b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.h
index 662a8f98ccd..49acfafb4fd 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.h
@@ -3,24 +3,10 @@
3 * Copyright (c) 2012 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
4 * Author: Inki Dae <inki.dae@samsung.com> 4 * Author: Inki Dae <inki.dae@samsung.com>
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * This program is free software; you can redistribute it and/or modify it
7 * copy of this software and associated documentation files (the "Software"), 7 * under the terms of the GNU General Public License as published by the
8 * to deal in the Software without restriction, including without limitation 8 * Free Software Foundation; either version 2 of the License, or (at your
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * option) any later version.
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
23 * OTHER DEALINGS IN THE SOFTWARE.
24 */ 10 */
25 11
26#ifndef _EXYNOS_DRM_DMABUF_H_ 12#ifndef _EXYNOS_DRM_DMABUF_H_
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index e0a8e8024b0..3da5c2d214d 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -5,24 +5,10 @@
5 * Joonyoung Shim <jy0922.shim@samsung.com> 5 * Joonyoung Shim <jy0922.shim@samsung.com>
6 * Seung-Woo Kim <sw0312.kim@samsung.com> 6 * Seung-Woo Kim <sw0312.kim@samsung.com>
7 * 7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a 8 * This program is free software; you can redistribute it and/or modify it
9 * copy of this software and associated documentation files (the "Software"), 9 * under the terms of the GNU General Public License as published by the
10 * to deal in the Software without restriction, including without limitation 10 * Free Software Foundation; either version 2 of the License, or (at your
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * option) any later version.
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 */ 12 */
27 13
28#include <drm/drmP.h> 14#include <drm/drmP.h>
@@ -325,7 +311,7 @@ static int exynos_drm_platform_remove(struct platform_device *pdev)
325 311
326static struct platform_driver exynos_drm_platform_driver = { 312static struct platform_driver exynos_drm_platform_driver = {
327 .probe = exynos_drm_platform_probe, 313 .probe = exynos_drm_platform_probe,
328 .remove = __devexit_p(exynos_drm_platform_remove), 314 .remove = exynos_drm_platform_remove,
329 .driver = { 315 .driver = {
330 .owner = THIS_MODULE, 316 .owner = THIS_MODULE,
331 .name = "exynos-drm", 317 .name = "exynos-drm",
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index f5a97745bf9..b9e51bc09e8 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -6,24 +6,10 @@
6 * Joonyoung Shim <jy0922.shim@samsung.com> 6 * Joonyoung Shim <jy0922.shim@samsung.com>
7 * Seung-Woo Kim <sw0312.kim@samsung.com> 7 * Seung-Woo Kim <sw0312.kim@samsung.com>
8 * 8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a 9 * This program is free software; you can redistribute it and/or modify it
10 * copy of this software and associated documentation files (the "Software"), 10 * under the terms of the GNU General Public License as published by the
11 * to deal in the Software without restriction, including without limitation 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * option) any later version.
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
18 * Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
26 * OTHER DEALINGS IN THE SOFTWARE.
27 */ 13 */
28 14
29#ifndef _EXYNOS_DRM_DRV_H_ 15#ifndef _EXYNOS_DRM_DRV_H_
diff --git a/drivers/gpu/drm/exynos/exynos_drm_encoder.c b/drivers/gpu/drm/exynos/exynos_drm_encoder.c
index 301485215a7..c63721f64ae 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_encoder.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_encoder.c
@@ -6,24 +6,10 @@
6 * Joonyoung Shim <jy0922.shim@samsung.com> 6 * Joonyoung Shim <jy0922.shim@samsung.com>
7 * Seung-Woo Kim <sw0312.kim@samsung.com> 7 * Seung-Woo Kim <sw0312.kim@samsung.com>
8 * 8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a 9 * This program is free software; you can redistribute it and/or modify it
10 * copy of this software and associated documentation files (the "Software"), 10 * under the terms of the GNU General Public License as published by the
11 * to deal in the Software without restriction, including without limitation 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * option) any later version.
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
18 * Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
26 * OTHER DEALINGS IN THE SOFTWARE.
27 */ 13 */
28 14
29#include <drm/drmP.h> 15#include <drm/drmP.h>
diff --git a/drivers/gpu/drm/exynos/exynos_drm_encoder.h b/drivers/gpu/drm/exynos/exynos_drm_encoder.h
index 88bb25a2a91..89e2fb0770a 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_encoder.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_encoder.h
@@ -5,24 +5,10 @@
5 * Joonyoung Shim <jy0922.shim@samsung.com> 5 * Joonyoung Shim <jy0922.shim@samsung.com>
6 * Seung-Woo Kim <sw0312.kim@samsung.com> 6 * Seung-Woo Kim <sw0312.kim@samsung.com>
7 * 7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a 8 * This program is free software; you can redistribute it and/or modify it
9 * copy of this software and associated documentation files (the "Software"), 9 * under the terms of the GNU General Public License as published by the
10 * to deal in the Software without restriction, including without limitation 10 * Free Software Foundation; either version 2 of the License, or (at your
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * option) any later version.
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 */ 12 */
27 13
28#ifndef _EXYNOS_DRM_ENCODER_H_ 14#ifndef _EXYNOS_DRM_ENCODER_H_
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.c b/drivers/gpu/drm/exynos/exynos_drm_fb.c
index 5426cc5a5e8..294c0513f58 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fb.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fb.c
@@ -6,24 +6,10 @@
6 * Joonyoung Shim <jy0922.shim@samsung.com> 6 * Joonyoung Shim <jy0922.shim@samsung.com>
7 * Seung-Woo Kim <sw0312.kim@samsung.com> 7 * Seung-Woo Kim <sw0312.kim@samsung.com>
8 * 8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a 9 * This program is free software; you can redistribute it and/or modify it
10 * copy of this software and associated documentation files (the "Software"), 10 * under the terms of the GNU General Public License as published by the
11 * to deal in the Software without restriction, including without limitation 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * option) any later version.
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
18 * Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
26 * OTHER DEALINGS IN THE SOFTWARE.
27 */ 13 */
28 14
29#include <drm/drmP.h> 15#include <drm/drmP.h>
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.h b/drivers/gpu/drm/exynos/exynos_drm_fb.h
index 96262e54f76..517471b3756 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fb.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_fb.h
@@ -5,24 +5,10 @@
5 * Joonyoung Shim <jy0922.shim@samsung.com> 5 * Joonyoung Shim <jy0922.shim@samsung.com>
6 * Seung-Woo Kim <sw0312.kim@samsung.com> 6 * Seung-Woo Kim <sw0312.kim@samsung.com>
7 * 7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a 8 * This program is free software; you can redistribute it and/or modify it
9 * copy of this software and associated documentation files (the "Software"), 9 * under the terms of the GNU General Public License as published by the
10 * to deal in the Software without restriction, including without limitation 10 * Free Software Foundation; either version 2 of the License, or (at your
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * option) any later version.
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 */ 12 */
27 13
28#ifndef _EXYNOS_DRM_FB_H_ 14#ifndef _EXYNOS_DRM_FB_H_
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
index f433eb7533a..71f867340a8 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
@@ -6,24 +6,10 @@
6 * Joonyoung Shim <jy0922.shim@samsung.com> 6 * Joonyoung Shim <jy0922.shim@samsung.com>
7 * Seung-Woo Kim <sw0312.kim@samsung.com> 7 * Seung-Woo Kim <sw0312.kim@samsung.com>
8 * 8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a 9 * This program is free software; you can redistribute it and/or modify it
10 * copy of this software and associated documentation files (the "Software"), 10 * under the terms of the GNU General Public License as published by the
11 * to deal in the Software without restriction, including without limitation 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * option) any later version.
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
18 * Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
26 * OTHER DEALINGS IN THE SOFTWARE.
27 */ 13 */
28 14
29#include <drm/drmP.h> 15#include <drm/drmP.h>
@@ -34,6 +20,7 @@
34#include "exynos_drm_drv.h" 20#include "exynos_drm_drv.h"
35#include "exynos_drm_fb.h" 21#include "exynos_drm_fb.h"
36#include "exynos_drm_gem.h" 22#include "exynos_drm_gem.h"
23#include "exynos_drm_iommu.h"
37 24
38#define MAX_CONNECTOR 4 25#define MAX_CONNECTOR 4
39#define PREFERRED_BPP 32 26#define PREFERRED_BPP 32
@@ -111,9 +98,18 @@ static int exynos_drm_fbdev_update(struct drm_fb_helper *helper,
111 98
112 /* map pages with kernel virtual space. */ 99 /* map pages with kernel virtual space. */
113 if (!buffer->kvaddr) { 100 if (!buffer->kvaddr) {
114 unsigned int nr_pages = buffer->size >> PAGE_SHIFT; 101 if (is_drm_iommu_supported(dev)) {
115 buffer->kvaddr = vmap(buffer->pages, nr_pages, VM_MAP, 102 unsigned int nr_pages = buffer->size >> PAGE_SHIFT;
103
104 buffer->kvaddr = vmap(buffer->pages, nr_pages, VM_MAP,
116 pgprot_writecombine(PAGE_KERNEL)); 105 pgprot_writecombine(PAGE_KERNEL));
106 } else {
107 phys_addr_t dma_addr = buffer->dma_addr;
108 if (dma_addr)
109 buffer->kvaddr = phys_to_virt(dma_addr);
110 else
111 buffer->kvaddr = (void __iomem *)NULL;
112 }
117 if (!buffer->kvaddr) { 113 if (!buffer->kvaddr) {
118 DRM_ERROR("failed to map pages to kernel space.\n"); 114 DRM_ERROR("failed to map pages to kernel space.\n");
119 return -EIO; 115 return -EIO;
@@ -128,8 +124,12 @@ static int exynos_drm_fbdev_update(struct drm_fb_helper *helper,
128 124
129 dev->mode_config.fb_base = (resource_size_t)buffer->dma_addr; 125 dev->mode_config.fb_base = (resource_size_t)buffer->dma_addr;
130 fbi->screen_base = buffer->kvaddr + offset; 126 fbi->screen_base = buffer->kvaddr + offset;
131 fbi->fix.smem_start = (unsigned long) 127 if (is_drm_iommu_supported(dev))
128 fbi->fix.smem_start = (unsigned long)
132 (page_to_phys(sg_page(buffer->sgt->sgl)) + offset); 129 (page_to_phys(sg_page(buffer->sgt->sgl)) + offset);
130 else
131 fbi->fix.smem_start = (unsigned long)buffer->dma_addr;
132
133 fbi->screen_size = size; 133 fbi->screen_size = size;
134 fbi->fix.smem_len = size; 134 fbi->fix.smem_len = size;
135 135
@@ -320,7 +320,7 @@ static void exynos_drm_fbdev_destroy(struct drm_device *dev,
320 struct exynos_drm_gem_obj *exynos_gem_obj = exynos_fbd->exynos_gem_obj; 320 struct exynos_drm_gem_obj *exynos_gem_obj = exynos_fbd->exynos_gem_obj;
321 struct drm_framebuffer *fb; 321 struct drm_framebuffer *fb;
322 322
323 if (exynos_gem_obj->buffer->kvaddr) 323 if (is_drm_iommu_supported(dev) && exynos_gem_obj->buffer->kvaddr)
324 vunmap(exynos_gem_obj->buffer->kvaddr); 324 vunmap(exynos_gem_obj->buffer->kvaddr);
325 325
326 /* release drm framebuffer and real buffer */ 326 /* release drm framebuffer and real buffer */
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fbdev.h b/drivers/gpu/drm/exynos/exynos_drm_fbdev.h
index ccfce8a1a45..e16d7f0ae19 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fbdev.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_fbdev.h
@@ -6,24 +6,10 @@
6 * Joonyoung Shim <jy0922.shim@samsung.com> 6 * Joonyoung Shim <jy0922.shim@samsung.com>
7 * Seung-Woo Kim <sw0312.kim@samsung.com> 7 * Seung-Woo Kim <sw0312.kim@samsung.com>
8 * 8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a 9 * This program is free software; you can redistribute it and/or modify it
10 * copy of this software and associated documentation files (the "Software"), 10 * under the terms of the GNU General Public License as published by the
11 * to deal in the Software without restriction, including without limitation 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * option) any later version.
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
18 * Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
26 * OTHER DEALINGS IN THE SOFTWARE.
27 */ 13 */
28 14
29#ifndef _EXYNOS_DRM_FBDEV_H_ 15#ifndef _EXYNOS_DRM_FBDEV_H_
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
index 61ea24296b5..67a83e69544 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
@@ -25,7 +25,7 @@
25#include "exynos_drm_fimc.h" 25#include "exynos_drm_fimc.h"
26 26
27/* 27/*
28 * FIMC is stand for Fully Interactive Mobile Camera and 28 * FIMC stands for Fully Interactive Mobile Camera and
29 * supports image scaler/rotator and input/output DMA operations. 29 * supports image scaler/rotator and input/output DMA operations.
30 * input DMA reads image data from the memory. 30 * input DMA reads image data from the memory.
31 * output DMA writes image data to memory. 31 * output DMA writes image data to memory.
@@ -163,19 +163,29 @@ struct fimc_context {
163 bool suspended; 163 bool suspended;
164}; 164};
165 165
166static void fimc_sw_reset(struct fimc_context *ctx, bool pattern) 166static void fimc_sw_reset(struct fimc_context *ctx)
167{ 167{
168 u32 cfg; 168 u32 cfg;
169 169
170 DRM_DEBUG_KMS("%s:pattern[%d]\n", __func__, pattern); 170 DRM_DEBUG_KMS("%s\n", __func__);
171
172 /* stop dma operation */
173 cfg = fimc_read(EXYNOS_CISTATUS);
174 if (EXYNOS_CISTATUS_GET_ENVID_STATUS(cfg)) {
175 cfg = fimc_read(EXYNOS_MSCTRL);
176 cfg &= ~EXYNOS_MSCTRL_ENVID;
177 fimc_write(cfg, EXYNOS_MSCTRL);
178 }
171 179
172 cfg = fimc_read(EXYNOS_CISRCFMT); 180 cfg = fimc_read(EXYNOS_CISRCFMT);
173 cfg |= EXYNOS_CISRCFMT_ITU601_8BIT; 181 cfg |= EXYNOS_CISRCFMT_ITU601_8BIT;
174 if (pattern)
175 cfg |= EXYNOS_CIGCTRL_TESTPATTERN_COLOR_BAR;
176
177 fimc_write(cfg, EXYNOS_CISRCFMT); 182 fimc_write(cfg, EXYNOS_CISRCFMT);
178 183
184 /* disable image capture */
185 cfg = fimc_read(EXYNOS_CIIMGCPT);
186 cfg &= ~(EXYNOS_CIIMGCPT_IMGCPTEN_SC | EXYNOS_CIIMGCPT_IMGCPTEN);
187 fimc_write(cfg, EXYNOS_CIIMGCPT);
188
179 /* s/w reset */ 189 /* s/w reset */
180 cfg = fimc_read(EXYNOS_CIGCTRL); 190 cfg = fimc_read(EXYNOS_CIGCTRL);
181 cfg |= (EXYNOS_CIGCTRL_SWRST); 191 cfg |= (EXYNOS_CIGCTRL_SWRST);
@@ -695,7 +705,7 @@ static int fimc_src_set_addr(struct device *dev,
695{ 705{
696 struct fimc_context *ctx = get_fimc_context(dev); 706 struct fimc_context *ctx = get_fimc_context(dev);
697 struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; 707 struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv;
698 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->cmd; 708 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->c_node;
699 struct drm_exynos_ipp_property *property; 709 struct drm_exynos_ipp_property *property;
700 struct drm_exynos_ipp_config *config; 710 struct drm_exynos_ipp_config *config;
701 711
@@ -705,10 +715,6 @@ static int fimc_src_set_addr(struct device *dev,
705 } 715 }
706 716
707 property = &c_node->property; 717 property = &c_node->property;
708 if (!property) {
709 DRM_ERROR("failed to get property.\n");
710 return -EINVAL;
711 }
712 718
713 DRM_DEBUG_KMS("%s:prop_id[%d]buf_id[%d]buf_type[%d]\n", __func__, 719 DRM_DEBUG_KMS("%s:prop_id[%d]buf_id[%d]buf_type[%d]\n", __func__,
714 property->prop_id, buf_id, buf_type); 720 property->prop_id, buf_id, buf_type);
@@ -1206,7 +1212,7 @@ static int fimc_dst_set_buf_seq(struct fimc_context *ctx, u32 buf_id,
1206 } 1212 }
1207 1213
1208 /* sequence id */ 1214 /* sequence id */
1209 cfg &= (~mask); 1215 cfg &= ~mask;
1210 cfg |= (enable << buf_id); 1216 cfg |= (enable << buf_id);
1211 fimc_write(cfg, EXYNOS_CIFCNTSEQ); 1217 fimc_write(cfg, EXYNOS_CIFCNTSEQ);
1212 1218
@@ -1231,7 +1237,7 @@ static int fimc_dst_set_addr(struct device *dev,
1231{ 1237{
1232 struct fimc_context *ctx = get_fimc_context(dev); 1238 struct fimc_context *ctx = get_fimc_context(dev);
1233 struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; 1239 struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv;
1234 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->cmd; 1240 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->c_node;
1235 struct drm_exynos_ipp_property *property; 1241 struct drm_exynos_ipp_property *property;
1236 struct drm_exynos_ipp_config *config; 1242 struct drm_exynos_ipp_config *config;
1237 1243
@@ -1241,10 +1247,6 @@ static int fimc_dst_set_addr(struct device *dev,
1241 } 1247 }
1242 1248
1243 property = &c_node->property; 1249 property = &c_node->property;
1244 if (!property) {
1245 DRM_ERROR("failed to get property.\n");
1246 return -EINVAL;
1247 }
1248 1250
1249 DRM_DEBUG_KMS("%s:prop_id[%d]buf_id[%d]buf_type[%d]\n", __func__, 1251 DRM_DEBUG_KMS("%s:prop_id[%d]buf_id[%d]buf_type[%d]\n", __func__,
1250 property->prop_id, buf_id, buf_type); 1252 property->prop_id, buf_id, buf_type);
@@ -1317,7 +1319,7 @@ static irqreturn_t fimc_irq_handler(int irq, void *dev_id)
1317{ 1319{
1318 struct fimc_context *ctx = dev_id; 1320 struct fimc_context *ctx = dev_id;
1319 struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; 1321 struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv;
1320 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->cmd; 1322 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->c_node;
1321 struct drm_exynos_ipp_event_work *event_work = 1323 struct drm_exynos_ipp_event_work *event_work =
1322 c_node->event_work; 1324 c_node->event_work;
1323 int buf_id; 1325 int buf_id;
@@ -1395,6 +1397,7 @@ static inline bool fimc_check_drm_flip(enum drm_exynos_flip flip)
1395 case EXYNOS_DRM_FLIP_NONE: 1397 case EXYNOS_DRM_FLIP_NONE:
1396 case EXYNOS_DRM_FLIP_VERTICAL: 1398 case EXYNOS_DRM_FLIP_VERTICAL:
1397 case EXYNOS_DRM_FLIP_HORIZONTAL: 1399 case EXYNOS_DRM_FLIP_HORIZONTAL:
1400 case EXYNOS_DRM_FLIP_BOTH:
1398 return true; 1401 return true;
1399 default: 1402 default:
1400 DRM_DEBUG_KMS("%s:invalid flip\n", __func__); 1403 DRM_DEBUG_KMS("%s:invalid flip\n", __func__);
@@ -1543,7 +1546,7 @@ static int fimc_ippdrv_reset(struct device *dev)
1543 DRM_DEBUG_KMS("%s\n", __func__); 1546 DRM_DEBUG_KMS("%s\n", __func__);
1544 1547
1545 /* reset h/w block */ 1548 /* reset h/w block */
1546 fimc_sw_reset(ctx, false); 1549 fimc_sw_reset(ctx);
1547 1550
1548 /* reset scaler capability */ 1551 /* reset scaler capability */
1549 memset(&ctx->sc, 0x0, sizeof(ctx->sc)); 1552 memset(&ctx->sc, 0x0, sizeof(ctx->sc));
@@ -1557,7 +1560,7 @@ static int fimc_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd)
1557{ 1560{
1558 struct fimc_context *ctx = get_fimc_context(dev); 1561 struct fimc_context *ctx = get_fimc_context(dev);
1559 struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; 1562 struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv;
1560 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->cmd; 1563 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->c_node;
1561 struct drm_exynos_ipp_property *property; 1564 struct drm_exynos_ipp_property *property;
1562 struct drm_exynos_ipp_config *config; 1565 struct drm_exynos_ipp_config *config;
1563 struct drm_exynos_pos img_pos[EXYNOS_DRM_OPS_MAX]; 1566 struct drm_exynos_pos img_pos[EXYNOS_DRM_OPS_MAX];
@@ -1573,10 +1576,6 @@ static int fimc_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd)
1573 } 1576 }
1574 1577
1575 property = &c_node->property; 1578 property = &c_node->property;
1576 if (!property) {
1577 DRM_ERROR("failed to get property.\n");
1578 return -EINVAL;
1579 }
1580 1579
1581 fimc_handle_irq(ctx, true, false, true); 1580 fimc_handle_irq(ctx, true, false, true);
1582 1581
@@ -1714,7 +1713,7 @@ static void fimc_ippdrv_stop(struct device *dev, enum drm_exynos_ipp_cmd cmd)
1714 fimc_write(cfg, EXYNOS_CIGCTRL); 1713 fimc_write(cfg, EXYNOS_CIGCTRL);
1715} 1714}
1716 1715
1717static int __devinit fimc_probe(struct platform_device *pdev) 1716static int fimc_probe(struct platform_device *pdev)
1718{ 1717{
1719 struct device *dev = &pdev->dev; 1718 struct device *dev = &pdev->dev;
1720 struct fimc_context *ctx; 1719 struct fimc_context *ctx;
@@ -1739,93 +1738,64 @@ static int __devinit fimc_probe(struct platform_device *pdev)
1739 platform_get_device_id(pdev)->driver_data; 1738 platform_get_device_id(pdev)->driver_data;
1740 1739
1741 /* clock control */ 1740 /* clock control */
1742 ctx->sclk_fimc_clk = clk_get(dev, "sclk_fimc"); 1741 ctx->sclk_fimc_clk = devm_clk_get(dev, "sclk_fimc");
1743 if (IS_ERR(ctx->sclk_fimc_clk)) { 1742 if (IS_ERR(ctx->sclk_fimc_clk)) {
1744 dev_err(dev, "failed to get src fimc clock.\n"); 1743 dev_err(dev, "failed to get src fimc clock.\n");
1745 ret = PTR_ERR(ctx->sclk_fimc_clk); 1744 return PTR_ERR(ctx->sclk_fimc_clk);
1746 goto err_ctx;
1747 } 1745 }
1748 clk_enable(ctx->sclk_fimc_clk); 1746 clk_enable(ctx->sclk_fimc_clk);
1749 1747
1750 ctx->fimc_clk = clk_get(dev, "fimc"); 1748 ctx->fimc_clk = devm_clk_get(dev, "fimc");
1751 if (IS_ERR(ctx->fimc_clk)) { 1749 if (IS_ERR(ctx->fimc_clk)) {
1752 dev_err(dev, "failed to get fimc clock.\n"); 1750 dev_err(dev, "failed to get fimc clock.\n");
1753 ret = PTR_ERR(ctx->fimc_clk);
1754 clk_disable(ctx->sclk_fimc_clk); 1751 clk_disable(ctx->sclk_fimc_clk);
1755 clk_put(ctx->sclk_fimc_clk); 1752 return PTR_ERR(ctx->fimc_clk);
1756 goto err_ctx;
1757 } 1753 }
1758 1754
1759 ctx->wb_clk = clk_get(dev, "pxl_async0"); 1755 ctx->wb_clk = devm_clk_get(dev, "pxl_async0");
1760 if (IS_ERR(ctx->wb_clk)) { 1756 if (IS_ERR(ctx->wb_clk)) {
1761 dev_err(dev, "failed to get writeback a clock.\n"); 1757 dev_err(dev, "failed to get writeback a clock.\n");
1762 ret = PTR_ERR(ctx->wb_clk);
1763 clk_disable(ctx->sclk_fimc_clk); 1758 clk_disable(ctx->sclk_fimc_clk);
1764 clk_put(ctx->sclk_fimc_clk); 1759 return PTR_ERR(ctx->wb_clk);
1765 clk_put(ctx->fimc_clk);
1766 goto err_ctx;
1767 } 1760 }
1768 1761
1769 ctx->wb_b_clk = clk_get(dev, "pxl_async1"); 1762 ctx->wb_b_clk = devm_clk_get(dev, "pxl_async1");
1770 if (IS_ERR(ctx->wb_b_clk)) { 1763 if (IS_ERR(ctx->wb_b_clk)) {
1771 dev_err(dev, "failed to get writeback b clock.\n"); 1764 dev_err(dev, "failed to get writeback b clock.\n");
1772 ret = PTR_ERR(ctx->wb_b_clk);
1773 clk_disable(ctx->sclk_fimc_clk); 1765 clk_disable(ctx->sclk_fimc_clk);
1774 clk_put(ctx->sclk_fimc_clk); 1766 return PTR_ERR(ctx->wb_b_clk);
1775 clk_put(ctx->fimc_clk);
1776 clk_put(ctx->wb_clk);
1777 goto err_ctx;
1778 } 1767 }
1779 1768
1780 parent_clk = clk_get(dev, ddata->parent_clk); 1769 parent_clk = devm_clk_get(dev, ddata->parent_clk);
1781 1770
1782 if (IS_ERR(parent_clk)) { 1771 if (IS_ERR(parent_clk)) {
1783 dev_err(dev, "failed to get parent clock.\n"); 1772 dev_err(dev, "failed to get parent clock.\n");
1784 ret = PTR_ERR(parent_clk);
1785 clk_disable(ctx->sclk_fimc_clk); 1773 clk_disable(ctx->sclk_fimc_clk);
1786 clk_put(ctx->sclk_fimc_clk); 1774 return PTR_ERR(parent_clk);
1787 clk_put(ctx->fimc_clk);
1788 clk_put(ctx->wb_clk);
1789 clk_put(ctx->wb_b_clk);
1790 goto err_ctx;
1791 } 1775 }
1792 1776
1793 if (clk_set_parent(ctx->sclk_fimc_clk, parent_clk)) { 1777 if (clk_set_parent(ctx->sclk_fimc_clk, parent_clk)) {
1794 dev_err(dev, "failed to set parent.\n"); 1778 dev_err(dev, "failed to set parent.\n");
1795 ret = -EINVAL;
1796 clk_put(parent_clk);
1797 clk_disable(ctx->sclk_fimc_clk); 1779 clk_disable(ctx->sclk_fimc_clk);
1798 clk_put(ctx->sclk_fimc_clk); 1780 return -EINVAL;
1799 clk_put(ctx->fimc_clk);
1800 clk_put(ctx->wb_clk);
1801 clk_put(ctx->wb_b_clk);
1802 goto err_ctx;
1803 } 1781 }
1804 1782
1805 clk_put(parent_clk); 1783 devm_clk_put(dev, parent_clk);
1806 clk_set_rate(ctx->sclk_fimc_clk, pdata->clk_rate); 1784 clk_set_rate(ctx->sclk_fimc_clk, pdata->clk_rate);
1807 1785
1808 /* resource memory */ 1786 /* resource memory */
1809 ctx->regs_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1787 ctx->regs_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1810 if (!ctx->regs_res) {
1811 dev_err(dev, "failed to find registers.\n");
1812 ret = -ENOENT;
1813 goto err_clk;
1814 }
1815
1816 ctx->regs = devm_request_and_ioremap(dev, ctx->regs_res); 1788 ctx->regs = devm_request_and_ioremap(dev, ctx->regs_res);
1817 if (!ctx->regs) { 1789 if (!ctx->regs) {
1818 dev_err(dev, "failed to map registers.\n"); 1790 dev_err(dev, "failed to map registers.\n");
1819 ret = -ENXIO; 1791 return -ENXIO;
1820 goto err_clk;
1821 } 1792 }
1822 1793
1823 /* resource irq */ 1794 /* resource irq */
1824 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1795 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1825 if (!res) { 1796 if (!res) {
1826 dev_err(dev, "failed to request irq resource.\n"); 1797 dev_err(dev, "failed to request irq resource.\n");
1827 ret = -ENOENT; 1798 return -ENOENT;
1828 goto err_get_regs;
1829 } 1799 }
1830 1800
1831 ctx->irq = res->start; 1801 ctx->irq = res->start;
@@ -1833,7 +1803,7 @@ static int __devinit fimc_probe(struct platform_device *pdev)
1833 IRQF_ONESHOT, "drm_fimc", ctx); 1803 IRQF_ONESHOT, "drm_fimc", ctx);
1834 if (ret < 0) { 1804 if (ret < 0) {
1835 dev_err(dev, "failed to request irq.\n"); 1805 dev_err(dev, "failed to request irq.\n");
1836 goto err_get_regs; 1806 return ret;
1837 } 1807 }
1838 1808
1839 /* context initailization */ 1809 /* context initailization */
@@ -1879,19 +1849,11 @@ err_ippdrv_register:
1879 pm_runtime_disable(dev); 1849 pm_runtime_disable(dev);
1880err_get_irq: 1850err_get_irq:
1881 free_irq(ctx->irq, ctx); 1851 free_irq(ctx->irq, ctx);
1882err_get_regs: 1852
1883 devm_iounmap(dev, ctx->regs);
1884err_clk:
1885 clk_put(ctx->sclk_fimc_clk);
1886 clk_put(ctx->fimc_clk);
1887 clk_put(ctx->wb_clk);
1888 clk_put(ctx->wb_b_clk);
1889err_ctx:
1890 devm_kfree(dev, ctx);
1891 return ret; 1853 return ret;
1892} 1854}
1893 1855
1894static int __devexit fimc_remove(struct platform_device *pdev) 1856static int fimc_remove(struct platform_device *pdev)
1895{ 1857{
1896 struct device *dev = &pdev->dev; 1858 struct device *dev = &pdev->dev;
1897 struct fimc_context *ctx = get_fimc_context(dev); 1859 struct fimc_context *ctx = get_fimc_context(dev);
@@ -1905,14 +1867,6 @@ static int __devexit fimc_remove(struct platform_device *pdev)
1905 pm_runtime_disable(dev); 1867 pm_runtime_disable(dev);
1906 1868
1907 free_irq(ctx->irq, ctx); 1869 free_irq(ctx->irq, ctx);
1908 devm_iounmap(dev, ctx->regs);
1909
1910 clk_put(ctx->sclk_fimc_clk);
1911 clk_put(ctx->fimc_clk);
1912 clk_put(ctx->wb_clk);
1913 clk_put(ctx->wb_b_clk);
1914
1915 devm_kfree(dev, ctx);
1916 1870
1917 return 0; 1871 return 0;
1918} 1872}
@@ -1990,7 +1944,7 @@ static const struct dev_pm_ops fimc_pm_ops = {
1990 1944
1991struct platform_driver fimc_driver = { 1945struct platform_driver fimc_driver = {
1992 .probe = fimc_probe, 1946 .probe = fimc_probe,
1993 .remove = __devexit_p(fimc_remove), 1947 .remove = fimc_remove,
1994 .id_table = fimc_driver_ids, 1948 .id_table = fimc_driver_ids,
1995 .driver = { 1949 .driver = {
1996 .name = "exynos-drm-fimc", 1950 .name = "exynos-drm-fimc",
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.h b/drivers/gpu/drm/exynos/exynos_drm_fimc.h
index dc970fa0d88..127a424c5fd 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimc.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.h
@@ -6,24 +6,10 @@
6 * Jinyoung Jeon <jy0.jeon@samsung.com> 6 * Jinyoung Jeon <jy0.jeon@samsung.com>
7 * Sangmin Lee <lsmin.lee@samsung.com> 7 * Sangmin Lee <lsmin.lee@samsung.com>
8 * 8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a 9 * This program is free software; you can redistribute it and/or modify it
10 * copy of this software and associated documentation files (the "Software"), 10 * under the terms of the GNU General Public License as published by the
11 * to deal in the Software without restriction, including without limitation 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * option) any later version.
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
18 * Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
26 * OTHER DEALINGS IN THE SOFTWARE.
27 */ 13 */
28 14
29#ifndef _EXYNOS_DRM_FIMC_H_ 15#ifndef _EXYNOS_DRM_FIMC_H_
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index bf0d9baca2b..9537761931e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -663,34 +663,6 @@ static struct exynos_drm_manager fimd_manager = {
663 .display_ops = &fimd_display_ops, 663 .display_ops = &fimd_display_ops,
664}; 664};
665 665
666static void fimd_finish_pageflip(struct drm_device *drm_dev, int crtc)
667{
668 struct exynos_drm_private *dev_priv = drm_dev->dev_private;
669 struct drm_pending_vblank_event *e, *t;
670 struct timeval now;
671 unsigned long flags;
672
673 spin_lock_irqsave(&drm_dev->event_lock, flags);
674
675 list_for_each_entry_safe(e, t, &dev_priv->pageflip_event_list,
676 base.link) {
677 /* if event's pipe isn't same as crtc then ignore it. */
678 if (crtc != e->pipe)
679 continue;
680
681 do_gettimeofday(&now);
682 e->event.sequence = 0;
683 e->event.tv_sec = now.tv_sec;
684 e->event.tv_usec = now.tv_usec;
685
686 list_move_tail(&e->base.link, &e->base.file_priv->event_list);
687 wake_up_interruptible(&e->base.file_priv->event_wait);
688 drm_vblank_put(drm_dev, crtc);
689 }
690
691 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
692}
693
694static irqreturn_t fimd_irq_handler(int irq, void *dev_id) 666static irqreturn_t fimd_irq_handler(int irq, void *dev_id)
695{ 667{
696 struct fimd_context *ctx = (struct fimd_context *)dev_id; 668 struct fimd_context *ctx = (struct fimd_context *)dev_id;
@@ -710,7 +682,7 @@ static irqreturn_t fimd_irq_handler(int irq, void *dev_id)
710 goto out; 682 goto out;
711 683
712 drm_handle_vblank(drm_dev, manager->pipe); 684 drm_handle_vblank(drm_dev, manager->pipe);
713 fimd_finish_pageflip(drm_dev, manager->pipe); 685 exynos_drm_crtc_finish_pageflip(drm_dev, manager->pipe);
714 686
715 /* set wait vsync event to zero and wake up queue. */ 687 /* set wait vsync event to zero and wake up queue. */
716 if (atomic_read(&ctx->wait_vsync_event)) { 688 if (atomic_read(&ctx->wait_vsync_event)) {
@@ -898,7 +870,7 @@ static int fimd_activate(struct fimd_context *ctx, bool enable)
898 return 0; 870 return 0;
899} 871}
900 872
901static int __devinit fimd_probe(struct platform_device *pdev) 873static int fimd_probe(struct platform_device *pdev)
902{ 874{
903 struct device *dev = &pdev->dev; 875 struct device *dev = &pdev->dev;
904 struct fimd_context *ctx; 876 struct fimd_context *ctx;
@@ -997,7 +969,7 @@ static int __devinit fimd_probe(struct platform_device *pdev)
997 return 0; 969 return 0;
998} 970}
999 971
1000static int __devexit fimd_remove(struct platform_device *pdev) 972static int fimd_remove(struct platform_device *pdev)
1001{ 973{
1002 struct device *dev = &pdev->dev; 974 struct device *dev = &pdev->dev;
1003 struct fimd_context *ctx = platform_get_drvdata(pdev); 975 struct fimd_context *ctx = platform_get_drvdata(pdev);
@@ -1046,7 +1018,7 @@ static int fimd_resume(struct device *dev)
1046 * of pm runtime would still be 1 so in this case, fimd driver 1018 * of pm runtime would still be 1 so in this case, fimd driver
1047 * should be on directly not drawing on pm runtime interface. 1019 * should be on directly not drawing on pm runtime interface.
1048 */ 1020 */
1049 if (pm_runtime_suspended(dev)) { 1021 if (!pm_runtime_suspended(dev)) {
1050 int ret; 1022 int ret;
1051 1023
1052 ret = fimd_activate(ctx, true); 1024 ret = fimd_activate(ctx, true);
@@ -1105,7 +1077,7 @@ static const struct dev_pm_ops fimd_pm_ops = {
1105 1077
1106struct platform_driver fimd_driver = { 1078struct platform_driver fimd_driver = {
1107 .probe = fimd_probe, 1079 .probe = fimd_probe,
1108 .remove = __devexit_p(fimd_remove), 1080 .remove = fimd_remove,
1109 .id_table = fimd_driver_ids, 1081 .id_table = fimd_driver_ids,
1110 .driver = { 1082 .driver = {
1111 .name = "exynos4-fb", 1083 .name = "exynos4-fb",
diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index 6ffa0763c07..36c3905536a 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
@@ -1090,7 +1090,7 @@ static void g2d_close(struct drm_device *drm_dev, struct device *dev,
1090 kfree(file_priv->g2d_priv); 1090 kfree(file_priv->g2d_priv);
1091} 1091}
1092 1092
1093static int __devinit g2d_probe(struct platform_device *pdev) 1093static int g2d_probe(struct platform_device *pdev)
1094{ 1094{
1095 struct device *dev = &pdev->dev; 1095 struct device *dev = &pdev->dev;
1096 struct resource *res; 1096 struct resource *res;
@@ -1188,7 +1188,7 @@ err_destroy_slab:
1188 return ret; 1188 return ret;
1189} 1189}
1190 1190
1191static int __devexit g2d_remove(struct platform_device *pdev) 1191static int g2d_remove(struct platform_device *pdev)
1192{ 1192{
1193 struct g2d_data *g2d = platform_get_drvdata(pdev); 1193 struct g2d_data *g2d = platform_get_drvdata(pdev);
1194 1194
@@ -1242,7 +1242,7 @@ static SIMPLE_DEV_PM_OPS(g2d_pm_ops, g2d_suspend, g2d_resume);
1242 1242
1243struct platform_driver g2d_driver = { 1243struct platform_driver g2d_driver = {
1244 .probe = g2d_probe, 1244 .probe = g2d_probe,
1245 .remove = __devexit_p(g2d_remove), 1245 .remove = g2d_remove,
1246 .driver = { 1246 .driver = {
1247 .name = "s5p-g2d", 1247 .name = "s5p-g2d",
1248 .owner = THIS_MODULE, 1248 .owner = THIS_MODULE,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.c b/drivers/gpu/drm/exynos/exynos_drm_gem.c
index d48183e7e05..47318077652 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.c
@@ -3,24 +3,10 @@
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * Author: Inki Dae <inki.dae@samsung.com> 4 * Author: Inki Dae <inki.dae@samsung.com>
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * This program is free software; you can redistribute it and/or modify it
7 * copy of this software and associated documentation files (the "Software"), 7 * under the terms of the GNU General Public License as published by the
8 * to deal in the Software without restriction, including without limitation 8 * Free Software Foundation; either version 2 of the License, or (at your
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * option) any later version.
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
23 * OTHER DEALINGS IN THE SOFTWARE.
24 */ 10 */
25 11
26#include <drm/drmP.h> 12#include <drm/drmP.h>
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.h b/drivers/gpu/drm/exynos/exynos_drm_gem.h
index f11f2afd5bf..35ebac47dc2 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.h
@@ -3,24 +3,10 @@
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * Authoer: Inki Dae <inki.dae@samsung.com> 4 * Authoer: Inki Dae <inki.dae@samsung.com>
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * This program is free software; you can redistribute it and/or modify it
7 * copy of this software and associated documentation files (the "Software"), 7 * under the terms of the GNU General Public License as published by the
8 * to deal in the Software without restriction, including without limitation 8 * Free Software Foundation; either version 2 of the License, or (at your
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * option) any later version.
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
23 * OTHER DEALINGS IN THE SOFTWARE.
24 */ 10 */
25 11
26#ifndef _EXYNOS_DRM_GEM_H_ 12#ifndef _EXYNOS_DRM_GEM_H_
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gsc.c b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
index 5639353d47b..8140753ec9c 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gsc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gsc.c
@@ -25,7 +25,7 @@
25#include "exynos_drm_gsc.h" 25#include "exynos_drm_gsc.h"
26 26
27/* 27/*
28 * GSC is stand for General SCaler and 28 * GSC stands for General SCaler and
29 * supports image scaler/rotator and input/output DMA operations. 29 * supports image scaler/rotator and input/output DMA operations.
30 * input DMA reads image data from the memory. 30 * input DMA reads image data from the memory.
31 * output DMA writes image data to memory. 31 * output DMA writes image data to memory.
@@ -711,7 +711,7 @@ static int gsc_src_set_addr(struct device *dev,
711{ 711{
712 struct gsc_context *ctx = get_gsc_context(dev); 712 struct gsc_context *ctx = get_gsc_context(dev);
713 struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; 713 struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv;
714 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->cmd; 714 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->c_node;
715 struct drm_exynos_ipp_property *property; 715 struct drm_exynos_ipp_property *property;
716 716
717 if (!c_node) { 717 if (!c_node) {
@@ -720,10 +720,6 @@ static int gsc_src_set_addr(struct device *dev,
720 } 720 }
721 721
722 property = &c_node->property; 722 property = &c_node->property;
723 if (!property) {
724 DRM_ERROR("failed to get property.\n");
725 return -EFAULT;
726 }
727 723
728 DRM_DEBUG_KMS("%s:prop_id[%d]buf_id[%d]buf_type[%d]\n", __func__, 724 DRM_DEBUG_KMS("%s:prop_id[%d]buf_id[%d]buf_type[%d]\n", __func__,
729 property->prop_id, buf_id, buf_type); 725 property->prop_id, buf_id, buf_type);
@@ -1171,7 +1167,7 @@ static int gsc_dst_set_addr(struct device *dev,
1171{ 1167{
1172 struct gsc_context *ctx = get_gsc_context(dev); 1168 struct gsc_context *ctx = get_gsc_context(dev);
1173 struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; 1169 struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv;
1174 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->cmd; 1170 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->c_node;
1175 struct drm_exynos_ipp_property *property; 1171 struct drm_exynos_ipp_property *property;
1176 1172
1177 if (!c_node) { 1173 if (!c_node) {
@@ -1180,10 +1176,6 @@ static int gsc_dst_set_addr(struct device *dev,
1180 } 1176 }
1181 1177
1182 property = &c_node->property; 1178 property = &c_node->property;
1183 if (!property) {
1184 DRM_ERROR("failed to get property.\n");
1185 return -EFAULT;
1186 }
1187 1179
1188 DRM_DEBUG_KMS("%s:prop_id[%d]buf_id[%d]buf_type[%d]\n", __func__, 1180 DRM_DEBUG_KMS("%s:prop_id[%d]buf_id[%d]buf_type[%d]\n", __func__,
1189 property->prop_id, buf_id, buf_type); 1181 property->prop_id, buf_id, buf_type);
@@ -1312,7 +1304,7 @@ static irqreturn_t gsc_irq_handler(int irq, void *dev_id)
1312{ 1304{
1313 struct gsc_context *ctx = dev_id; 1305 struct gsc_context *ctx = dev_id;
1314 struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; 1306 struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv;
1315 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->cmd; 1307 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->c_node;
1316 struct drm_exynos_ipp_event_work *event_work = 1308 struct drm_exynos_ipp_event_work *event_work =
1317 c_node->event_work; 1309 c_node->event_work;
1318 u32 status; 1310 u32 status;
@@ -1399,7 +1391,7 @@ static inline bool gsc_check_drm_flip(enum drm_exynos_flip flip)
1399 case EXYNOS_DRM_FLIP_NONE: 1391 case EXYNOS_DRM_FLIP_NONE:
1400 case EXYNOS_DRM_FLIP_VERTICAL: 1392 case EXYNOS_DRM_FLIP_VERTICAL:
1401 case EXYNOS_DRM_FLIP_HORIZONTAL: 1393 case EXYNOS_DRM_FLIP_HORIZONTAL:
1402 case EXYNOS_DRM_FLIP_VERTICAL | EXYNOS_DRM_FLIP_HORIZONTAL: 1394 case EXYNOS_DRM_FLIP_BOTH:
1403 return true; 1395 return true;
1404 default: 1396 default:
1405 DRM_DEBUG_KMS("%s:invalid flip\n", __func__); 1397 DRM_DEBUG_KMS("%s:invalid flip\n", __func__);
@@ -1549,7 +1541,7 @@ static int gsc_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd)
1549{ 1541{
1550 struct gsc_context *ctx = get_gsc_context(dev); 1542 struct gsc_context *ctx = get_gsc_context(dev);
1551 struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv; 1543 struct exynos_drm_ippdrv *ippdrv = &ctx->ippdrv;
1552 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->cmd; 1544 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->c_node;
1553 struct drm_exynos_ipp_property *property; 1545 struct drm_exynos_ipp_property *property;
1554 struct drm_exynos_ipp_config *config; 1546 struct drm_exynos_ipp_config *config;
1555 struct drm_exynos_pos img_pos[EXYNOS_DRM_OPS_MAX]; 1547 struct drm_exynos_pos img_pos[EXYNOS_DRM_OPS_MAX];
@@ -1565,10 +1557,6 @@ static int gsc_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd)
1565 } 1557 }
1566 1558
1567 property = &c_node->property; 1559 property = &c_node->property;
1568 if (!property) {
1569 DRM_ERROR("failed to get property.\n");
1570 return -EINVAL;
1571 }
1572 1560
1573 gsc_handle_irq(ctx, true, false, true); 1561 gsc_handle_irq(ctx, true, false, true);
1574 1562
@@ -1604,7 +1592,7 @@ static int gsc_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd)
1604 exynos_drm_ippnb_send_event(IPP_SET_WRITEBACK, (void *)&set_wb); 1592 exynos_drm_ippnb_send_event(IPP_SET_WRITEBACK, (void *)&set_wb);
1605 1593
1606 /* src local path */ 1594 /* src local path */
1607 cfg = readl(GSC_IN_CON); 1595 cfg = gsc_read(GSC_IN_CON);
1608 cfg &= ~(GSC_IN_PATH_MASK | GSC_IN_LOCAL_SEL_MASK); 1596 cfg &= ~(GSC_IN_PATH_MASK | GSC_IN_LOCAL_SEL_MASK);
1609 cfg |= (GSC_IN_PATH_LOCAL | GSC_IN_LOCAL_FIMD_WB); 1597 cfg |= (GSC_IN_PATH_LOCAL | GSC_IN_LOCAL_FIMD_WB);
1610 gsc_write(cfg, GSC_IN_CON); 1598 gsc_write(cfg, GSC_IN_CON);
@@ -1683,7 +1671,7 @@ static void gsc_ippdrv_stop(struct device *dev, enum drm_exynos_ipp_cmd cmd)
1683 gsc_write(cfg, GSC_ENABLE); 1671 gsc_write(cfg, GSC_ENABLE);
1684} 1672}
1685 1673
1686static int __devinit gsc_probe(struct platform_device *pdev) 1674static int gsc_probe(struct platform_device *pdev)
1687{ 1675{
1688 struct device *dev = &pdev->dev; 1676 struct device *dev = &pdev->dev;
1689 struct gsc_context *ctx; 1677 struct gsc_context *ctx;
@@ -1696,34 +1684,25 @@ static int __devinit gsc_probe(struct platform_device *pdev)
1696 return -ENOMEM; 1684 return -ENOMEM;
1697 1685
1698 /* clock control */ 1686 /* clock control */
1699 ctx->gsc_clk = clk_get(dev, "gscl"); 1687 ctx->gsc_clk = devm_clk_get(dev, "gscl");
1700 if (IS_ERR(ctx->gsc_clk)) { 1688 if (IS_ERR(ctx->gsc_clk)) {
1701 dev_err(dev, "failed to get gsc clock.\n"); 1689 dev_err(dev, "failed to get gsc clock.\n");
1702 ret = PTR_ERR(ctx->gsc_clk); 1690 return PTR_ERR(ctx->gsc_clk);
1703 goto err_ctx;
1704 } 1691 }
1705 1692
1706 /* resource memory */ 1693 /* resource memory */
1707 ctx->regs_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1694 ctx->regs_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1708 if (!ctx->regs_res) {
1709 dev_err(dev, "failed to find registers.\n");
1710 ret = -ENOENT;
1711 goto err_clk;
1712 }
1713
1714 ctx->regs = devm_request_and_ioremap(dev, ctx->regs_res); 1695 ctx->regs = devm_request_and_ioremap(dev, ctx->regs_res);
1715 if (!ctx->regs) { 1696 if (!ctx->regs) {
1716 dev_err(dev, "failed to map registers.\n"); 1697 dev_err(dev, "failed to map registers.\n");
1717 ret = -ENXIO; 1698 return -ENXIO;
1718 goto err_clk;
1719 } 1699 }
1720 1700
1721 /* resource irq */ 1701 /* resource irq */
1722 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 1702 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1723 if (!res) { 1703 if (!res) {
1724 dev_err(dev, "failed to request irq resource.\n"); 1704 dev_err(dev, "failed to request irq resource.\n");
1725 ret = -ENOENT; 1705 return -ENOENT;
1726 goto err_get_regs;
1727 } 1706 }
1728 1707
1729 ctx->irq = res->start; 1708 ctx->irq = res->start;
@@ -1731,7 +1710,7 @@ static int __devinit gsc_probe(struct platform_device *pdev)
1731 IRQF_ONESHOT, "drm_gsc", ctx); 1710 IRQF_ONESHOT, "drm_gsc", ctx);
1732 if (ret < 0) { 1711 if (ret < 0) {
1733 dev_err(dev, "failed to request irq.\n"); 1712 dev_err(dev, "failed to request irq.\n");
1734 goto err_get_regs; 1713 return ret;
1735 } 1714 }
1736 1715
1737 /* context initailization */ 1716 /* context initailization */
@@ -1775,16 +1754,10 @@ err_ippdrv_register:
1775 pm_runtime_disable(dev); 1754 pm_runtime_disable(dev);
1776err_get_irq: 1755err_get_irq:
1777 free_irq(ctx->irq, ctx); 1756 free_irq(ctx->irq, ctx);
1778err_get_regs:
1779 devm_iounmap(dev, ctx->regs);
1780err_clk:
1781 clk_put(ctx->gsc_clk);
1782err_ctx:
1783 devm_kfree(dev, ctx);
1784 return ret; 1757 return ret;
1785} 1758}
1786 1759
1787static int __devexit gsc_remove(struct platform_device *pdev) 1760static int gsc_remove(struct platform_device *pdev)
1788{ 1761{
1789 struct device *dev = &pdev->dev; 1762 struct device *dev = &pdev->dev;
1790 struct gsc_context *ctx = get_gsc_context(dev); 1763 struct gsc_context *ctx = get_gsc_context(dev);
@@ -1798,11 +1771,6 @@ static int __devexit gsc_remove(struct platform_device *pdev)
1798 pm_runtime_disable(dev); 1771 pm_runtime_disable(dev);
1799 1772
1800 free_irq(ctx->irq, ctx); 1773 free_irq(ctx->irq, ctx);
1801 devm_iounmap(dev, ctx->regs);
1802
1803 clk_put(ctx->gsc_clk);
1804
1805 devm_kfree(dev, ctx);
1806 1774
1807 return 0; 1775 return 0;
1808} 1776}
@@ -1860,7 +1828,7 @@ static const struct dev_pm_ops gsc_pm_ops = {
1860 1828
1861struct platform_driver gsc_driver = { 1829struct platform_driver gsc_driver = {
1862 .probe = gsc_probe, 1830 .probe = gsc_probe,
1863 .remove = __devexit_p(gsc_remove), 1831 .remove = gsc_remove,
1864 .driver = { 1832 .driver = {
1865 .name = "exynos-drm-gsc", 1833 .name = "exynos-drm-gsc",
1866 .owner = THIS_MODULE, 1834 .owner = THIS_MODULE,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gsc.h b/drivers/gpu/drm/exynos/exynos_drm_gsc.h
index b3c3bc618c0..29ec1c5efcf 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gsc.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_gsc.h
@@ -6,24 +6,10 @@
6 * Jinyoung Jeon <jy0.jeon@samsung.com> 6 * Jinyoung Jeon <jy0.jeon@samsung.com>
7 * Sangmin Lee <lsmin.lee@samsung.com> 7 * Sangmin Lee <lsmin.lee@samsung.com>
8 * 8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a 9 * This program is free software; you can redistribute it and/or modify it
10 * copy of this software and associated documentation files (the "Software"), 10 * under the terms of the GNU General Public License as published by the
11 * to deal in the Software without restriction, including without limitation 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * option) any later version.
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
18 * Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
26 * OTHER DEALINGS IN THE SOFTWARE.
27 */ 13 */
28 14
29#ifndef _EXYNOS_DRM_GSC_H_ 15#ifndef _EXYNOS_DRM_GSC_H_
diff --git a/drivers/gpu/drm/exynos/exynos_drm_hdmi.c b/drivers/gpu/drm/exynos/exynos_drm_hdmi.c
index 55793c46e3c..850e9950b7d 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_hdmi.c
@@ -385,7 +385,7 @@ static void hdmi_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
385 mixer_ops->iommu_on(ctx->mixer_ctx->ctx, false); 385 mixer_ops->iommu_on(ctx->mixer_ctx->ctx, false);
386} 386}
387 387
388static int __devinit exynos_drm_hdmi_probe(struct platform_device *pdev) 388static int exynos_drm_hdmi_probe(struct platform_device *pdev)
389{ 389{
390 struct device *dev = &pdev->dev; 390 struct device *dev = &pdev->dev;
391 struct exynos_drm_subdrv *subdrv; 391 struct exynos_drm_subdrv *subdrv;
@@ -413,7 +413,7 @@ static int __devinit exynos_drm_hdmi_probe(struct platform_device *pdev)
413 return 0; 413 return 0;
414} 414}
415 415
416static int __devexit exynos_drm_hdmi_remove(struct platform_device *pdev) 416static int exynos_drm_hdmi_remove(struct platform_device *pdev)
417{ 417{
418 struct drm_hdmi_context *ctx = platform_get_drvdata(pdev); 418 struct drm_hdmi_context *ctx = platform_get_drvdata(pdev);
419 419
@@ -426,7 +426,7 @@ static int __devexit exynos_drm_hdmi_remove(struct platform_device *pdev)
426 426
427struct platform_driver exynos_drm_common_hdmi_driver = { 427struct platform_driver exynos_drm_common_hdmi_driver = {
428 .probe = exynos_drm_hdmi_probe, 428 .probe = exynos_drm_hdmi_probe,
429 .remove = __devexit_p(exynos_drm_hdmi_remove), 429 .remove = exynos_drm_hdmi_remove,
430 .driver = { 430 .driver = {
431 .name = "exynos-drm-hdmi", 431 .name = "exynos-drm-hdmi",
432 .owner = THIS_MODULE, 432 .owner = THIS_MODULE,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_hdmi.h b/drivers/gpu/drm/exynos/exynos_drm_hdmi.h
index fcc3093ec8f..784a7e9a766 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_hdmi.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_hdmi.h
@@ -3,24 +3,10 @@
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * Authoer: Inki Dae <inki.dae@samsung.com> 4 * Authoer: Inki Dae <inki.dae@samsung.com>
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * This program is free software; you can redistribute it and/or modify it
7 * copy of this software and associated documentation files (the "Software"), 7 * under the terms of the GNU General Public License as published by the
8 * to deal in the Software without restriction, including without limitation 8 * Free Software Foundation; either version 2 of the License, or (at your
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * option) any later version.
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
23 * OTHER DEALINGS IN THE SOFTWARE.
24 */ 10 */
25 11
26#ifndef _EXYNOS_DRM_HDMI_H_ 12#ifndef _EXYNOS_DRM_HDMI_H_
diff --git a/drivers/gpu/drm/exynos/exynos_drm_iommu.c b/drivers/gpu/drm/exynos/exynos_drm_iommu.c
index 2482b7f9634..3799d5c2b5d 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_iommu.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_iommu.c
@@ -3,24 +3,10 @@
3 * Copyright (c) 2012 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
4 * Author: Inki Dae <inki.dae@samsung.com> 4 * Author: Inki Dae <inki.dae@samsung.com>
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * This program is free software; you can redistribute it and/or modify it
7 * copy of this software and associated documentation files (the "Software"), 7 * under the terms of the GNU General Public License as published by the
8 * to deal in the Software without restriction, including without limitation 8 * Free Software Foundation; either version 2 of the License, or (at your
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * option) any later version.
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
23 * OTHER DEALINGS IN THE SOFTWARE.
24 */ 10 */
25 11
26#include <drmP.h> 12#include <drmP.h>
diff --git a/drivers/gpu/drm/exynos/exynos_drm_iommu.h b/drivers/gpu/drm/exynos/exynos_drm_iommu.h
index 18a0ca190b9..53b7deea8ab 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_iommu.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_iommu.h
@@ -3,24 +3,10 @@
3 * Copyright (c) 2012 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
4 * Authoer: Inki Dae <inki.dae@samsung.com> 4 * Authoer: Inki Dae <inki.dae@samsung.com>
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * This program is free software; you can redistribute it and/or modify it
7 * copy of this software and associated documentation files (the "Software"), 7 * under the terms of the GNU General Public License as published by the
8 * to deal in the Software without restriction, including without limitation 8 * Free Software Foundation; either version 2 of the License, or (at your
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * option) any later version.
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
23 * OTHER DEALINGS IN THE SOFTWARE.
24 */ 10 */
25 11
26#ifndef _EXYNOS_DRM_IOMMU_H_ 12#ifndef _EXYNOS_DRM_IOMMU_H_
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.c b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
index 49eebe948ed..0bda96454a0 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.c
@@ -27,7 +27,7 @@
27#include "exynos_drm_iommu.h" 27#include "exynos_drm_iommu.h"
28 28
29/* 29/*
30 * IPP is stand for Image Post Processing and 30 * IPP stands for Image Post Processing and
31 * supports image scaler/rotator and input/output DMA operations. 31 * supports image scaler/rotator and input/output DMA operations.
32 * using FIMC, GSC, Rotator, so on. 32 * using FIMC, GSC, Rotator, so on.
33 * IPP is integration device driver of same attribute h/w 33 * IPP is integration device driver of same attribute h/w
@@ -1292,7 +1292,7 @@ static int ipp_start_property(struct exynos_drm_ippdrv *ippdrv,
1292 DRM_DEBUG_KMS("%s:prop_id[%d]\n", __func__, property->prop_id); 1292 DRM_DEBUG_KMS("%s:prop_id[%d]\n", __func__, property->prop_id);
1293 1293
1294 /* store command info in ippdrv */ 1294 /* store command info in ippdrv */
1295 ippdrv->cmd = c_node; 1295 ippdrv->c_node = c_node;
1296 1296
1297 if (!ipp_check_mem_list(c_node)) { 1297 if (!ipp_check_mem_list(c_node)) {
1298 DRM_DEBUG_KMS("%s:empty memory.\n", __func__); 1298 DRM_DEBUG_KMS("%s:empty memory.\n", __func__);
@@ -1303,7 +1303,7 @@ static int ipp_start_property(struct exynos_drm_ippdrv *ippdrv,
1303 ret = ipp_set_property(ippdrv, property); 1303 ret = ipp_set_property(ippdrv, property);
1304 if (ret) { 1304 if (ret) {
1305 DRM_ERROR("failed to set property.\n"); 1305 DRM_ERROR("failed to set property.\n");
1306 ippdrv->cmd = NULL; 1306 ippdrv->c_node = NULL;
1307 return ret; 1307 return ret;
1308 } 1308 }
1309 1309
@@ -1487,11 +1487,6 @@ void ipp_sched_cmd(struct work_struct *work)
1487 mutex_lock(&c_node->cmd_lock); 1487 mutex_lock(&c_node->cmd_lock);
1488 1488
1489 property = &c_node->property; 1489 property = &c_node->property;
1490 if (!property) {
1491 DRM_ERROR("failed to get property:prop_id[%d]\n",
1492 c_node->property.prop_id);
1493 goto err_unlock;
1494 }
1495 1490
1496 switch (cmd_work->ctrl) { 1491 switch (cmd_work->ctrl) {
1497 case IPP_CTRL_PLAY: 1492 case IPP_CTRL_PLAY:
@@ -1704,7 +1699,7 @@ void ipp_sched_event(struct work_struct *work)
1704 return; 1699 return;
1705 } 1700 }
1706 1701
1707 c_node = ippdrv->cmd; 1702 c_node = ippdrv->c_node;
1708 if (!c_node) { 1703 if (!c_node) {
1709 DRM_ERROR("failed to get command node.\n"); 1704 DRM_ERROR("failed to get command node.\n");
1710 return; 1705 return;
@@ -1888,14 +1883,14 @@ err_clear:
1888 return; 1883 return;
1889} 1884}
1890 1885
1891static int __devinit ipp_probe(struct platform_device *pdev) 1886static int ipp_probe(struct platform_device *pdev)
1892{ 1887{
1893 struct device *dev = &pdev->dev; 1888 struct device *dev = &pdev->dev;
1894 struct ipp_context *ctx; 1889 struct ipp_context *ctx;
1895 struct exynos_drm_subdrv *subdrv; 1890 struct exynos_drm_subdrv *subdrv;
1896 int ret; 1891 int ret;
1897 1892
1898 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); 1893 ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
1899 if (!ctx) 1894 if (!ctx)
1900 return -ENOMEM; 1895 return -ENOMEM;
1901 1896
@@ -1916,8 +1911,7 @@ static int __devinit ipp_probe(struct platform_device *pdev)
1916 ctx->event_workq = create_singlethread_workqueue("ipp_event"); 1911 ctx->event_workq = create_singlethread_workqueue("ipp_event");
1917 if (!ctx->event_workq) { 1912 if (!ctx->event_workq) {
1918 dev_err(dev, "failed to create event workqueue\n"); 1913 dev_err(dev, "failed to create event workqueue\n");
1919 ret = -EINVAL; 1914 return -EINVAL;
1920 goto err_clear;
1921 } 1915 }
1922 1916
1923 /* 1917 /*
@@ -1958,12 +1952,10 @@ err_cmd_workq:
1958 destroy_workqueue(ctx->cmd_workq); 1952 destroy_workqueue(ctx->cmd_workq);
1959err_event_workq: 1953err_event_workq:
1960 destroy_workqueue(ctx->event_workq); 1954 destroy_workqueue(ctx->event_workq);
1961err_clear:
1962 kfree(ctx);
1963 return ret; 1955 return ret;
1964} 1956}
1965 1957
1966static int __devexit ipp_remove(struct platform_device *pdev) 1958static int ipp_remove(struct platform_device *pdev)
1967{ 1959{
1968 struct ipp_context *ctx = platform_get_drvdata(pdev); 1960 struct ipp_context *ctx = platform_get_drvdata(pdev);
1969 1961
@@ -1985,8 +1977,6 @@ static int __devexit ipp_remove(struct platform_device *pdev)
1985 destroy_workqueue(ctx->cmd_workq); 1977 destroy_workqueue(ctx->cmd_workq);
1986 destroy_workqueue(ctx->event_workq); 1978 destroy_workqueue(ctx->event_workq);
1987 1979
1988 kfree(ctx);
1989
1990 return 0; 1980 return 0;
1991} 1981}
1992 1982
@@ -2050,7 +2040,7 @@ static const struct dev_pm_ops ipp_pm_ops = {
2050 2040
2051struct platform_driver ipp_driver = { 2041struct platform_driver ipp_driver = {
2052 .probe = ipp_probe, 2042 .probe = ipp_probe,
2053 .remove = __devexit_p(ipp_remove), 2043 .remove = ipp_remove,
2054 .driver = { 2044 .driver = {
2055 .name = "exynos-drm-ipp", 2045 .name = "exynos-drm-ipp",
2056 .owner = THIS_MODULE, 2046 .owner = THIS_MODULE,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_ipp.h b/drivers/gpu/drm/exynos/exynos_drm_ipp.h
index 28ffac95386..4cadbea7dbd 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_ipp.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_ipp.h
@@ -6,24 +6,10 @@
6 * Jinyoung Jeon <jy0.jeon@samsung.com> 6 * Jinyoung Jeon <jy0.jeon@samsung.com>
7 * Sangmin Lee <lsmin.lee@samsung.com> 7 * Sangmin Lee <lsmin.lee@samsung.com>
8 * 8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a 9 * This program is free software; you can redistribute it and/or modify it
10 * copy of this software and associated documentation files (the "Software"), 10 * under the terms of the GNU General Public License as published by the
11 * to deal in the Software without restriction, including without limitation 11 * Free Software Foundation; either version 2 of the License, or (at your
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * option) any later version.
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
18 * Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
26 * OTHER DEALINGS IN THE SOFTWARE.
27 */ 13 */
28 14
29#ifndef _EXYNOS_DRM_IPP_H_ 15#ifndef _EXYNOS_DRM_IPP_H_
@@ -160,7 +146,7 @@ struct exynos_drm_ipp_ops {
160 * @dedicated: dedicated ipp device. 146 * @dedicated: dedicated ipp device.
161 * @ops: source, destination operations. 147 * @ops: source, destination operations.
162 * @event_workq: event work queue. 148 * @event_workq: event work queue.
163 * @cmd: current command information. 149 * @c_node: current command information.
164 * @cmd_list: list head for command information. 150 * @cmd_list: list head for command information.
165 * @prop_list: property informations of current ipp driver. 151 * @prop_list: property informations of current ipp driver.
166 * @check_property: check property about format, size, buffer. 152 * @check_property: check property about format, size, buffer.
@@ -178,7 +164,7 @@ struct exynos_drm_ippdrv {
178 bool dedicated; 164 bool dedicated;
179 struct exynos_drm_ipp_ops *ops[EXYNOS_DRM_OPS_MAX]; 165 struct exynos_drm_ipp_ops *ops[EXYNOS_DRM_OPS_MAX];
180 struct workqueue_struct *event_workq; 166 struct workqueue_struct *event_workq;
181 struct drm_exynos_ipp_cmd_node *cmd; 167 struct drm_exynos_ipp_cmd_node *c_node;
182 struct list_head cmd_list; 168 struct list_head cmd_list;
183 struct drm_exynos_ipp_prop_list *prop_list; 169 struct drm_exynos_ipp_prop_list *prop_list;
184 170
diff --git a/drivers/gpu/drm/exynos/exynos_drm_rotator.c b/drivers/gpu/drm/exynos/exynos_drm_rotator.c
index 1c2366083c7..e9e83ef688f 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_rotator.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_rotator.c
@@ -139,7 +139,7 @@ static irqreturn_t rotator_irq_handler(int irq, void *arg)
139{ 139{
140 struct rot_context *rot = arg; 140 struct rot_context *rot = arg;
141 struct exynos_drm_ippdrv *ippdrv = &rot->ippdrv; 141 struct exynos_drm_ippdrv *ippdrv = &rot->ippdrv;
142 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->cmd; 142 struct drm_exynos_ipp_cmd_node *c_node = ippdrv->c_node;
143 struct drm_exynos_ipp_event_work *event_work = c_node->event_work; 143 struct drm_exynos_ipp_event_work *event_work = c_node->event_work;
144 enum rot_irq_status irq_status; 144 enum rot_irq_status irq_status;
145 u32 val; 145 u32 val;
@@ -513,6 +513,7 @@ static inline bool rotator_check_drm_flip(enum drm_exynos_flip flip)
513 case EXYNOS_DRM_FLIP_NONE: 513 case EXYNOS_DRM_FLIP_NONE:
514 case EXYNOS_DRM_FLIP_VERTICAL: 514 case EXYNOS_DRM_FLIP_VERTICAL:
515 case EXYNOS_DRM_FLIP_HORIZONTAL: 515 case EXYNOS_DRM_FLIP_HORIZONTAL:
516 case EXYNOS_DRM_FLIP_BOTH:
516 return true; 517 return true;
517 default: 518 default:
518 DRM_DEBUG_KMS("%s:invalid flip\n", __func__); 519 DRM_DEBUG_KMS("%s:invalid flip\n", __func__);
@@ -638,7 +639,7 @@ static int rotator_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd)
638 return 0; 639 return 0;
639} 640}
640 641
641static int __devinit rotator_probe(struct platform_device *pdev) 642static int rotator_probe(struct platform_device *pdev)
642{ 643{
643 struct device *dev = &pdev->dev; 644 struct device *dev = &pdev->dev;
644 struct rot_context *rot; 645 struct rot_context *rot;
@@ -655,34 +656,26 @@ static int __devinit rotator_probe(struct platform_device *pdev)
655 platform_get_device_id(pdev)->driver_data; 656 platform_get_device_id(pdev)->driver_data;
656 657
657 rot->regs_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 658 rot->regs_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
658 if (!rot->regs_res) {
659 dev_err(dev, "failed to find registers\n");
660 ret = -ENOENT;
661 goto err_get_resource;
662 }
663
664 rot->regs = devm_request_and_ioremap(dev, rot->regs_res); 659 rot->regs = devm_request_and_ioremap(dev, rot->regs_res);
665 if (!rot->regs) { 660 if (!rot->regs) {
666 dev_err(dev, "failed to map register\n"); 661 dev_err(dev, "failed to map register\n");
667 ret = -ENXIO; 662 return -ENXIO;
668 goto err_get_resource;
669 } 663 }
670 664
671 rot->irq = platform_get_irq(pdev, 0); 665 rot->irq = platform_get_irq(pdev, 0);
672 if (rot->irq < 0) { 666 if (rot->irq < 0) {
673 dev_err(dev, "failed to get irq\n"); 667 dev_err(dev, "failed to get irq\n");
674 ret = rot->irq; 668 return rot->irq;
675 goto err_get_irq;
676 } 669 }
677 670
678 ret = request_threaded_irq(rot->irq, NULL, rotator_irq_handler, 671 ret = request_threaded_irq(rot->irq, NULL, rotator_irq_handler,
679 IRQF_ONESHOT, "drm_rotator", rot); 672 IRQF_ONESHOT, "drm_rotator", rot);
680 if (ret < 0) { 673 if (ret < 0) {
681 dev_err(dev, "failed to request irq\n"); 674 dev_err(dev, "failed to request irq\n");
682 goto err_get_irq; 675 return ret;
683 } 676 }
684 677
685 rot->clock = clk_get(dev, "rotator"); 678 rot->clock = devm_clk_get(dev, "rotator");
686 if (IS_ERR_OR_NULL(rot->clock)) { 679 if (IS_ERR_OR_NULL(rot->clock)) {
687 dev_err(dev, "failed to get clock\n"); 680 dev_err(dev, "failed to get clock\n");
688 ret = PTR_ERR(rot->clock); 681 ret = PTR_ERR(rot->clock);
@@ -720,17 +713,12 @@ static int __devinit rotator_probe(struct platform_device *pdev)
720err_ippdrv_register: 713err_ippdrv_register:
721 devm_kfree(dev, ippdrv->prop_list); 714 devm_kfree(dev, ippdrv->prop_list);
722 pm_runtime_disable(dev); 715 pm_runtime_disable(dev);
723 clk_put(rot->clock);
724err_clk_get: 716err_clk_get:
725 free_irq(rot->irq, rot); 717 free_irq(rot->irq, rot);
726err_get_irq:
727 devm_iounmap(dev, rot->regs);
728err_get_resource:
729 devm_kfree(dev, rot);
730 return ret; 718 return ret;
731} 719}
732 720
733static int __devexit rotator_remove(struct platform_device *pdev) 721static int rotator_remove(struct platform_device *pdev)
734{ 722{
735 struct device *dev = &pdev->dev; 723 struct device *dev = &pdev->dev;
736 struct rot_context *rot = dev_get_drvdata(dev); 724 struct rot_context *rot = dev_get_drvdata(dev);
@@ -740,12 +728,8 @@ static int __devexit rotator_remove(struct platform_device *pdev)
740 exynos_drm_ippdrv_unregister(ippdrv); 728 exynos_drm_ippdrv_unregister(ippdrv);
741 729
742 pm_runtime_disable(dev); 730 pm_runtime_disable(dev);
743 clk_put(rot->clock);
744 731
745 free_irq(rot->irq, rot); 732 free_irq(rot->irq, rot);
746 devm_iounmap(dev, rot->regs);
747
748 devm_kfree(dev, rot);
749 733
750 return 0; 734 return 0;
751} 735}
@@ -845,7 +829,7 @@ static const struct dev_pm_ops rotator_pm_ops = {
845 829
846struct platform_driver rotator_driver = { 830struct platform_driver rotator_driver = {
847 .probe = rotator_probe, 831 .probe = rotator_probe,
848 .remove = __devexit_p(rotator_remove), 832 .remove = rotator_remove,
849 .id_table = rotator_driver_ids, 833 .id_table = rotator_driver_ids,
850 .driver = { 834 .driver = {
851 .name = "exynos-rot", 835 .name = "exynos-rot",
diff --git a/drivers/gpu/drm/exynos/exynos_drm_rotator.h b/drivers/gpu/drm/exynos/exynos_drm_rotator.h
index a2d7a14a52b..71a0b4c0c1e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_rotator.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_rotator.h
@@ -5,24 +5,10 @@
5 * YoungJun Cho <yj44.cho@samsung.com> 5 * YoungJun Cho <yj44.cho@samsung.com>
6 * Eunchul Kim <chulspro.kim@samsung.com> 6 * Eunchul Kim <chulspro.kim@samsung.com>
7 * 7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a 8 * This program is free software; you can redistribute it and/or modify it
9 * copy of this software and associated documentation files (the "Software"), 9 * under the terms of the GNU General Public License as published by the
10 * to deal in the Software without restriction, including without limitation 10 * Free Software Foundation; either version 2 of the License, or (at your
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * option) any later version.
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 */ 12 */
27 13
28#ifndef _EXYNOS_DRM_ROTATOR_H_ 14#ifndef _EXYNOS_DRM_ROTATOR_H_
diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
index 99bfc38dfaa..d0ca3c4e06c 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
@@ -372,34 +372,6 @@ static struct exynos_drm_manager vidi_manager = {
372 .display_ops = &vidi_display_ops, 372 .display_ops = &vidi_display_ops,
373}; 373};
374 374
375static void vidi_finish_pageflip(struct drm_device *drm_dev, int crtc)
376{
377 struct exynos_drm_private *dev_priv = drm_dev->dev_private;
378 struct drm_pending_vblank_event *e, *t;
379 struct timeval now;
380 unsigned long flags;
381
382 spin_lock_irqsave(&drm_dev->event_lock, flags);
383
384 list_for_each_entry_safe(e, t, &dev_priv->pageflip_event_list,
385 base.link) {
386 /* if event's pipe isn't same as crtc then ignore it. */
387 if (crtc != e->pipe)
388 continue;
389
390 do_gettimeofday(&now);
391 e->event.sequence = 0;
392 e->event.tv_sec = now.tv_sec;
393 e->event.tv_usec = now.tv_usec;
394
395 list_move_tail(&e->base.link, &e->base.file_priv->event_list);
396 wake_up_interruptible(&e->base.file_priv->event_wait);
397 drm_vblank_put(drm_dev, crtc);
398 }
399
400 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
401}
402
403static void vidi_fake_vblank_handler(struct work_struct *work) 375static void vidi_fake_vblank_handler(struct work_struct *work)
404{ 376{
405 struct vidi_context *ctx = container_of(work, struct vidi_context, 377 struct vidi_context *ctx = container_of(work, struct vidi_context,
@@ -424,7 +396,7 @@ static void vidi_fake_vblank_handler(struct work_struct *work)
424 396
425 mutex_unlock(&ctx->lock); 397 mutex_unlock(&ctx->lock);
426 398
427 vidi_finish_pageflip(subdrv->drm_dev, manager->pipe); 399 exynos_drm_crtc_finish_pageflip(subdrv->drm_dev, manager->pipe);
428} 400}
429 401
430static int vidi_subdrv_probe(struct drm_device *drm_dev, struct device *dev) 402static int vidi_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
@@ -609,7 +581,7 @@ int vidi_connection_ioctl(struct drm_device *drm_dev, void *data,
609 return 0; 581 return 0;
610} 582}
611 583
612static int __devinit vidi_probe(struct platform_device *pdev) 584static int vidi_probe(struct platform_device *pdev)
613{ 585{
614 struct device *dev = &pdev->dev; 586 struct device *dev = &pdev->dev;
615 struct vidi_context *ctx; 587 struct vidi_context *ctx;
@@ -645,7 +617,7 @@ static int __devinit vidi_probe(struct platform_device *pdev)
645 return 0; 617 return 0;
646} 618}
647 619
648static int __devexit vidi_remove(struct platform_device *pdev) 620static int vidi_remove(struct platform_device *pdev)
649{ 621{
650 struct vidi_context *ctx = platform_get_drvdata(pdev); 622 struct vidi_context *ctx = platform_get_drvdata(pdev);
651 623
@@ -683,7 +655,7 @@ static const struct dev_pm_ops vidi_pm_ops = {
683 655
684struct platform_driver vidi_driver = { 656struct platform_driver vidi_driver = {
685 .probe = vidi_probe, 657 .probe = vidi_probe,
686 .remove = __devexit_p(vidi_remove), 658 .remove = vidi_remove,
687 .driver = { 659 .driver = {
688 .name = "exynos-drm-vidi", 660 .name = "exynos-drm-vidi",
689 .owner = THIS_MODULE, 661 .owner = THIS_MODULE,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.h b/drivers/gpu/drm/exynos/exynos_drm_vidi.h
index a4babe4e65d..1e5fdaa36cc 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_vidi.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.h
@@ -3,24 +3,10 @@
3 * Copyright (c) 2012 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
4 * Author: Inki Dae <inki.dae@samsung.com> 4 * Author: Inki Dae <inki.dae@samsung.com>
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * This program is free software; you can redistribute it and/or modify it
7 * copy of this software and associated documentation files (the "Software"), 7 * under the terms of the GNU General Public License as published by the
8 * to deal in the Software without restriction, including without limitation 8 * Free Software Foundation; either version 2 of the License, or (at your
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * option) any later version.
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
23 * OTHER DEALINGS IN THE SOFTWARE.
24 */ 10 */
25 11
26#ifndef _EXYNOS_DRM_VIDI_H_ 12#ifndef _EXYNOS_DRM_VIDI_H_
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 2c46b6c0b82..41ff79d8ac8 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -2305,7 +2305,7 @@ static irqreturn_t hdmi_internal_irq_thread(int irq, void *arg)
2305 return IRQ_HANDLED; 2305 return IRQ_HANDLED;
2306} 2306}
2307 2307
2308static int __devinit hdmi_resources_init(struct hdmi_context *hdata) 2308static int hdmi_resources_init(struct hdmi_context *hdata)
2309{ 2309{
2310 struct device *dev = hdata->dev; 2310 struct device *dev = hdata->dev;
2311 struct hdmi_resources *res = &hdata->res; 2311 struct hdmi_resources *res = &hdata->res;
@@ -2451,7 +2451,7 @@ static struct of_device_id hdmi_match_types[] = {
2451}; 2451};
2452#endif 2452#endif
2453 2453
2454static int __devinit hdmi_probe(struct platform_device *pdev) 2454static int hdmi_probe(struct platform_device *pdev)
2455{ 2455{
2456 struct device *dev = &pdev->dev; 2456 struct device *dev = &pdev->dev;
2457 struct exynos_drm_hdmi_context *drm_hdmi_ctx; 2457 struct exynos_drm_hdmi_context *drm_hdmi_ctx;
@@ -2607,7 +2607,7 @@ err_ddc:
2607 return ret; 2607 return ret;
2608} 2608}
2609 2609
2610static int __devexit hdmi_remove(struct platform_device *pdev) 2610static int hdmi_remove(struct platform_device *pdev)
2611{ 2611{
2612 struct device *dev = &pdev->dev; 2612 struct device *dev = &pdev->dev;
2613 struct exynos_drm_hdmi_context *ctx = platform_get_drvdata(pdev); 2613 struct exynos_drm_hdmi_context *ctx = platform_get_drvdata(pdev);
@@ -2708,7 +2708,7 @@ static const struct dev_pm_ops hdmi_pm_ops = {
2708 2708
2709struct platform_driver hdmi_driver = { 2709struct platform_driver hdmi_driver = {
2710 .probe = hdmi_probe, 2710 .probe = hdmi_probe,
2711 .remove = __devexit_p(hdmi_remove), 2711 .remove = hdmi_remove,
2712 .id_table = hdmi_driver_types, 2712 .id_table = hdmi_driver_types,
2713 .driver = { 2713 .driver = {
2714 .name = "exynos-hdmi", 2714 .name = "exynos-hdmi",
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.h b/drivers/gpu/drm/exynos/exynos_hdmi.h
index 1c3b6d8f1fe..0ddf3957de1 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.h
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.h
@@ -5,24 +5,10 @@
5 * Inki Dae <inki.dae@samsung.com> 5 * Inki Dae <inki.dae@samsung.com>
6 * Seung-Woo Kim <sw0312.kim@samsung.com> 6 * Seung-Woo Kim <sw0312.kim@samsung.com>
7 * 7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a 8 * This program is free software; you can redistribute it and/or modify it
9 * copy of this software and associated documentation files (the "Software"), 9 * under the terms of the GNU General Public License as published by the
10 * to deal in the Software without restriction, including without limitation 10 * Free Software Foundation; either version 2 of the License, or (at your
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * option) any later version.
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 */ 12 */
27 13
28#ifndef _EXYNOS_HDMI_H_ 14#ifndef _EXYNOS_HDMI_H_
diff --git a/drivers/gpu/drm/exynos/exynos_hdmiphy.c b/drivers/gpu/drm/exynos/exynos_hdmiphy.c
index 6206056f4a3..ea49d132ecf 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmiphy.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmiphy.c
@@ -64,7 +64,7 @@ struct i2c_driver hdmiphy_driver = {
64 }, 64 },
65 .id_table = hdmiphy_id, 65 .id_table = hdmiphy_id,
66 .probe = hdmiphy_probe, 66 .probe = hdmiphy_probe,
67 .remove = __devexit_p(hdmiphy_remove), 67 .remove = hdmiphy_remove,
68 .command = NULL, 68 .command = NULL,
69}; 69};
70EXPORT_SYMBOL(hdmiphy_driver); 70EXPORT_SYMBOL(hdmiphy_driver);
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index 21db89530fc..c187ea33b74 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -35,6 +35,7 @@
35#include <drm/exynos_drm.h> 35#include <drm/exynos_drm.h>
36 36
37#include "exynos_drm_drv.h" 37#include "exynos_drm_drv.h"
38#include "exynos_drm_crtc.h"
38#include "exynos_drm_hdmi.h" 39#include "exynos_drm_hdmi.h"
39#include "exynos_drm_iommu.h" 40#include "exynos_drm_iommu.h"
40 41
@@ -949,35 +950,6 @@ static struct exynos_mixer_ops mixer_ops = {
949 .win_disable = mixer_win_disable, 950 .win_disable = mixer_win_disable,
950}; 951};
951 952
952/* for pageflip event */
953static void mixer_finish_pageflip(struct drm_device *drm_dev, int crtc)
954{
955 struct exynos_drm_private *dev_priv = drm_dev->dev_private;
956 struct drm_pending_vblank_event *e, *t;
957 struct timeval now;
958 unsigned long flags;
959
960 spin_lock_irqsave(&drm_dev->event_lock, flags);
961
962 list_for_each_entry_safe(e, t, &dev_priv->pageflip_event_list,
963 base.link) {
964 /* if event's pipe isn't same as crtc then ignore it. */
965 if (crtc != e->pipe)
966 continue;
967
968 do_gettimeofday(&now);
969 e->event.sequence = 0;
970 e->event.tv_sec = now.tv_sec;
971 e->event.tv_usec = now.tv_usec;
972
973 list_move_tail(&e->base.link, &e->base.file_priv->event_list);
974 wake_up_interruptible(&e->base.file_priv->event_wait);
975 drm_vblank_put(drm_dev, crtc);
976 }
977
978 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
979}
980
981static irqreturn_t mixer_irq_handler(int irq, void *arg) 953static irqreturn_t mixer_irq_handler(int irq, void *arg)
982{ 954{
983 struct exynos_drm_hdmi_context *drm_hdmi_ctx = arg; 955 struct exynos_drm_hdmi_context *drm_hdmi_ctx = arg;
@@ -1006,7 +978,8 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg)
1006 } 978 }
1007 979
1008 drm_handle_vblank(drm_hdmi_ctx->drm_dev, ctx->pipe); 980 drm_handle_vblank(drm_hdmi_ctx->drm_dev, ctx->pipe);
1009 mixer_finish_pageflip(drm_hdmi_ctx->drm_dev, ctx->pipe); 981 exynos_drm_crtc_finish_pageflip(drm_hdmi_ctx->drm_dev,
982 ctx->pipe);
1010 983
1011 /* set wait vsync event to zero and wake up queue. */ 984 /* set wait vsync event to zero and wake up queue. */
1012 if (atomic_read(&ctx->wait_vsync_event)) { 985 if (atomic_read(&ctx->wait_vsync_event)) {
@@ -1029,8 +1002,8 @@ out:
1029 return IRQ_HANDLED; 1002 return IRQ_HANDLED;
1030} 1003}
1031 1004
1032static int __devinit mixer_resources_init(struct exynos_drm_hdmi_context *ctx, 1005static int mixer_resources_init(struct exynos_drm_hdmi_context *ctx,
1033 struct platform_device *pdev) 1006 struct platform_device *pdev)
1034{ 1007{
1035 struct mixer_context *mixer_ctx = ctx->ctx; 1008 struct mixer_context *mixer_ctx = ctx->ctx;
1036 struct device *dev = &pdev->dev; 1009 struct device *dev = &pdev->dev;
@@ -1081,8 +1054,8 @@ static int __devinit mixer_resources_init(struct exynos_drm_hdmi_context *ctx,
1081 return 0; 1054 return 0;
1082} 1055}
1083 1056
1084static int __devinit vp_resources_init(struct exynos_drm_hdmi_context *ctx, 1057static int vp_resources_init(struct exynos_drm_hdmi_context *ctx,
1085 struct platform_device *pdev) 1058 struct platform_device *pdev)
1086{ 1059{
1087 struct mixer_context *mixer_ctx = ctx->ctx; 1060 struct mixer_context *mixer_ctx = ctx->ctx;
1088 struct device *dev = &pdev->dev; 1061 struct device *dev = &pdev->dev;
@@ -1155,7 +1128,7 @@ static struct of_device_id mixer_match_types[] = {
1155 } 1128 }
1156}; 1129};
1157 1130
1158static int __devinit mixer_probe(struct platform_device *pdev) 1131static int mixer_probe(struct platform_device *pdev)
1159{ 1132{
1160 struct device *dev = &pdev->dev; 1133 struct device *dev = &pdev->dev;
1161 struct exynos_drm_hdmi_context *drm_hdmi_ctx; 1134 struct exynos_drm_hdmi_context *drm_hdmi_ctx;
@@ -1316,6 +1289,6 @@ struct platform_driver mixer_driver = {
1316 .of_match_table = mixer_match_types, 1289 .of_match_table = mixer_match_types,
1317 }, 1290 },
1318 .probe = mixer_probe, 1291 .probe = mixer_probe,
1319 .remove = __devexit_p(mixer_remove), 1292 .remove = mixer_remove,
1320 .id_table = mixer_driver_types, 1293 .id_table = mixer_driver_types,
1321}; 1294};
diff --git a/drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c b/drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c
index 4a07ab59617..771ff66711a 100644
--- a/drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c
+++ b/drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c
@@ -700,7 +700,7 @@ static struct i2c_driver tc35876x_bridge_i2c_driver = {
700 }, 700 },
701 .id_table = tc35876x_bridge_id, 701 .id_table = tc35876x_bridge_id,
702 .probe = tc35876x_bridge_probe, 702 .probe = tc35876x_bridge_probe,
703 .remove = __devexit_p(tc35876x_bridge_remove), 703 .remove = tc35876x_bridge_remove,
704}; 704};
705 705
706/* LCD panel I2C */ 706/* LCD panel I2C */
@@ -741,7 +741,7 @@ static struct i2c_driver cmi_lcd_i2c_driver = {
741 }, 741 },
742 .id_table = cmi_lcd_i2c_id, 742 .id_table = cmi_lcd_i2c_id,
743 .probe = cmi_lcd_i2c_probe, 743 .probe = cmi_lcd_i2c_probe,
744 .remove = __devexit_p(cmi_lcd_i2c_remove), 744 .remove = cmi_lcd_i2c_remove,
745}; 745};
746 746
747/* HACK to create I2C device while it's not created by platform code */ 747/* HACK to create I2C device while it's not created by platform code */
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 530db83ef32..117265840b1 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -877,8 +877,7 @@ int i915_reset(struct drm_device *dev)
877 return 0; 877 return 0;
878} 878}
879 879
880static int __devinit 880static int i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
881i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
882{ 881{
883 struct intel_device_info *intel_info = 882 struct intel_device_info *intel_info =
884 (struct intel_device_info *) ent->driver_data; 883 (struct intel_device_info *) ent->driver_data;
diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
index 7be4241e824..abeaafef6d7 100644
--- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
@@ -266,7 +266,12 @@ struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,
266 obj = dma_buf->priv; 266 obj = dma_buf->priv;
267 /* is it from our device? */ 267 /* is it from our device? */
268 if (obj->base.dev == dev) { 268 if (obj->base.dev == dev) {
269 /*
270 * Importing dmabuf exported from out own gem increases
271 * refcount on gem itself instead of f_count of dmabuf.
272 */
269 drm_gem_object_reference(&obj->base); 273 drm_gem_object_reference(&obj->base);
274 dma_buf_put(dma_buf);
270 return &obj->base; 275 return &obj->base;
271 } 276 }
272 } 277 }
diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c b/drivers/gpu/drm/mgag200/mgag200_drv.c
index 1e910117b0a..122b571ccc7 100644
--- a/drivers/gpu/drm/mgag200/mgag200_drv.c
+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
@@ -60,8 +60,7 @@ static void mgag200_kick_out_firmware_fb(struct pci_dev *pdev)
60} 60}
61 61
62 62
63static int __devinit 63static int mga_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
64mga_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
65{ 64{
66 mgag200_kick_out_firmware_fb(pdev); 65 mgag200_kick_out_firmware_fb(pdev);
67 66
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 5614c89148c..69d7b1d0b9d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -1276,7 +1276,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
1276 if (drm->agp.stat == ENABLED) { 1276 if (drm->agp.stat == ENABLED) {
1277 mem->bus.offset = mem->start << PAGE_SHIFT; 1277 mem->bus.offset = mem->start << PAGE_SHIFT;
1278 mem->bus.base = drm->agp.base; 1278 mem->bus.base = drm->agp.base;
1279 mem->bus.is_iomem = true; 1279 mem->bus.is_iomem = !dev->agp->cant_use_aperture;
1280 } 1280 }
1281#endif 1281#endif
1282 break; 1282 break;
diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c
index 01c403ddb99..180a45e3b52 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drm.c
@@ -189,8 +189,8 @@ nouveau_accel_init(struct nouveau_drm *drm)
189 nouveau_bo_move_init(drm); 189 nouveau_bo_move_init(drm);
190} 190}
191 191
192static int __devinit 192static int nouveau_drm_probe(struct pci_dev *pdev,
193nouveau_drm_probe(struct pci_dev *pdev, const struct pci_device_id *pent) 193 const struct pci_device_id *pent)
194{ 194{
195 struct nouveau_device *device; 195 struct nouveau_device *device;
196 struct apertures_struct *aper; 196 struct apertures_struct *aper;
diff --git a/drivers/gpu/drm/nouveau/nouveau_pm.c b/drivers/gpu/drm/nouveau/nouveau_pm.c
index 5566172774d..a701ff5ffa5 100644
--- a/drivers/gpu/drm/nouveau/nouveau_pm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_pm.c
@@ -698,10 +698,10 @@ static int
698nouveau_hwmon_init(struct drm_device *dev) 698nouveau_hwmon_init(struct drm_device *dev)
699{ 699{
700 struct nouveau_pm *pm = nouveau_pm(dev); 700 struct nouveau_pm *pm = nouveau_pm(dev);
701 struct nouveau_drm *drm = nouveau_drm(dev);
702 struct nouveau_therm *therm = nouveau_therm(drm->device);
703 701
704#if defined(CONFIG_HWMON) || (defined(MODULE) && defined(CONFIG_HWMON_MODULE)) 702#if defined(CONFIG_HWMON) || (defined(MODULE) && defined(CONFIG_HWMON_MODULE))
703 struct nouveau_drm *drm = nouveau_drm(dev);
704 struct nouveau_therm *therm = nouveau_therm(drm->device);
705 struct device *hwmon_dev; 705 struct device *hwmon_dev;
706 int ret = 0; 706 int ret = 0;
707 707
diff --git a/drivers/gpu/drm/nouveau/nouveau_prime.c b/drivers/gpu/drm/nouveau/nouveau_prime.c
index 3543fec2355..b8e05ae3821 100644
--- a/drivers/gpu/drm/nouveau/nouveau_prime.c
+++ b/drivers/gpu/drm/nouveau/nouveau_prime.c
@@ -193,6 +193,7 @@ struct drm_gem_object *nouveau_gem_prime_import(struct drm_device *dev,
193 if (nvbo->gem) { 193 if (nvbo->gem) {
194 if (nvbo->gem->dev == dev) { 194 if (nvbo->gem->dev == dev) {
195 drm_gem_object_reference(nvbo->gem); 195 drm_gem_object_reference(nvbo->gem);
196 dma_buf_put(dma_buf);
196 return nvbo->gem; 197 return nvbo->gem;
197 } 198 }
198 } 199 }
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index f95d7fc1f5e..061fa0a2890 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -2306,22 +2306,20 @@ bool evergreen_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *rin
2306 return radeon_ring_test_lockup(rdev, ring); 2306 return radeon_ring_test_lockup(rdev, ring);
2307} 2307}
2308 2308
2309static int evergreen_gpu_soft_reset(struct radeon_device *rdev) 2309static void evergreen_gpu_soft_reset_gfx(struct radeon_device *rdev)
2310{ 2310{
2311 struct evergreen_mc_save save;
2312 u32 grbm_reset = 0; 2311 u32 grbm_reset = 0;
2313 2312
2314 if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE)) 2313 if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE))
2315 return 0; 2314 return;
2316 2315
2317 dev_info(rdev->dev, "GPU softreset \n"); 2316 dev_info(rdev->dev, " GRBM_STATUS = 0x%08X\n",
2318 dev_info(rdev->dev, " GRBM_STATUS=0x%08X\n",
2319 RREG32(GRBM_STATUS)); 2317 RREG32(GRBM_STATUS));
2320 dev_info(rdev->dev, " GRBM_STATUS_SE0=0x%08X\n", 2318 dev_info(rdev->dev, " GRBM_STATUS_SE0 = 0x%08X\n",
2321 RREG32(GRBM_STATUS_SE0)); 2319 RREG32(GRBM_STATUS_SE0));
2322 dev_info(rdev->dev, " GRBM_STATUS_SE1=0x%08X\n", 2320 dev_info(rdev->dev, " GRBM_STATUS_SE1 = 0x%08X\n",
2323 RREG32(GRBM_STATUS_SE1)); 2321 RREG32(GRBM_STATUS_SE1));
2324 dev_info(rdev->dev, " SRBM_STATUS=0x%08X\n", 2322 dev_info(rdev->dev, " SRBM_STATUS = 0x%08X\n",
2325 RREG32(SRBM_STATUS)); 2323 RREG32(SRBM_STATUS));
2326 dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n", 2324 dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n",
2327 RREG32(CP_STALLED_STAT1)); 2325 RREG32(CP_STALLED_STAT1));
@@ -2331,10 +2329,7 @@ static int evergreen_gpu_soft_reset(struct radeon_device *rdev)
2331 RREG32(CP_BUSY_STAT)); 2329 RREG32(CP_BUSY_STAT));
2332 dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n", 2330 dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n",
2333 RREG32(CP_STAT)); 2331 RREG32(CP_STAT));
2334 evergreen_mc_stop(rdev, &save); 2332
2335 if (evergreen_mc_wait_for_idle(rdev)) {
2336 dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
2337 }
2338 /* Disable CP parsing/prefetching */ 2333 /* Disable CP parsing/prefetching */
2339 WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT); 2334 WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);
2340 2335
@@ -2358,15 +2353,14 @@ static int evergreen_gpu_soft_reset(struct radeon_device *rdev)
2358 udelay(50); 2353 udelay(50);
2359 WREG32(GRBM_SOFT_RESET, 0); 2354 WREG32(GRBM_SOFT_RESET, 0);
2360 (void)RREG32(GRBM_SOFT_RESET); 2355 (void)RREG32(GRBM_SOFT_RESET);
2361 /* Wait a little for things to settle down */ 2356
2362 udelay(50); 2357 dev_info(rdev->dev, " GRBM_STATUS = 0x%08X\n",
2363 dev_info(rdev->dev, " GRBM_STATUS=0x%08X\n",
2364 RREG32(GRBM_STATUS)); 2358 RREG32(GRBM_STATUS));
2365 dev_info(rdev->dev, " GRBM_STATUS_SE0=0x%08X\n", 2359 dev_info(rdev->dev, " GRBM_STATUS_SE0 = 0x%08X\n",
2366 RREG32(GRBM_STATUS_SE0)); 2360 RREG32(GRBM_STATUS_SE0));
2367 dev_info(rdev->dev, " GRBM_STATUS_SE1=0x%08X\n", 2361 dev_info(rdev->dev, " GRBM_STATUS_SE1 = 0x%08X\n",
2368 RREG32(GRBM_STATUS_SE1)); 2362 RREG32(GRBM_STATUS_SE1));
2369 dev_info(rdev->dev, " SRBM_STATUS=0x%08X\n", 2363 dev_info(rdev->dev, " SRBM_STATUS = 0x%08X\n",
2370 RREG32(SRBM_STATUS)); 2364 RREG32(SRBM_STATUS));
2371 dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n", 2365 dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n",
2372 RREG32(CP_STALLED_STAT1)); 2366 RREG32(CP_STALLED_STAT1));
@@ -2376,13 +2370,65 @@ static int evergreen_gpu_soft_reset(struct radeon_device *rdev)
2376 RREG32(CP_BUSY_STAT)); 2370 RREG32(CP_BUSY_STAT));
2377 dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n", 2371 dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n",
2378 RREG32(CP_STAT)); 2372 RREG32(CP_STAT));
2373}
2374
2375static void evergreen_gpu_soft_reset_dma(struct radeon_device *rdev)
2376{
2377 u32 tmp;
2378
2379 if (RREG32(DMA_STATUS_REG) & DMA_IDLE)
2380 return;
2381
2382 dev_info(rdev->dev, " R_00D034_DMA_STATUS_REG = 0x%08X\n",
2383 RREG32(DMA_STATUS_REG));
2384
2385 /* Disable DMA */
2386 tmp = RREG32(DMA_RB_CNTL);
2387 tmp &= ~DMA_RB_ENABLE;
2388 WREG32(DMA_RB_CNTL, tmp);
2389
2390 /* Reset dma */
2391 WREG32(SRBM_SOFT_RESET, SOFT_RESET_DMA);
2392 RREG32(SRBM_SOFT_RESET);
2393 udelay(50);
2394 WREG32(SRBM_SOFT_RESET, 0);
2395
2396 dev_info(rdev->dev, " R_00D034_DMA_STATUS_REG = 0x%08X\n",
2397 RREG32(DMA_STATUS_REG));
2398}
2399
2400static int evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
2401{
2402 struct evergreen_mc_save save;
2403
2404 if (reset_mask == 0)
2405 return 0;
2406
2407 dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask);
2408
2409 evergreen_mc_stop(rdev, &save);
2410 if (evergreen_mc_wait_for_idle(rdev)) {
2411 dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
2412 }
2413
2414 if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE))
2415 evergreen_gpu_soft_reset_gfx(rdev);
2416
2417 if (reset_mask & RADEON_RESET_DMA)
2418 evergreen_gpu_soft_reset_dma(rdev);
2419
2420 /* Wait a little for things to settle down */
2421 udelay(50);
2422
2379 evergreen_mc_resume(rdev, &save); 2423 evergreen_mc_resume(rdev, &save);
2380 return 0; 2424 return 0;
2381} 2425}
2382 2426
2383int evergreen_asic_reset(struct radeon_device *rdev) 2427int evergreen_asic_reset(struct radeon_device *rdev)
2384{ 2428{
2385 return evergreen_gpu_soft_reset(rdev); 2429 return evergreen_gpu_soft_reset(rdev, (RADEON_RESET_GFX |
2430 RADEON_RESET_COMPUTE |
2431 RADEON_RESET_DMA));
2386} 2432}
2387 2433
2388/* Interrupts */ 2434/* Interrupts */
@@ -3215,7 +3261,7 @@ void evergreen_dma_fence_ring_emit(struct radeon_device *rdev,
3215 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_TRAP, 0, 0, 0)); 3261 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_TRAP, 0, 0, 0));
3216 /* flush HDP */ 3262 /* flush HDP */
3217 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0, 0)); 3263 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0, 0));
3218 radeon_ring_write(ring, (0xf << 16) | HDP_MEM_COHERENCY_FLUSH_CNTL); 3264 radeon_ring_write(ring, (0xf << 16) | (HDP_MEM_COHERENCY_FLUSH_CNTL >> 2));
3219 radeon_ring_write(ring, 1); 3265 radeon_ring_write(ring, 1);
3220} 3266}
3221 3267
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index cb9baaac9e8..0bfd0e9e469 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -742,8 +742,9 @@
742#define SOFT_RESET_ROM (1 << 14) 742#define SOFT_RESET_ROM (1 << 14)
743#define SOFT_RESET_SEM (1 << 15) 743#define SOFT_RESET_SEM (1 << 15)
744#define SOFT_RESET_VMC (1 << 17) 744#define SOFT_RESET_VMC (1 << 17)
745#define SOFT_RESET_DMA (1 << 20)
745#define SOFT_RESET_TST (1 << 21) 746#define SOFT_RESET_TST (1 << 21)
746#define SOFT_RESET_REGBB (1 << 22) 747#define SOFT_RESET_REGBB (1 << 22)
747#define SOFT_RESET_ORB (1 << 23) 748#define SOFT_RESET_ORB (1 << 23)
748 749
749/* display watermarks */ 750/* display watermarks */
@@ -2027,4 +2028,15 @@
2027/* cayman packet3 addition */ 2028/* cayman packet3 addition */
2028#define CAYMAN_PACKET3_DEALLOC_STATE 0x14 2029#define CAYMAN_PACKET3_DEALLOC_STATE 0x14
2029 2030
2031/* DMA regs common on r6xx/r7xx/evergreen/ni */
2032#define DMA_RB_CNTL 0xd000
2033# define DMA_RB_ENABLE (1 << 0)
2034# define DMA_RB_SIZE(x) ((x) << 1) /* log2 */
2035# define DMA_RB_SWAP_ENABLE (1 << 9) /* 8IN32 */
2036# define DMA_RPTR_WRITEBACK_ENABLE (1 << 12)
2037# define DMA_RPTR_WRITEBACK_SWAP_ENABLE (1 << 13) /* 8IN32 */
2038# define DMA_RPTR_WRITEBACK_TIMER(x) ((x) << 16) /* log2 */
2039#define DMA_STATUS_REG 0xd034
2040# define DMA_IDLE (1 << 0)
2041
2030#endif 2042#endif
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 7bdbcb00aaf..896f1cbc58a 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1306,22 +1306,20 @@ void cayman_dma_fini(struct radeon_device *rdev)
1306 radeon_ring_fini(rdev, &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]); 1306 radeon_ring_fini(rdev, &rdev->ring[CAYMAN_RING_TYPE_DMA1_INDEX]);
1307} 1307}
1308 1308
1309static int cayman_gpu_soft_reset(struct radeon_device *rdev) 1309static void cayman_gpu_soft_reset_gfx(struct radeon_device *rdev)
1310{ 1310{
1311 struct evergreen_mc_save save;
1312 u32 grbm_reset = 0; 1311 u32 grbm_reset = 0;
1313 1312
1314 if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE)) 1313 if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE))
1315 return 0; 1314 return;
1316 1315
1317 dev_info(rdev->dev, "GPU softreset \n"); 1316 dev_info(rdev->dev, " GRBM_STATUS = 0x%08X\n",
1318 dev_info(rdev->dev, " GRBM_STATUS=0x%08X\n",
1319 RREG32(GRBM_STATUS)); 1317 RREG32(GRBM_STATUS));
1320 dev_info(rdev->dev, " GRBM_STATUS_SE0=0x%08X\n", 1318 dev_info(rdev->dev, " GRBM_STATUS_SE0 = 0x%08X\n",
1321 RREG32(GRBM_STATUS_SE0)); 1319 RREG32(GRBM_STATUS_SE0));
1322 dev_info(rdev->dev, " GRBM_STATUS_SE1=0x%08X\n", 1320 dev_info(rdev->dev, " GRBM_STATUS_SE1 = 0x%08X\n",
1323 RREG32(GRBM_STATUS_SE1)); 1321 RREG32(GRBM_STATUS_SE1));
1324 dev_info(rdev->dev, " SRBM_STATUS=0x%08X\n", 1322 dev_info(rdev->dev, " SRBM_STATUS = 0x%08X\n",
1325 RREG32(SRBM_STATUS)); 1323 RREG32(SRBM_STATUS));
1326 dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n", 1324 dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n",
1327 RREG32(CP_STALLED_STAT1)); 1325 RREG32(CP_STALLED_STAT1));
@@ -1331,19 +1329,7 @@ static int cayman_gpu_soft_reset(struct radeon_device *rdev)
1331 RREG32(CP_BUSY_STAT)); 1329 RREG32(CP_BUSY_STAT));
1332 dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n", 1330 dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n",
1333 RREG32(CP_STAT)); 1331 RREG32(CP_STAT));
1334 dev_info(rdev->dev, " VM_CONTEXT0_PROTECTION_FAULT_ADDR 0x%08X\n",
1335 RREG32(0x14F8));
1336 dev_info(rdev->dev, " VM_CONTEXT0_PROTECTION_FAULT_STATUS 0x%08X\n",
1337 RREG32(0x14D8));
1338 dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n",
1339 RREG32(0x14FC));
1340 dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n",
1341 RREG32(0x14DC));
1342 1332
1343 evergreen_mc_stop(rdev, &save);
1344 if (evergreen_mc_wait_for_idle(rdev)) {
1345 dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
1346 }
1347 /* Disable CP parsing/prefetching */ 1333 /* Disable CP parsing/prefetching */
1348 WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT); 1334 WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);
1349 1335
@@ -1368,16 +1354,14 @@ static int cayman_gpu_soft_reset(struct radeon_device *rdev)
1368 udelay(50); 1354 udelay(50);
1369 WREG32(GRBM_SOFT_RESET, 0); 1355 WREG32(GRBM_SOFT_RESET, 0);
1370 (void)RREG32(GRBM_SOFT_RESET); 1356 (void)RREG32(GRBM_SOFT_RESET);
1371 /* Wait a little for things to settle down */
1372 udelay(50);
1373 1357
1374 dev_info(rdev->dev, " GRBM_STATUS=0x%08X\n", 1358 dev_info(rdev->dev, " GRBM_STATUS = 0x%08X\n",
1375 RREG32(GRBM_STATUS)); 1359 RREG32(GRBM_STATUS));
1376 dev_info(rdev->dev, " GRBM_STATUS_SE0=0x%08X\n", 1360 dev_info(rdev->dev, " GRBM_STATUS_SE0 = 0x%08X\n",
1377 RREG32(GRBM_STATUS_SE0)); 1361 RREG32(GRBM_STATUS_SE0));
1378 dev_info(rdev->dev, " GRBM_STATUS_SE1=0x%08X\n", 1362 dev_info(rdev->dev, " GRBM_STATUS_SE1 = 0x%08X\n",
1379 RREG32(GRBM_STATUS_SE1)); 1363 RREG32(GRBM_STATUS_SE1));
1380 dev_info(rdev->dev, " SRBM_STATUS=0x%08X\n", 1364 dev_info(rdev->dev, " SRBM_STATUS = 0x%08X\n",
1381 RREG32(SRBM_STATUS)); 1365 RREG32(SRBM_STATUS));
1382 dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n", 1366 dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n",
1383 RREG32(CP_STALLED_STAT1)); 1367 RREG32(CP_STALLED_STAT1));
@@ -1387,13 +1371,81 @@ static int cayman_gpu_soft_reset(struct radeon_device *rdev)
1387 RREG32(CP_BUSY_STAT)); 1371 RREG32(CP_BUSY_STAT));
1388 dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n", 1372 dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n",
1389 RREG32(CP_STAT)); 1373 RREG32(CP_STAT));
1374
1375}
1376
1377static void cayman_gpu_soft_reset_dma(struct radeon_device *rdev)
1378{
1379 u32 tmp;
1380
1381 if (RREG32(DMA_STATUS_REG) & DMA_IDLE)
1382 return;
1383
1384 dev_info(rdev->dev, " R_00D034_DMA_STATUS_REG = 0x%08X\n",
1385 RREG32(DMA_STATUS_REG));
1386
1387 /* dma0 */
1388 tmp = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET);
1389 tmp &= ~DMA_RB_ENABLE;
1390 WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp);
1391
1392 /* dma1 */
1393 tmp = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET);
1394 tmp &= ~DMA_RB_ENABLE;
1395 WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, tmp);
1396
1397 /* Reset dma */
1398 WREG32(SRBM_SOFT_RESET, SOFT_RESET_DMA | SOFT_RESET_DMA1);
1399 RREG32(SRBM_SOFT_RESET);
1400 udelay(50);
1401 WREG32(SRBM_SOFT_RESET, 0);
1402
1403 dev_info(rdev->dev, " R_00D034_DMA_STATUS_REG = 0x%08X\n",
1404 RREG32(DMA_STATUS_REG));
1405
1406}
1407
1408static int cayman_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
1409{
1410 struct evergreen_mc_save save;
1411
1412 if (reset_mask == 0)
1413 return 0;
1414
1415 dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask);
1416
1417 dev_info(rdev->dev, " VM_CONTEXT0_PROTECTION_FAULT_ADDR 0x%08X\n",
1418 RREG32(0x14F8));
1419 dev_info(rdev->dev, " VM_CONTEXT0_PROTECTION_FAULT_STATUS 0x%08X\n",
1420 RREG32(0x14D8));
1421 dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n",
1422 RREG32(0x14FC));
1423 dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n",
1424 RREG32(0x14DC));
1425
1426 evergreen_mc_stop(rdev, &save);
1427 if (evergreen_mc_wait_for_idle(rdev)) {
1428 dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
1429 }
1430
1431 if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE))
1432 cayman_gpu_soft_reset_gfx(rdev);
1433
1434 if (reset_mask & RADEON_RESET_DMA)
1435 cayman_gpu_soft_reset_dma(rdev);
1436
1437 /* Wait a little for things to settle down */
1438 udelay(50);
1439
1390 evergreen_mc_resume(rdev, &save); 1440 evergreen_mc_resume(rdev, &save);
1391 return 0; 1441 return 0;
1392} 1442}
1393 1443
1394int cayman_asic_reset(struct radeon_device *rdev) 1444int cayman_asic_reset(struct radeon_device *rdev)
1395{ 1445{
1396 return cayman_gpu_soft_reset(rdev); 1446 return cayman_gpu_soft_reset(rdev, (RADEON_RESET_GFX |
1447 RADEON_RESET_COMPUTE |
1448 RADEON_RESET_DMA));
1397} 1449}
1398 1450
1399/** 1451/**
diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h
index b93186b8ee4..48e5022ee92 100644
--- a/drivers/gpu/drm/radeon/nid.h
+++ b/drivers/gpu/drm/radeon/nid.h
@@ -65,7 +65,7 @@
65#define SOFT_RESET_VMC (1 << 17) 65#define SOFT_RESET_VMC (1 << 17)
66#define SOFT_RESET_DMA (1 << 20) 66#define SOFT_RESET_DMA (1 << 20)
67#define SOFT_RESET_TST (1 << 21) 67#define SOFT_RESET_TST (1 << 21)
68#define SOFT_RESET_REGBB (1 << 22) 68#define SOFT_RESET_REGBB (1 << 22)
69#define SOFT_RESET_ORB (1 << 23) 69#define SOFT_RESET_ORB (1 << 23)
70 70
71#define VM_CONTEXT0_REQUEST_RESPONSE 0x1470 71#define VM_CONTEXT0_REQUEST_RESPONSE 0x1470
@@ -675,4 +675,3 @@
675#define DMA_PACKET_NOP 0xf 675#define DMA_PACKET_NOP 0xf
676 676
677#endif 677#endif
678
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 2aaf147969b..537e259b383 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1258,9 +1258,8 @@ void r600_vram_scratch_fini(struct radeon_device *rdev)
1258 * reset, it's up to the caller to determine if the GPU needs one. We 1258 * reset, it's up to the caller to determine if the GPU needs one. We
1259 * might add an helper function to check that. 1259 * might add an helper function to check that.
1260 */ 1260 */
1261static int r600_gpu_soft_reset(struct radeon_device *rdev) 1261static void r600_gpu_soft_reset_gfx(struct radeon_device *rdev)
1262{ 1262{
1263 struct rv515_mc_save save;
1264 u32 grbm_busy_mask = S_008010_VC_BUSY(1) | S_008010_VGT_BUSY_NO_DMA(1) | 1263 u32 grbm_busy_mask = S_008010_VC_BUSY(1) | S_008010_VGT_BUSY_NO_DMA(1) |
1265 S_008010_VGT_BUSY(1) | S_008010_TA03_BUSY(1) | 1264 S_008010_VGT_BUSY(1) | S_008010_TA03_BUSY(1) |
1266 S_008010_TC_BUSY(1) | S_008010_SX_BUSY(1) | 1265 S_008010_TC_BUSY(1) | S_008010_SX_BUSY(1) |
@@ -1280,14 +1279,13 @@ static int r600_gpu_soft_reset(struct radeon_device *rdev)
1280 u32 tmp; 1279 u32 tmp;
1281 1280
1282 if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE)) 1281 if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE))
1283 return 0; 1282 return;
1284 1283
1285 dev_info(rdev->dev, "GPU softreset \n"); 1284 dev_info(rdev->dev, " R_008010_GRBM_STATUS = 0x%08X\n",
1286 dev_info(rdev->dev, " R_008010_GRBM_STATUS=0x%08X\n",
1287 RREG32(R_008010_GRBM_STATUS)); 1285 RREG32(R_008010_GRBM_STATUS));
1288 dev_info(rdev->dev, " R_008014_GRBM_STATUS2=0x%08X\n", 1286 dev_info(rdev->dev, " R_008014_GRBM_STATUS2 = 0x%08X\n",
1289 RREG32(R_008014_GRBM_STATUS2)); 1287 RREG32(R_008014_GRBM_STATUS2));
1290 dev_info(rdev->dev, " R_000E50_SRBM_STATUS=0x%08X\n", 1288 dev_info(rdev->dev, " R_000E50_SRBM_STATUS = 0x%08X\n",
1291 RREG32(R_000E50_SRBM_STATUS)); 1289 RREG32(R_000E50_SRBM_STATUS));
1292 dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n", 1290 dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n",
1293 RREG32(CP_STALLED_STAT1)); 1291 RREG32(CP_STALLED_STAT1));
@@ -1297,12 +1295,10 @@ static int r600_gpu_soft_reset(struct radeon_device *rdev)
1297 RREG32(CP_BUSY_STAT)); 1295 RREG32(CP_BUSY_STAT));
1298 dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n", 1296 dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n",
1299 RREG32(CP_STAT)); 1297 RREG32(CP_STAT));
1300 rv515_mc_stop(rdev, &save); 1298
1301 if (r600_mc_wait_for_idle(rdev)) {
1302 dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
1303 }
1304 /* Disable CP parsing/prefetching */ 1299 /* Disable CP parsing/prefetching */
1305 WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1)); 1300 WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1));
1301
1306 /* Check if any of the rendering block is busy and reset it */ 1302 /* Check if any of the rendering block is busy and reset it */
1307 if ((RREG32(R_008010_GRBM_STATUS) & grbm_busy_mask) || 1303 if ((RREG32(R_008010_GRBM_STATUS) & grbm_busy_mask) ||
1308 (RREG32(R_008014_GRBM_STATUS2) & grbm2_busy_mask)) { 1304 (RREG32(R_008014_GRBM_STATUS2) & grbm2_busy_mask)) {
@@ -1332,13 +1328,12 @@ static int r600_gpu_soft_reset(struct radeon_device *rdev)
1332 RREG32(R_008020_GRBM_SOFT_RESET); 1328 RREG32(R_008020_GRBM_SOFT_RESET);
1333 mdelay(15); 1329 mdelay(15);
1334 WREG32(R_008020_GRBM_SOFT_RESET, 0); 1330 WREG32(R_008020_GRBM_SOFT_RESET, 0);
1335 /* Wait a little for things to settle down */ 1331
1336 mdelay(1); 1332 dev_info(rdev->dev, " R_008010_GRBM_STATUS = 0x%08X\n",
1337 dev_info(rdev->dev, " R_008010_GRBM_STATUS=0x%08X\n",
1338 RREG32(R_008010_GRBM_STATUS)); 1333 RREG32(R_008010_GRBM_STATUS));
1339 dev_info(rdev->dev, " R_008014_GRBM_STATUS2=0x%08X\n", 1334 dev_info(rdev->dev, " R_008014_GRBM_STATUS2 = 0x%08X\n",
1340 RREG32(R_008014_GRBM_STATUS2)); 1335 RREG32(R_008014_GRBM_STATUS2));
1341 dev_info(rdev->dev, " R_000E50_SRBM_STATUS=0x%08X\n", 1336 dev_info(rdev->dev, " R_000E50_SRBM_STATUS = 0x%08X\n",
1342 RREG32(R_000E50_SRBM_STATUS)); 1337 RREG32(R_000E50_SRBM_STATUS));
1343 dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n", 1338 dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n",
1344 RREG32(CP_STALLED_STAT1)); 1339 RREG32(CP_STALLED_STAT1));
@@ -1348,6 +1343,60 @@ static int r600_gpu_soft_reset(struct radeon_device *rdev)
1348 RREG32(CP_BUSY_STAT)); 1343 RREG32(CP_BUSY_STAT));
1349 dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n", 1344 dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n",
1350 RREG32(CP_STAT)); 1345 RREG32(CP_STAT));
1346
1347}
1348
1349static void r600_gpu_soft_reset_dma(struct radeon_device *rdev)
1350{
1351 u32 tmp;
1352
1353 if (RREG32(DMA_STATUS_REG) & DMA_IDLE)
1354 return;
1355
1356 dev_info(rdev->dev, " R_00D034_DMA_STATUS_REG = 0x%08X\n",
1357 RREG32(DMA_STATUS_REG));
1358
1359 /* Disable DMA */
1360 tmp = RREG32(DMA_RB_CNTL);
1361 tmp &= ~DMA_RB_ENABLE;
1362 WREG32(DMA_RB_CNTL, tmp);
1363
1364 /* Reset dma */
1365 if (rdev->family >= CHIP_RV770)
1366 WREG32(SRBM_SOFT_RESET, RV770_SOFT_RESET_DMA);
1367 else
1368 WREG32(SRBM_SOFT_RESET, SOFT_RESET_DMA);
1369 RREG32(SRBM_SOFT_RESET);
1370 udelay(50);
1371 WREG32(SRBM_SOFT_RESET, 0);
1372
1373 dev_info(rdev->dev, " R_00D034_DMA_STATUS_REG = 0x%08X\n",
1374 RREG32(DMA_STATUS_REG));
1375}
1376
1377static int r600_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
1378{
1379 struct rv515_mc_save save;
1380
1381 if (reset_mask == 0)
1382 return 0;
1383
1384 dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask);
1385
1386 rv515_mc_stop(rdev, &save);
1387 if (r600_mc_wait_for_idle(rdev)) {
1388 dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
1389 }
1390
1391 if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE))
1392 r600_gpu_soft_reset_gfx(rdev);
1393
1394 if (reset_mask & RADEON_RESET_DMA)
1395 r600_gpu_soft_reset_dma(rdev);
1396
1397 /* Wait a little for things to settle down */
1398 mdelay(1);
1399
1351 rv515_mc_resume(rdev, &save); 1400 rv515_mc_resume(rdev, &save);
1352 return 0; 1401 return 0;
1353} 1402}
@@ -1395,7 +1444,9 @@ bool r600_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
1395 1444
1396int r600_asic_reset(struct radeon_device *rdev) 1445int r600_asic_reset(struct radeon_device *rdev)
1397{ 1446{
1398 return r600_gpu_soft_reset(rdev); 1447 return r600_gpu_soft_reset(rdev, (RADEON_RESET_GFX |
1448 RADEON_RESET_COMPUTE |
1449 RADEON_RESET_DMA));
1399} 1450}
1400 1451
1401u32 r6xx_remap_render_backend(struct radeon_device *rdev, 1452u32 r6xx_remap_render_backend(struct radeon_device *rdev,
@@ -2595,7 +2646,7 @@ int r600_copy_blit(struct radeon_device *rdev,
2595 * @num_gpu_pages: number of GPU pages to xfer 2646 * @num_gpu_pages: number of GPU pages to xfer
2596 * @fence: radeon fence object 2647 * @fence: radeon fence object
2597 * 2648 *
2598 * Copy GPU paging using the DMA engine (r6xx-r7xx). 2649 * Copy GPU paging using the DMA engine (r6xx).
2599 * Used by the radeon ttm implementation to move pages if 2650 * Used by the radeon ttm implementation to move pages if
2600 * registered as the asic copy callback. 2651 * registered as the asic copy callback.
2601 */ 2652 */
@@ -2618,8 +2669,8 @@ int r600_copy_dma(struct radeon_device *rdev,
2618 } 2669 }
2619 2670
2620 size_in_dw = (num_gpu_pages << RADEON_GPU_PAGE_SHIFT) / 4; 2671 size_in_dw = (num_gpu_pages << RADEON_GPU_PAGE_SHIFT) / 4;
2621 num_loops = DIV_ROUND_UP(size_in_dw, 0xffff); 2672 num_loops = DIV_ROUND_UP(size_in_dw, 0xFFFE);
2622 r = radeon_ring_lock(rdev, ring, num_loops * 5 + 8); 2673 r = radeon_ring_lock(rdev, ring, num_loops * 4 + 8);
2623 if (r) { 2674 if (r) {
2624 DRM_ERROR("radeon: moving bo (%d).\n", r); 2675 DRM_ERROR("radeon: moving bo (%d).\n", r);
2625 radeon_semaphore_free(rdev, &sem, NULL); 2676 radeon_semaphore_free(rdev, &sem, NULL);
@@ -2636,14 +2687,14 @@ int r600_copy_dma(struct radeon_device *rdev,
2636 2687
2637 for (i = 0; i < num_loops; i++) { 2688 for (i = 0; i < num_loops; i++) {
2638 cur_size_in_dw = size_in_dw; 2689 cur_size_in_dw = size_in_dw;
2639 if (cur_size_in_dw > 0xFFFF) 2690 if (cur_size_in_dw > 0xFFFE)
2640 cur_size_in_dw = 0xFFFF; 2691 cur_size_in_dw = 0xFFFE;
2641 size_in_dw -= cur_size_in_dw; 2692 size_in_dw -= cur_size_in_dw;
2642 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_COPY, 0, 0, cur_size_in_dw)); 2693 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_COPY, 0, 0, cur_size_in_dw));
2643 radeon_ring_write(ring, dst_offset & 0xfffffffc); 2694 radeon_ring_write(ring, dst_offset & 0xfffffffc);
2644 radeon_ring_write(ring, src_offset & 0xfffffffc); 2695 radeon_ring_write(ring, src_offset & 0xfffffffc);
2645 radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xff); 2696 radeon_ring_write(ring, (((upper_32_bits(dst_offset) & 0xff) << 16) |
2646 radeon_ring_write(ring, upper_32_bits(src_offset) & 0xff); 2697 (upper_32_bits(src_offset) & 0xff)));
2647 src_offset += cur_size_in_dw * 4; 2698 src_offset += cur_size_in_dw * 4;
2648 dst_offset += cur_size_in_dw * 4; 2699 dst_offset += cur_size_in_dw * 4;
2649 } 2700 }
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index 9ea13d07cc5..03191a56eb4 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -2677,16 +2677,29 @@ int r600_dma_cs_parse(struct radeon_cs_parser *p)
2677 } 2677 }
2678 p->idx += 7; 2678 p->idx += 7;
2679 } else { 2679 } else {
2680 src_offset = ib[idx+2]; 2680 if (p->family >= CHIP_RV770) {
2681 src_offset |= ((u64)(ib[idx+4] & 0xff)) << 32; 2681 src_offset = ib[idx+2];
2682 dst_offset = ib[idx+1]; 2682 src_offset |= ((u64)(ib[idx+4] & 0xff)) << 32;
2683 dst_offset |= ((u64)(ib[idx+3] & 0xff)) << 32; 2683 dst_offset = ib[idx+1];
2684 dst_offset |= ((u64)(ib[idx+3] & 0xff)) << 32;
2684 2685
2685 ib[idx+1] += (u32)(dst_reloc->lobj.gpu_offset & 0xfffffffc); 2686 ib[idx+1] += (u32)(dst_reloc->lobj.gpu_offset & 0xfffffffc);
2686 ib[idx+2] += (u32)(src_reloc->lobj.gpu_offset & 0xfffffffc); 2687 ib[idx+2] += (u32)(src_reloc->lobj.gpu_offset & 0xfffffffc);
2687 ib[idx+3] += upper_32_bits(dst_reloc->lobj.gpu_offset) & 0xff; 2688 ib[idx+3] += upper_32_bits(dst_reloc->lobj.gpu_offset) & 0xff;
2688 ib[idx+4] += upper_32_bits(src_reloc->lobj.gpu_offset) & 0xff; 2689 ib[idx+4] += upper_32_bits(src_reloc->lobj.gpu_offset) & 0xff;
2689 p->idx += 5; 2690 p->idx += 5;
2691 } else {
2692 src_offset = ib[idx+2];
2693 src_offset |= ((u64)(ib[idx+3] & 0xff)) << 32;
2694 dst_offset = ib[idx+1];
2695 dst_offset |= ((u64)(ib[idx+3] & 0xff0000)) << 16;
2696
2697 ib[idx+1] += (u32)(dst_reloc->lobj.gpu_offset & 0xfffffffc);
2698 ib[idx+2] += (u32)(src_reloc->lobj.gpu_offset & 0xfffffffc);
2699 ib[idx+3] += upper_32_bits(src_reloc->lobj.gpu_offset) & 0xff;
2700 ib[idx+3] += (upper_32_bits(dst_reloc->lobj.gpu_offset) & 0xff) << 16;
2701 p->idx += 4;
2702 }
2690 } 2703 }
2691 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { 2704 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) {
2692 dev_warn(p->dev, "DMA copy src buffer too small (%llu %lu)\n", 2705 dev_warn(p->dev, "DMA copy src buffer too small (%llu %lu)\n",
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 9b9422c4403..34e52304a52 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -132,6 +132,11 @@ extern int radeon_lockup_timeout;
132#define RADEON_VA_RESERVED_SIZE (8 << 20) 132#define RADEON_VA_RESERVED_SIZE (8 << 20)
133#define RADEON_IB_VM_MAX_SIZE (64 << 10) 133#define RADEON_IB_VM_MAX_SIZE (64 << 10)
134 134
135/* reset flags */
136#define RADEON_RESET_GFX (1 << 0)
137#define RADEON_RESET_COMPUTE (1 << 1)
138#define RADEON_RESET_DMA (1 << 2)
139
135/* 140/*
136 * Errata workarounds. 141 * Errata workarounds.
137 */ 142 */
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 596bcbe80ed..9056fafb00e 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1140,9 +1140,9 @@ static struct radeon_asic rv770_asic = {
1140 .copy = { 1140 .copy = {
1141 .blit = &r600_copy_blit, 1141 .blit = &r600_copy_blit,
1142 .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, 1142 .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
1143 .dma = &r600_copy_dma, 1143 .dma = &rv770_copy_dma,
1144 .dma_ring_index = R600_RING_TYPE_DMA_INDEX, 1144 .dma_ring_index = R600_RING_TYPE_DMA_INDEX,
1145 .copy = &r600_copy_dma, 1145 .copy = &rv770_copy_dma,
1146 .copy_ring_index = R600_RING_TYPE_DMA_INDEX, 1146 .copy_ring_index = R600_RING_TYPE_DMA_INDEX,
1147 }, 1147 },
1148 .surface = { 1148 .surface = {
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 5f4882cc215..15d70e61307 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -403,6 +403,10 @@ u32 rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base);
403void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc); 403void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);
404void r700_cp_stop(struct radeon_device *rdev); 404void r700_cp_stop(struct radeon_device *rdev);
405void r700_cp_fini(struct radeon_device *rdev); 405void r700_cp_fini(struct radeon_device *rdev);
406int rv770_copy_dma(struct radeon_device *rdev,
407 uint64_t src_offset, uint64_t dst_offset,
408 unsigned num_gpu_pages,
409 struct radeon_fence **fence);
406 410
407/* 411/*
408 * evergreen 412 * evergreen
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index 4af89126e22..33a56a09ff1 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -1548,6 +1548,9 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1548 of_machine_is_compatible("PowerBook6,7")) { 1548 of_machine_is_compatible("PowerBook6,7")) {
1549 /* ibook */ 1549 /* ibook */
1550 rdev->mode_info.connector_table = CT_IBOOK; 1550 rdev->mode_info.connector_table = CT_IBOOK;
1551 } else if (of_machine_is_compatible("PowerMac3,5")) {
1552 /* PowerMac G4 Silver radeon 7500 */
1553 rdev->mode_info.connector_table = CT_MAC_G4_SILVER;
1551 } else if (of_machine_is_compatible("PowerMac4,4")) { 1554 } else if (of_machine_is_compatible("PowerMac4,4")) {
1552 /* emac */ 1555 /* emac */
1553 rdev->mode_info.connector_table = CT_EMAC; 1556 rdev->mode_info.connector_table = CT_EMAC;
@@ -2212,6 +2215,54 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
2212 CONNECTOR_OBJECT_ID_SVIDEO, 2215 CONNECTOR_OBJECT_ID_SVIDEO,
2213 &hpd); 2216 &hpd);
2214 break; 2217 break;
2218 case CT_MAC_G4_SILVER:
2219 DRM_INFO("Connector Table: %d (mac g4 silver)\n",
2220 rdev->mode_info.connector_table);
2221 /* DVI-I - tv dac, int tmds */
2222 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
2223 hpd.hpd = RADEON_HPD_1; /* ??? */
2224 radeon_add_legacy_encoder(dev,
2225 radeon_get_encoder_enum(dev,
2226 ATOM_DEVICE_DFP1_SUPPORT,
2227 0),
2228 ATOM_DEVICE_DFP1_SUPPORT);
2229 radeon_add_legacy_encoder(dev,
2230 radeon_get_encoder_enum(dev,
2231 ATOM_DEVICE_CRT2_SUPPORT,
2232 2),
2233 ATOM_DEVICE_CRT2_SUPPORT);
2234 radeon_add_legacy_connector(dev, 0,
2235 ATOM_DEVICE_DFP1_SUPPORT |
2236 ATOM_DEVICE_CRT2_SUPPORT,
2237 DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
2238 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I,
2239 &hpd);
2240 /* VGA - primary dac */
2241 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
2242 hpd.hpd = RADEON_HPD_NONE;
2243 radeon_add_legacy_encoder(dev,
2244 radeon_get_encoder_enum(dev,
2245 ATOM_DEVICE_CRT1_SUPPORT,
2246 1),
2247 ATOM_DEVICE_CRT1_SUPPORT);
2248 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT1_SUPPORT,
2249 DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
2250 CONNECTOR_OBJECT_ID_VGA,
2251 &hpd);
2252 /* TV - TV DAC */
2253 ddc_i2c.valid = false;
2254 hpd.hpd = RADEON_HPD_NONE;
2255 radeon_add_legacy_encoder(dev,
2256 radeon_get_encoder_enum(dev,
2257 ATOM_DEVICE_TV1_SUPPORT,
2258 2),
2259 ATOM_DEVICE_TV1_SUPPORT);
2260 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
2261 DRM_MODE_CONNECTOR_SVIDEO,
2262 &ddc_i2c,
2263 CONNECTOR_OBJECT_ID_SVIDEO,
2264 &hpd);
2265 break;
2215 default: 2266 default:
2216 DRM_INFO("Connector table: %d (invalid)\n", 2267 DRM_INFO("Connector table: %d (invalid)\n",
2217 rdev->mode_info.connector_table); 2268 rdev->mode_info.connector_table);
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index 47bf162ab9c..2399f25ec03 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -741,7 +741,7 @@ radeon_vga_detect(struct drm_connector *connector, bool force)
741 ret = connector_status_disconnected; 741 ret = connector_status_disconnected;
742 742
743 if (radeon_connector->ddc_bus) 743 if (radeon_connector->ddc_bus)
744 dret = radeon_ddc_probe(radeon_connector); 744 dret = radeon_ddc_probe(radeon_connector, false);
745 if (dret) { 745 if (dret) {
746 radeon_connector->detected_by_load = false; 746 radeon_connector->detected_by_load = false;
747 if (radeon_connector->edid) { 747 if (radeon_connector->edid) {
@@ -947,7 +947,7 @@ radeon_dvi_detect(struct drm_connector *connector, bool force)
947 return connector->status; 947 return connector->status;
948 948
949 if (radeon_connector->ddc_bus) 949 if (radeon_connector->ddc_bus)
950 dret = radeon_ddc_probe(radeon_connector); 950 dret = radeon_ddc_probe(radeon_connector, false);
951 if (dret) { 951 if (dret) {
952 radeon_connector->detected_by_load = false; 952 radeon_connector->detected_by_load = false;
953 if (radeon_connector->edid) { 953 if (radeon_connector->edid) {
@@ -1401,7 +1401,8 @@ radeon_dp_detect(struct drm_connector *connector, bool force)
1401 if (encoder) { 1401 if (encoder) {
1402 /* setup ddc on the bridge */ 1402 /* setup ddc on the bridge */
1403 radeon_atom_ext_encoder_setup_ddc(encoder); 1403 radeon_atom_ext_encoder_setup_ddc(encoder);
1404 if (radeon_ddc_probe(radeon_connector)) /* try DDC */ 1404 /* bridge chips are always aux */
1405 if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */
1405 ret = connector_status_connected; 1406 ret = connector_status_connected;
1406 else if (radeon_connector->dac_load_detect) { /* try load detection */ 1407 else if (radeon_connector->dac_load_detect) { /* try load detection */
1407 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; 1408 struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
@@ -1419,7 +1420,8 @@ radeon_dp_detect(struct drm_connector *connector, bool force)
1419 if (radeon_dp_getdpcd(radeon_connector)) 1420 if (radeon_dp_getdpcd(radeon_connector))
1420 ret = connector_status_connected; 1421 ret = connector_status_connected;
1421 } else { 1422 } else {
1422 if (radeon_ddc_probe(radeon_connector)) 1423 /* try non-aux ddc (DP to DVI/HMDI/etc. adapter) */
1424 if (radeon_ddc_probe(radeon_connector, false))
1423 ret = connector_status_connected; 1425 ret = connector_status_connected;
1424 } 1426 }
1425 } 1427 }
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index cd756262924..edfc54e4184 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -897,6 +897,25 @@ static void radeon_check_arguments(struct radeon_device *rdev)
897} 897}
898 898
899/** 899/**
900 * radeon_switcheroo_quirk_long_wakeup - return true if longer d3 delay is
901 * needed for waking up.
902 *
903 * @pdev: pci dev pointer
904 */
905static bool radeon_switcheroo_quirk_long_wakeup(struct pci_dev *pdev)
906{
907
908 /* 6600m in a macbook pro */
909 if (pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE &&
910 pdev->subsystem_device == 0x00e2) {
911 printk(KERN_INFO "radeon: quirking longer d3 wakeup delay\n");
912 return true;
913 }
914
915 return false;
916}
917
918/**
900 * radeon_switcheroo_set_state - set switcheroo state 919 * radeon_switcheroo_set_state - set switcheroo state
901 * 920 *
902 * @pdev: pci dev pointer 921 * @pdev: pci dev pointer
@@ -910,10 +929,19 @@ static void radeon_switcheroo_set_state(struct pci_dev *pdev, enum vga_switchero
910 struct drm_device *dev = pci_get_drvdata(pdev); 929 struct drm_device *dev = pci_get_drvdata(pdev);
911 pm_message_t pmm = { .event = PM_EVENT_SUSPEND }; 930 pm_message_t pmm = { .event = PM_EVENT_SUSPEND };
912 if (state == VGA_SWITCHEROO_ON) { 931 if (state == VGA_SWITCHEROO_ON) {
932 unsigned d3_delay = dev->pdev->d3_delay;
933
913 printk(KERN_INFO "radeon: switched on\n"); 934 printk(KERN_INFO "radeon: switched on\n");
914 /* don't suspend or resume card normally */ 935 /* don't suspend or resume card normally */
915 dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 936 dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
937
938 if (d3_delay < 20 && radeon_switcheroo_quirk_long_wakeup(pdev))
939 dev->pdev->d3_delay = 20;
940
916 radeon_resume_kms(dev); 941 radeon_resume_kms(dev);
942
943 dev->pdev->d3_delay = d3_delay;
944
917 dev->switch_power_state = DRM_SWITCH_POWER_ON; 945 dev->switch_power_state = DRM_SWITCH_POWER_ON;
918 drm_kms_helper_poll_enable(dev); 946 drm_kms_helper_poll_enable(dev);
919 } else { 947 } else {
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 310c0e5254b..1da2386d7cf 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -699,10 +699,15 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector)
699 if (radeon_connector->router.ddc_valid) 699 if (radeon_connector->router.ddc_valid)
700 radeon_router_select_ddc_port(radeon_connector); 700 radeon_router_select_ddc_port(radeon_connector);
701 701
702 if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) || 702 if (radeon_connector_encoder_get_dp_bridge_encoder_id(&radeon_connector->base) !=
703 (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP) || 703 ENCODER_OBJECT_ID_NONE) {
704 (radeon_connector_encoder_get_dp_bridge_encoder_id(&radeon_connector->base) != 704 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
705 ENCODER_OBJECT_ID_NONE)) { 705
706 if (dig->dp_i2c_bus)
707 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
708 &dig->dp_i2c_bus->adapter);
709 } else if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
710 (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) {
706 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; 711 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
707 712
708 if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT || 713 if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index ff7593498a7..dff6cf77f95 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -306,8 +306,8 @@ static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
306 return 0; 306 return 0;
307} 307}
308 308
309static int __devinit 309static int radeon_pci_probe(struct pci_dev *pdev,
310radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 310 const struct pci_device_id *ent)
311{ 311{
312 int ret; 312 int ret;
313 313
diff --git a/drivers/gpu/drm/radeon/radeon_i2c.c b/drivers/gpu/drm/radeon/radeon_i2c.c
index c5bddd630eb..fc60b74ee30 100644
--- a/drivers/gpu/drm/radeon/radeon_i2c.c
+++ b/drivers/gpu/drm/radeon/radeon_i2c.c
@@ -39,7 +39,7 @@ extern u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap);
39 * radeon_ddc_probe 39 * radeon_ddc_probe
40 * 40 *
41 */ 41 */
42bool radeon_ddc_probe(struct radeon_connector *radeon_connector) 42bool radeon_ddc_probe(struct radeon_connector *radeon_connector, bool use_aux)
43{ 43{
44 u8 out = 0x0; 44 u8 out = 0x0;
45 u8 buf[8]; 45 u8 buf[8];
@@ -63,7 +63,13 @@ bool radeon_ddc_probe(struct radeon_connector *radeon_connector)
63 if (radeon_connector->router.ddc_valid) 63 if (radeon_connector->router.ddc_valid)
64 radeon_router_select_ddc_port(radeon_connector); 64 radeon_router_select_ddc_port(radeon_connector);
65 65
66 ret = i2c_transfer(&radeon_connector->ddc_bus->adapter, msgs, 2); 66 if (use_aux) {
67 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
68 ret = i2c_transfer(&dig->dp_i2c_bus->adapter, msgs, 2);
69 } else {
70 ret = i2c_transfer(&radeon_connector->ddc_bus->adapter, msgs, 2);
71 }
72
67 if (ret != 2) 73 if (ret != 2)
68 /* Couldn't find an accessible DDC on this connector */ 74 /* Couldn't find an accessible DDC on this connector */
69 return false; 75 return false;
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index d818b503b42..4003f5a68c0 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -209,7 +209,8 @@ enum radeon_connector_table {
209 CT_RN50_POWER, 209 CT_RN50_POWER,
210 CT_MAC_X800, 210 CT_MAC_X800,
211 CT_MAC_G5_9600, 211 CT_MAC_G5_9600,
212 CT_SAM440EP 212 CT_SAM440EP,
213 CT_MAC_G4_SILVER
213}; 214};
214 215
215enum radeon_dvo_chip { 216enum radeon_dvo_chip {
@@ -558,7 +559,7 @@ extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
558 u8 val); 559 u8 val);
559extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector); 560extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector);
560extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector); 561extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector);
561extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); 562extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector, bool use_aux);
562extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); 563extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
563 564
564extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); 565extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
diff --git a/drivers/gpu/drm/radeon/radeon_prime.c b/drivers/gpu/drm/radeon/radeon_prime.c
index e09521858f6..26c23bb651c 100644
--- a/drivers/gpu/drm/radeon/radeon_prime.c
+++ b/drivers/gpu/drm/radeon/radeon_prime.c
@@ -194,6 +194,7 @@ struct drm_gem_object *radeon_gem_prime_import(struct drm_device *dev,
194 bo = dma_buf->priv; 194 bo = dma_buf->priv;
195 if (bo->gem_base.dev == dev) { 195 if (bo->gem_base.dev == dev) {
196 drm_gem_object_reference(&bo->gem_base); 196 drm_gem_object_reference(&bo->gem_base);
197 dma_buf_put(dma_buf);
197 return &bo->gem_base; 198 return &bo->gem_base;
198 } 199 }
199 } 200 }
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c
index ebd69562ef6..141f2b6a9cf 100644
--- a/drivers/gpu/drm/radeon/radeon_ring.c
+++ b/drivers/gpu/drm/radeon/radeon_ring.c
@@ -770,22 +770,28 @@ static int radeon_debugfs_ring_info(struct seq_file *m, void *data)
770 int ridx = *(int*)node->info_ent->data; 770 int ridx = *(int*)node->info_ent->data;
771 struct radeon_ring *ring = &rdev->ring[ridx]; 771 struct radeon_ring *ring = &rdev->ring[ridx];
772 unsigned count, i, j; 772 unsigned count, i, j;
773 u32 tmp;
773 774
774 radeon_ring_free_size(rdev, ring); 775 radeon_ring_free_size(rdev, ring);
775 count = (ring->ring_size / 4) - ring->ring_free_dw; 776 count = (ring->ring_size / 4) - ring->ring_free_dw;
776 seq_printf(m, "wptr(0x%04x): 0x%08x\n", ring->wptr_reg, RREG32(ring->wptr_reg)); 777 tmp = RREG32(ring->wptr_reg) >> ring->ptr_reg_shift;
777 seq_printf(m, "rptr(0x%04x): 0x%08x\n", ring->rptr_reg, RREG32(ring->rptr_reg)); 778 seq_printf(m, "wptr(0x%04x): 0x%08x [%5d]\n", ring->wptr_reg, tmp, tmp);
779 tmp = RREG32(ring->rptr_reg) >> ring->ptr_reg_shift;
780 seq_printf(m, "rptr(0x%04x): 0x%08x [%5d]\n", ring->rptr_reg, tmp, tmp);
778 if (ring->rptr_save_reg) { 781 if (ring->rptr_save_reg) {
779 seq_printf(m, "rptr next(0x%04x): 0x%08x\n", ring->rptr_save_reg, 782 seq_printf(m, "rptr next(0x%04x): 0x%08x\n", ring->rptr_save_reg,
780 RREG32(ring->rptr_save_reg)); 783 RREG32(ring->rptr_save_reg));
781 } 784 }
782 seq_printf(m, "driver's copy of the wptr: 0x%08x\n", ring->wptr); 785 seq_printf(m, "driver's copy of the wptr: 0x%08x [%5d]\n", ring->wptr, ring->wptr);
783 seq_printf(m, "driver's copy of the rptr: 0x%08x\n", ring->rptr); 786 seq_printf(m, "driver's copy of the rptr: 0x%08x [%5d]\n", ring->rptr, ring->rptr);
784 seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw); 787 seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw);
785 seq_printf(m, "%u dwords in ring\n", count); 788 seq_printf(m, "%u dwords in ring\n", count);
786 i = ring->rptr; 789 /* print 8 dw before current rptr as often it's the last executed
787 for (j = 0; j <= count; j++) { 790 * packet that is the root issue
788 seq_printf(m, "r[%04d]=0x%08x\n", i, ring->ring[i]); 791 */
792 i = (ring->rptr + ring->ptr_mask + 1 - 32) & ring->ptr_mask;
793 for (j = 0; j <= (count + 32); j++) {
794 seq_printf(m, "r[%5d]=0x%08x\n", i, ring->ring[i]);
789 i = (i + 1) & ring->ptr_mask; 795 i = (i + 1) & ring->ptr_mask;
790 } 796 }
791 return 0; 797 return 0;
@@ -794,11 +800,15 @@ static int radeon_debugfs_ring_info(struct seq_file *m, void *data)
794static int radeon_ring_type_gfx_index = RADEON_RING_TYPE_GFX_INDEX; 800static int radeon_ring_type_gfx_index = RADEON_RING_TYPE_GFX_INDEX;
795static int cayman_ring_type_cp1_index = CAYMAN_RING_TYPE_CP1_INDEX; 801static int cayman_ring_type_cp1_index = CAYMAN_RING_TYPE_CP1_INDEX;
796static int cayman_ring_type_cp2_index = CAYMAN_RING_TYPE_CP2_INDEX; 802static int cayman_ring_type_cp2_index = CAYMAN_RING_TYPE_CP2_INDEX;
803static int radeon_ring_type_dma1_index = R600_RING_TYPE_DMA_INDEX;
804static int radeon_ring_type_dma2_index = CAYMAN_RING_TYPE_DMA1_INDEX;
797 805
798static struct drm_info_list radeon_debugfs_ring_info_list[] = { 806static struct drm_info_list radeon_debugfs_ring_info_list[] = {
799 {"radeon_ring_gfx", radeon_debugfs_ring_info, 0, &radeon_ring_type_gfx_index}, 807 {"radeon_ring_gfx", radeon_debugfs_ring_info, 0, &radeon_ring_type_gfx_index},
800 {"radeon_ring_cp1", radeon_debugfs_ring_info, 0, &cayman_ring_type_cp1_index}, 808 {"radeon_ring_cp1", radeon_debugfs_ring_info, 0, &cayman_ring_type_cp1_index},
801 {"radeon_ring_cp2", radeon_debugfs_ring_info, 0, &cayman_ring_type_cp2_index}, 809 {"radeon_ring_cp2", radeon_debugfs_ring_info, 0, &cayman_ring_type_cp2_index},
810 {"radeon_ring_dma1", radeon_debugfs_ring_info, 0, &radeon_ring_type_dma1_index},
811 {"radeon_ring_dma2", radeon_debugfs_ring_info, 0, &radeon_ring_type_dma2_index},
802}; 812};
803 813
804static int radeon_debugfs_sa_info(struct seq_file *m, void *data) 814static int radeon_debugfs_sa_info(struct seq_file *m, void *data)
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 87c979c4f72..1b2444f4d8f 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -887,6 +887,80 @@ static int rv770_mc_init(struct radeon_device *rdev)
887 return 0; 887 return 0;
888} 888}
889 889
890/**
891 * rv770_copy_dma - copy pages using the DMA engine
892 *
893 * @rdev: radeon_device pointer
894 * @src_offset: src GPU address
895 * @dst_offset: dst GPU address
896 * @num_gpu_pages: number of GPU pages to xfer
897 * @fence: radeon fence object
898 *
899 * Copy GPU paging using the DMA engine (r7xx).
900 * Used by the radeon ttm implementation to move pages if
901 * registered as the asic copy callback.
902 */
903int rv770_copy_dma(struct radeon_device *rdev,
904 uint64_t src_offset, uint64_t dst_offset,
905 unsigned num_gpu_pages,
906 struct radeon_fence **fence)
907{
908 struct radeon_semaphore *sem = NULL;
909 int ring_index = rdev->asic->copy.dma_ring_index;
910 struct radeon_ring *ring = &rdev->ring[ring_index];
911 u32 size_in_dw, cur_size_in_dw;
912 int i, num_loops;
913 int r = 0;
914
915 r = radeon_semaphore_create(rdev, &sem);
916 if (r) {
917 DRM_ERROR("radeon: moving bo (%d).\n", r);
918 return r;
919 }
920
921 size_in_dw = (num_gpu_pages << RADEON_GPU_PAGE_SHIFT) / 4;
922 num_loops = DIV_ROUND_UP(size_in_dw, 0xFFFF);
923 r = radeon_ring_lock(rdev, ring, num_loops * 5 + 8);
924 if (r) {
925 DRM_ERROR("radeon: moving bo (%d).\n", r);
926 radeon_semaphore_free(rdev, &sem, NULL);
927 return r;
928 }
929
930 if (radeon_fence_need_sync(*fence, ring->idx)) {
931 radeon_semaphore_sync_rings(rdev, sem, (*fence)->ring,
932 ring->idx);
933 radeon_fence_note_sync(*fence, ring->idx);
934 } else {
935 radeon_semaphore_free(rdev, &sem, NULL);
936 }
937
938 for (i = 0; i < num_loops; i++) {
939 cur_size_in_dw = size_in_dw;
940 if (cur_size_in_dw > 0xFFFF)
941 cur_size_in_dw = 0xFFFF;
942 size_in_dw -= cur_size_in_dw;
943 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_COPY, 0, 0, cur_size_in_dw));
944 radeon_ring_write(ring, dst_offset & 0xfffffffc);
945 radeon_ring_write(ring, src_offset & 0xfffffffc);
946 radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xff);
947 radeon_ring_write(ring, upper_32_bits(src_offset) & 0xff);
948 src_offset += cur_size_in_dw * 4;
949 dst_offset += cur_size_in_dw * 4;
950 }
951
952 r = radeon_fence_emit(rdev, fence, ring->idx);
953 if (r) {
954 radeon_ring_unlock_undo(rdev, ring);
955 return r;
956 }
957
958 radeon_ring_unlock_commit(rdev, ring);
959 radeon_semaphore_free(rdev, &sem, *fence);
960
961 return r;
962}
963
890static int rv770_startup(struct radeon_device *rdev) 964static int rv770_startup(struct radeon_device *rdev)
891{ 965{
892 struct radeon_ring *ring; 966 struct radeon_ring *ring;
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index ef683653f0b..3240a3d64f3 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -2126,15 +2126,13 @@ bool si_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
2126 return radeon_ring_test_lockup(rdev, ring); 2126 return radeon_ring_test_lockup(rdev, ring);
2127} 2127}
2128 2128
2129static int si_gpu_soft_reset(struct radeon_device *rdev) 2129static void si_gpu_soft_reset_gfx(struct radeon_device *rdev)
2130{ 2130{
2131 struct evergreen_mc_save save;
2132 u32 grbm_reset = 0; 2131 u32 grbm_reset = 0;
2133 2132
2134 if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE)) 2133 if (!(RREG32(GRBM_STATUS) & GUI_ACTIVE))
2135 return 0; 2134 return;
2136 2135
2137 dev_info(rdev->dev, "GPU softreset \n");
2138 dev_info(rdev->dev, " GRBM_STATUS=0x%08X\n", 2136 dev_info(rdev->dev, " GRBM_STATUS=0x%08X\n",
2139 RREG32(GRBM_STATUS)); 2137 RREG32(GRBM_STATUS));
2140 dev_info(rdev->dev, " GRBM_STATUS2=0x%08X\n", 2138 dev_info(rdev->dev, " GRBM_STATUS2=0x%08X\n",
@@ -2145,10 +2143,7 @@ static int si_gpu_soft_reset(struct radeon_device *rdev)
2145 RREG32(GRBM_STATUS_SE1)); 2143 RREG32(GRBM_STATUS_SE1));
2146 dev_info(rdev->dev, " SRBM_STATUS=0x%08X\n", 2144 dev_info(rdev->dev, " SRBM_STATUS=0x%08X\n",
2147 RREG32(SRBM_STATUS)); 2145 RREG32(SRBM_STATUS));
2148 evergreen_mc_stop(rdev, &save); 2146
2149 if (radeon_mc_wait_for_idle(rdev)) {
2150 dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
2151 }
2152 /* Disable CP parsing/prefetching */ 2147 /* Disable CP parsing/prefetching */
2153 WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT); 2148 WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);
2154 2149
@@ -2173,8 +2168,7 @@ static int si_gpu_soft_reset(struct radeon_device *rdev)
2173 udelay(50); 2168 udelay(50);
2174 WREG32(GRBM_SOFT_RESET, 0); 2169 WREG32(GRBM_SOFT_RESET, 0);
2175 (void)RREG32(GRBM_SOFT_RESET); 2170 (void)RREG32(GRBM_SOFT_RESET);
2176 /* Wait a little for things to settle down */ 2171
2177 udelay(50);
2178 dev_info(rdev->dev, " GRBM_STATUS=0x%08X\n", 2172 dev_info(rdev->dev, " GRBM_STATUS=0x%08X\n",
2179 RREG32(GRBM_STATUS)); 2173 RREG32(GRBM_STATUS));
2180 dev_info(rdev->dev, " GRBM_STATUS2=0x%08X\n", 2174 dev_info(rdev->dev, " GRBM_STATUS2=0x%08X\n",
@@ -2185,13 +2179,75 @@ static int si_gpu_soft_reset(struct radeon_device *rdev)
2185 RREG32(GRBM_STATUS_SE1)); 2179 RREG32(GRBM_STATUS_SE1));
2186 dev_info(rdev->dev, " SRBM_STATUS=0x%08X\n", 2180 dev_info(rdev->dev, " SRBM_STATUS=0x%08X\n",
2187 RREG32(SRBM_STATUS)); 2181 RREG32(SRBM_STATUS));
2182}
2183
2184static void si_gpu_soft_reset_dma(struct radeon_device *rdev)
2185{
2186 u32 tmp;
2187
2188 if (RREG32(DMA_STATUS_REG) & DMA_IDLE)
2189 return;
2190
2191 dev_info(rdev->dev, " DMA_STATUS_REG = 0x%08X\n",
2192 RREG32(DMA_STATUS_REG));
2193
2194 /* dma0 */
2195 tmp = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET);
2196 tmp &= ~DMA_RB_ENABLE;
2197 WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp);
2198
2199 /* dma1 */
2200 tmp = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET);
2201 tmp &= ~DMA_RB_ENABLE;
2202 WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, tmp);
2203
2204 /* Reset dma */
2205 WREG32(SRBM_SOFT_RESET, SOFT_RESET_DMA | SOFT_RESET_DMA1);
2206 RREG32(SRBM_SOFT_RESET);
2207 udelay(50);
2208 WREG32(SRBM_SOFT_RESET, 0);
2209
2210 dev_info(rdev->dev, " DMA_STATUS_REG = 0x%08X\n",
2211 RREG32(DMA_STATUS_REG));
2212}
2213
2214static int si_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
2215{
2216 struct evergreen_mc_save save;
2217
2218 if (reset_mask == 0)
2219 return 0;
2220
2221 dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask);
2222
2223 dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_ADDR 0x%08X\n",
2224 RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR));
2225 dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n",
2226 RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS));
2227
2228 evergreen_mc_stop(rdev, &save);
2229 if (radeon_mc_wait_for_idle(rdev)) {
2230 dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
2231 }
2232
2233 if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE))
2234 si_gpu_soft_reset_gfx(rdev);
2235
2236 if (reset_mask & RADEON_RESET_DMA)
2237 si_gpu_soft_reset_dma(rdev);
2238
2239 /* Wait a little for things to settle down */
2240 udelay(50);
2241
2188 evergreen_mc_resume(rdev, &save); 2242 evergreen_mc_resume(rdev, &save);
2189 return 0; 2243 return 0;
2190} 2244}
2191 2245
2192int si_asic_reset(struct radeon_device *rdev) 2246int si_asic_reset(struct radeon_device *rdev)
2193{ 2247{
2194 return si_gpu_soft_reset(rdev); 2248 return si_gpu_soft_reset(rdev, (RADEON_RESET_GFX |
2249 RADEON_RESET_COMPUTE |
2250 RADEON_RESET_DMA));
2195} 2251}
2196 2252
2197/* MC */ 2253/* MC */
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h
index 62b46215d42..c056aae814f 100644
--- a/drivers/gpu/drm/radeon/sid.h
+++ b/drivers/gpu/drm/radeon/sid.h
@@ -62,6 +62,22 @@
62 62
63#define SRBM_STATUS 0xE50 63#define SRBM_STATUS 0xE50
64 64
65#define SRBM_SOFT_RESET 0x0E60
66#define SOFT_RESET_BIF (1 << 1)
67#define SOFT_RESET_DC (1 << 5)
68#define SOFT_RESET_DMA1 (1 << 6)
69#define SOFT_RESET_GRBM (1 << 8)
70#define SOFT_RESET_HDP (1 << 9)
71#define SOFT_RESET_IH (1 << 10)
72#define SOFT_RESET_MC (1 << 11)
73#define SOFT_RESET_ROM (1 << 14)
74#define SOFT_RESET_SEM (1 << 15)
75#define SOFT_RESET_VMC (1 << 17)
76#define SOFT_RESET_DMA (1 << 20)
77#define SOFT_RESET_TST (1 << 21)
78#define SOFT_RESET_REGBB (1 << 22)
79#define SOFT_RESET_ORB (1 << 23)
80
65#define CC_SYS_RB_BACKEND_DISABLE 0xe80 81#define CC_SYS_RB_BACKEND_DISABLE 0xe80
66#define GC_USER_SYS_RB_BACKEND_DISABLE 0xe84 82#define GC_USER_SYS_RB_BACKEND_DISABLE 0xe84
67 83
@@ -1013,6 +1029,8 @@
1013# define DATA_SWAP_ENABLE (1 << 3) 1029# define DATA_SWAP_ENABLE (1 << 3)
1014# define FENCE_SWAP_ENABLE (1 << 4) 1030# define FENCE_SWAP_ENABLE (1 << 4)
1015# define CTXEMPTY_INT_ENABLE (1 << 28) 1031# define CTXEMPTY_INT_ENABLE (1 << 28)
1032#define DMA_STATUS_REG 0xd034
1033# define DMA_IDLE (1 << 0)
1016#define DMA_TILING_CONFIG 0xd0b8 1034#define DMA_TILING_CONFIG 0xd0b8
1017 1035
1018#define DMA_PACKET(cmd, b, t, s, n) ((((cmd) & 0xF) << 28) | \ 1036#define DMA_PACKET(cmd, b, t, s, n) ((((cmd) & 0xF) << 28) | \
diff --git a/drivers/gpu/drm/shmobile/shmob_drm_drv.c b/drivers/gpu/drm/shmobile/shmob_drm_drv.c
index 1c350fc4e44..d1d5306ebf2 100644
--- a/drivers/gpu/drm/shmobile/shmob_drm_drv.c
+++ b/drivers/gpu/drm/shmobile/shmob_drm_drv.c
@@ -33,7 +33,7 @@
33 * Hardware initialization 33 * Hardware initialization
34 */ 34 */
35 35
36static int __devinit shmob_drm_init_interface(struct shmob_drm_device *sdev) 36static int shmob_drm_init_interface(struct shmob_drm_device *sdev)
37{ 37{
38 static const u32 ldmt1r[] = { 38 static const u32 ldmt1r[] = {
39 [SHMOB_DRM_IFACE_RGB8] = LDMT1R_MIFTYP_RGB8, 39 [SHMOB_DRM_IFACE_RGB8] = LDMT1R_MIFTYP_RGB8,
@@ -67,7 +67,7 @@ static int __devinit shmob_drm_init_interface(struct shmob_drm_device *sdev)
67 return 0; 67 return 0;
68} 68}
69 69
70static int __devinit shmob_drm_setup_clocks(struct shmob_drm_device *sdev, 70static int shmob_drm_setup_clocks(struct shmob_drm_device *sdev,
71 enum shmob_drm_clk_source clksrc) 71 enum shmob_drm_clk_source clksrc)
72{ 72{
73 struct clk *clk; 73 struct clk *clk;
@@ -330,12 +330,12 @@ static const struct dev_pm_ops shmob_drm_pm_ops = {
330 * Platform driver 330 * Platform driver
331 */ 331 */
332 332
333static int __devinit shmob_drm_probe(struct platform_device *pdev) 333static int shmob_drm_probe(struct platform_device *pdev)
334{ 334{
335 return drm_platform_init(&shmob_drm_driver, pdev); 335 return drm_platform_init(&shmob_drm_driver, pdev);
336} 336}
337 337
338static int __devexit shmob_drm_remove(struct platform_device *pdev) 338static int shmob_drm_remove(struct platform_device *pdev)
339{ 339{
340 drm_platform_exit(&shmob_drm_driver, pdev); 340 drm_platform_exit(&shmob_drm_driver, pdev);
341 341
@@ -344,7 +344,7 @@ static int __devexit shmob_drm_remove(struct platform_device *pdev)
344 344
345static struct platform_driver shmob_drm_platform_driver = { 345static struct platform_driver shmob_drm_platform_driver = {
346 .probe = shmob_drm_probe, 346 .probe = shmob_drm_probe,
347 .remove = __devexit_p(shmob_drm_remove), 347 .remove = shmob_drm_remove,
348 .driver = { 348 .driver = {
349 .owner = THIS_MODULE, 349 .owner = THIS_MODULE,
350 .name = "shmob-drm", 350 .name = "shmob-drm",
diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c
index 9e9c5d2a5c7..d73d6e3e17b 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_util.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
@@ -654,11 +654,13 @@ int ttm_bo_move_accel_cleanup(struct ttm_buffer_object *bo,
654 */ 654 */
655 655
656 set_bit(TTM_BO_PRIV_FLAG_MOVING, &bo->priv_flags); 656 set_bit(TTM_BO_PRIV_FLAG_MOVING, &bo->priv_flags);
657
658 /* ttm_buffer_object_transfer accesses bo->sync_obj */
659 ret = ttm_buffer_object_transfer(bo, &ghost_obj);
657 spin_unlock(&bdev->fence_lock); 660 spin_unlock(&bdev->fence_lock);
658 if (tmp_obj) 661 if (tmp_obj)
659 driver->sync_obj_unref(&tmp_obj); 662 driver->sync_obj_unref(&tmp_obj);
660 663
661 ret = ttm_buffer_object_transfer(bo, &ghost_obj);
662 if (ret) 664 if (ret)
663 return ret; 665 return ret;
664 666