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path: root/drivers/gpu/drm/radeon/radeon_atombios.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_atombios.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_atombios.c51
1 files changed, 38 insertions, 13 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index b1e3820df36..d67d4f3eb6f 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -452,7 +452,7 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev,
452 } 452 }
453 453
454 /* Fujitsu D3003-S2 board lists DVI-I as DVI-D and VGA */ 454 /* Fujitsu D3003-S2 board lists DVI-I as DVI-D and VGA */
455 if ((dev->pdev->device == 0x9802) && 455 if (((dev->pdev->device == 0x9802) || (dev->pdev->device == 0x9806)) &&
456 (dev->pdev->subsystem_vendor == 0x1734) && 456 (dev->pdev->subsystem_vendor == 0x1734) &&
457 (dev->pdev->subsystem_device == 0x11bd)) { 457 (dev->pdev->subsystem_device == 0x11bd)) {
458 if (*connector_type == DRM_MODE_CONNECTOR_VGA) { 458 if (*connector_type == DRM_MODE_CONNECTOR_VGA) {
@@ -1263,6 +1263,8 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
1263union igp_info { 1263union igp_info {
1264 struct _ATOM_INTEGRATED_SYSTEM_INFO info; 1264 struct _ATOM_INTEGRATED_SYSTEM_INFO info;
1265 struct _ATOM_INTEGRATED_SYSTEM_INFO_V2 info_2; 1265 struct _ATOM_INTEGRATED_SYSTEM_INFO_V2 info_2;
1266 struct _ATOM_INTEGRATED_SYSTEM_INFO_V6 info_6;
1267 struct _ATOM_INTEGRATED_SYSTEM_INFO_V1_7 info_7;
1266}; 1268};
1267 1269
1268bool radeon_atombios_sideport_present(struct radeon_device *rdev) 1270bool radeon_atombios_sideport_present(struct radeon_device *rdev)
@@ -1390,27 +1392,50 @@ static void radeon_atombios_get_igp_ss_overrides(struct radeon_device *rdev,
1390 struct radeon_mode_info *mode_info = &rdev->mode_info; 1392 struct radeon_mode_info *mode_info = &rdev->mode_info;
1391 int index = GetIndexIntoMasterTable(DATA, IntegratedSystemInfo); 1393 int index = GetIndexIntoMasterTable(DATA, IntegratedSystemInfo);
1392 u16 data_offset, size; 1394 u16 data_offset, size;
1393 struct _ATOM_INTEGRATED_SYSTEM_INFO_V6 *igp_info; 1395 union igp_info *igp_info;
1394 u8 frev, crev; 1396 u8 frev, crev;
1395 u16 percentage = 0, rate = 0; 1397 u16 percentage = 0, rate = 0;
1396 1398
1397 /* get any igp specific overrides */ 1399 /* get any igp specific overrides */
1398 if (atom_parse_data_header(mode_info->atom_context, index, &size, 1400 if (atom_parse_data_header(mode_info->atom_context, index, &size,
1399 &frev, &crev, &data_offset)) { 1401 &frev, &crev, &data_offset)) {
1400 igp_info = (struct _ATOM_INTEGRATED_SYSTEM_INFO_V6 *) 1402 igp_info = (union igp_info *)
1401 (mode_info->atom_context->bios + data_offset); 1403 (mode_info->atom_context->bios + data_offset);
1402 switch (id) { 1404 switch (crev) {
1403 case ASIC_INTERNAL_SS_ON_TMDS: 1405 case 6:
1404 percentage = le16_to_cpu(igp_info->usDVISSPercentage); 1406 switch (id) {
1405 rate = le16_to_cpu(igp_info->usDVISSpreadRateIn10Hz); 1407 case ASIC_INTERNAL_SS_ON_TMDS:
1408 percentage = le16_to_cpu(igp_info->info_6.usDVISSPercentage);
1409 rate = le16_to_cpu(igp_info->info_6.usDVISSpreadRateIn10Hz);
1410 break;
1411 case ASIC_INTERNAL_SS_ON_HDMI:
1412 percentage = le16_to_cpu(igp_info->info_6.usHDMISSPercentage);
1413 rate = le16_to_cpu(igp_info->info_6.usHDMISSpreadRateIn10Hz);
1414 break;
1415 case ASIC_INTERNAL_SS_ON_LVDS:
1416 percentage = le16_to_cpu(igp_info->info_6.usLvdsSSPercentage);
1417 rate = le16_to_cpu(igp_info->info_6.usLvdsSSpreadRateIn10Hz);
1418 break;
1419 }
1406 break; 1420 break;
1407 case ASIC_INTERNAL_SS_ON_HDMI: 1421 case 7:
1408 percentage = le16_to_cpu(igp_info->usHDMISSPercentage); 1422 switch (id) {
1409 rate = le16_to_cpu(igp_info->usHDMISSpreadRateIn10Hz); 1423 case ASIC_INTERNAL_SS_ON_TMDS:
1424 percentage = le16_to_cpu(igp_info->info_7.usDVISSPercentage);
1425 rate = le16_to_cpu(igp_info->info_7.usDVISSpreadRateIn10Hz);
1426 break;
1427 case ASIC_INTERNAL_SS_ON_HDMI:
1428 percentage = le16_to_cpu(igp_info->info_7.usHDMISSPercentage);
1429 rate = le16_to_cpu(igp_info->info_7.usHDMISSpreadRateIn10Hz);
1430 break;
1431 case ASIC_INTERNAL_SS_ON_LVDS:
1432 percentage = le16_to_cpu(igp_info->info_7.usLvdsSSPercentage);
1433 rate = le16_to_cpu(igp_info->info_7.usLvdsSSpreadRateIn10Hz);
1434 break;
1435 }
1410 break; 1436 break;
1411 case ASIC_INTERNAL_SS_ON_LVDS: 1437 default:
1412 percentage = le16_to_cpu(igp_info->usLvdsSSPercentage); 1438 DRM_ERROR("Unsupported IGP table: %d %d\n", frev, crev);
1413 rate = le16_to_cpu(igp_info->usLvdsSSpreadRateIn10Hz);
1414 break; 1439 break;
1415 } 1440 }
1416 if (percentage) 1441 if (percentage)