13 files changed, 114 insertions, 71 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 5c4657a54f9..489e2b162b2 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2365,6 +2365,10 @@ int i915_gpu_idle(struct drm_device *dev)
        /* Flush everything onto the inactive list. */
        for_each_ring(ring, dev_priv, i) {
+                ret = i915_switch_context(ring, NULL, DEFAULT_CONTEXT_ID);
+                if (ret)
+                        return ret;
                ret = i915_ring_idle(ring);
                if (ret)
                        return ret;
@@ -2372,10 +2376,6 @@ int i915_gpu_idle(struct drm_device *dev)
                /* Is the device fubar? */
                if (WARN_ON(!list_empty(&ring->gpu_write_list)))
                        return -EBUSY;
-                ret = i915_switch_context(ring, NULL, DEFAULT_CONTEXT_ID);
-                if (ret)
-                        return ret;
        }
        return 0;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index ee9b68f6bc3..d9a5372ec56 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -261,7 +261,10 @@ void i915_ppgtt_bind_object(struct i915_hw_ppgtt *ppgtt,
                pte_flags |= GEN6_PTE_CACHE_LLC;
                break;
        case I915_CACHE_NONE:
-                pte_flags |= GEN6_PTE_UNCACHED;
+                if (IS_HASWELL(dev))
+                        pte_flags |= HSW_PTE_UNCACHED;
+                else
+                        pte_flags |= GEN6_PTE_UNCACHED;
                break;
        default:
                BUG();
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index acc99b21e0b..28725ce5b82 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -115,6 +115,7 @@
 #define GEN6_PTE_VALID                  (1 << 0)
 #define GEN6_PTE_UNCACHED               (1 << 1)
+#define HSW_PTE_UNCACHED                (0)
 #define GEN6_PTE_CACHE_LLC              (2 << 1)
 #define GEN6_PTE_CACHE_LLC_MLC          (3 << 1)
 #define GEN6_PTE_CACHE_BITS             (3 << 1)
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 7ed4a41c396..23bdc8cd145 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -326,6 +326,36 @@ static bool intel_crt_detect_hotplug(struct drm_connector *connector)
        return ret;
 }
+static struct edid *intel_crt_get_edid(struct drm_connector *connector,
+                                struct i2c_adapter *i2c)
+{
+        struct edid *edid;
+        edid = drm_get_edid(connector, i2c);
+        if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
+                DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
+                intel_gmbus_force_bit(i2c, true);
+                edid = drm_get_edid(connector, i2c);
+                intel_gmbus_force_bit(i2c, false);
+        }
+        return edid;
+}
+/* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
+static int intel_crt_ddc_get_modes(struct drm_connector *connector,
+                                struct i2c_adapter *adapter)
+{
+        struct edid *edid;
+        edid = intel_crt_get_edid(connector, adapter);
+        if (!edid)
+                return 0;
+        return intel_connector_update_modes(connector, edid);
+}
 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 {
        struct intel_crt *crt = intel_attached_crt(connector);
@@ -336,7 +366,7 @@ static bool intel_crt_detect_ddc(struct drm_connector *connector)
        BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
        i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
-        edid = drm_get_edid(connector, i2c);
+        edid = intel_crt_get_edid(connector, i2c);
        if (edid) {
                bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
@@ -544,13 +574,13 @@ static int intel_crt_get_modes(struct drm_connector *connector)
        struct i2c_adapter *i2c;
        i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
-        ret = intel_ddc_get_modes(connector, i2c);
+        ret = intel_crt_ddc_get_modes(connector, i2c);
        if (ret || !IS_G4X(dev))
                return ret;
        /* Try to probe digital port for output in DVI-I -> VGA mode. */
        i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
-        return intel_ddc_get_modes(connector, i2c);
+        return intel_crt_ddc_get_modes(connector, i2c);
 }
 static int intel_crt_set_property(struct drm_connector *connector,
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 88913a47cd3..a69a3d0d3ac 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3754,17 +3754,6 @@ static bool intel_choose_pipe_bpp_dither(struct drm_crtc *crtc,
                        continue;
                }
-                if (intel_encoder->type == INTEL_OUTPUT_EDP) {
-                        /* Use VBT settings if we have an eDP panel */
-                        unsigned int edp_bpc = dev_priv->edp.bpp / 3;
-                        if (edp_bpc < display_bpc) {
-                                DRM_DEBUG_KMS("clamping display bpc (was %d) to eDP (%d)\n", display_bpc, edp_bpc);
-                                display_bpc = edp_bpc;
-                        }
-                        continue;
-                }
                /* Not one of the known troublemakers, check the EDID */
                list_for_each_entry(connector, &dev->mode_config.connector_list,
                                    head) {
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 0a56b9ab0f5..a6c426afaa7 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1174,10 +1174,14 @@ static void ironlake_edp_panel_off(struct intel_dp *intel_dp)
        WARN(!intel_dp->want_panel_vdd, "Need VDD to turn off panel\n");
        pp = ironlake_get_pp_control(dev_priv);
-        pp &= ~(POWER_TARGET_ON | PANEL_POWER_RESET | EDP_BLC_ENABLE);
+        /* We need to switch off panel power _and_ force vdd, for otherwise some
+         * panels get very unhappy and cease to work. */
+        pp &= ~(POWER_TARGET_ON | EDP_FORCE_VDD | PANEL_POWER_RESET | EDP_BLC_ENABLE);
        I915_WRITE(PCH_PP_CONTROL, pp);
        POSTING_READ(PCH_PP_CONTROL);
+        intel_dp->want_panel_vdd = false;
        ironlake_wait_panel_off(intel_dp);
 }
@@ -1287,11 +1291,9 @@ static void intel_dp_prepare(struct drm_encoder *encoder)
         * ensure that we have vdd while we switch off the panel. */
        ironlake_edp_panel_vdd_on(intel_dp);
        ironlake_edp_backlight_off(intel_dp);
-        ironlake_edp_panel_off(intel_dp);
        intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
+        ironlake_edp_panel_off(intel_dp);
        intel_dp_link_down(intel_dp);
-        ironlake_edp_panel_vdd_off(intel_dp, false);
 }
 static void intel_dp_commit(struct drm_encoder *encoder)
@@ -1326,11 +1328,9 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode)
                /* Switching the panel off requires vdd. */
                ironlake_edp_panel_vdd_on(intel_dp);
                ironlake_edp_backlight_off(intel_dp);
-                ironlake_edp_panel_off(intel_dp);
                intel_dp_sink_dpms(intel_dp, mode);
+                ironlake_edp_panel_off(intel_dp);
                intel_dp_link_down(intel_dp);
-                ironlake_edp_panel_vdd_off(intel_dp, false);
                if (is_cpu_edp(intel_dp))
                        ironlake_edp_pll_off(encoder);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 132ab511b90..cd54cf88a28 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -342,6 +342,8 @@ struct intel_fbc_work {
        int interval;
 };
+int intel_connector_update_modes(struct drm_connector *connector,
+                                struct edid *edid);
 int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
 extern void intel_attach_force_audio_property(struct drm_connector *connector);
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index d79500bc1ce..b9755f6378d 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -486,9 +486,6 @@ int intel_setup_gmbus(struct drm_device *dev)
                bus->dev_priv = dev_priv;
                bus->adapter.algo = &gmbus_algorithm;
-                ret = i2c_add_adapter(&bus->adapter);
-                if (ret)
-                        goto err;
                /* By default use a conservative clock rate */
                bus->reg0 = port | GMBUS_RATE_100KHZ;
@@ -498,6 +495,10 @@ int intel_setup_gmbus(struct drm_device *dev)
                        bus->force_bit = true;
                intel_gpio_setup(bus, port);
+                ret = i2c_add_adapter(&bus->adapter);
+                if (ret)
+                        goto err;
        }
        intel_i2c_reset(dev_priv->dev);
diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c
index 45848b9b670..29b72593fbb 100644
--- a/drivers/gpu/drm/i915/intel_modes.c
+++ b/drivers/gpu/drm/i915/intel_modes.c
@@ -33,6 +33,25 @@
 #include "i915_drv.h"
 /**
+ * intel_connector_update_modes - update connector from edid
+ * @connector: DRM connector device to use
+ * @edid: previously read EDID information
+ */
+int intel_connector_update_modes(struct drm_connector *connector,
+                                struct edid *edid)
+{
+        int ret;
+        drm_mode_connector_update_edid_property(connector, edid);
+        ret = drm_add_edid_modes(connector, edid);
+        drm_edid_to_eld(connector, edid);
+        connector->display_info.raw_edid = NULL;
+        kfree(edid);
+        return ret;
+}
+/**
 * intel_ddc_get_modes - get modelist from monitor
 * @connector: DRM connector device to use
 * @adapter: i2c adapter
@@ -43,18 +62,12 @@ int intel_ddc_get_modes(struct drm_connector *connector,
                        struct i2c_adapter *adapter)
 {
        struct edid *edid;
-        int ret = 0;
        edid = drm_get_edid(connector, adapter);
-        if (edid) {
+        if (!edid)
-                drm_mode_connector_update_edid_property(connector, edid);
+                return 0;
-                ret = drm_add_edid_modes(connector, edid);
-                drm_edid_to_eld(connector, edid);
-                connector->display_info.raw_edid = NULL;
-                kfree(edid);
-        }
-        return ret;
+        return intel_connector_update_modes(connector, edid);
 }
 static const struct drm_prop_enum_list force_audio_names[] = {
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 9474488db94..3df4f5fa892 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -311,9 +311,6 @@ void intel_panel_enable_backlight(struct drm_device *dev,
        if (dev_priv->backlight_level == 0)
                dev_priv->backlight_level = intel_panel_get_max_backlight(dev);
-        dev_priv->backlight_enabled = true;
-        intel_panel_actually_set_backlight(dev, dev_priv->backlight_level);
        if (INTEL_INFO(dev)->gen >= 4) {
                uint32_t reg, tmp;
@@ -326,7 +323,7 @@ void intel_panel_enable_backlight(struct drm_device *dev,
                 * we don't track the backlight dpms state, hence check whether
                 * we have to do anything first. */
                if (tmp & BLM_PWM_ENABLE)
-                        return;
+                        goto set_level;
                if (dev_priv->num_pipe == 3)
                        tmp &= ~BLM_PIPE_SELECT_IVB;
@@ -347,6 +344,14 @@ void intel_panel_enable_backlight(struct drm_device *dev,
                        I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
                }
        }
+set_level:
+        /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
+         * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
+         * registers are set.
+         */
+        dev_priv->backlight_enabled = true;
+        intel_panel_actually_set_backlight(dev, dev_priv->backlight_level);
 }
 static void intel_panel_init_backlight(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 58c07cdafb7..1881c8c83f0 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2441,17 +2441,10 @@ static void gen6_enable_rps(struct drm_device *dev)
                   dev_priv->max_delay << 24 |
                   dev_priv->min_delay << 16);
-        if (IS_HASWELL(dev)) {
+        I915_WRITE(GEN6_RP_UP_THRESHOLD, 59400);
-                I915_WRITE(GEN6_RP_UP_THRESHOLD, 59400);
+        I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 245000);
-                I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 245000);
+        I915_WRITE(GEN6_RP_UP_EI, 66000);
-                I915_WRITE(GEN6_RP_UP_EI, 66000);
+        I915_WRITE(GEN6_RP_DOWN_EI, 350000);
-                I915_WRITE(GEN6_RP_DOWN_EI, 350000);
-        } else {
-                I915_WRITE(GEN6_RP_UP_THRESHOLD, 10000);
-                I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 1000000);
-                I915_WRITE(GEN6_RP_UP_EI, 100000);
-                I915_WRITE(GEN6_RP_DOWN_EI, 5000000);
-        }
        I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);
        I915_WRITE(GEN6_RP_CONTROL,
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 414af1e2973..e2a73b38abe 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -227,31 +227,36 @@ gen6_render_ring_flush(struct intel_ring_buffer *ring,
         * number of bits based on the write domains has little performance
         * impact.
         */
-        flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH;
+        if (flush_domains) {
-        flags |= PIPE_CONTROL_TLB_INVALIDATE;
+                flags |= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH;
-        flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE;
+                flags |= PIPE_CONTROL_DEPTH_CACHE_FLUSH;
-        flags |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE;
+                /*
-        flags |= PIPE_CONTROL_DEPTH_CACHE_FLUSH;
+                 * Ensure that any following seqno writes only happen
-        flags |= PIPE_CONTROL_VF_CACHE_INVALIDATE;
+                 * when the render cache is indeed flushed.
-        flags |= PIPE_CONTROL_CONST_CACHE_INVALIDATE;
+                 */
-        flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE;
-        /*
-         * Ensure that any following seqno writes only happen when the render
-         * cache is indeed flushed (but only if the caller actually wants that).
-         */
-        if (flush_domains)
                flags |= PIPE_CONTROL_CS_STALL;
+        }
+        if (invalidate_domains) {
+                flags |= PIPE_CONTROL_TLB_INVALIDATE;
+                flags |= PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE;
+                flags |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE;
+                flags |= PIPE_CONTROL_VF_CACHE_INVALIDATE;
+                flags |= PIPE_CONTROL_CONST_CACHE_INVALIDATE;
+                flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE;
+                /*
+                 * TLB invalidate requires a post-sync write.
+                 */
+                flags |= PIPE_CONTROL_QW_WRITE;
+        }
-        ret = intel_ring_begin(ring, 6);
+        ret = intel_ring_begin(ring, 4);
        if (ret)
                return ret;
-        intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(5));
+        intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(4));
        intel_ring_emit(ring, flags);
        intel_ring_emit(ring, scratch_addr | PIPE_CONTROL_GLOBAL_GTT);
-        intel_ring_emit(ring, 0); /* lower dword */
+        intel_ring_emit(ring, 0);
-        intel_ring_emit(ring, 0); /* uppwer dword */
-        intel_ring_emit(ring, MI_NOOP);
        intel_ring_advance(ring);
        return 0;
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index d172e987313..d81bb0bf288 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -1692,6 +1692,7 @@ static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
        edid = intel_sdvo_get_edid(connector);
        if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
                has_audio = drm_detect_monitor_audio(edid);
+        kfree(edid);
        return has_audio;
 }