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path: root/drivers/gpu/drm/i915/intel_display.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c22
1 files changed, 16 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 56a8554d903..04411ad2e77 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1799,6 +1799,7 @@ static void intel_update_fbc(struct drm_device *dev)
1799 struct drm_framebuffer *fb; 1799 struct drm_framebuffer *fb;
1800 struct intel_framebuffer *intel_fb; 1800 struct intel_framebuffer *intel_fb;
1801 struct drm_i915_gem_object *obj; 1801 struct drm_i915_gem_object *obj;
1802 int enable_fbc;
1802 1803
1803 DRM_DEBUG_KMS("\n"); 1804 DRM_DEBUG_KMS("\n");
1804 1805
@@ -1839,8 +1840,15 @@ static void intel_update_fbc(struct drm_device *dev)
1839 intel_fb = to_intel_framebuffer(fb); 1840 intel_fb = to_intel_framebuffer(fb);
1840 obj = intel_fb->obj; 1841 obj = intel_fb->obj;
1841 1842
1842 if (!i915_enable_fbc) { 1843 enable_fbc = i915_enable_fbc;
1843 DRM_DEBUG_KMS("fbc disabled per module param (default off)\n"); 1844 if (enable_fbc < 0) {
1845 DRM_DEBUG_KMS("fbc set to per-chip default\n");
1846 enable_fbc = 1;
1847 if (INTEL_INFO(dev)->gen <= 5)
1848 enable_fbc = 0;
1849 }
1850 if (!enable_fbc) {
1851 DRM_DEBUG_KMS("fbc disabled per module param\n");
1844 dev_priv->no_fbc_reason = FBC_MODULE_PARAM; 1852 dev_priv->no_fbc_reason = FBC_MODULE_PARAM;
1845 goto out_disable; 1853 goto out_disable;
1846 } 1854 }
@@ -4687,13 +4695,13 @@ static bool intel_choose_pipe_bpp_dither(struct drm_crtc *crtc,
4687 bpc = 6; /* min is 18bpp */ 4695 bpc = 6; /* min is 18bpp */
4688 break; 4696 break;
4689 case 24: 4697 case 24:
4690 bpc = min((unsigned int)8, display_bpc); 4698 bpc = 8;
4691 break; 4699 break;
4692 case 30: 4700 case 30:
4693 bpc = min((unsigned int)10, display_bpc); 4701 bpc = 10;
4694 break; 4702 break;
4695 case 48: 4703 case 48:
4696 bpc = min((unsigned int)12, display_bpc); 4704 bpc = 12;
4697 break; 4705 break;
4698 default: 4706 default:
4699 DRM_DEBUG("unsupported depth, assuming 24 bits\n"); 4707 DRM_DEBUG("unsupported depth, assuming 24 bits\n");
@@ -4701,10 +4709,12 @@ static bool intel_choose_pipe_bpp_dither(struct drm_crtc *crtc,
4701 break; 4709 break;
4702 } 4710 }
4703 4711
4712 display_bpc = min(display_bpc, bpc);
4713
4704 DRM_DEBUG_DRIVER("setting pipe bpc to %d (max display bpc %d)\n", 4714 DRM_DEBUG_DRIVER("setting pipe bpc to %d (max display bpc %d)\n",
4705 bpc, display_bpc); 4715 bpc, display_bpc);
4706 4716
4707 *pipe_bpp = bpc * 3; 4717 *pipe_bpp = display_bpc * 3;
4708 4718
4709 return display_bpc != bpc; 4719 return display_bpc != bpc;
4710} 4720}