diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_tiling.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem_tiling.c | 97 |
1 files changed, 92 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index 241f39b7f46..7fb4191ef93 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c | |||
@@ -173,6 +173,73 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev) | |||
173 | dev_priv->mm.bit_6_swizzle_y = swizzle_y; | 173 | dev_priv->mm.bit_6_swizzle_y = swizzle_y; |
174 | } | 174 | } |
175 | 175 | ||
176 | |||
177 | /** | ||
178 | * Returns the size of the fence for a tiled object of the given size. | ||
179 | */ | ||
180 | static int | ||
181 | i915_get_fence_size(struct drm_device *dev, int size) | ||
182 | { | ||
183 | int i; | ||
184 | int start; | ||
185 | |||
186 | if (IS_I965G(dev)) { | ||
187 | /* The 965 can have fences at any page boundary. */ | ||
188 | return ALIGN(size, 4096); | ||
189 | } else { | ||
190 | /* Align the size to a power of two greater than the smallest | ||
191 | * fence size. | ||
192 | */ | ||
193 | if (IS_I9XX(dev)) | ||
194 | start = 1024 * 1024; | ||
195 | else | ||
196 | start = 512 * 1024; | ||
197 | |||
198 | for (i = start; i < size; i <<= 1) | ||
199 | ; | ||
200 | |||
201 | return i; | ||
202 | } | ||
203 | } | ||
204 | |||
205 | /* Check pitch constriants for all chips & tiling formats */ | ||
206 | static bool | ||
207 | i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) | ||
208 | { | ||
209 | int tile_width; | ||
210 | |||
211 | /* Linear is always fine */ | ||
212 | if (tiling_mode == I915_TILING_NONE) | ||
213 | return true; | ||
214 | |||
215 | if (tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev)) | ||
216 | tile_width = 128; | ||
217 | else | ||
218 | tile_width = 512; | ||
219 | |||
220 | /* 965+ just needs multiples of tile width */ | ||
221 | if (IS_I965G(dev)) { | ||
222 | if (stride & (tile_width - 1)) | ||
223 | return false; | ||
224 | return true; | ||
225 | } | ||
226 | |||
227 | /* Pre-965 needs power of two tile widths */ | ||
228 | if (stride < tile_width) | ||
229 | return false; | ||
230 | |||
231 | if (stride & (stride - 1)) | ||
232 | return false; | ||
233 | |||
234 | /* We don't handle the aperture area covered by the fence being bigger | ||
235 | * than the object size. | ||
236 | */ | ||
237 | if (i915_get_fence_size(dev, size) != size) | ||
238 | return false; | ||
239 | |||
240 | return true; | ||
241 | } | ||
242 | |||
176 | /** | 243 | /** |
177 | * Sets the tiling mode of an object, returning the required swizzling of | 244 | * Sets the tiling mode of an object, returning the required swizzling of |
178 | * bit 6 of addresses in the object. | 245 | * bit 6 of addresses in the object. |
@@ -191,6 +258,11 @@ i915_gem_set_tiling(struct drm_device *dev, void *data, | |||
191 | return -EINVAL; | 258 | return -EINVAL; |
192 | obj_priv = obj->driver_private; | 259 | obj_priv = obj->driver_private; |
193 | 260 | ||
261 | if (!i915_tiling_ok(dev, args->stride, obj->size, args->tiling_mode)) { | ||
262 | drm_gem_object_unreference(obj); | ||
263 | return -EINVAL; | ||
264 | } | ||
265 | |||
194 | mutex_lock(&dev->struct_mutex); | 266 | mutex_lock(&dev->struct_mutex); |
195 | 267 | ||
196 | if (args->tiling_mode == I915_TILING_NONE) { | 268 | if (args->tiling_mode == I915_TILING_NONE) { |
@@ -207,12 +279,28 @@ i915_gem_set_tiling(struct drm_device *dev, void *data, | |||
207 | args->swizzle_mode = I915_BIT_6_SWIZZLE_NONE; | 279 | args->swizzle_mode = I915_BIT_6_SWIZZLE_NONE; |
208 | } | 280 | } |
209 | } | 281 | } |
210 | obj_priv->tiling_mode = args->tiling_mode; | 282 | if (args->tiling_mode != obj_priv->tiling_mode) { |
211 | obj_priv->stride = args->stride; | 283 | int ret; |
212 | 284 | ||
213 | mutex_unlock(&dev->struct_mutex); | 285 | /* Unbind the object, as switching tiling means we're |
286 | * switching the cache organization due to fencing, probably. | ||
287 | */ | ||
288 | ret = i915_gem_object_unbind(obj); | ||
289 | if (ret != 0) { | ||
290 | WARN(ret != -ERESTARTSYS, | ||
291 | "failed to unbind object for tiling switch"); | ||
292 | args->tiling_mode = obj_priv->tiling_mode; | ||
293 | mutex_unlock(&dev->struct_mutex); | ||
294 | drm_gem_object_unreference(obj); | ||
295 | |||
296 | return ret; | ||
297 | } | ||
298 | obj_priv->tiling_mode = args->tiling_mode; | ||
299 | } | ||
300 | obj_priv->stride = args->stride; | ||
214 | 301 | ||
215 | drm_gem_object_unreference(obj); | 302 | drm_gem_object_unreference(obj); |
303 | mutex_unlock(&dev->struct_mutex); | ||
216 | 304 | ||
217 | return 0; | 305 | return 0; |
218 | } | 306 | } |
@@ -251,9 +339,8 @@ i915_gem_get_tiling(struct drm_device *dev, void *data, | |||
251 | DRM_ERROR("unknown tiling mode\n"); | 339 | DRM_ERROR("unknown tiling mode\n"); |
252 | } | 340 | } |
253 | 341 | ||
254 | mutex_unlock(&dev->struct_mutex); | ||
255 | |||
256 | drm_gem_object_unreference(obj); | 342 | drm_gem_object_unreference(obj); |
343 | mutex_unlock(&dev->struct_mutex); | ||
257 | 344 | ||
258 | return 0; | 345 | return 0; |
259 | } | 346 | } |