diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 37 |
1 files changed, 24 insertions, 13 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 16fca1d1799..cf4ffbee1c0 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -2351,14 +2351,21 @@ i915_gem_object_get_fence_reg(struct drm_gem_object *obj) | |||
2351 | 2351 | ||
2352 | reg->obj = obj; | 2352 | reg->obj = obj; |
2353 | 2353 | ||
2354 | if (IS_GEN6(dev)) | 2354 | switch (INTEL_INFO(dev)->gen) { |
2355 | case 6: | ||
2355 | sandybridge_write_fence_reg(reg); | 2356 | sandybridge_write_fence_reg(reg); |
2356 | else if (IS_I965G(dev)) | 2357 | break; |
2358 | case 5: | ||
2359 | case 4: | ||
2357 | i965_write_fence_reg(reg); | 2360 | i965_write_fence_reg(reg); |
2358 | else if (IS_I9XX(dev)) | 2361 | break; |
2362 | case 3: | ||
2359 | i915_write_fence_reg(reg); | 2363 | i915_write_fence_reg(reg); |
2360 | else | 2364 | break; |
2365 | case 2: | ||
2361 | i830_write_fence_reg(reg); | 2366 | i830_write_fence_reg(reg); |
2367 | break; | ||
2368 | } | ||
2362 | 2369 | ||
2363 | trace_i915_gem_object_get_fence(obj, obj_priv->fence_reg, | 2370 | trace_i915_gem_object_get_fence(obj, obj_priv->fence_reg, |
2364 | obj_priv->tiling_mode); | 2371 | obj_priv->tiling_mode); |
@@ -2381,22 +2388,26 @@ i915_gem_clear_fence_reg(struct drm_gem_object *obj) | |||
2381 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); | 2388 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2382 | struct drm_i915_fence_reg *reg = | 2389 | struct drm_i915_fence_reg *reg = |
2383 | &dev_priv->fence_regs[obj_priv->fence_reg]; | 2390 | &dev_priv->fence_regs[obj_priv->fence_reg]; |
2391 | uint32_t fence_reg; | ||
2384 | 2392 | ||
2385 | if (IS_GEN6(dev)) { | 2393 | switch (INTEL_INFO(dev)->gen) { |
2394 | case 6: | ||
2386 | I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + | 2395 | I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + |
2387 | (obj_priv->fence_reg * 8), 0); | 2396 | (obj_priv->fence_reg * 8), 0); |
2388 | } else if (IS_I965G(dev)) { | 2397 | break; |
2398 | case 5: | ||
2399 | case 4: | ||
2389 | I915_WRITE64(FENCE_REG_965_0 + (obj_priv->fence_reg * 8), 0); | 2400 | I915_WRITE64(FENCE_REG_965_0 + (obj_priv->fence_reg * 8), 0); |
2390 | } else { | 2401 | break; |
2391 | uint32_t fence_reg; | 2402 | case 3: |
2392 | 2403 | if (obj_priv->fence_reg > 8) | |
2393 | if (obj_priv->fence_reg < 8) | 2404 | fence_reg = FENCE_REG_945_8 + (obj_priv->fence_reg - 8) * 4; |
2394 | fence_reg = FENCE_REG_830_0 + obj_priv->fence_reg * 4; | ||
2395 | else | 2405 | else |
2396 | fence_reg = FENCE_REG_945_8 + (obj_priv->fence_reg - | 2406 | case 2: |
2397 | 8) * 4; | 2407 | fence_reg = FENCE_REG_830_0 + obj_priv->fence_reg * 4; |
2398 | 2408 | ||
2399 | I915_WRITE(fence_reg, 0); | 2409 | I915_WRITE(fence_reg, 0); |
2410 | break; | ||
2400 | } | 2411 | } |
2401 | 2412 | ||
2402 | reg->obj = NULL; | 2413 | reg->obj = NULL; |