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-rw-r--r--arch/arm/mach-ep93xx/core.c2
-rw-r--r--arch/arm/mach-imx/mach-mx25_3ds.c2
-rw-r--r--arch/arm/mach-ixp4xx/common.c4
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/timex.h5
-rw-r--r--arch/arm/mach-ixp4xx/ixp4xx_qmgr.c9
-rw-r--r--arch/arm/mach-mxs/clock-mx23.c4
-rw-r--r--arch/arm/mach-mxs/clock-mx28.c7
-rw-r--r--arch/arm/mach-mxs/clock.c2
-rw-r--r--arch/arm/mach-mxs/gpio.c2
-rw-r--r--arch/arm/mach-mxs/include/mach/clock.h2
-rw-r--r--arch/arm/mach-omap1/lcd_dma.c24
-rw-r--r--arch/arm/mach-omap1/time.c1
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c27
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c2
-rw-r--r--arch/arm/mach-omap2/board-rm680.c3
-rw-r--r--arch/arm/mach-omap2/mux.c1
-rw-r--r--arch/arm/mach-omap2/pm34xx.c7
-rw-r--r--arch/arm/mach-omap2/smartreflex.c11
-rw-r--r--arch/arm/mach-omap2/voltage.c1
-rw-r--r--arch/arm/plat-mxc/include/mach/uncompress.h2
-rw-r--r--arch/arm/tools/mach-types105
-rw-r--r--arch/m32r/kernel/irq.c2
-rw-r--r--arch/microblaze/kernel/head.S14
-rw-r--r--arch/microblaze/kernel/hw_exception_handler.S4
-rw-r--r--arch/microblaze/lib/fastcopy.S4
-rw-r--r--arch/powerpc/include/asm/mmu-book3e.h8
-rw-r--r--arch/powerpc/include/asm/page.h2
-rw-r--r--arch/powerpc/kernel/cpu_setup_6xx.S40
-rw-r--r--arch/powerpc/kernel/cputable.c4
-rw-r--r--arch/powerpc/mm/numa.c55
-rw-r--r--arch/powerpc/platforms/pseries/lpar.c37
-rw-r--r--arch/s390/Kconfig2
-rw-r--r--arch/s390/include/asm/cacheflush.h23
-rw-r--r--arch/s390/include/asm/tlb.h1
-rw-r--r--arch/s390/lib/uaccess_std.c10
-rw-r--r--arch/s390/mm/pgtable.c3
-rw-r--r--arch/x86/include/asm/mmu_context.h5
-rw-r--r--arch/x86/include/asm/smp.h5
-rw-r--r--arch/x86/kernel/acpi/sleep.c15
-rw-r--r--arch/x86/kernel/cpu/mtrr/main.c10
-rw-r--r--arch/x86/kernel/cpu/perf_event_p4.c12
-rw-r--r--arch/x86/kernel/head_32.S30
-rw-r--r--arch/x86/kernel/smpboot.c4
-rw-r--r--arch/x86/mm/pageattr.c8
44 files changed, 330 insertions, 191 deletions
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index ffdf87be295..82079545adc 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -838,7 +838,7 @@ EXPORT_SYMBOL(ep93xx_i2s_release);
838static struct resource ep93xx_ac97_resources[] = { 838static struct resource ep93xx_ac97_resources[] = {
839 { 839 {
840 .start = EP93XX_AAC_PHYS_BASE, 840 .start = EP93XX_AAC_PHYS_BASE,
841 .end = EP93XX_AAC_PHYS_BASE + 0xb0 - 1, 841 .end = EP93XX_AAC_PHYS_BASE + 0xac - 1,
842 .flags = IORESOURCE_MEM, 842 .flags = IORESOURCE_MEM,
843 }, 843 },
844 { 844 {
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c
index aa76cfd9f34..8382e790207 100644
--- a/arch/arm/mach-imx/mach-mx25_3ds.c
+++ b/arch/arm/mach-imx/mach-mx25_3ds.c
@@ -180,7 +180,7 @@ static const uint32_t mx25pdk_keymap[] = {
180 KEY(3, 3, KEY_POWER), 180 KEY(3, 3, KEY_POWER),
181}; 181};
182 182
183static const struct matrix_keymap_data mx25pdk_keymap_data __initdata = { 183static const struct matrix_keymap_data mx25pdk_keymap_data __initconst = {
184 .keymap = mx25pdk_keymap, 184 .keymap = mx25pdk_keymap,
185 .keymap_size = ARRAY_SIZE(mx25pdk_keymap), 185 .keymap_size = ARRAY_SIZE(mx25pdk_keymap),
186}; 186};
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 4dc68d6bb6b..9fd894271d5 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -432,7 +432,7 @@ static struct clocksource clocksource_ixp4xx = {
432 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 432 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
433}; 433};
434 434
435unsigned long ixp4xx_timer_freq = FREQ; 435unsigned long ixp4xx_timer_freq = IXP4XX_TIMER_FREQ;
436EXPORT_SYMBOL(ixp4xx_timer_freq); 436EXPORT_SYMBOL(ixp4xx_timer_freq);
437static void __init ixp4xx_clocksource_init(void) 437static void __init ixp4xx_clocksource_init(void)
438{ 438{
@@ -496,7 +496,7 @@ static struct clock_event_device clockevent_ixp4xx = {
496 496
497static void __init ixp4xx_clockevent_init(void) 497static void __init ixp4xx_clockevent_init(void)
498{ 498{
499 clockevent_ixp4xx.mult = div_sc(FREQ, NSEC_PER_SEC, 499 clockevent_ixp4xx.mult = div_sc(IXP4XX_TIMER_FREQ, NSEC_PER_SEC,
500 clockevent_ixp4xx.shift); 500 clockevent_ixp4xx.shift);
501 clockevent_ixp4xx.max_delta_ns = 501 clockevent_ixp4xx.max_delta_ns =
502 clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx); 502 clockevent_delta2ns(0xfffffffe, &clockevent_ixp4xx);
diff --git a/arch/arm/mach-ixp4xx/include/mach/timex.h b/arch/arm/mach-ixp4xx/include/mach/timex.h
index 2c3f93c3eb7..c9e930f2933 100644
--- a/arch/arm/mach-ixp4xx/include/mach/timex.h
+++ b/arch/arm/mach-ixp4xx/include/mach/timex.h
@@ -10,6 +10,7 @@
10 * 66.66... MHz. We do a convulted calculation of CLOCK_TICK_RATE b/c the 10 * 66.66... MHz. We do a convulted calculation of CLOCK_TICK_RATE b/c the
11 * timer register ignores the bottom 2 bits of the LATCH value. 11 * timer register ignores the bottom 2 bits of the LATCH value.
12 */ 12 */
13#define FREQ 66666000 13#define IXP4XX_TIMER_FREQ 66666000
14#define CLOCK_TICK_RATE (((FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ) 14#define CLOCK_TICK_RATE \
15 (((IXP4XX_TIMER_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)
15 16
diff --git a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
index bfdbe4b5a3c..852f7c9f87d 100644
--- a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
+++ b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
@@ -265,6 +265,11 @@ void qmgr_release_queue(unsigned int queue)
265 qmgr_queue_descs[queue], queue); 265 qmgr_queue_descs[queue], queue);
266 qmgr_queue_descs[queue][0] = '\x0'; 266 qmgr_queue_descs[queue][0] = '\x0';
267#endif 267#endif
268
269 while ((addr = qmgr_get_entry(queue)))
270 printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n",
271 queue, addr);
272
268 __raw_writel(0, &qmgr_regs->sram[queue]); 273 __raw_writel(0, &qmgr_regs->sram[queue]);
269 274
270 used_sram_bitmap[0] &= ~mask[0]; 275 used_sram_bitmap[0] &= ~mask[0];
@@ -275,10 +280,6 @@ void qmgr_release_queue(unsigned int queue)
275 spin_unlock_irq(&qmgr_lock); 280 spin_unlock_irq(&qmgr_lock);
276 281
277 module_put(THIS_MODULE); 282 module_put(THIS_MODULE);
278
279 while ((addr = qmgr_get_entry(queue)))
280 printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n",
281 queue, addr);
282} 283}
283 284
284static int qmgr_init(void) 285static int qmgr_init(void)
diff --git a/arch/arm/mach-mxs/clock-mx23.c b/arch/arm/mach-mxs/clock-mx23.c
index b1a362ebfde..ca72a05ed9c 100644
--- a/arch/arm/mach-mxs/clock-mx23.c
+++ b/arch/arm/mach-mxs/clock-mx23.c
@@ -304,7 +304,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
304 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \ 304 reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
305 reg &= ~BM_CLKCTRL_##dr##_DIV; \ 305 reg &= ~BM_CLKCTRL_##dr##_DIV; \
306 reg |= div << BP_CLKCTRL_##dr##_DIV; \ 306 reg |= div << BP_CLKCTRL_##dr##_DIV; \
307 if (reg | (1 << clk->enable_shift)) { \ 307 if (reg & (1 << clk->enable_shift)) { \
308 pr_err("%s: clock is gated\n", __func__); \ 308 pr_err("%s: clock is gated\n", __func__); \
309 return -EINVAL; \ 309 return -EINVAL; \
310 } \ 310 } \
@@ -347,7 +347,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \
347{ \ 347{ \
348 if (parent != clk->parent) { \ 348 if (parent != clk->parent) { \
349 __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \ 349 __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \
350 HW_CLKCTRL_CLKSEQ_TOG); \ 350 CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \
351 clk->parent = parent; \ 351 clk->parent = parent; \
352 } \ 352 } \
353 \ 353 \
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 56312c092a9..fd1c4c54b8e 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -355,12 +355,12 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
355 } else { \ 355 } else { \
356 reg &= ~BM_CLKCTRL_##dr##_DIV; \ 356 reg &= ~BM_CLKCTRL_##dr##_DIV; \
357 reg |= div << BP_CLKCTRL_##dr##_DIV; \ 357 reg |= div << BP_CLKCTRL_##dr##_DIV; \
358 if (reg | (1 << clk->enable_shift)) { \ 358 if (reg & (1 << clk->enable_shift)) { \
359 pr_err("%s: clock is gated\n", __func__); \ 359 pr_err("%s: clock is gated\n", __func__); \
360 return -EINVAL; \ 360 return -EINVAL; \
361 } \ 361 } \
362 } \ 362 } \
363 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU); \ 363 __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
364 \ 364 \
365 for (i = 10000; i; i--) \ 365 for (i = 10000; i; i--) \
366 if (!(__raw_readl(CLKCTRL_BASE_ADDR + \ 366 if (!(__raw_readl(CLKCTRL_BASE_ADDR + \
@@ -483,7 +483,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \
483{ \ 483{ \
484 if (parent != clk->parent) { \ 484 if (parent != clk->parent) { \
485 __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \ 485 __raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \
486 HW_CLKCTRL_CLKSEQ_TOG); \ 486 CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \
487 clk->parent = parent; \ 487 clk->parent = parent; \
488 } \ 488 } \
489 \ 489 \
@@ -609,7 +609,6 @@ static struct clk_lookup lookups[] = {
609 _REGISTER_CLOCK("duart", NULL, uart_clk) 609 _REGISTER_CLOCK("duart", NULL, uart_clk)
610 _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk) 610 _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk)
611 _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk) 611 _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk)
612 _REGISTER_CLOCK("fec.0", NULL, fec_clk)
613 _REGISTER_CLOCK("rtc", NULL, rtc_clk) 612 _REGISTER_CLOCK("rtc", NULL, rtc_clk)
614 _REGISTER_CLOCK("pll2", NULL, pll2_clk) 613 _REGISTER_CLOCK("pll2", NULL, pll2_clk)
615 _REGISTER_CLOCK(NULL, "hclk", hbus_clk) 614 _REGISTER_CLOCK(NULL, "hclk", hbus_clk)
diff --git a/arch/arm/mach-mxs/clock.c b/arch/arm/mach-mxs/clock.c
index e7d2269cf70..a7093c88e6a 100644
--- a/arch/arm/mach-mxs/clock.c
+++ b/arch/arm/mach-mxs/clock.c
@@ -57,7 +57,6 @@ static void __clk_disable(struct clk *clk)
57 if (clk->disable) 57 if (clk->disable)
58 clk->disable(clk); 58 clk->disable(clk);
59 __clk_disable(clk->parent); 59 __clk_disable(clk->parent);
60 __clk_disable(clk->secondary);
61 } 60 }
62} 61}
63 62
@@ -68,7 +67,6 @@ static int __clk_enable(struct clk *clk)
68 67
69 if (clk->usecount++ == 0) { 68 if (clk->usecount++ == 0) {
70 __clk_enable(clk->parent); 69 __clk_enable(clk->parent);
71 __clk_enable(clk->secondary);
72 70
73 if (clk->enable) 71 if (clk->enable)
74 clk->enable(clk); 72 clk->enable(clk);
diff --git a/arch/arm/mach-mxs/gpio.c b/arch/arm/mach-mxs/gpio.c
index d7ad7a61366..cb0c0e83a52 100644
--- a/arch/arm/mach-mxs/gpio.c
+++ b/arch/arm/mach-mxs/gpio.c
@@ -139,6 +139,8 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
139 struct mxs_gpio_port *port = (struct mxs_gpio_port *)get_irq_data(irq); 139 struct mxs_gpio_port *port = (struct mxs_gpio_port *)get_irq_data(irq);
140 u32 gpio_irq_no_base = port->virtual_irq_start; 140 u32 gpio_irq_no_base = port->virtual_irq_start;
141 141
142 desc->irq_data.chip->irq_ack(&desc->irq_data);
143
142 irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) & 144 irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) &
143 __raw_readl(port->base + PINCTRL_IRQEN(port->id)); 145 __raw_readl(port->base + PINCTRL_IRQEN(port->id));
144 146
diff --git a/arch/arm/mach-mxs/include/mach/clock.h b/arch/arm/mach-mxs/include/mach/clock.h
index 041e276d8a3..592c9ab5d76 100644
--- a/arch/arm/mach-mxs/include/mach/clock.h
+++ b/arch/arm/mach-mxs/include/mach/clock.h
@@ -29,8 +29,6 @@ struct clk {
29 int id; 29 int id;
30 /* Source clock this clk depends on */ 30 /* Source clock this clk depends on */
31 struct clk *parent; 31 struct clk *parent;
32 /* Secondary clock to enable/disable with this clock */
33 struct clk *secondary;
34 /* Reference count of clock enable/disable */ 32 /* Reference count of clock enable/disable */
35 __s8 usecount; 33 __s8 usecount;
36 /* Register bit position for clock's enable/disable control. */ 34 /* Register bit position for clock's enable/disable control. */
diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c
index c9088d85da0..453809359ba 100644
--- a/arch/arm/mach-omap1/lcd_dma.c
+++ b/arch/arm/mach-omap1/lcd_dma.c
@@ -37,7 +37,7 @@ int omap_lcd_dma_running(void)
37 * On OMAP1510, internal LCD controller will start the transfer 37 * On OMAP1510, internal LCD controller will start the transfer
38 * when it gets enabled, so assume DMA running if LCD enabled. 38 * when it gets enabled, so assume DMA running if LCD enabled.
39 */ 39 */
40 if (cpu_is_omap1510()) 40 if (cpu_is_omap15xx())
41 if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN) 41 if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN)
42 return 1; 42 return 1;
43 43
@@ -95,7 +95,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer);
95 95
96void omap_set_lcd_dma_b1_rotation(int rotate) 96void omap_set_lcd_dma_b1_rotation(int rotate)
97{ 97{
98 if (cpu_is_omap1510()) { 98 if (cpu_is_omap15xx()) {
99 printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n"); 99 printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n");
100 BUG(); 100 BUG();
101 return; 101 return;
@@ -106,7 +106,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation);
106 106
107void omap_set_lcd_dma_b1_mirror(int mirror) 107void omap_set_lcd_dma_b1_mirror(int mirror)
108{ 108{
109 if (cpu_is_omap1510()) { 109 if (cpu_is_omap15xx()) {
110 printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n"); 110 printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n");
111 BUG(); 111 BUG();
112 } 112 }
@@ -116,7 +116,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror);
116 116
117void omap_set_lcd_dma_b1_vxres(unsigned long vxres) 117void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
118{ 118{
119 if (cpu_is_omap1510()) { 119 if (cpu_is_omap15xx()) {
120 printk(KERN_ERR "DMA virtual resulotion is not supported " 120 printk(KERN_ERR "DMA virtual resulotion is not supported "
121 "in 1510 mode\n"); 121 "in 1510 mode\n");
122 BUG(); 122 BUG();
@@ -127,7 +127,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres);
127 127
128void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale) 128void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale)
129{ 129{
130 if (cpu_is_omap1510()) { 130 if (cpu_is_omap15xx()) {
131 printk(KERN_ERR "DMA scale is not supported in 1510 mode\n"); 131 printk(KERN_ERR "DMA scale is not supported in 1510 mode\n");
132 BUG(); 132 BUG();
133 } 133 }
@@ -177,7 +177,7 @@ static void set_b1_regs(void)
177 bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1); 177 bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
178 /* 1510 DMA requires the bottom address to be 2 more 178 /* 1510 DMA requires the bottom address to be 2 more
179 * than the actual last memory access location. */ 179 * than the actual last memory access location. */
180 if (cpu_is_omap1510() && 180 if (cpu_is_omap15xx() &&
181 lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32) 181 lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32)
182 bottom += 2; 182 bottom += 2;
183 ei = PIXSTEP(0, 0, 1, 0); 183 ei = PIXSTEP(0, 0, 1, 0);
@@ -241,7 +241,7 @@ static void set_b1_regs(void)
241 return; /* Suppress warning about uninitialized vars */ 241 return; /* Suppress warning about uninitialized vars */
242 } 242 }
243 243
244 if (cpu_is_omap1510()) { 244 if (cpu_is_omap15xx()) {
245 omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U); 245 omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U);
246 omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L); 246 omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L);
247 omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U); 247 omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U);
@@ -343,7 +343,7 @@ void omap_free_lcd_dma(void)
343 BUG(); 343 BUG();
344 return; 344 return;
345 } 345 }
346 if (!cpu_is_omap1510()) 346 if (!cpu_is_omap15xx())
347 omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1, 347 omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1,
348 OMAP1610_DMA_LCD_CCR); 348 OMAP1610_DMA_LCD_CCR);
349 lcd_dma.reserved = 0; 349 lcd_dma.reserved = 0;
@@ -360,7 +360,7 @@ void omap_enable_lcd_dma(void)
360 * connected. Otherwise the OMAP internal controller will 360 * connected. Otherwise the OMAP internal controller will
361 * start the transfer when it gets enabled. 361 * start the transfer when it gets enabled.
362 */ 362 */
363 if (cpu_is_omap1510() || !lcd_dma.ext_ctrl) 363 if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
364 return; 364 return;
365 365
366 w = omap_readw(OMAP1610_DMA_LCD_CTRL); 366 w = omap_readw(OMAP1610_DMA_LCD_CTRL);
@@ -378,14 +378,14 @@ EXPORT_SYMBOL(omap_enable_lcd_dma);
378void omap_setup_lcd_dma(void) 378void omap_setup_lcd_dma(void)
379{ 379{
380 BUG_ON(lcd_dma.active); 380 BUG_ON(lcd_dma.active);
381 if (!cpu_is_omap1510()) { 381 if (!cpu_is_omap15xx()) {
382 /* Set some reasonable defaults */ 382 /* Set some reasonable defaults */
383 omap_writew(0x5440, OMAP1610_DMA_LCD_CCR); 383 omap_writew(0x5440, OMAP1610_DMA_LCD_CCR);
384 omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP); 384 omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP);
385 omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL); 385 omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL);
386 } 386 }
387 set_b1_regs(); 387 set_b1_regs();
388 if (!cpu_is_omap1510()) { 388 if (!cpu_is_omap15xx()) {
389 u16 w; 389 u16 w;
390 390
391 w = omap_readw(OMAP1610_DMA_LCD_CCR); 391 w = omap_readw(OMAP1610_DMA_LCD_CCR);
@@ -407,7 +407,7 @@ void omap_stop_lcd_dma(void)
407 u16 w; 407 u16 w;
408 408
409 lcd_dma.active = 0; 409 lcd_dma.active = 0;
410 if (cpu_is_omap1510() || !lcd_dma.ext_ctrl) 410 if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
411 return; 411 return;
412 412
413 w = omap_readw(OMAP1610_DMA_LCD_CCR); 413 w = omap_readw(OMAP1610_DMA_LCD_CCR);
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index f83fc335c61..6885d2fac18 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -44,7 +44,6 @@
44#include <linux/clocksource.h> 44#include <linux/clocksource.h>
45#include <linux/clockchips.h> 45#include <linux/clockchips.h>
46#include <linux/io.h> 46#include <linux/io.h>
47#include <linux/sched.h>
48 47
49#include <asm/system.h> 48#include <asm/system.h>
50#include <mach/hardware.h> 49#include <mach/hardware.h>
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index e906e05bb41..9a2a31e011c 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -115,9 +115,6 @@ static struct omap2_hsmmc_info mmc[] = {
115 115
116static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev) 116static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
117{ 117{
118 twl_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, REG_GPIODATADIR1);
119 twl_i2c_write_u8(TWL4030_MODULE_LED, 0x0, 0x0);
120
121 if (gpio_is_valid(dssdev->reset_gpio)) 118 if (gpio_is_valid(dssdev->reset_gpio))
122 gpio_set_value_cansleep(dssdev->reset_gpio, 1); 119 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
123 return 0; 120 return 0;
@@ -247,6 +244,8 @@ static struct gpio_led gpio_leds[];
247static int devkit8000_twl_gpio_setup(struct device *dev, 244static int devkit8000_twl_gpio_setup(struct device *dev,
248 unsigned gpio, unsigned ngpio) 245 unsigned gpio, unsigned ngpio)
249{ 246{
247 int ret;
248
250 omap_mux_init_gpio(29, OMAP_PIN_INPUT); 249 omap_mux_init_gpio(29, OMAP_PIN_INPUT);
251 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 250 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
252 mmc[0].gpio_cd = gpio + 0; 251 mmc[0].gpio_cd = gpio + 0;
@@ -255,17 +254,23 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
255 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ 254 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
256 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; 255 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
257 256
258 /* gpio + 1 is "LCD_PWREN" (out, active high) */ 257 /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
259 devkit8000_lcd_device.reset_gpio = gpio + 1; 258 devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0;
260 gpio_request(devkit8000_lcd_device.reset_gpio, "LCD_PWREN"); 259 ret = gpio_request_one(devkit8000_lcd_device.reset_gpio,
261 /* Disable until needed */ 260 GPIOF_DIR_OUT | GPIOF_INIT_LOW, "LCD_PWREN");
262 gpio_direction_output(devkit8000_lcd_device.reset_gpio, 0); 261 if (ret < 0) {
262 devkit8000_lcd_device.reset_gpio = -EINVAL;
263 printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n");
264 }
263 265
264 /* gpio + 7 is "DVI_PD" (out, active low) */ 266 /* gpio + 7 is "DVI_PD" (out, active low) */
265 devkit8000_dvi_device.reset_gpio = gpio + 7; 267 devkit8000_dvi_device.reset_gpio = gpio + 7;
266 gpio_request(devkit8000_dvi_device.reset_gpio, "DVI PowerDown"); 268 ret = gpio_request_one(devkit8000_dvi_device.reset_gpio,
267 /* Disable until needed */ 269 GPIOF_DIR_OUT | GPIOF_INIT_LOW, "DVI PowerDown");
268 gpio_direction_output(devkit8000_dvi_device.reset_gpio, 0); 270 if (ret < 0) {
271 devkit8000_dvi_device.reset_gpio = -EINVAL;
272 printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n");
273 }
269 274
270 return 0; 275 return 0;
271} 276}
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index e001a048dc0..e944025d5ef 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -409,8 +409,6 @@ static void __init omap4_panda_init(void)
409 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices)); 409 platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
410 omap_serial_init(); 410 omap_serial_init();
411 omap4_twl6030_hsmmc_init(mmc); 411 omap4_twl6030_hsmmc_init(mmc);
412 /* OMAP4 Panda uses internal transceiver so register nop transceiver */
413 usb_nop_xceiv_register();
414 omap4_ehci_init(); 412 omap4_ehci_init();
415 usb_musb_init(&musb_board_data); 413 usb_musb_init(&musb_board_data);
416} 414}
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index cb77be7ac44..39a71bb8a30 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -40,9 +40,6 @@ static struct regulator_consumer_supply rm680_vemmc_consumers[] = {
40static struct regulator_init_data rm680_vemmc = { 40static struct regulator_init_data rm680_vemmc = {
41 .constraints = { 41 .constraints = {
42 .name = "rm680_vemmc", 42 .name = "rm680_vemmc",
43 .min_uV = 2900000,
44 .max_uV = 2900000,
45 .apply_uV = 1,
46 .valid_modes_mask = REGULATOR_MODE_NORMAL 43 .valid_modes_mask = REGULATOR_MODE_NORMAL
47 | REGULATOR_MODE_STANDBY, 44 | REGULATOR_MODE_STANDBY,
48 .valid_ops_mask = REGULATOR_CHANGE_STATUS 45 .valid_ops_mask = REGULATOR_CHANGE_STATUS
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index fae49d12bc7..98148b6c36e 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -1000,6 +1000,7 @@ int __init omap_mux_init(const char *name, u32 flags,
1000 if (!partition->base) { 1000 if (!partition->base) {
1001 pr_err("%s: Could not ioremap mux partition at 0x%08x\n", 1001 pr_err("%s: Could not ioremap mux partition at 0x%08x\n",
1002 __func__, partition->phys); 1002 __func__, partition->phys);
1003 kfree(partition);
1003 return -ENODEV; 1004 return -ENODEV;
1004 } 1005 }
1005 1006
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index a4aa1920a75..2f864e4b085 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -168,9 +168,10 @@ static void omap3_core_restore_context(void)
168 * once during boot sequence, but this works as we are not using secure 168 * once during boot sequence, but this works as we are not using secure
169 * services. 169 * services.
170 */ 170 */
171static void omap3_save_secure_ram_context(u32 target_mpu_state) 171static void omap3_save_secure_ram_context(void)
172{ 172{
173 u32 ret; 173 u32 ret;
174 int mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
174 175
175 if (omap_type() != OMAP2_DEVICE_TYPE_GP) { 176 if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
176 /* 177 /*
@@ -181,7 +182,7 @@ static void omap3_save_secure_ram_context(u32 target_mpu_state)
181 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); 182 pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
182 ret = _omap_save_secure_sram((u32 *) 183 ret = _omap_save_secure_sram((u32 *)
183 __pa(omap3_secure_ram_storage)); 184 __pa(omap3_secure_ram_storage));
184 pwrdm_set_next_pwrst(mpu_pwrdm, target_mpu_state); 185 pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);
185 /* Following is for error tracking, it should not happen */ 186 /* Following is for error tracking, it should not happen */
186 if (ret) { 187 if (ret) {
187 printk(KERN_ERR "save_secure_sram() returns %08x\n", 188 printk(KERN_ERR "save_secure_sram() returns %08x\n",
@@ -1094,7 +1095,7 @@ static int __init omap3_pm_init(void)
1094 local_fiq_disable(); 1095 local_fiq_disable();
1095 1096
1096 omap_dma_global_context_save(); 1097 omap_dma_global_context_save();
1097 omap3_save_secure_ram_context(PWRDM_POWER_ON); 1098 omap3_save_secure_ram_context();
1098 omap_dma_global_context_restore(); 1099 omap_dma_global_context_restore();
1099 1100
1100 local_irq_enable(); 1101 local_irq_enable();
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 77ecebf3fae..c37e823266d 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -780,8 +780,7 @@ static int omap_sr_autocomp_show(void *data, u64 *val)
780 struct omap_sr *sr_info = (struct omap_sr *) data; 780 struct omap_sr *sr_info = (struct omap_sr *) data;
781 781
782 if (!sr_info) { 782 if (!sr_info) {
783 pr_warning("%s: omap_sr struct for sr_%s not found\n", 783 pr_warning("%s: omap_sr struct not found\n", __func__);
784 __func__, sr_info->voltdm->name);
785 return -EINVAL; 784 return -EINVAL;
786 } 785 }
787 786
@@ -795,8 +794,7 @@ static int omap_sr_autocomp_store(void *data, u64 val)
795 struct omap_sr *sr_info = (struct omap_sr *) data; 794 struct omap_sr *sr_info = (struct omap_sr *) data;
796 795
797 if (!sr_info) { 796 if (!sr_info) {
798 pr_warning("%s: omap_sr struct for sr_%s not found\n", 797 pr_warning("%s: omap_sr struct not found\n", __func__);
799 __func__, sr_info->voltdm->name);
800 return -EINVAL; 798 return -EINVAL;
801 } 799 }
802 800
@@ -834,7 +832,8 @@ static int __init omap_sr_probe(struct platform_device *pdev)
834 832
835 if (!pdata) { 833 if (!pdata) {
836 dev_err(&pdev->dev, "%s: platform data missing\n", __func__); 834 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
837 return -EINVAL; 835 ret = -EINVAL;
836 goto err_free_devinfo;
838 } 837 }
839 838
840 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 839 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -966,7 +965,7 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)
966 } 965 }
967 966
968 sr_info = _sr_lookup(pdata->voltdm); 967 sr_info = _sr_lookup(pdata->voltdm);
969 if (!sr_info) { 968 if (IS_ERR(sr_info)) {
970 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", 969 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
971 __func__); 970 __func__);
972 return -EINVAL; 971 return -EINVAL;
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index ed6079c94c5..12be525b8df 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -471,6 +471,7 @@ static void __init vdd_debugfs_init(struct omap_vdd_info *vdd)
471 strcat(name, vdd->voltdm.name); 471 strcat(name, vdd->voltdm.name);
472 472
473 vdd->debug_dir = debugfs_create_dir(name, voltage_dir); 473 vdd->debug_dir = debugfs_create_dir(name, voltage_dir);
474 kfree(name);
474 if (IS_ERR(vdd->debug_dir)) { 475 if (IS_ERR(vdd->debug_dir)) {
475 pr_warning("%s: Unable to create debugfs directory for" 476 pr_warning("%s: Unable to create debugfs directory for"
476 " vdd_%s\n", __func__, vdd->voltdm.name); 477 " vdd_%s\n", __func__, vdd->voltdm.name);
diff --git a/arch/arm/plat-mxc/include/mach/uncompress.h b/arch/arm/plat-mxc/include/mach/uncompress.h
index 3a70ebf0477..ff469c4f1d7 100644
--- a/arch/arm/plat-mxc/include/mach/uncompress.h
+++ b/arch/arm/plat-mxc/include/mach/uncompress.h
@@ -95,6 +95,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
95 case MACH_TYPE_MX35_3DS: 95 case MACH_TYPE_MX35_3DS:
96 case MACH_TYPE_PCM043: 96 case MACH_TYPE_PCM043:
97 case MACH_TYPE_LILLY1131: 97 case MACH_TYPE_LILLY1131:
98 case MACH_TYPE_VPR200:
98 uart_base = MX3X_UART1_BASE_ADDR; 99 uart_base = MX3X_UART1_BASE_ADDR;
99 break; 100 break;
100 case MACH_TYPE_MAGX_ZN5: 101 case MACH_TYPE_MAGX_ZN5:
@@ -102,6 +103,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
102 break; 103 break;
103 case MACH_TYPE_MX51_BABBAGE: 104 case MACH_TYPE_MX51_BABBAGE:
104 case MACH_TYPE_EUKREA_CPUIMX51SD: 105 case MACH_TYPE_EUKREA_CPUIMX51SD:
106 case MACH_TYPE_MX51_3DS:
105 uart_base = MX51_UART1_BASE_ADDR; 107 uart_base = MX51_UART1_BASE_ADDR;
106 break; 108 break;
107 case MACH_TYPE_MX50_RDP: 109 case MACH_TYPE_MX50_RDP:
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 2fea897ebeb..9d6feaabbe7 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Sun Dec 12 23:24:27 2010 15# Last update: Mon Feb 7 08:59:27 2011
16# 16#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 18#
@@ -2240,7 +2240,7 @@ arm_ultimator2 MACH_ARM_ULTIMATOR2 ARM_ULTIMATOR2 2250
2240vs_v210 MACH_VS_V210 VS_V210 2252 2240vs_v210 MACH_VS_V210 VS_V210 2252
2241vs_v212 MACH_VS_V212 VS_V212 2253 2241vs_v212 MACH_VS_V212 VS_V212 2253
2242hmt MACH_HMT HMT 2254 2242hmt MACH_HMT HMT 2254
2243suen3 MACH_SUEN3 SUEN3 2255 2243km_kirkwood MACH_KM_KIRKWOOD KM_KIRKWOOD 2255
2244vesper MACH_VESPER VESPER 2256 2244vesper MACH_VESPER VESPER 2256
2245str9 MACH_STR9 STR9 2257 2245str9 MACH_STR9 STR9 2257
2246omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258 2246omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258
@@ -2987,7 +2987,7 @@ pxwnas_500_1000 MACH_PXWNAS_500_1000 PXWNAS_500_1000 3001
2987ea20 MACH_EA20 EA20 3002 2987ea20 MACH_EA20 EA20 3002
2988awm2 MACH_AWM2 AWM2 3003 2988awm2 MACH_AWM2 AWM2 3003
2989ti8148evm MACH_TI8148EVM TI8148EVM 3004 2989ti8148evm MACH_TI8148EVM TI8148EVM 3004
2990tegra_seaboard MACH_TEGRA_SEABOARD TEGRA_SEABOARD 3005 2990seaboard MACH_SEABOARD SEABOARD 3005
2991linkstation_chlv2 MACH_LINKSTATION_CHLV2 LINKSTATION_CHLV2 3006 2991linkstation_chlv2 MACH_LINKSTATION_CHLV2 LINKSTATION_CHLV2 3006
2992tera_pro2_rack MACH_TERA_PRO2_RACK TERA_PRO2_RACK 3007 2992tera_pro2_rack MACH_TERA_PRO2_RACK TERA_PRO2_RACK 3007
2993rubys MACH_RUBYS RUBYS 3008 2993rubys MACH_RUBYS RUBYS 3008
@@ -3190,7 +3190,7 @@ synergy MACH_SYNERGY SYNERGY 3205
3190ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206 3190ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206
3191wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207 3191wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207
3192punica MACH_PUNICA PUNICA 3208 3192punica MACH_PUNICA PUNICA 3208
3193sbc_nt250 MACH_SBC_NT250 SBC_NT250 3209 3193trimslice MACH_TRIMSLICE TRIMSLICE 3209
3194mx27_wmultra MACH_MX27_WMULTRA MX27_WMULTRA 3210 3194mx27_wmultra MACH_MX27_WMULTRA MX27_WMULTRA 3210
3195mackerel MACH_MACKEREL MACKEREL 3211 3195mackerel MACH_MACKEREL MACKEREL 3211
3196fa9x27 MACH_FA9X27 FA9X27 3213 3196fa9x27 MACH_FA9X27 FA9X27 3213
@@ -3219,3 +3219,100 @@ pivicc MACH_PIVICC PIVICC 3235
3219pcm048 MACH_PCM048 PCM048 3236 3219pcm048 MACH_PCM048 PCM048 3236
3220dds MACH_DDS DDS 3237 3220dds MACH_DDS DDS 3237
3221chalten_xa1 MACH_CHALTEN_XA1 CHALTEN_XA1 3238 3221chalten_xa1 MACH_CHALTEN_XA1 CHALTEN_XA1 3238
3222ts48xx MACH_TS48XX TS48XX 3239
3223tonga2_tfttimer MACH_TONGA2_TFTTIMER TONGA2_TFTTIMER 3240
3224whistler MACH_WHISTLER WHISTLER 3241
3225asl_phoenix MACH_ASL_PHOENIX ASL_PHOENIX 3242
3226at91sam9263otlite MACH_AT91SAM9263OTLITE AT91SAM9263OTLITE 3243
3227ddplug MACH_DDPLUG DDPLUG 3244
3228d2plug MACH_D2PLUG D2PLUG 3245
3229kzm9d MACH_KZM9D KZM9D 3246
3230verdi_lte MACH_VERDI_LTE VERDI_LTE 3247
3231nanozoom MACH_NANOZOOM NANOZOOM 3248
3232dm3730_som_lv MACH_DM3730_SOM_LV DM3730_SOM_LV 3249
3233dm3730_torpedo MACH_DM3730_TORPEDO DM3730_TORPEDO 3250
3234anchovy MACH_ANCHOVY ANCHOVY 3251
3235re2rev20 MACH_RE2REV20 RE2REV20 3253
3236re2rev21 MACH_RE2REV21 RE2REV21 3254
3237cns21xx MACH_CNS21XX CNS21XX 3255
3238rider MACH_RIDER RIDER 3257
3239nsk330 MACH_NSK330 NSK330 3258
3240cns2133evb MACH_CNS2133EVB CNS2133EVB 3259
3241z3_816x_mod MACH_Z3_816X_MOD Z3_816X_MOD 3260
3242z3_814x_mod MACH_Z3_814X_MOD Z3_814X_MOD 3261
3243beect MACH_BEECT BEECT 3262
3244dma_thunderbug MACH_DMA_THUNDERBUG DMA_THUNDERBUG 3263
3245omn_at91sam9g20 MACH_OMN_AT91SAM9G20 OMN_AT91SAM9G20 3264
3246mx25_e2s_uc MACH_MX25_E2S_UC MX25_E2S_UC 3265
3247mione MACH_MIONE MIONE 3266
3248top9000_tcu MACH_TOP9000_TCU TOP9000_TCU 3267
3249top9000_bsl MACH_TOP9000_BSL TOP9000_BSL 3268
3250kingdom MACH_KINGDOM KINGDOM 3269
3251armadillo460 MACH_ARMADILLO460 ARMADILLO460 3270
3252lq2 MACH_LQ2 LQ2 3271
3253sweda_tms2 MACH_SWEDA_TMS2 SWEDA_TMS2 3272
3254mx53_loco MACH_MX53_LOCO MX53_LOCO 3273
3255acer_a8 MACH_ACER_A8 ACER_A8 3275
3256acer_gauguin MACH_ACER_GAUGUIN ACER_GAUGUIN 3276
3257guppy MACH_GUPPY GUPPY 3277
3258mx61_ard MACH_MX61_ARD MX61_ARD 3278
3259tx53 MACH_TX53 TX53 3279
3260omapl138_case_a3 MACH_OMAPL138_CASE_A3 OMAPL138_CASE_A3 3280
3261uemd MACH_UEMD UEMD 3281
3262ccwmx51mut MACH_CCWMX51MUT CCWMX51MUT 3282
3263rockhopper MACH_ROCKHOPPER ROCKHOPPER 3283
3264nookcolor MACH_NOOKCOLOR NOOKCOLOR 3284
3265hkdkc100 MACH_HKDKC100 HKDKC100 3285
3266ts42xx MACH_TS42XX TS42XX 3286
3267aebl MACH_AEBL AEBL 3287
3268wario MACH_WARIO WARIO 3288
3269gfs_spm MACH_GFS_SPM GFS_SPM 3289
3270cm_t3730 MACH_CM_T3730 CM_T3730 3290
3271isc3 MACH_ISC3 ISC3 3291
3272rascal MACH_RASCAL RASCAL 3292
3273hrefv60 MACH_HREFV60 HREFV60 3293
3274tpt_2_0 MACH_TPT_2_0 TPT_2_0 3294
3275pyramid_td MACH_PYRAMID_TD PYRAMID_TD 3295
3276splendor MACH_SPLENDOR SPLENDOR 3296
3277guf_planet MACH_GUF_PLANET GUF_PLANET 3297
3278msm8x60_qt MACH_MSM8X60_QT MSM8X60_QT 3298
3279htc_hd_mini MACH_HTC_HD_MINI HTC_HD_MINI 3299
3280athene MACH_ATHENE ATHENE 3300
3281deep_r_ek_1 MACH_DEEP_R_EK_1 DEEP_R_EK_1 3301
3282vivow_ct MACH_VIVOW_CT VIVOW_CT 3302
3283nery_1000 MACH_NERY_1000 NERY_1000 3303
3284rfl109145_ssrv MACH_RFL109145_SSRV RFL109145_SSRV 3304
3285nmh MACH_NMH NMH 3305
3286wn802t MACH_WN802T WN802T 3306
3287dragonet MACH_DRAGONET DRAGONET 3307
3288geneva_b MACH_GENEVA_B GENEVA_B 3308
3289at91sam9263desk16l MACH_AT91SAM9263DESK16L AT91SAM9263DESK16L 3309
3290bcmhana_sv MACH_BCMHANA_SV BCMHANA_SV 3310
3291bcmhana_tablet MACH_BCMHANA_TABLET BCMHANA_TABLET 3311
3292koi MACH_KOI KOI 3312
3293ts4800 MACH_TS4800 TS4800 3313
3294tqma9263 MACH_TQMA9263 TQMA9263 3314
3295holiday MACH_HOLIDAY HOLIDAY 3315
3296dma_6410 MACH_DMA6410 DMA6410 3316
3297pcats_overlay MACH_PCATS_OVERLAY PCATS_OVERLAY 3317
3298hwgw6410 MACH_HWGW6410 HWGW6410 3318
3299shenzhou MACH_SHENZHOU SHENZHOU 3319
3300cwme9210 MACH_CWME9210 CWME9210 3320
3301cwme9210js MACH_CWME9210JS CWME9210JS 3321
3302pgs_v1 MACH_PGS_SITARA PGS_SITARA 3322
3303colibri_tegra2 MACH_COLIBRI_TEGRA2 COLIBRI_TEGRA2 3323
3304w21 MACH_W21 W21 3324
3305polysat1 MACH_POLYSAT1 POLYSAT1 3325
3306dataway MACH_DATAWAY DATAWAY 3326
3307cobral138 MACH_COBRAL138 COBRAL138 3327
3308roverpcs8 MACH_ROVERPCS8 ROVERPCS8 3328
3309marvelc MACH_MARVELC MARVELC 3329
3310navefihid MACH_NAVEFIHID NAVEFIHID 3330
3311dm365_cv100 MACH_DM365_CV100 DM365_CV100 3331
3312able MACH_ABLE ABLE 3332
3313legacy MACH_LEGACY LEGACY 3333
3314icong MACH_ICONG ICONG 3334
3315rover_g8 MACH_ROVER_G8 ROVER_G8 3335
3316t5388p MACH_T5388P T5388P 3336
3317dingo MACH_DINGO DINGO 3337
3318goflexhome MACH_GOFLEXHOME GOFLEXHOME 3338
diff --git a/arch/m32r/kernel/irq.c b/arch/m32r/kernel/irq.c
index f745c1287f3..76eaf3883fb 100644
--- a/arch/m32r/kernel/irq.c
+++ b/arch/m32r/kernel/irq.c
@@ -80,7 +80,7 @@ asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs)
80#ifdef CONFIG_DEBUG_STACKOVERFLOW 80#ifdef CONFIG_DEBUG_STACKOVERFLOW
81 /* FIXME M32R */ 81 /* FIXME M32R */
82#endif 82#endif
83 __do_IRQ(irq); 83 generic_handle_irq(irq);
84 irq_exit(); 84 irq_exit();
85 set_irq_regs(old_regs); 85 set_irq_regs(old_regs);
86 86
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index 42434008209..0db20b5abb5 100644
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -77,8 +77,18 @@ real_start:
77 We ensure r7 points to a valid FDT, just in case the bootloader 77 We ensure r7 points to a valid FDT, just in case the bootloader
78 is broken or non-existent */ 78 is broken or non-existent */
79 beqi r7, no_fdt_arg /* NULL pointer? don't copy */ 79 beqi r7, no_fdt_arg /* NULL pointer? don't copy */
80 lw r11, r0, r7 /* Does r7 point to a */ 80/* Does r7 point to a valid FDT? Load HEADER magic number */
81 rsubi r11, r11, OF_DT_HEADER /* valid FDT? */ 81 /* Run time Big/Little endian platform */
82 /* Save 1 as word and load byte - 0 - BIG, 1 - LITTLE */
83 addik r11, r0, 0x1 /* BIG/LITTLE checking value */
84 /* __bss_start will be zeroed later - it is just temp location */
85 swi r11, r0, TOPHYS(__bss_start)
86 lbui r11, r0, TOPHYS(__bss_start)
87 beqid r11, big_endian /* DO NOT break delay stop dependency */
88 lw r11, r0, r7 /* Big endian load in delay slot */
89 lwr r11, r0, r7 /* Little endian load */
90big_endian:
91 rsubi r11, r11, OF_DT_HEADER /* Check FDT header */
82 beqi r11, _prepare_copy_fdt 92 beqi r11, _prepare_copy_fdt
83 or r7, r0, r0 /* clear R7 when not valid DTB */ 93 or r7, r0, r0 /* clear R7 when not valid DTB */
84 bnei r11, no_fdt_arg /* No - get out of here */ 94 bnei r11, no_fdt_arg /* No - get out of here */
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S
index 25f6e07d8de..782680de312 100644
--- a/arch/microblaze/kernel/hw_exception_handler.S
+++ b/arch/microblaze/kernel/hw_exception_handler.S
@@ -147,10 +147,6 @@
147 #if CONFIG_XILINX_MICROBLAZE0_USE_BARREL > 0 147 #if CONFIG_XILINX_MICROBLAZE0_USE_BARREL > 0
148 #define BSRLI(rD, rA, imm) \ 148 #define BSRLI(rD, rA, imm) \
149 bsrli rD, rA, imm 149 bsrli rD, rA, imm
150 #elif CONFIG_XILINX_MICROBLAZE0_USE_DIV > 0
151 #define BSRLI(rD, rA, imm) \
152 ori rD, r0, (1 << imm); \
153 idivu rD, rD, rA
154 #else 150 #else
155 #define BSRLI(rD, rA, imm) BSRLI ## imm (rD, rA) 151 #define BSRLI(rD, rA, imm) BSRLI ## imm (rD, rA)
156 /* Only the used shift constants defined here - add more if needed */ 152 /* Only the used shift constants defined here - add more if needed */
diff --git a/arch/microblaze/lib/fastcopy.S b/arch/microblaze/lib/fastcopy.S
index fdc48bb065d..62021d7e249 100644
--- a/arch/microblaze/lib/fastcopy.S
+++ b/arch/microblaze/lib/fastcopy.S
@@ -29,6 +29,10 @@
29 * between mem locations with size of xfer spec'd in bytes 29 * between mem locations with size of xfer spec'd in bytes
30 */ 30 */
31 31
32#ifdef __MICROBLAZEEL__
33#error Microblaze LE not support ASM optimized lib func. Disable OPT_LIB_ASM.
34#endif
35
32#include <linux/linkage.h> 36#include <linux/linkage.h>
33 .text 37 .text
34 .globl memcpy 38 .globl memcpy
diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h
index 8eaed81ea64..17194fcd404 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -40,8 +40,8 @@
40 40
41/* MAS registers bit definitions */ 41/* MAS registers bit definitions */
42 42
43#define MAS0_TLBSEL(x) ((x << 28) & 0x30000000) 43#define MAS0_TLBSEL(x) (((x) << 28) & 0x30000000)
44#define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000) 44#define MAS0_ESEL(x) (((x) << 16) & 0x0FFF0000)
45#define MAS0_NV(x) ((x) & 0x00000FFF) 45#define MAS0_NV(x) ((x) & 0x00000FFF)
46#define MAS0_HES 0x00004000 46#define MAS0_HES 0x00004000
47#define MAS0_WQ_ALLWAYS 0x00000000 47#define MAS0_WQ_ALLWAYS 0x00000000
@@ -50,12 +50,12 @@
50 50
51#define MAS1_VALID 0x80000000 51#define MAS1_VALID 0x80000000
52#define MAS1_IPROT 0x40000000 52#define MAS1_IPROT 0x40000000
53#define MAS1_TID(x) ((x << 16) & 0x3FFF0000) 53#define MAS1_TID(x) (((x) << 16) & 0x3FFF0000)
54#define MAS1_IND 0x00002000 54#define MAS1_IND 0x00002000
55#define MAS1_TS 0x00001000 55#define MAS1_TS 0x00001000
56#define MAS1_TSIZE_MASK 0x00000f80 56#define MAS1_TSIZE_MASK 0x00000f80
57#define MAS1_TSIZE_SHIFT 7 57#define MAS1_TSIZE_SHIFT 7
58#define MAS1_TSIZE(x) ((x << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK) 58#define MAS1_TSIZE(x) (((x) << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK)
59 59
60#define MAS2_EPN 0xFFFFF000 60#define MAS2_EPN 0xFFFFF000
61#define MAS2_X0 0x00000040 61#define MAS2_X0 0x00000040
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index 53b64be40eb..da4b2000854 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -101,7 +101,7 @@ extern phys_addr_t kernstart_addr;
101 101
102#ifdef CONFIG_FLATMEM 102#ifdef CONFIG_FLATMEM
103#define ARCH_PFN_OFFSET (MEMORY_START >> PAGE_SHIFT) 103#define ARCH_PFN_OFFSET (MEMORY_START >> PAGE_SHIFT)
104#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < (ARCH_PFN_OFFSET + max_mapnr)) 104#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr)
105#endif 105#endif
106 106
107#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) 107#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S
index 55cba4a8a95..f8cd9fba4d3 100644
--- a/arch/powerpc/kernel/cpu_setup_6xx.S
+++ b/arch/powerpc/kernel/cpu_setup_6xx.S
@@ -18,7 +18,7 @@
18#include <asm/mmu.h> 18#include <asm/mmu.h>
19 19
20_GLOBAL(__setup_cpu_603) 20_GLOBAL(__setup_cpu_603)
21 mflr r4 21 mflr r5
22BEGIN_MMU_FTR_SECTION 22BEGIN_MMU_FTR_SECTION
23 li r10,0 23 li r10,0
24 mtspr SPRN_SPRG_603_LRU,r10 /* init SW LRU tracking */ 24 mtspr SPRN_SPRG_603_LRU,r10 /* init SW LRU tracking */
@@ -27,60 +27,60 @@ BEGIN_FTR_SECTION
27 bl __init_fpu_registers 27 bl __init_fpu_registers
28END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE) 28END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE)
29 bl setup_common_caches 29 bl setup_common_caches
30 mtlr r4 30 mtlr r5
31 blr 31 blr
32_GLOBAL(__setup_cpu_604) 32_GLOBAL(__setup_cpu_604)
33 mflr r4 33 mflr r5
34 bl setup_common_caches 34 bl setup_common_caches
35 bl setup_604_hid0 35 bl setup_604_hid0
36 mtlr r4 36 mtlr r5
37 blr 37 blr
38_GLOBAL(__setup_cpu_750) 38_GLOBAL(__setup_cpu_750)
39 mflr r4 39 mflr r5
40 bl __init_fpu_registers 40 bl __init_fpu_registers
41 bl setup_common_caches 41 bl setup_common_caches
42 bl setup_750_7400_hid0 42 bl setup_750_7400_hid0
43 mtlr r4 43 mtlr r5
44 blr 44 blr
45_GLOBAL(__setup_cpu_750cx) 45_GLOBAL(__setup_cpu_750cx)
46 mflr r4 46 mflr r5
47 bl __init_fpu_registers 47 bl __init_fpu_registers
48 bl setup_common_caches 48 bl setup_common_caches
49 bl setup_750_7400_hid0 49 bl setup_750_7400_hid0
50 bl setup_750cx 50 bl setup_750cx
51 mtlr r4 51 mtlr r5
52 blr 52 blr
53_GLOBAL(__setup_cpu_750fx) 53_GLOBAL(__setup_cpu_750fx)
54 mflr r4 54 mflr r5
55 bl __init_fpu_registers 55 bl __init_fpu_registers
56 bl setup_common_caches 56 bl setup_common_caches
57 bl setup_750_7400_hid0 57 bl setup_750_7400_hid0
58 bl setup_750fx 58 bl setup_750fx
59 mtlr r4 59 mtlr r5
60 blr 60 blr
61_GLOBAL(__setup_cpu_7400) 61_GLOBAL(__setup_cpu_7400)
62 mflr r4 62 mflr r5
63 bl __init_fpu_registers 63 bl __init_fpu_registers
64 bl setup_7400_workarounds 64 bl setup_7400_workarounds
65 bl setup_common_caches 65 bl setup_common_caches
66 bl setup_750_7400_hid0 66 bl setup_750_7400_hid0
67 mtlr r4 67 mtlr r5
68 blr 68 blr
69_GLOBAL(__setup_cpu_7410) 69_GLOBAL(__setup_cpu_7410)
70 mflr r4 70 mflr r5
71 bl __init_fpu_registers 71 bl __init_fpu_registers
72 bl setup_7410_workarounds 72 bl setup_7410_workarounds
73 bl setup_common_caches 73 bl setup_common_caches
74 bl setup_750_7400_hid0 74 bl setup_750_7400_hid0
75 li r3,0 75 li r3,0
76 mtspr SPRN_L2CR2,r3 76 mtspr SPRN_L2CR2,r3
77 mtlr r4 77 mtlr r5
78 blr 78 blr
79_GLOBAL(__setup_cpu_745x) 79_GLOBAL(__setup_cpu_745x)
80 mflr r4 80 mflr r5
81 bl setup_common_caches 81 bl setup_common_caches
82 bl setup_745x_specifics 82 bl setup_745x_specifics
83 mtlr r4 83 mtlr r5
84 blr 84 blr
85 85
86/* Enable caches for 603's, 604, 750 & 7400 */ 86/* Enable caches for 603's, 604, 750 & 7400 */
@@ -194,10 +194,10 @@ setup_750cx:
194 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq 194 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq
195 cror 4*cr0+eq,4*cr0+eq,4*cr2+eq 195 cror 4*cr0+eq,4*cr0+eq,4*cr2+eq
196 bnelr 196 bnelr
197 lwz r6,CPU_SPEC_FEATURES(r5) 197 lwz r6,CPU_SPEC_FEATURES(r4)
198 li r7,CPU_FTR_CAN_NAP 198 li r7,CPU_FTR_CAN_NAP
199 andc r6,r6,r7 199 andc r6,r6,r7
200 stw r6,CPU_SPEC_FEATURES(r5) 200 stw r6,CPU_SPEC_FEATURES(r4)
201 blr 201 blr
202 202
203/* 750fx specific 203/* 750fx specific
@@ -225,12 +225,12 @@ BEGIN_FTR_SECTION
225 andis. r11,r11,L3CR_L3E@h 225 andis. r11,r11,L3CR_L3E@h
226 beq 1f 226 beq 1f
227END_FTR_SECTION_IFSET(CPU_FTR_L3CR) 227END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
228 lwz r6,CPU_SPEC_FEATURES(r5) 228 lwz r6,CPU_SPEC_FEATURES(r4)
229 andi. r0,r6,CPU_FTR_L3_DISABLE_NAP 229 andi. r0,r6,CPU_FTR_L3_DISABLE_NAP
230 beq 1f 230 beq 1f
231 li r7,CPU_FTR_CAN_NAP 231 li r7,CPU_FTR_CAN_NAP
232 andc r6,r6,r7 232 andc r6,r6,r7
233 stw r6,CPU_SPEC_FEATURES(r5) 233 stw r6,CPU_SPEC_FEATURES(r4)
2341: 2341:
235 mfspr r11,SPRN_HID0 235 mfspr r11,SPRN_HID0
236 236
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 8d74a24c550..e8e915ce3d8 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -2076,8 +2076,8 @@ static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s)
2076 * pointer on ppc64 and booke as we are running at 0 in real mode 2076 * pointer on ppc64 and booke as we are running at 0 in real mode
2077 * on ppc64 and reloc_offset is always 0 on booke. 2077 * on ppc64 and reloc_offset is always 0 on booke.
2078 */ 2078 */
2079 if (s->cpu_setup) { 2079 if (t->cpu_setup) {
2080 s->cpu_setup(offset, s); 2080 t->cpu_setup(offset, t);
2081 } 2081 }
2082#endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2082#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2083} 2083}
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index bf5cb91f07d..fd481232957 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -186,7 +186,7 @@ static void unmap_cpu_from_node(unsigned long cpu)
186 dbg("removing cpu %lu from node %d\n", cpu, node); 186 dbg("removing cpu %lu from node %d\n", cpu, node);
187 187
188 if (cpumask_test_cpu(cpu, node_to_cpumask_map[node])) { 188 if (cpumask_test_cpu(cpu, node_to_cpumask_map[node])) {
189 cpumask_set_cpu(cpu, node_to_cpumask_map[node]); 189 cpumask_clear_cpu(cpu, node_to_cpumask_map[node]);
190 } else { 190 } else {
191 printk(KERN_ERR "WARNING: cpu %lu not found in node %d\n", 191 printk(KERN_ERR "WARNING: cpu %lu not found in node %d\n",
192 cpu, node); 192 cpu, node);
@@ -1289,10 +1289,9 @@ u64 memory_hotplug_max(void)
1289} 1289}
1290#endif /* CONFIG_MEMORY_HOTPLUG */ 1290#endif /* CONFIG_MEMORY_HOTPLUG */
1291 1291
1292/* Vrtual Processor Home Node (VPHN) support */ 1292/* Virtual Processor Home Node (VPHN) support */
1293#ifdef CONFIG_PPC_SPLPAR 1293#ifdef CONFIG_PPC_SPLPAR
1294#define VPHN_NR_CHANGE_CTRS (8) 1294static u8 vphn_cpu_change_counts[NR_CPUS][MAX_DISTANCE_REF_POINTS];
1295static u8 vphn_cpu_change_counts[NR_CPUS][VPHN_NR_CHANGE_CTRS];
1296static cpumask_t cpu_associativity_changes_mask; 1295static cpumask_t cpu_associativity_changes_mask;
1297static int vphn_enabled; 1296static int vphn_enabled;
1298static void set_topology_timer(void); 1297static void set_topology_timer(void);
@@ -1303,16 +1302,18 @@ static void set_topology_timer(void);
1303 */ 1302 */
1304static void setup_cpu_associativity_change_counters(void) 1303static void setup_cpu_associativity_change_counters(void)
1305{ 1304{
1306 int cpu = 0; 1305 int cpu;
1306
1307 /* The VPHN feature supports a maximum of 8 reference points */
1308 BUILD_BUG_ON(MAX_DISTANCE_REF_POINTS > 8);
1307 1309
1308 for_each_possible_cpu(cpu) { 1310 for_each_possible_cpu(cpu) {
1309 int i = 0; 1311 int i;
1310 u8 *counts = vphn_cpu_change_counts[cpu]; 1312 u8 *counts = vphn_cpu_change_counts[cpu];
1311 volatile u8 *hypervisor_counts = lppaca[cpu].vphn_assoc_counts; 1313 volatile u8 *hypervisor_counts = lppaca[cpu].vphn_assoc_counts;
1312 1314
1313 for (i = 0; i < VPHN_NR_CHANGE_CTRS; i++) { 1315 for (i = 0; i < distance_ref_points_depth; i++)
1314 counts[i] = hypervisor_counts[i]; 1316 counts[i] = hypervisor_counts[i];
1315 }
1316 } 1317 }
1317} 1318}
1318 1319
@@ -1329,7 +1330,7 @@ static void setup_cpu_associativity_change_counters(void)
1329 */ 1330 */
1330static int update_cpu_associativity_changes_mask(void) 1331static int update_cpu_associativity_changes_mask(void)
1331{ 1332{
1332 int cpu = 0, nr_cpus = 0; 1333 int cpu, nr_cpus = 0;
1333 cpumask_t *changes = &cpu_associativity_changes_mask; 1334 cpumask_t *changes = &cpu_associativity_changes_mask;
1334 1335
1335 cpumask_clear(changes); 1336 cpumask_clear(changes);
@@ -1339,8 +1340,8 @@ static int update_cpu_associativity_changes_mask(void)
1339 u8 *counts = vphn_cpu_change_counts[cpu]; 1340 u8 *counts = vphn_cpu_change_counts[cpu];
1340 volatile u8 *hypervisor_counts = lppaca[cpu].vphn_assoc_counts; 1341 volatile u8 *hypervisor_counts = lppaca[cpu].vphn_assoc_counts;
1341 1342
1342 for (i = 0; i < VPHN_NR_CHANGE_CTRS; i++) { 1343 for (i = 0; i < distance_ref_points_depth; i++) {
1343 if (hypervisor_counts[i] > counts[i]) { 1344 if (hypervisor_counts[i] != counts[i]) {
1344 counts[i] = hypervisor_counts[i]; 1345 counts[i] = hypervisor_counts[i];
1345 changed = 1; 1346 changed = 1;
1346 } 1347 }
@@ -1354,8 +1355,11 @@ static int update_cpu_associativity_changes_mask(void)
1354 return nr_cpus; 1355 return nr_cpus;
1355} 1356}
1356 1357
1357/* 6 64-bit registers unpacked into 12 32-bit associativity values */ 1358/*
1358#define VPHN_ASSOC_BUFSIZE (6*sizeof(u64)/sizeof(u32)) 1359 * 6 64-bit registers unpacked into 12 32-bit associativity values. To form
1360 * the complete property we have to add the length in the first cell.
1361 */
1362#define VPHN_ASSOC_BUFSIZE (6*sizeof(u64)/sizeof(u32) + 1)
1359 1363
1360/* 1364/*
1361 * Convert the associativity domain numbers returned from the hypervisor 1365 * Convert the associativity domain numbers returned from the hypervisor
@@ -1363,15 +1367,14 @@ static int update_cpu_associativity_changes_mask(void)
1363 */ 1367 */
1364static int vphn_unpack_associativity(const long *packed, unsigned int *unpacked) 1368static int vphn_unpack_associativity(const long *packed, unsigned int *unpacked)
1365{ 1369{
1366 int i = 0; 1370 int i, nr_assoc_doms = 0;
1367 int nr_assoc_doms = 0;
1368 const u16 *field = (const u16*) packed; 1371 const u16 *field = (const u16*) packed;
1369 1372
1370#define VPHN_FIELD_UNUSED (0xffff) 1373#define VPHN_FIELD_UNUSED (0xffff)
1371#define VPHN_FIELD_MSB (0x8000) 1374#define VPHN_FIELD_MSB (0x8000)
1372#define VPHN_FIELD_MASK (~VPHN_FIELD_MSB) 1375#define VPHN_FIELD_MASK (~VPHN_FIELD_MSB)
1373 1376
1374 for (i = 0; i < VPHN_ASSOC_BUFSIZE; i++) { 1377 for (i = 1; i < VPHN_ASSOC_BUFSIZE; i++) {
1375 if (*field == VPHN_FIELD_UNUSED) { 1378 if (*field == VPHN_FIELD_UNUSED) {
1376 /* All significant fields processed, and remaining 1379 /* All significant fields processed, and remaining
1377 * fields contain the reserved value of all 1's. 1380 * fields contain the reserved value of all 1's.
@@ -1379,14 +1382,12 @@ static int vphn_unpack_associativity(const long *packed, unsigned int *unpacked)
1379 */ 1382 */
1380 unpacked[i] = *((u32*)field); 1383 unpacked[i] = *((u32*)field);
1381 field += 2; 1384 field += 2;
1382 } 1385 } else if (*field & VPHN_FIELD_MSB) {
1383 else if (*field & VPHN_FIELD_MSB) {
1384 /* Data is in the lower 15 bits of this field */ 1386 /* Data is in the lower 15 bits of this field */
1385 unpacked[i] = *field & VPHN_FIELD_MASK; 1387 unpacked[i] = *field & VPHN_FIELD_MASK;
1386 field++; 1388 field++;
1387 nr_assoc_doms++; 1389 nr_assoc_doms++;
1388 } 1390 } else {
1389 else {
1390 /* Data is in the lower 15 bits of this field 1391 /* Data is in the lower 15 bits of this field
1391 * concatenated with the next 16 bit field 1392 * concatenated with the next 16 bit field
1392 */ 1393 */
@@ -1396,6 +1397,9 @@ static int vphn_unpack_associativity(const long *packed, unsigned int *unpacked)
1396 } 1397 }
1397 } 1398 }
1398 1399
1400 /* The first cell contains the length of the property */
1401 unpacked[0] = nr_assoc_doms;
1402
1399 return nr_assoc_doms; 1403 return nr_assoc_doms;
1400} 1404}
1401 1405
@@ -1405,7 +1409,7 @@ static int vphn_unpack_associativity(const long *packed, unsigned int *unpacked)
1405 */ 1409 */
1406static long hcall_vphn(unsigned long cpu, unsigned int *associativity) 1410static long hcall_vphn(unsigned long cpu, unsigned int *associativity)
1407{ 1411{
1408 long rc = 0; 1412 long rc;
1409 long retbuf[PLPAR_HCALL9_BUFSIZE] = {0}; 1413 long retbuf[PLPAR_HCALL9_BUFSIZE] = {0};
1410 u64 flags = 1; 1414 u64 flags = 1;
1411 int hwcpu = get_hard_smp_processor_id(cpu); 1415 int hwcpu = get_hard_smp_processor_id(cpu);
@@ -1419,7 +1423,7 @@ static long hcall_vphn(unsigned long cpu, unsigned int *associativity)
1419static long vphn_get_associativity(unsigned long cpu, 1423static long vphn_get_associativity(unsigned long cpu,
1420 unsigned int *associativity) 1424 unsigned int *associativity)
1421{ 1425{
1422 long rc = 0; 1426 long rc;
1423 1427
1424 rc = hcall_vphn(cpu, associativity); 1428 rc = hcall_vphn(cpu, associativity);
1425 1429
@@ -1445,9 +1449,9 @@ static long vphn_get_associativity(unsigned long cpu,
1445 */ 1449 */
1446int arch_update_cpu_topology(void) 1450int arch_update_cpu_topology(void)
1447{ 1451{
1448 int cpu = 0, nid = 0, old_nid = 0; 1452 int cpu, nid, old_nid;
1449 unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0}; 1453 unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
1450 struct sys_device *sysdev = NULL; 1454 struct sys_device *sysdev;
1451 1455
1452 for_each_cpu_mask(cpu, cpu_associativity_changes_mask) { 1456 for_each_cpu_mask(cpu, cpu_associativity_changes_mask) {
1453 vphn_get_associativity(cpu, associativity); 1457 vphn_get_associativity(cpu, associativity);
@@ -1512,7 +1516,8 @@ int start_topology_update(void)
1512{ 1516{
1513 int rc = 0; 1517 int rc = 0;
1514 1518
1515 if (firmware_has_feature(FW_FEATURE_VPHN)) { 1519 if (firmware_has_feature(FW_FEATURE_VPHN) &&
1520 get_lppaca()->shared_proc) {
1516 vphn_enabled = 1; 1521 vphn_enabled = 1;
1517 setup_cpu_associativity_change_counters(); 1522 setup_cpu_associativity_change_counters();
1518 init_timer_deferrable(&topology_timer); 1523 init_timer_deferrable(&topology_timer);
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index 5d3ea9f60dd..ca5d5898d32 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -713,6 +713,13 @@ EXPORT_SYMBOL(arch_free_page);
713/* NB: reg/unreg are called while guarded with the tracepoints_mutex */ 713/* NB: reg/unreg are called while guarded with the tracepoints_mutex */
714extern long hcall_tracepoint_refcount; 714extern long hcall_tracepoint_refcount;
715 715
716/*
717 * Since the tracing code might execute hcalls we need to guard against
718 * recursion. One example of this are spinlocks calling H_YIELD on
719 * shared processor partitions.
720 */
721static DEFINE_PER_CPU(unsigned int, hcall_trace_depth);
722
716void hcall_tracepoint_regfunc(void) 723void hcall_tracepoint_regfunc(void)
717{ 724{
718 hcall_tracepoint_refcount++; 725 hcall_tracepoint_refcount++;
@@ -725,12 +732,42 @@ void hcall_tracepoint_unregfunc(void)
725 732
726void __trace_hcall_entry(unsigned long opcode, unsigned long *args) 733void __trace_hcall_entry(unsigned long opcode, unsigned long *args)
727{ 734{
735 unsigned long flags;
736 unsigned int *depth;
737
738 local_irq_save(flags);
739
740 depth = &__get_cpu_var(hcall_trace_depth);
741
742 if (*depth)
743 goto out;
744
745 (*depth)++;
728 trace_hcall_entry(opcode, args); 746 trace_hcall_entry(opcode, args);
747 (*depth)--;
748
749out:
750 local_irq_restore(flags);
729} 751}
730 752
731void __trace_hcall_exit(long opcode, unsigned long retval, 753void __trace_hcall_exit(long opcode, unsigned long retval,
732 unsigned long *retbuf) 754 unsigned long *retbuf)
733{ 755{
756 unsigned long flags;
757 unsigned int *depth;
758
759 local_irq_save(flags);
760
761 depth = &__get_cpu_var(hcall_trace_depth);
762
763 if (*depth)
764 goto out;
765
766 (*depth)++;
734 trace_hcall_exit(opcode, retval, retbuf); 767 trace_hcall_exit(opcode, retval, retbuf);
768 (*depth)--;
769
770out:
771 local_irq_restore(flags);
735} 772}
736#endif 773#endif
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index ff19efdf6fe..636bcb81d06 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -406,7 +406,7 @@ config QDIO
406 If unsure, say Y. 406 If unsure, say Y.
407 407
408config CHSC_SCH 408config CHSC_SCH
409 def_tristate y 409 def_tristate m
410 prompt "Support for CHSC subchannels" 410 prompt "Support for CHSC subchannels"
411 help 411 help
412 This driver allows usage of CHSC subchannels. A CHSC subchannel 412 This driver allows usage of CHSC subchannels. A CHSC subchannel
diff --git a/arch/s390/include/asm/cacheflush.h b/arch/s390/include/asm/cacheflush.h
index 405cc97c624..7e1f7762062 100644
--- a/arch/s390/include/asm/cacheflush.h
+++ b/arch/s390/include/asm/cacheflush.h
@@ -1,29 +1,8 @@
1#ifndef _S390_CACHEFLUSH_H 1#ifndef _S390_CACHEFLUSH_H
2#define _S390_CACHEFLUSH_H 2#define _S390_CACHEFLUSH_H
3 3
4/* Keep includes the same across arches. */
5#include <linux/mm.h>
6
7/* Caches aren't brain-dead on the s390. */ 4/* Caches aren't brain-dead on the s390. */
8#define flush_cache_all() do { } while (0) 5#include <asm-generic/cacheflush.h>
9#define flush_cache_mm(mm) do { } while (0)
10#define flush_cache_dup_mm(mm) do { } while (0)
11#define flush_cache_range(vma, start, end) do { } while (0)
12#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
13#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
14#define flush_dcache_page(page) do { } while (0)
15#define flush_dcache_mmap_lock(mapping) do { } while (0)
16#define flush_dcache_mmap_unlock(mapping) do { } while (0)
17#define flush_icache_range(start, end) do { } while (0)
18#define flush_icache_page(vma,pg) do { } while (0)
19#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
20#define flush_cache_vmap(start, end) do { } while (0)
21#define flush_cache_vunmap(start, end) do { } while (0)
22
23#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
24 memcpy(dst, src, len)
25#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
26 memcpy(dst, src, len)
27 6
28#ifdef CONFIG_DEBUG_PAGEALLOC 7#ifdef CONFIG_DEBUG_PAGEALLOC
29void kernel_map_pages(struct page *page, int numpages, int enable); 8void kernel_map_pages(struct page *page, int numpages, int enable);
diff --git a/arch/s390/include/asm/tlb.h b/arch/s390/include/asm/tlb.h
index f1f644f2240..9074a54c4d1 100644
--- a/arch/s390/include/asm/tlb.h
+++ b/arch/s390/include/asm/tlb.h
@@ -22,6 +22,7 @@
22 */ 22 */
23 23
24#include <linux/mm.h> 24#include <linux/mm.h>
25#include <linux/pagemap.h>
25#include <linux/swap.h> 26#include <linux/swap.h>
26#include <asm/processor.h> 27#include <asm/processor.h>
27#include <asm/pgalloc.h> 28#include <asm/pgalloc.h>
diff --git a/arch/s390/lib/uaccess_std.c b/arch/s390/lib/uaccess_std.c
index 07deaeee14c..a6c4f7ed24a 100644
--- a/arch/s390/lib/uaccess_std.c
+++ b/arch/s390/lib/uaccess_std.c
@@ -125,9 +125,9 @@ static size_t copy_in_user_std(size_t size, void __user *to,
125 unsigned long tmp1; 125 unsigned long tmp1;
126 126
127 asm volatile( 127 asm volatile(
128 " sacf 256\n"
128 " "AHI" %0,-1\n" 129 " "AHI" %0,-1\n"
129 " jo 5f\n" 130 " jo 5f\n"
130 " sacf 256\n"
131 " bras %3,3f\n" 131 " bras %3,3f\n"
132 "0:"AHI" %0,257\n" 132 "0:"AHI" %0,257\n"
133 "1: mvc 0(1,%1),0(%2)\n" 133 "1: mvc 0(1,%1),0(%2)\n"
@@ -142,9 +142,8 @@ static size_t copy_in_user_std(size_t size, void __user *to,
142 "3:"AHI" %0,-256\n" 142 "3:"AHI" %0,-256\n"
143 " jnm 2b\n" 143 " jnm 2b\n"
144 "4: ex %0,1b-0b(%3)\n" 144 "4: ex %0,1b-0b(%3)\n"
145 " sacf 0\n"
146 "5: "SLR" %0,%0\n" 145 "5: "SLR" %0,%0\n"
147 "6:\n" 146 "6: sacf 0\n"
148 EX_TABLE(1b,6b) EX_TABLE(2b,0b) EX_TABLE(4b,0b) 147 EX_TABLE(1b,6b) EX_TABLE(2b,0b) EX_TABLE(4b,0b)
149 : "+a" (size), "+a" (to), "+a" (from), "=a" (tmp1) 148 : "+a" (size), "+a" (to), "+a" (from), "=a" (tmp1)
150 : : "cc", "memory"); 149 : : "cc", "memory");
@@ -156,9 +155,9 @@ static size_t clear_user_std(size_t size, void __user *to)
156 unsigned long tmp1, tmp2; 155 unsigned long tmp1, tmp2;
157 156
158 asm volatile( 157 asm volatile(
158 " sacf 256\n"
159 " "AHI" %0,-1\n" 159 " "AHI" %0,-1\n"
160 " jo 5f\n" 160 " jo 5f\n"
161 " sacf 256\n"
162 " bras %3,3f\n" 161 " bras %3,3f\n"
163 " xc 0(1,%1),0(%1)\n" 162 " xc 0(1,%1),0(%1)\n"
164 "0:"AHI" %0,257\n" 163 "0:"AHI" %0,257\n"
@@ -178,9 +177,8 @@ static size_t clear_user_std(size_t size, void __user *to)
178 "3:"AHI" %0,-256\n" 177 "3:"AHI" %0,-256\n"
179 " jnm 2b\n" 178 " jnm 2b\n"
180 "4: ex %0,0(%3)\n" 179 "4: ex %0,0(%3)\n"
181 " sacf 0\n"
182 "5: "SLR" %0,%0\n" 180 "5: "SLR" %0,%0\n"
183 "6:\n" 181 "6: sacf 0\n"
184 EX_TABLE(1b,6b) EX_TABLE(2b,0b) EX_TABLE(4b,0b) 182 EX_TABLE(1b,6b) EX_TABLE(2b,0b) EX_TABLE(4b,0b)
185 : "+a" (size), "+a" (to), "=a" (tmp1), "=a" (tmp2) 183 : "+a" (size), "+a" (to), "=a" (tmp1), "=a" (tmp2)
186 : : "cc", "memory"); 184 : : "cc", "memory");
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index 0c719c61972..e1850c28cd6 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -336,7 +336,8 @@ void page_table_free(struct mm_struct *mm, unsigned long *table)
336 page->flags ^= bits; 336 page->flags ^= bits;
337 if (page->flags & FRAG_MASK) { 337 if (page->flags & FRAG_MASK) {
338 /* Page now has some free pgtable fragments. */ 338 /* Page now has some free pgtable fragments. */
339 list_move(&page->lru, &mm->context.pgtable_list); 339 if (!list_empty(&page->lru))
340 list_move(&page->lru, &mm->context.pgtable_list);
340 page = NULL; 341 page = NULL;
341 } else 342 } else
342 /* All fragments of the 4K page have been freed. */ 343 /* All fragments of the 4K page have been freed. */
diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h
index 4a2d4e0c18d..8b5393ec108 100644
--- a/arch/x86/include/asm/mmu_context.h
+++ b/arch/x86/include/asm/mmu_context.h
@@ -36,8 +36,6 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
36 unsigned cpu = smp_processor_id(); 36 unsigned cpu = smp_processor_id();
37 37
38 if (likely(prev != next)) { 38 if (likely(prev != next)) {
39 /* stop flush ipis for the previous mm */
40 cpumask_clear_cpu(cpu, mm_cpumask(prev));
41#ifdef CONFIG_SMP 39#ifdef CONFIG_SMP
42 percpu_write(cpu_tlbstate.state, TLBSTATE_OK); 40 percpu_write(cpu_tlbstate.state, TLBSTATE_OK);
43 percpu_write(cpu_tlbstate.active_mm, next); 41 percpu_write(cpu_tlbstate.active_mm, next);
@@ -47,6 +45,9 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
47 /* Re-load page tables */ 45 /* Re-load page tables */
48 load_cr3(next->pgd); 46 load_cr3(next->pgd);
49 47
48 /* stop flush ipis for the previous mm */
49 cpumask_clear_cpu(cpu, mm_cpumask(prev));
50
50 /* 51 /*
51 * load the LDT, if the LDT is different: 52 * load the LDT, if the LDT is different:
52 */ 53 */
diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index 4c2f63c7fc1..1f469513677 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -40,10 +40,7 @@ DECLARE_EARLY_PER_CPU(u16, x86_cpu_to_apicid);
40DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid); 40DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
41 41
42/* Static state in head.S used to set up a CPU */ 42/* Static state in head.S used to set up a CPU */
43extern struct { 43extern unsigned long stack_start; /* Initial stack pointer address */
44 void *sp;
45 unsigned short ss;
46} stack_start;
47 44
48struct smp_ops { 45struct smp_ops {
49 void (*smp_prepare_boot_cpu)(void); 46 void (*smp_prepare_boot_cpu)(void);
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 69fd72aa559..68d1537b8c8 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -12,10 +12,8 @@
12#include <linux/cpumask.h> 12#include <linux/cpumask.h>
13#include <asm/segment.h> 13#include <asm/segment.h>
14#include <asm/desc.h> 14#include <asm/desc.h>
15
16#ifdef CONFIG_X86_32
17#include <asm/pgtable.h> 15#include <asm/pgtable.h>
18#endif 16#include <asm/cacheflush.h>
19 17
20#include "realmode/wakeup.h" 18#include "realmode/wakeup.h"
21#include "sleep.h" 19#include "sleep.h"
@@ -100,7 +98,7 @@ int acpi_save_state_mem(void)
100#else /* CONFIG_64BIT */ 98#else /* CONFIG_64BIT */
101 header->trampoline_segment = setup_trampoline() >> 4; 99 header->trampoline_segment = setup_trampoline() >> 4;
102#ifdef CONFIG_SMP 100#ifdef CONFIG_SMP
103 stack_start.sp = temp_stack + sizeof(temp_stack); 101 stack_start = (unsigned long)temp_stack + sizeof(temp_stack);
104 early_gdt_descr.address = 102 early_gdt_descr.address =
105 (unsigned long)get_cpu_gdt_table(smp_processor_id()); 103 (unsigned long)get_cpu_gdt_table(smp_processor_id());
106 initial_gs = per_cpu_offset(smp_processor_id()); 104 initial_gs = per_cpu_offset(smp_processor_id());
@@ -149,6 +147,15 @@ void __init acpi_reserve_wakeup_memory(void)
149 memblock_x86_reserve_range(mem, mem + WAKEUP_SIZE, "ACPI WAKEUP"); 147 memblock_x86_reserve_range(mem, mem + WAKEUP_SIZE, "ACPI WAKEUP");
150} 148}
151 149
150int __init acpi_configure_wakeup_memory(void)
151{
152 if (acpi_realmode)
153 set_memory_x(acpi_realmode, WAKEUP_SIZE >> PAGE_SHIFT);
154
155 return 0;
156}
157arch_initcall(acpi_configure_wakeup_memory);
158
152 159
153static int __init acpi_sleep_setup(char *str) 160static int __init acpi_sleep_setup(char *str)
154{ 161{
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index 01c0f3ee6cc..bebabec5b44 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -793,13 +793,21 @@ void set_mtrr_aps_delayed_init(void)
793} 793}
794 794
795/* 795/*
796 * MTRR initialization for all AP's 796 * Delayed MTRR initialization for all AP's
797 */ 797 */
798void mtrr_aps_init(void) 798void mtrr_aps_init(void)
799{ 799{
800 if (!use_intel()) 800 if (!use_intel())
801 return; 801 return;
802 802
803 /*
804 * Check if someone has requested the delay of AP MTRR initialization,
805 * by doing set_mtrr_aps_delayed_init(), prior to this point. If not,
806 * then we are done.
807 */
808 if (!mtrr_aps_delayed_init)
809 return;
810
803 set_mtrr(~0U, 0, 0, 0); 811 set_mtrr(~0U, 0, 0, 0);
804 mtrr_aps_delayed_init = false; 812 mtrr_aps_delayed_init = false;
805} 813}
diff --git a/arch/x86/kernel/cpu/perf_event_p4.c b/arch/x86/kernel/cpu/perf_event_p4.c
index e56b9bfbabd..f7a0993c1e7 100644
--- a/arch/x86/kernel/cpu/perf_event_p4.c
+++ b/arch/x86/kernel/cpu/perf_event_p4.c
@@ -682,7 +682,7 @@ static int p4_validate_raw_event(struct perf_event *event)
682 * if an event is shared accross the logical threads 682 * if an event is shared accross the logical threads
683 * the user needs special permissions to be able to use it 683 * the user needs special permissions to be able to use it
684 */ 684 */
685 if (p4_event_bind_map[v].shared) { 685 if (p4_ht_active() && p4_event_bind_map[v].shared) {
686 if (perf_paranoid_cpu() && !capable(CAP_SYS_ADMIN)) 686 if (perf_paranoid_cpu() && !capable(CAP_SYS_ADMIN))
687 return -EACCES; 687 return -EACCES;
688 } 688 }
@@ -727,7 +727,8 @@ static int p4_hw_config(struct perf_event *event)
727 event->hw.config = p4_set_ht_bit(event->hw.config); 727 event->hw.config = p4_set_ht_bit(event->hw.config);
728 728
729 if (event->attr.type == PERF_TYPE_RAW) { 729 if (event->attr.type == PERF_TYPE_RAW) {
730 730 struct p4_event_bind *bind;
731 unsigned int esel;
731 /* 732 /*
732 * Clear bits we reserve to be managed by kernel itself 733 * Clear bits we reserve to be managed by kernel itself
733 * and never allowed from a user space 734 * and never allowed from a user space
@@ -743,6 +744,13 @@ static int p4_hw_config(struct perf_event *event)
743 * bits since we keep additional info here (for cache events and etc) 744 * bits since we keep additional info here (for cache events and etc)
744 */ 745 */
745 event->hw.config |= event->attr.config; 746 event->hw.config |= event->attr.config;
747 bind = p4_config_get_bind(event->attr.config);
748 if (!bind) {
749 rc = -EINVAL;
750 goto out;
751 }
752 esel = P4_OPCODE_ESEL(bind->opcode);
753 event->hw.config |= p4_config_pack_cccr(P4_CCCR_ESEL(esel));
746 } 754 }
747 755
748 rc = x86_setup_perfctr(event); 756 rc = x86_setup_perfctr(event);
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index fc293dc8dc3..767d6c43de3 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -85,6 +85,8 @@ RESERVE_BRK(pagetables, INIT_MAP_SIZE)
85 */ 85 */
86__HEAD 86__HEAD
87ENTRY(startup_32) 87ENTRY(startup_32)
88 movl pa(stack_start),%ecx
89
88 /* test KEEP_SEGMENTS flag to see if the bootloader is asking 90 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
89 us to not reload segments */ 91 us to not reload segments */
90 testb $(1<<6), BP_loadflags(%esi) 92 testb $(1<<6), BP_loadflags(%esi)
@@ -99,7 +101,9 @@ ENTRY(startup_32)
99 movl %eax,%es 101 movl %eax,%es
100 movl %eax,%fs 102 movl %eax,%fs
101 movl %eax,%gs 103 movl %eax,%gs
104 movl %eax,%ss
1022: 1052:
106 leal -__PAGE_OFFSET(%ecx),%esp
103 107
104/* 108/*
105 * Clear BSS first so that there are no surprises... 109 * Clear BSS first so that there are no surprises...
@@ -145,8 +149,6 @@ ENTRY(startup_32)
145 * _brk_end is set up to point to the first "safe" location. 149 * _brk_end is set up to point to the first "safe" location.
146 * Mappings are created both at virtual address 0 (identity mapping) 150 * Mappings are created both at virtual address 0 (identity mapping)
147 * and PAGE_OFFSET for up to _end. 151 * and PAGE_OFFSET for up to _end.
148 *
149 * Note that the stack is not yet set up!
150 */ 152 */
151#ifdef CONFIG_X86_PAE 153#ifdef CONFIG_X86_PAE
152 154
@@ -282,6 +284,9 @@ ENTRY(startup_32_smp)
282 movl %eax,%es 284 movl %eax,%es
283 movl %eax,%fs 285 movl %eax,%fs
284 movl %eax,%gs 286 movl %eax,%gs
287 movl pa(stack_start),%ecx
288 movl %eax,%ss
289 leal -__PAGE_OFFSET(%ecx),%esp
285#endif /* CONFIG_SMP */ 290#endif /* CONFIG_SMP */
286default_entry: 291default_entry:
287 292
@@ -347,8 +352,8 @@ default_entry:
347 movl %eax,%cr0 /* ..and set paging (PG) bit */ 352 movl %eax,%cr0 /* ..and set paging (PG) bit */
348 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */ 353 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
3491: 3541:
350 /* Set up the stack pointer */ 355 /* Shift the stack pointer to a virtual address */
351 lss stack_start,%esp 356 addl $__PAGE_OFFSET, %esp
352 357
353/* 358/*
354 * Initialize eflags. Some BIOS's leave bits like NT set. This would 359 * Initialize eflags. Some BIOS's leave bits like NT set. This would
@@ -360,9 +365,7 @@ default_entry:
360 365
361#ifdef CONFIG_SMP 366#ifdef CONFIG_SMP
362 cmpb $0, ready 367 cmpb $0, ready
363 jz 1f /* Initial CPU cleans BSS */ 368 jnz checkCPUtype
364 jmp checkCPUtype
3651:
366#endif /* CONFIG_SMP */ 369#endif /* CONFIG_SMP */
367 370
368/* 371/*
@@ -470,14 +473,7 @@ is386: movl $2,%ecx # set MP
470 473
471 cld # gcc2 wants the direction flag cleared at all times 474 cld # gcc2 wants the direction flag cleared at all times
472 pushl $0 # fake return address for unwinder 475 pushl $0 # fake return address for unwinder
473#ifdef CONFIG_SMP
474 movb ready, %cl
475 movb $1, ready 476 movb $1, ready
476 cmpb $0,%cl # the first CPU calls start_kernel
477 je 1f
478 movl (stack_start), %esp
4791:
480#endif /* CONFIG_SMP */
481 jmp *(initial_code) 477 jmp *(initial_code)
482 478
483/* 479/*
@@ -670,15 +666,15 @@ ENTRY(initial_page_table)
670#endif 666#endif
671 667
672.data 668.data
669.balign 4
673ENTRY(stack_start) 670ENTRY(stack_start)
674 .long init_thread_union+THREAD_SIZE 671 .long init_thread_union+THREAD_SIZE
675 .long __BOOT_DS
676
677ready: .byte 0
678 672
679early_recursion_flag: 673early_recursion_flag:
680 .long 0 674 .long 0
681 675
676ready: .byte 0
677
682int_msg: 678int_msg:
683 .asciz "Unknown interrupt or fault at: %p %p %p\n" 679 .asciz "Unknown interrupt or fault at: %p %p %p\n"
684 680
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 0cbe8c0b35e..03273b6c272 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -638,7 +638,7 @@ wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
638 * target processor state. 638 * target processor state.
639 */ 639 */
640 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary, 640 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
641 (unsigned long)stack_start.sp); 641 stack_start);
642 642
643 /* 643 /*
644 * Run STARTUP IPI loop. 644 * Run STARTUP IPI loop.
@@ -785,7 +785,7 @@ do_rest:
785#endif 785#endif
786 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu); 786 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
787 initial_code = (unsigned long)start_secondary; 787 initial_code = (unsigned long)start_secondary;
788 stack_start.sp = (void *) c_idle.idle->thread.sp; 788 stack_start = c_idle.idle->thread.sp;
789 789
790 /* start_ip had better be page-aligned! */ 790 /* start_ip had better be page-aligned! */
791 start_ip = setup_trampoline(); 791 start_ip = setup_trampoline();
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 8b830ca14ac..d343b3c81f3 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -256,7 +256,6 @@ static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
256 unsigned long pfn) 256 unsigned long pfn)
257{ 257{
258 pgprot_t forbidden = __pgprot(0); 258 pgprot_t forbidden = __pgprot(0);
259 pgprot_t required = __pgprot(0);
260 259
261 /* 260 /*
262 * The BIOS area between 640k and 1Mb needs to be executable for 261 * The BIOS area between 640k and 1Mb needs to be executable for
@@ -282,12 +281,6 @@ static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
282 if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT, 281 if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT,
283 __pa((unsigned long)__end_rodata) >> PAGE_SHIFT)) 282 __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
284 pgprot_val(forbidden) |= _PAGE_RW; 283 pgprot_val(forbidden) |= _PAGE_RW;
285 /*
286 * .data and .bss should always be writable.
287 */
288 if (within(address, (unsigned long)_sdata, (unsigned long)_edata) ||
289 within(address, (unsigned long)__bss_start, (unsigned long)__bss_stop))
290 pgprot_val(required) |= _PAGE_RW;
291 284
292#if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA) 285#if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
293 /* 286 /*
@@ -327,7 +320,6 @@ static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
327#endif 320#endif
328 321
329 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden)); 322 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
330 prot = __pgprot(pgprot_val(prot) | pgprot_val(required));
331 323
332 return prot; 324 return prot;
333} 325}
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-05 17:22:48 -0500