121 files changed, 1286 insertions, 721 deletions

diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index f2aa09eb658..9137df539b6 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -33,7 +33,7 @@ ifeq ($(CONFIG_XIP_KERNEL),y)
 
 $(obj)/xipImage: vmlinux FORCE
         $(call if_changed,objcopy)
-        $(kecho) '  Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))'
+        @$(kecho) '  Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))'
 
 $(obj)/Image $(obj)/zImage: FORCE
         @echo 'Kernel configured for XIP (CONFIG_XIP_KERNEL=y)'
@@ -48,14 +48,14 @@ $(obj)/xipImage: FORCE
 
 $(obj)/Image: vmlinux FORCE
         $(call if_changed,objcopy)
-        $(kecho) '  Kernel: $@ is ready'
+        @$(kecho) '  Kernel: $@ is ready'
 
 $(obj)/compressed/vmlinux: $(obj)/Image FORCE
         $(Q)$(MAKE) $(build)=$(obj)/compressed $@
 
 $(obj)/zImage:  $(obj)/compressed/vmlinux FORCE
         $(call if_changed,objcopy)
-        $(kecho) '  Kernel: $@ is ready'
+        @$(kecho) '  Kernel: $@ is ready'
 
 endif
 
@@ -90,7 +90,7 @@ fi
 $(obj)/uImage:  $(obj)/zImage FORCE
         @$(check_for_multiple_loadaddr)
         $(call if_changed,uimage)
-        $(kecho) '  Image $@ is ready'
+        @$(kecho) '  Image $@ is ready'
 
 $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE
         $(Q)$(MAKE) $(build)=$(obj)/bootp $@
@@ -98,7 +98,7 @@ $(obj)/bootp/bootp: $(obj)/zImage initrd FORCE
 
 $(obj)/bootpImage: $(obj)/bootp/bootp FORCE
         $(call if_changed,objcopy)
-        $(kecho) '  Kernel: $@ is ready'
+        @$(kecho) '  Kernel: $@ is ready'
 
 PHONY += initrd FORCE
 initrd:
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index b1497c7d7d6..df7f2270fc9 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -73,8 +73,8 @@
 
         pinmux: pinmux {
                 compatible = "nvidia,tegra30-pinmux";
-                reg = <0x70000868 0xd0    /* Pad control registers */
-                       0x70003000 0x3e0>; /* Mux registers */
+                reg = <0x70000868 0xd4    /* Pad control registers */
+                       0x70003000 0x3e4>; /* Mux registers */
         };
 
         serial@70006000 {
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 35c1ed89b93..42f042ee4ad 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -64,7 +64,7 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
 static inline void __raw_writew(u16 val, volatile void __iomem *addr)
 {
         asm volatile("strh %1, %0"
-                     : "+Qo" (*(volatile u16 __force *)addr)
+                     : "+Q" (*(volatile u16 __force *)addr)
                      : "r" (val));
 }
 
@@ -72,7 +72,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
 {
         u16 val;
         asm volatile("ldrh %1, %0"
-                     : "+Qo" (*(volatile u16 __force *)addr),
+                     : "+Q" (*(volatile u16 __force *)addr),
                        "=r" (val));
         return val;
 }
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h
index 05b8e82ec9f..e3f75726343 100644
--- a/arch/arm/include/asm/sched_clock.h
+++ b/arch/arm/include/asm/sched_clock.h
@@ -10,7 +10,5 @@
 
 extern void sched_clock_postinit(void);
 extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
-extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
-                unsigned long rate);
 
 #endif
diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h
index 6a6f1e485f4..301c1db3e99 100644
--- a/arch/arm/include/asm/vfpmacros.h
+++ b/arch/arm/include/asm/vfpmacros.h
@@ -27,9 +27,9 @@
 #if __LINUX_ARM_ARCH__ <= 6
         ldr     \tmp, =elf_hwcap                    @ may not have MVFR regs
         ldr     \tmp, [\tmp, #0]
-        tst     \tmp, #HWCAP_VFPv3D16
-        ldceql  p11, cr0, [\base],#32*4             @ FLDMIAD \base!, {d16-d31}
-        addne   \base, \base, #32*4                 @ step over unused register space
+        tst     \tmp, #HWCAP_VFPD32
+        ldcnel  p11, cr0, [\base],#32*4             @ FLDMIAD \base!, {d16-d31}
+        addeq   \base, \base, #32*4                 @ step over unused register space
 #else
         VFPFMRX \tmp, MVFR0                         @ Media and VFP Feature Register 0
         and     \tmp, \tmp, #MVFR0_A_SIMD_MASK      @ A_SIMD field
@@ -51,9 +51,9 @@
 #if __LINUX_ARM_ARCH__ <= 6
         ldr     \tmp, =elf_hwcap                    @ may not have MVFR regs
         ldr     \tmp, [\tmp, #0]
-        tst     \tmp, #HWCAP_VFPv3D16
-        stceql  p11, cr0, [\base],#32*4             @ FSTMIAD \base!, {d16-d31}
-        addne   \base, \base, #32*4                 @ step over unused register space
+        tst     \tmp, #HWCAP_VFPD32
+        stcnel  p11, cr0, [\base],#32*4             @ FSTMIAD \base!, {d16-d31}
+        addeq   \base, \base, #32*4                 @ step over unused register space
 #else
         VFPFMRX \tmp, MVFR0                         @ Media and VFP Feature Register 0
         and     \tmp, \tmp, #MVFR0_A_SIMD_MASK      @ A_SIMD field
diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h
index f254f6503cc..3688fd15a32 100644
--- a/arch/arm/include/uapi/asm/hwcap.h
+++ b/arch/arm/include/uapi/asm/hwcap.h
@@ -18,11 +18,12 @@
 #define HWCAP_THUMBEE   (1 << 11)
 #define HWCAP_NEON      (1 << 12)
 #define HWCAP_VFPv3     (1 << 13)
-#define HWCAP_VFPv3D16  (1 << 14)
+#define HWCAP_VFPv3D16  (1 << 14)       /* also set for VFPv4-D16 */
 #define HWCAP_TLS       (1 << 15)
 #define HWCAP_VFPv4     (1 << 16)
 #define HWCAP_IDIVA     (1 << 17)
 #define HWCAP_IDIVT     (1 << 18)
+#define HWCAP_VFPD32    (1 << 19)       /* set if VFP has 32 regs (not 16) */
 #define HWCAP_IDIV      (HWCAP_IDIVA | HWCAP_IDIVT)
 
 
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index e21bac20d90..fc6692e2b60 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -107,13 +107,6 @@ static void sched_clock_poll(unsigned long wrap_ticks)
         update_sched_clock();
 }
 
-void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
-                unsigned long rate)
-{
-        setup_sched_clock(read, bits, rate);
-        cd.needs_suspend = true;
-}
-
 void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
 {
         unsigned long r, w;
@@ -189,18 +182,15 @@ void __init sched_clock_postinit(void)
 static int sched_clock_suspend(void)
 {
         sched_clock_poll(sched_clock_timer.data);
-        if (cd.needs_suspend)
-                cd.suspended = true;
+        cd.suspended = true;
         return 0;
 }
 
 static void sched_clock_resume(void)
 {
-        if (cd.needs_suspend) {
-                cd.epoch_cyc = read_sched_clock();
-                cd.epoch_cyc_copy = cd.epoch_cyc;
-                cd.suspended = false;
-        }
+        cd.epoch_cyc = read_sched_clock();
+        cd.epoch_cyc_copy = cd.epoch_cyc;
+        cd.suspended = false;
 }
 
 static struct syscore_ops sched_clock_ops = {
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 1e122bcd784..3cee0e6ea7c 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -68,7 +68,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
 
         /* Enable overcurrent notification */
         for (i = 0; i < data->ports; i++) {
-                if (data->overcurrent_pin[i])
+                if (gpio_is_valid(data->overcurrent_pin[i]))
                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
         }
 
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index aa1e5872988..414bd855fb0 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
 
         /* Enable overcurrent notification */
         for (i = 0; i < data->ports; i++) {
-                if (data->overcurrent_pin[i])
+                if (gpio_is_valid(data->overcurrent_pin[i]))
                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
         }
 
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index b9487696b7b..cd604aad8e9 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
 
         /* Enable overcurrent notification */
         for (i = 0; i < data->ports; i++) {
-                if (data->overcurrent_pin[i])
+                if (gpio_is_valid(data->overcurrent_pin[i]))
                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
         }
 
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index cb85da2ecce..9c61e59a210 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -78,7 +78,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data)
 
         /* Enable overcurrent notification */
         for (i = 0; i < data->ports; i++) {
-                if (data->overcurrent_pin[i])
+                if (gpio_is_valid(data->overcurrent_pin[i]))
                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
         }
 
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index b1596072dcc..fcd233cb33d 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -1841,8 +1841,8 @@ static struct resource sha_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = AT91SAM9G45_ID_AESTDESSHA,
-                .end    = AT91SAM9G45_ID_AESTDESSHA,
+                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
+                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1874,8 +1874,8 @@ static struct resource tdes_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = AT91SAM9G45_ID_AESTDESSHA,
-                .end    = AT91SAM9G45_ID_AESTDESSHA,
+                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
+                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -1910,8 +1910,8 @@ static struct resource aes_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = AT91SAM9G45_ID_AESTDESSHA,
-                .end    = AT91SAM9G45_ID_AESTDESSHA,
+                .start  = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
+                .end    = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c
index 82c27230d4a..86e37cd9376 100644
--- a/arch/arm/mach-highbank/system.c
+++ b/arch/arm/mach-highbank/system.c
@@ -28,6 +28,7 @@ void highbank_restart(char mode, const char *cmd)
                 hignbank_set_pwr_soft_reset();
 
         scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
-        cpu_do_idle();
+        while (1)
+                cpu_do_idle();
 }
 
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
index 3c1b8ff9a0a..cc49c7ae186 100644
--- a/arch/arm/mach-imx/clk-gate2.c
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -112,7 +112,7 @@ struct clk *clk_register_gate2(struct device *dev, const char *name,
 
         clk = clk_register(dev, &gate->hw);
         if (IS_ERR(clk))
-                kfree(clk);
+                kfree(gate);
 
         return clk;
 }
diff --git a/arch/arm/mach-imx/ehci-imx25.c b/arch/arm/mach-imx/ehci-imx25.c
index 412c583a24b..576af744695 100644
--- a/arch/arm/mach-imx/ehci-imx25.c
+++ b/arch/arm/mach-imx/ehci-imx25.c
@@ -30,7 +30,7 @@
 #define MX25_H1_SIC_SHIFT       21
 #define MX25_H1_SIC_MASK        (0x3 << MX25_H1_SIC_SHIFT)
 #define MX25_H1_PP_BIT          (1 << 18)
-#define MX25_H1_PM_BIT          (1 << 8)
+#define MX25_H1_PM_BIT          (1 << 16)
 #define MX25_H1_IPPUE_UP_BIT    (1 << 7)
 #define MX25_H1_IPPUE_DOWN_BIT  (1 << 6)
 #define MX25_H1_TLL_BIT         (1 << 5)
diff --git a/arch/arm/mach-imx/ehci-imx35.c b/arch/arm/mach-imx/ehci-imx35.c
index 779e16eb65c..293397852e4 100644
--- a/arch/arm/mach-imx/ehci-imx35.c
+++ b/arch/arm/mach-imx/ehci-imx35.c
@@ -30,7 +30,7 @@
 #define MX35_H1_SIC_SHIFT       21
 #define MX35_H1_SIC_MASK        (0x3 << MX35_H1_SIC_SHIFT)
 #define MX35_H1_PP_BIT          (1 << 18)
-#define MX35_H1_PM_BIT          (1 << 8)
+#define MX35_H1_PM_BIT          (1 << 16)
 #define MX35_H1_IPPUE_UP_BIT    (1 << 7)
 #define MX35_H1_IPPUE_DOWN_BIT  (1 << 6)
 #define MX35_H1_TLL_BIT         (1 << 5)
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index b56d06b4878..95192a062d5 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -359,7 +359,7 @@ static struct clockdomain iss_44xx_clkdm = {
         .clkdm_offs       = OMAP4430_CM2_CAM_CAM_CDOFFS,
         .wkdep_srcs       = iss_wkup_sleep_deps,
         .sleepdep_srcs    = iss_wkup_sleep_deps,
-        .flags            = CLKDM_CAN_HWSUP_SWSUP,
+        .flags            = CLKDM_CAN_SWSUP,
 };
 
 static struct clockdomain l3_dss_44xx_clkdm = {
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index cba60e05e32..c72b5a72772 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -19,6 +19,7 @@
 #include <linux/of.h>
 #include <linux/pinctrl/machine.h>
 #include <linux/platform_data/omap4-keypad.h>
+#include <linux/platform_data/omap_ocp2scp.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>
@@ -613,6 +614,83 @@ static void omap_init_vout(void)
 static inline void omap_init_vout(void) {}
 #endif
 
+#if defined(CONFIG_OMAP_OCP2SCP) || defined(CONFIG_OMAP_OCP2SCP_MODULE)
+static int count_ocp2scp_devices(struct omap_ocp2scp_dev *ocp2scp_dev)
+{
+        int cnt = 0;
+
+        while (ocp2scp_dev->drv_name != NULL) {
+                cnt++;
+                ocp2scp_dev++;
+        }
+
+        return cnt;
+}
+
+static void omap_init_ocp2scp(void)
+{
+        struct omap_hwmod       *oh;
+        struct platform_device  *pdev;
+        int                     bus_id = -1, dev_cnt = 0, i;
+        struct omap_ocp2scp_dev *ocp2scp_dev;
+        const char              *oh_name, *name;
+        struct omap_ocp2scp_platform_data *pdata;
+
+        if (!cpu_is_omap44xx())
+                return;
+
+        oh_name = "ocp2scp_usb_phy";
+        name    = "omap-ocp2scp";
+
+        oh = omap_hwmod_lookup(oh_name);
+        if (!oh) {
+                pr_err("%s: could not find omap_hwmod for %s\n", __func__,
+                                                                oh_name);
+                return;
+        }
+
+        pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
+        if (!pdata) {
+                pr_err("%s: No memory for ocp2scp pdata\n", __func__);
+                return;
+        }
+
+        ocp2scp_dev = oh->dev_attr;
+        dev_cnt = count_ocp2scp_devices(ocp2scp_dev);
+
+        if (!dev_cnt) {
+                pr_err("%s: No devices connected to ocp2scp\n", __func__);
+                kfree(pdata);
+                return;
+        }
+
+        pdata->devices = kzalloc(sizeof(struct omap_ocp2scp_dev *)
+                                        * dev_cnt, GFP_KERNEL);
+        if (!pdata->devices) {
+                pr_err("%s: No memory for ocp2scp pdata devices\n", __func__);
+                kfree(pdata);
+                return;
+        }
+
+        for (i = 0; i < dev_cnt; i++, ocp2scp_dev++)
+                pdata->devices[i] = ocp2scp_dev;
+
+        pdata->dev_cnt  = dev_cnt;
+
+        pdev = omap_device_build(name, bus_id, oh, pdata, sizeof(*pdata), NULL,
+                                                                0, false);
+        if (IS_ERR(pdev)) {
+                pr_err("Could not build omap_device for %s %s\n",
+                                                name, oh_name);
+                kfree(pdata->devices);
+                kfree(pdata);
+                return;
+        }
+}
+#else
+static inline void omap_init_ocp2scp(void) { }
+#endif
+
 /*-------------------------------------------------------------------------*/
 
 static int __init omap2_init_devices(void)
@@ -640,6 +718,7 @@ static int __init omap2_init_devices(void)
         omap_init_sham();
         omap_init_aes();
         omap_init_vout();
+        omap_init_ocp2scp();
 
         return 0;
 }
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index b969ab1d258..87cc6d058de 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -422,6 +422,38 @@ static int _set_softreset(struct omap_hwmod *oh, u32 *v)
 }
 
 /**
+ * _wait_softreset_complete - wait for an OCP softreset to complete
+ * @oh: struct omap_hwmod * to wait on
+ *
+ * Wait until the IP block represented by @oh reports that its OCP
+ * softreset is complete.  This can be triggered by software (see
+ * _ocp_softreset()) or by hardware upon returning from off-mode (one
+ * example is HSMMC).  Waits for up to MAX_MODULE_SOFTRESET_WAIT
+ * microseconds.  Returns the number of microseconds waited.
+ */
+static int _wait_softreset_complete(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_class_sysconfig *sysc;
+        u32 softrst_mask;
+        int c = 0;
+
+        sysc = oh->class->sysc;
+
+        if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
+                omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
+                                   & SYSS_RESETDONE_MASK),
+                                  MAX_MODULE_SOFTRESET_WAIT, c);
+        else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
+                softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
+                omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
+                                    & softrst_mask),
+                                  MAX_MODULE_SOFTRESET_WAIT, c);
+        }
+
+        return c;
+}
+
+/**
  * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
  * @oh: struct omap_hwmod *
  *
@@ -1282,6 +1314,18 @@ static void _enable_sysc(struct omap_hwmod *oh)
         if (!oh->class->sysc)
                 return;
 
+        /*
+         * Wait until reset has completed, this is needed as the IP
+         * block is reset automatically by hardware in some cases
+         * (off-mode for example), and the drivers require the
+         * IP to be ready when they access it
+         */
+        if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
+                _enable_optional_clocks(oh);
+        _wait_softreset_complete(oh);
+        if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
+                _disable_optional_clocks(oh);
+
         v = oh->_sysc_cache;
         sf = oh->class->sysc->sysc_flags;
 
@@ -1804,7 +1848,7 @@ static int _am33xx_disable_module(struct omap_hwmod *oh)
  */
 static int _ocp_softreset(struct omap_hwmod *oh)
 {
-        u32 v, softrst_mask;
+        u32 v;
         int c = 0;
         int ret = 0;
 
@@ -1834,19 +1878,7 @@ static int _ocp_softreset(struct omap_hwmod *oh)
         if (oh->class->sysc->srst_udelay)
                 udelay(oh->class->sysc->srst_udelay);
 
-        if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
-                omap_test_timeout((omap_hwmod_read(oh,
-                                                    oh->class->sysc->syss_offs)
-                                   & SYSS_RESETDONE_MASK),
-                                  MAX_MODULE_SOFTRESET_WAIT, c);
-        else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
-                softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
-                omap_test_timeout(!(omap_hwmod_read(oh,
-                                                     oh->class->sysc->sysc_offs)
-                                   & softrst_mask),
-                                  MAX_MODULE_SOFTRESET_WAIT, c);
-        }
-
+        c = _wait_softreset_complete(oh);
         if (c == MAX_MODULE_SOFTRESET_WAIT)
                 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
                            oh->name, MAX_MODULE_SOFTRESET_WAIT);
@@ -2352,6 +2384,9 @@ static int __init _setup_reset(struct omap_hwmod *oh)
         if (oh->_state != _HWMOD_STATE_INITIALIZED)
                 return -EINVAL;
 
+        if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
+                return -EPERM;
+
         if (oh->rst_lines_cnt == 0) {
                 r = _enable(oh);
                 if (r) {
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 652d0285bd6..0b1249e0039 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -21,6 +21,7 @@
 #include <linux/io.h>
 #include <linux/platform_data/gpio-omap.h>
 #include <linux/power/smartreflex.h>
+#include <linux/platform_data/omap_ocp2scp.h>
 
 #include <plat/omap_hwmod.h>
 #include <plat/i2c.h>
@@ -2125,6 +2126,14 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
         .name           = "mcpdm",
         .class          = &omap44xx_mcpdm_hwmod_class,
         .clkdm_name     = "abe_clkdm",
+        /*
+         * It's suspected that the McPDM requires an off-chip main
+         * functional clock, controlled via I2C.  This IP block is
+         * currently reset very early during boot, before I2C is
+         * available, so it doesn't seem that we have any choice in
+         * the kernel other than to avoid resetting it.
+         */
+        .flags          = HWMOD_EXT_OPT_MAIN_CLK,
         .mpu_irqs       = omap44xx_mcpdm_irqs,
         .sdma_reqs      = omap44xx_mcpdm_sdma_reqs,
         .main_clk       = "mcpdm_fck",
@@ -2681,6 +2690,32 @@ static struct omap_hwmod_class omap44xx_ocp2scp_hwmod_class = {
         .sysc   = &omap44xx_ocp2scp_sysc,
 };
 
+/* ocp2scp dev_attr */
+static struct resource omap44xx_usb_phy_and_pll_addrs[] = {
+        {
+                .name           = "usb_phy",
+                .start          = 0x4a0ad080,
+                .end            = 0x4a0ae000,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                /* XXX: Remove this once control module driver is in place */
+                .name           = "ctrl_dev",
+                .start          = 0x4a002300,
+                .end            = 0x4a002303,
+                .flags          = IORESOURCE_MEM,
+        },
+        { }
+};
+
+static struct omap_ocp2scp_dev ocp2scp_dev_attr[] = {
+        {
+                .drv_name       = "omap-usb2",
+                .res            = omap44xx_usb_phy_and_pll_addrs,
+        },
+        { }
+};
+
 /* ocp2scp_usb_phy */
 static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
         .name           = "ocp2scp_usb_phy",
@@ -2694,6 +2729,7 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
                         .modulemode   = MODULEMODE_HWCTRL,
                 },
         },
+        .dev_attr       = ocp2scp_dev_attr,
 };
 
 /*
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 635e109f5ad..44c42057b61 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -366,7 +366,7 @@ static struct regulator_init_data omap4_clk32kg_idata = {
 };
 
 static struct regulator_consumer_supply omap4_vdd1_supply[] = {
-        REGULATOR_SUPPLY("vcc", "mpu.0"),
+        REGULATOR_SUPPLY("vcc", "cpu0"),
 };
 
 static struct regulator_consumer_supply omap4_vdd2_supply[] = {
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 880249b1701..75878c37959 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -264,7 +264,7 @@ static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
 
         if (initialized) {
                 if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
-                        pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).",
+                        pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).\n",
                                 __func__, voltdm->name, i2c_high_speed);
                 return;
         }
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index 5ecbd17b564..e2c6391863f 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -28,6 +28,7 @@
 #include <linux/mfd/asic3.h>
 #include <linux/mtd/physmap.h>
 #include <linux/pda_power.h>
+#include <linux/pwm.h>
 #include <linux/pwm_backlight.h>
 #include <linux/regulator/driver.h>
 #include <linux/regulator/gpio-regulator.h>
@@ -556,7 +557,7 @@ static struct platform_device hx4700_lcd = {
  */
 
 static struct platform_pwm_backlight_data backlight_data = {
-        .pwm_id         = 1,
+        .pwm_id         = -1,   /* Superseded by pwm_lookup */
         .max_brightness = 200,
         .dft_brightness = 100,
         .pwm_period_ns  = 30923,
@@ -571,6 +572,10 @@ static struct platform_device backlight = {
         },
 };
 
+static struct pwm_lookup hx4700_pwm_lookup[] = {
+        PWM_LOOKUP("pxa27x-pwm.1", 0, "pwm-backlight", NULL),
+};
+
 /*
  * USB "Transceiver"
  */
@@ -872,6 +877,7 @@ static void __init hx4700_init(void)
         pxa_set_stuart_info(NULL);
 
         platform_add_devices(devices, ARRAY_SIZE(devices));
+        pwm_add_table(hx4700_pwm_lookup, ARRAY_SIZE(hx4700_pwm_lookup));
 
         pxa_set_ficp_info(&ficp_info);
         pxa27x_set_i2c_power_info(NULL);
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 438f02fe122..842596d4d31 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -86,10 +86,7 @@ static void spitz_discharge1(int on)
         gpio_set_value(SPITZ_GPIO_LED_GREEN, on);
 }
 
-static unsigned long gpio18_config[] = {
-        GPIO18_RDY,
-        GPIO18_GPIO,
-};
+static unsigned long gpio18_config = GPIO18_GPIO;
 
 static void spitz_presuspend(void)
 {
@@ -112,7 +109,7 @@ static void spitz_presuspend(void)
         PGSR3 &= ~SPITZ_GPIO_G3_STROBE_BIT;
         PGSR2 |= GPIO_bit(SPITZ_GPIO_KEY_STROBE0);
 
-        pxa2xx_mfp_config(&gpio18_config[0], 1);
+        pxa2xx_mfp_config(&gpio18_config, 1);
         gpio_request_one(18, GPIOF_OUT_INIT_HIGH, "Unknown");
         gpio_free(18);
 
@@ -131,7 +128,6 @@ static void spitz_presuspend(void)
 
 static void spitz_postsuspend(void)
 {
-        pxa2xx_mfp_config(&gpio18_config[1], 1);
 }
 
 static int spitz_should_wakeup(unsigned int resume_on_alarm)
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 023f443784e..b820edaf318 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -745,7 +745,7 @@ do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs,
 static int
 do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
 {
-        union offset_union offset;
+        union offset_union uninitialized_var(offset);
         unsigned long instr = 0, instrptr;
         int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs);
         unsigned int type;
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index b3349f7b1a2..1db02943802 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -443,6 +443,11 @@ struct omap_hwmod_omap4_prcm {
  *     in order to complete the reset. Optional clocks will be disabled
  *     again after the reset.
  * HWMOD_16BIT_REG: Module has 16bit registers
+ * HWMOD_EXT_OPT_MAIN_CLK: The only main functional clock source for
+ *     this IP block comes from an off-chip source and is not always
+ *     enabled.  This prevents the hwmod code from being able to
+ *     enable and reset the IP block early.  XXX Eventually it should
+ *     be possible to query the clock framework for this information.
  */
 #define HWMOD_SWSUP_SIDLE                       (1 << 0)
 #define HWMOD_SWSUP_MSTANDBY                    (1 << 1)
@@ -453,6 +458,7 @@ struct omap_hwmod_omap4_prcm {
 #define HWMOD_NO_IDLEST                         (1 << 6)
 #define HWMOD_CONTROL_OPT_CLKS_IN_RESET         (1 << 7)
 #define HWMOD_16BIT_REG                         (1 << 8)
+#define HWMOD_EXT_OPT_MAIN_CLK                  (1 << 9)
 
 /*
  * omap_hwmod._int_flags definitions
diff --git a/arch/arm/tools/Makefile b/arch/arm/tools/Makefile
index cd60a81163e..32d05c8219d 100644
--- a/arch/arm/tools/Makefile
+++ b/arch/arm/tools/Makefile
@@ -5,6 +5,6 @@
 #
 
 include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types
-        $(kecho) '  Generating $@'
+        @$(kecho) '  Generating $@'
         @mkdir -p $(dir $@)
         $(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; }
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index c834b32af27..3b44e0dd0a9 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -701,11 +701,14 @@ static int __init vfp_init(void)
                         elf_hwcap |= HWCAP_VFPv3;
 
                         /*
-                         * Check for VFPv3 D16. CPUs in this configuration
-                         * only have 16 x 64bit registers.
+                         * Check for VFPv3 D16 and VFPv4 D16.  CPUs in
+                         * this configuration only have 16 x 64bit
+                         * registers.
                          */
                         if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1)
-                                elf_hwcap |= HWCAP_VFPv3D16;
+                                elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */
+                        else
+                                elf_hwcap |= HWCAP_VFPD32;
                 }
 #endif
                 /*
diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c
index 59bcb96ac36..f5760927544 100644
--- a/arch/arm/xen/enlighten.c
+++ b/arch/arm/xen/enlighten.c
@@ -166,3 +166,14 @@ void free_xenballooned_pages(int nr_pages, struct page **pages)
         *pages = NULL;
 }
 EXPORT_SYMBOL_GPL(free_xenballooned_pages);
+
+/* In the hypervisor.S file. */
+EXPORT_SYMBOL_GPL(HYPERVISOR_event_channel_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_grant_table_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_xen_version);
+EXPORT_SYMBOL_GPL(HYPERVISOR_console_io);
+EXPORT_SYMBOL_GPL(HYPERVISOR_sched_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_hvm_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_memory_op);
+EXPORT_SYMBOL_GPL(HYPERVISOR_physdev_op);
+EXPORT_SYMBOL_GPL(privcmd_call);
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index ef54a59a9e8..15ac18a56c9 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1,6 +1,7 @@
 config ARM64
         def_bool y
         select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
+        select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
         select GENERIC_CLOCKEVENTS
         select GENERIC_HARDIRQS_NO_DEPRECATED
         select GENERIC_IOMAP
diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
index cf284649dfc..07fea290d7c 100644
--- a/arch/arm64/include/asm/elf.h
+++ b/arch/arm64/include/asm/elf.h
@@ -25,12 +25,10 @@
 #include <asm/user.h>
 
 typedef unsigned long elf_greg_t;
-typedef unsigned long elf_freg_t[3];
 
 #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
 typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-
-typedef struct user_fp elf_fpregset_t;
+typedef struct user_fpsimd_state elf_fpregset_t;
 
 #define EM_AARCH64              183
 
@@ -87,7 +85,6 @@ typedef struct user_fp elf_fpregset_t;
 #define R_AARCH64_MOVW_PREL_G2_NC       292
 #define R_AARCH64_MOVW_PREL_G3          293
 
-
 /*
  * These are used to set parameters in the core dumps.
  */
diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
index b42fab9f62a..c43b4ac1300 100644
--- a/arch/arm64/include/asm/fpsimd.h
+++ b/arch/arm64/include/asm/fpsimd.h
@@ -25,9 +25,8 @@
  *  - FPSR and FPCR
  *  - 32 128-bit data registers
  *
- * Note that user_fp forms a prefix of this structure, which is relied
- * upon in the ptrace FP/SIMD accessors. struct user_fpsimd_state must
- * form a prefix of struct fpsimd_state.
+ * Note that user_fpsimd forms a prefix of this structure, which is
+ * relied upon in the ptrace FP/SIMD accessors.
  */
 struct fpsimd_state {
         union {
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 74a2a7d304a..d2f05a60827 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -114,7 +114,7 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)
  *  I/O port access primitives.
  */
 #define IO_SPACE_LIMIT          0xffff
-#define PCI_IOBASE              ((void __iomem *)0xffffffbbfffe0000UL)
+#define PCI_IOBASE              ((void __iomem *)(MODULES_VADDR - SZ_2M))
 
 static inline u8 inb(unsigned long addr)
 {
@@ -222,12 +222,12 @@ extern void __iomem *__ioremap(phys_addr_t phys_addr, size_t size, pgprot_t prot
 extern void __iounmap(volatile void __iomem *addr);
 
 #define PROT_DEFAULT            (PTE_TYPE_PAGE | PTE_AF | PTE_DIRTY)
-#define PROT_DEVICE_nGnRE       (PROT_DEFAULT | PTE_XN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
+#define PROT_DEVICE_nGnRE       (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
 #define PROT_NORMAL_NC          (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC))
 
-#define ioremap(addr, size)             __ioremap((addr), (size), PROT_DEVICE_nGnRE)
-#define ioremap_nocache(addr, size)     __ioremap((addr), (size), PROT_DEVICE_nGnRE)
-#define ioremap_wc(addr, size)          __ioremap((addr), (size), PROT_NORMAL_NC)
+#define ioremap(addr, size)             __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
+#define ioremap_nocache(addr, size)     __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
+#define ioremap_wc(addr, size)          __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC))
 #define iounmap                         __iounmap
 
 #define ARCH_HAS_IOREMAP_WC
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
index 0f3b4581d92..75fd13d289b 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -38,7 +38,8 @@
 #define PMD_SECT_S              (_AT(pmdval_t, 3) << 8)
 #define PMD_SECT_AF             (_AT(pmdval_t, 1) << 10)
 #define PMD_SECT_NG             (_AT(pmdval_t, 1) << 11)
-#define PMD_SECT_XN             (_AT(pmdval_t, 1) << 54)
+#define PMD_SECT_PXN            (_AT(pmdval_t, 1) << 53)
+#define PMD_SECT_UXN            (_AT(pmdval_t, 1) << 54)
 
 /*
  * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
@@ -57,7 +58,8 @@
 #define PTE_SHARED              (_AT(pteval_t, 3) << 8)         /* SH[1:0], inner shareable */
 #define PTE_AF                  (_AT(pteval_t, 1) << 10)        /* Access Flag */
 #define PTE_NG                  (_AT(pteval_t, 1) << 11)        /* nG */
-#define PTE_XN                  (_AT(pteval_t, 1) << 54)        /* XN */
+#define PTE_PXN                 (_AT(pteval_t, 1) << 53)        /* Privileged XN */
+#define PTE_UXN                 (_AT(pteval_t, 1) << 54)        /* User XN */
 
 /*
  * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers).
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index 8960239be72..14aba2db677 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -62,23 +62,23 @@ extern pgprot_t pgprot_default;
 
 #define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b))
 
-#define PAGE_NONE               _MOD_PROT(pgprot_default, PTE_NG | PTE_XN | PTE_RDONLY)
-#define PAGE_SHARED             _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_XN)
-#define PAGE_SHARED_EXEC        _MOD_PROT(pgprot_default, PTE_USER | PTE_NG)
-#define PAGE_COPY               _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY)
-#define PAGE_COPY_EXEC          _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_RDONLY)
-#define PAGE_READONLY           _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY)
-#define PAGE_READONLY_EXEC      _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_RDONLY)
-#define PAGE_KERNEL             _MOD_PROT(pgprot_default, PTE_XN | PTE_DIRTY)
-#define PAGE_KERNEL_EXEC        _MOD_PROT(pgprot_default, PTE_DIRTY)
-
-#define __PAGE_NONE             __pgprot(_PAGE_DEFAULT | PTE_NG | PTE_XN | PTE_RDONLY)
-#define __PAGE_SHARED           __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_XN)
-#define __PAGE_SHARED_EXEC      __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG)
-#define __PAGE_COPY             __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY)
-#define __PAGE_COPY_EXEC        __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_RDONLY)
-#define __PAGE_READONLY         __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_XN | PTE_RDONLY)
-#define __PAGE_READONLY_EXEC    __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_RDONLY)
+#define PAGE_NONE               _MOD_PROT(pgprot_default, PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
+#define PAGE_SHARED             _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
+#define PAGE_SHARED_EXEC        _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN)
+#define PAGE_COPY               _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
+#define PAGE_COPY_EXEC          _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
+#define PAGE_READONLY           _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
+#define PAGE_READONLY_EXEC      _MOD_PROT(pgprot_default, PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
+#define PAGE_KERNEL             _MOD_PROT(pgprot_default, PTE_PXN | PTE_UXN | PTE_DIRTY)
+#define PAGE_KERNEL_EXEC        _MOD_PROT(pgprot_default, PTE_UXN | PTE_DIRTY)
+
+#define __PAGE_NONE             __pgprot(_PAGE_DEFAULT | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
+#define __PAGE_SHARED           __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
+#define __PAGE_SHARED_EXEC      __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
+#define __PAGE_COPY             __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
+#define __PAGE_COPY_EXEC        __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
+#define __PAGE_READONLY         __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_RDONLY)
+#define __PAGE_READONLY_EXEC    __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_RDONLY)
 
 #endif /* __ASSEMBLY__ */
 
@@ -130,10 +130,10 @@ extern struct page *empty_zero_page;
 #define pte_young(pte)          (pte_val(pte) & PTE_AF)
 #define pte_special(pte)        (pte_val(pte) & PTE_SPECIAL)
 #define pte_write(pte)          (!(pte_val(pte) & PTE_RDONLY))
-#define pte_exec(pte)           (!(pte_val(pte) & PTE_XN))
+#define pte_exec(pte)           (!(pte_val(pte) & PTE_UXN))
 
 #define pte_present_exec_user(pte) \
-        ((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_XN)) == \
+        ((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_UXN)) == \
          (PTE_VALID | PTE_USER))
 
 #define PTE_BIT_FUNC(fn,op) \
@@ -262,7 +262,7 @@ static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
 
 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 {
-        const pteval_t mask = PTE_USER | PTE_XN | PTE_RDONLY;
+        const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY;
         pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
         return pte;
 }
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index 5d810044fed..77f696c1433 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -43,6 +43,8 @@
 #else
 #define STACK_TOP               STACK_TOP_MAX
 #endif /* CONFIG_COMPAT */
+
+#define ARCH_LOW_ADDRESS_LIMIT  PHYS_MASK
 #endif /* __KERNEL__ */
 
 struct debug_info {
diff --git a/arch/arm64/include/asm/unistd.h b/arch/arm64/include/asm/unistd.h
index 63f853f8b71..68aff2816e8 100644
--- a/arch/arm64/include/asm/unistd.h
+++ b/arch/arm64/include/asm/unistd.h
@@ -14,7 +14,6 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 #ifdef CONFIG_COMPAT
-#define __ARCH_WANT_COMPAT_IPC_PARSE_VERSION
 #define __ARCH_WANT_COMPAT_STAT64
 #define __ARCH_WANT_SYS_GETHOSTNAME
 #define __ARCH_WANT_SYS_PAUSE
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index ecbf2d81ec5..c76c7241125 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -613,17 +613,11 @@ enum armv8_pmuv3_perf_types {
         ARMV8_PMUV3_PERFCTR_BUS_ACCESS                          = 0x19,
         ARMV8_PMUV3_PERFCTR_MEM_ERROR                           = 0x1A,
         ARMV8_PMUV3_PERFCTR_BUS_CYCLES                          = 0x1D,
-
-        /*
-         * This isn't an architected event.
-         * We detect this event number and use the cycle counter instead.
-         */
-        ARMV8_PMUV3_PERFCTR_CPU_CYCLES                          = 0xFF,
 };
 
 /* PMUv3 HW events mapping. */
 static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = {
-        [PERF_COUNT_HW_CPU_CYCLES]              = ARMV8_PMUV3_PERFCTR_CPU_CYCLES,
+        [PERF_COUNT_HW_CPU_CYCLES]              = ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES,
         [PERF_COUNT_HW_INSTRUCTIONS]            = ARMV8_PMUV3_PERFCTR_INSTR_EXECUTED,
         [PERF_COUNT_HW_CACHE_REFERENCES]        = ARMV8_PMUV3_PERFCTR_L1_DCACHE_ACCESS,
         [PERF_COUNT_HW_CACHE_MISSES]            = ARMV8_PMUV3_PERFCTR_L1_DCACHE_REFILL,
@@ -1106,7 +1100,7 @@ static int armv8pmu_get_event_idx(struct pmu_hw_events *cpuc,
         unsigned long evtype = event->config_base & ARMV8_EVTYPE_EVENT;
 
         /* Always place a cycle counter into the cycle counter. */
-        if (evtype == ARMV8_PMUV3_PERFCTR_CPU_CYCLES) {
+        if (evtype == ARMV8_PMUV3_PERFCTR_CLOCK_CYCLES) {
                 if (test_and_set_bit(ARMV8_IDX_CYCLE_COUNTER, cpuc->used_mask))
                         return -EAGAIN;
 
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index f22965ea1cf..e04cebdbb47 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -310,24 +310,6 @@ struct task_struct *__switch_to(struct task_struct *prev,
 }
 
 /*
- * Fill in the task's elfregs structure for a core dump.
- */
-int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs)
-{
-        elf_core_copy_regs(elfregs, task_pt_regs(t));
-        return 1;
-}
-
-/*
- * fill in the fpe structure for a core dump...
- */
-int dump_fpu (struct pt_regs *regs, struct user_fp *fp)
-{
-        return 0;
-}
-EXPORT_SYMBOL(dump_fpu);
-
-/*
  * Shuffle the argument into the correct register before calling the
  * thread function.  x1 is the thread argument, x2 is the pointer to
  * the thread function, and x3 points to the exit function.
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 226b6bf6e9c..538300f2273 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -211,8 +211,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
          * before we continue.
          */
         set_cpu_online(cpu, true);
-        while (!cpu_active(cpu))
-                cpu_relax();
+        complete(&cpu_running);
 
         /*
          * OK, it's off to the idle thread for us
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index efbf7df05d3..4cd28931dba 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -80,7 +80,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
 #ifdef CONFIG_ZONE_DMA32
         /* 4GB maximum for 32-bit only capable devices */
         max_dma32 = min(max, MAX_DMA32_PFN);
-        zone_size[ZONE_DMA32] = max_dma32 - min;
+        zone_size[ZONE_DMA32] = max(min, max_dma32) - min;
 #endif
         zone_size[ZONE_NORMAL] = max - max_dma32;
 
diff --git a/arch/h8300/include/asm/cache.h b/arch/h8300/include/asm/cache.h
index c6350283649..05887a1d80e 100644
--- a/arch/h8300/include/asm/cache.h
+++ b/arch/h8300/include/asm/cache.h
@@ -2,7 +2,8 @@
 #define __ARCH_H8300_CACHE_H
 
 /* bytes per L1 cache line */
-#define        L1_CACHE_BYTES  4
+#define        L1_CACHE_SHIFT  2
+#define        L1_CACHE_BYTES  (1 << L1_CACHE_SHIFT)
 
 /* m68k-elf-gcc  2.95.2 doesn't like these */
 
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index acd5b68e887..082e383c1b6 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -637,7 +637,6 @@ mem_init (void)
 
         high_memory = __va(max_low_pfn * PAGE_SIZE);
 
-        reset_zone_present_pages();
         for_each_online_pgdat(pgdat)
                 if (pgdat->bdata->node_bootmem_map)
                         totalram_pages += free_all_bootmem_node(pgdat);
diff --git a/arch/mips/cavium-octeon/executive/cvmx-l2c.c b/arch/mips/cavium-octeon/executive/cvmx-l2c.c
index d38246e33dd..9f883bf7695 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-l2c.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-l2c.c
@@ -30,6 +30,7 @@
  * measurement, and debugging facilities.
  */
 
+#include <linux/irqflags.h>
 #include <asm/octeon/cvmx.h>
 #include <asm/octeon/cvmx-l2c.h>
 #include <asm/octeon/cvmx-spinlock.h>
diff --git a/arch/mips/fw/arc/misc.c b/arch/mips/fw/arc/misc.c
index 7cf80ca2c1d..f9f5307434c 100644
--- a/arch/mips/fw/arc/misc.c
+++ b/arch/mips/fw/arc/misc.c
@@ -11,6 +11,7 @@
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <linux/irqflags.h>
 
 #include <asm/bcache.h>
 
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h
index 82ad35ce2b4..46ac73abd5e 100644
--- a/arch/mips/include/asm/bitops.h
+++ b/arch/mips/include/asm/bitops.h
@@ -14,7 +14,6 @@
 #endif
 
 #include <linux/compiler.h>
-#include <linux/irqflags.h>
 #include <linux/types.h>
 #include <asm/barrier.h>
 #include <asm/byteorder.h>              /* sigh ... */
@@ -44,6 +43,24 @@
 #define smp_mb__before_clear_bit()      smp_mb__before_llsc()
 #define smp_mb__after_clear_bit()       smp_llsc_mb()
 
+
+/*
+ * These are the "slower" versions of the functions and are in bitops.c.
+ * These functions call raw_local_irq_{save,restore}().
+ */
+void __mips_set_bit(unsigned long nr, volatile unsigned long *addr);
+void __mips_clear_bit(unsigned long nr, volatile unsigned long *addr);
+void __mips_change_bit(unsigned long nr, volatile unsigned long *addr);
+int __mips_test_and_set_bit(unsigned long nr,
+                            volatile unsigned long *addr);
+int __mips_test_and_set_bit_lock(unsigned long nr,
+                                 volatile unsigned long *addr);
+int __mips_test_and_clear_bit(unsigned long nr,
+                              volatile unsigned long *addr);
+int __mips_test_and_change_bit(unsigned long nr,
+                               volatile unsigned long *addr);
+
+
 /*
  * set_bit - Atomically set a bit in memory
  * @nr: the bit to set
@@ -57,7 +74,7 @@
 static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
 {
         unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
-        unsigned short bit = nr & SZLONG_MASK;
+        int bit = nr & SZLONG_MASK;
         unsigned long temp;
 
         if (kernel_uses_llsc && R10000_LLSC_WAR) {
@@ -92,17 +109,8 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
                         : "=&r" (temp), "+m" (*m)
                         : "ir" (1UL << bit));
                 } while (unlikely(!temp));
-        } else {
-                volatile unsigned long *a = addr;
-                unsigned long mask;
-                unsigned long flags;
-
-                a += nr >> SZLONG_LOG;
-                mask = 1UL << bit;
-                raw_local_irq_save(flags);
-                *a |= mask;
-                raw_local_irq_restore(flags);
-        }
+        } else
+                __mips_set_bit(nr, addr);
 }
 
 /*
@@ -118,7 +126,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
 static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
 {
         unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
-        unsigned short bit = nr & SZLONG_MASK;
+        int bit = nr & SZLONG_MASK;
         unsigned long temp;
 
         if (kernel_uses_llsc && R10000_LLSC_WAR) {
@@ -153,17 +161,8 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
                         : "=&r" (temp), "+m" (*m)
                         : "ir" (~(1UL << bit)));
                 } while (unlikely(!temp));
-        } else {
-                volatile unsigned long *a = addr;
-                unsigned long mask;
-                unsigned long flags;
-
-                a += nr >> SZLONG_LOG;
-                mask = 1UL << bit;
-                raw_local_irq_save(flags);
-                *a &= ~mask;
-                raw_local_irq_restore(flags);
-        }
+        } else
+                __mips_clear_bit(nr, addr);
 }
 
 /*
@@ -191,7 +190,7 @@ static inline void clear_bit_unlock(unsigned long nr, volatile unsigned long *ad
  */
 static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
 {
-        unsigned short bit = nr & SZLONG_MASK;
+        int bit = nr & SZLONG_MASK;
 
         if (kernel_uses_llsc && R10000_LLSC_WAR) {
                 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
@@ -220,17 +219,8 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
                         : "=&r" (temp), "+m" (*m)
                         : "ir" (1UL << bit));
                 } while (unlikely(!temp));
-        } else {
-                volatile unsigned long *a = addr;
-                unsigned long mask;
-                unsigned long flags;
-
-                a += nr >> SZLONG_LOG;
-                mask = 1UL << bit;
-                raw_local_irq_save(flags);
-                *a ^= mask;
-                raw_local_irq_restore(flags);
-        }
+        } else
+                __mips_change_bit(nr, addr);
 }
 
 /*
@@ -244,7 +234,7 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
 static inline int test_and_set_bit(unsigned long nr,
         volatile unsigned long *addr)
 {
-        unsigned short bit = nr & SZLONG_MASK;
+        int bit = nr & SZLONG_MASK;
         unsigned long res;
 
         smp_mb__before_llsc();
@@ -281,18 +271,8 @@ static inline int test_and_set_bit(unsigned long nr,
                 } while (unlikely(!res));
 
                 res = temp & (1UL << bit);
-        } else {
-                volatile unsigned long *a = addr;
-                unsigned long mask;
-                unsigned long flags;
-
-                a += nr >> SZLONG_LOG;
-                mask = 1UL << bit;
-                raw_local_irq_save(flags);
-                res = (mask & *a);
-                *a |= mask;
-                raw_local_irq_restore(flags);
-        }
+        } else
+                res = __mips_test_and_set_bit(nr, addr);
 
         smp_llsc_mb();
 
@@ -310,7 +290,7 @@ static inline int test_and_set_bit(unsigned long nr,
 static inline int test_and_set_bit_lock(unsigned long nr,
         volatile unsigned long *addr)
 {
-        unsigned short bit = nr & SZLONG_MASK;
+        int bit = nr & SZLONG_MASK;
         unsigned long res;
 
         if (kernel_uses_llsc && R10000_LLSC_WAR) {
@@ -345,18 +325,8 @@ static inline int test_and_set_bit_lock(unsigned long nr,
                 } while (unlikely(!res));
 
                 res = temp & (1UL << bit);
-        } else {
-                volatile unsigned long *a = addr;
-                unsigned long mask;
-                unsigned long flags;
-
-                a += nr >> SZLONG_LOG;
-                mask = 1UL << bit;
-                raw_local_irq_save(flags);
-                res = (mask & *a);
-                *a |= mask;
-                raw_local_irq_restore(flags);
-        }
+        } else
+                res = __mips_test_and_set_bit_lock(nr, addr);
 
         smp_llsc_mb();
 
@@ -373,7 +343,7 @@ static inline int test_and_set_bit_lock(unsigned long nr,
 static inline int test_and_clear_bit(unsigned long nr,
         volatile unsigned long *addr)
 {
-        unsigned short bit = nr & SZLONG_MASK;
+        int bit = nr & SZLONG_MASK;
         unsigned long res;
 
         smp_mb__before_llsc();
@@ -428,18 +398,8 @@ static inline int test_and_clear_bit(unsigned long nr,
                 } while (unlikely(!res));
 
                 res = temp & (1UL << bit);
-        } else {
-                volatile unsigned long *a = addr;
-                unsigned long mask;
-                unsigned long flags;
-
-                a += nr >> SZLONG_LOG;
-                mask = 1UL << bit;
-                raw_local_irq_save(flags);
-                res = (mask & *a);
-                *a &= ~mask;
-                raw_local_irq_restore(flags);
-        }
+        } else
+                res = __mips_test_and_clear_bit(nr, addr);
 
         smp_llsc_mb();
 
@@ -457,7 +417,7 @@ static inline int test_and_clear_bit(unsigned long nr,
 static inline int test_and_change_bit(unsigned long nr,
         volatile unsigned long *addr)
 {
-        unsigned short bit = nr & SZLONG_MASK;
+        int bit = nr & SZLONG_MASK;
         unsigned long res;
 
         smp_mb__before_llsc();
@@ -494,18 +454,8 @@ static inline int test_and_change_bit(unsigned long nr,
                 } while (unlikely(!res));
 
                 res = temp & (1UL << bit);
-        } else {
-                volatile unsigned long *a = addr;
-                unsigned long mask;
-                unsigned long flags;
-
-                a += nr >> SZLONG_LOG;
-                mask = 1UL << bit;
-                raw_local_irq_save(flags);
-                res = (mask & *a);
-                *a ^= mask;
-                raw_local_irq_restore(flags);
-        }
+        } else
+                res = __mips_test_and_change_bit(nr, addr);
 
         smp_llsc_mb();
 
diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
index 58277e0e9cd..3c5d1464b7b 100644
--- a/arch/mips/include/asm/compat.h
+++ b/arch/mips/include/asm/compat.h
@@ -290,7 +290,7 @@ struct compat_shmid64_ds {
 
 static inline int is_compat_task(void)
 {
-        return test_thread_flag(TIF_32BIT);
+        return test_thread_flag(TIF_32BIT_ADDR);
 }
 
 #endif /* _ASM_COMPAT_H */
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 29d9c23c20c..ff2e0345e01 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -15,6 +15,7 @@
 #include <linux/compiler.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
+#include <linux/irqflags.h>
 
 #include <asm/addrspace.h>
 #include <asm/bug.h>
diff --git a/arch/mips/include/asm/irqflags.h b/arch/mips/include/asm/irqflags.h
index 309cbcd6909..9f3384c789d 100644
--- a/arch/mips/include/asm/irqflags.h
+++ b/arch/mips/include/asm/irqflags.h
@@ -16,83 +16,13 @@
 #include <linux/compiler.h>
 #include <asm/hazards.h>
 
-__asm__(
-        "       .macro  arch_local_irq_enable                           \n"
-        "       .set    push                                            \n"
-        "       .set    reorder                                         \n"
-        "       .set    noat                                            \n"
-#ifdef CONFIG_MIPS_MT_SMTC
-        "       mfc0    $1, $2, 1       # SMTC - clear TCStatus.IXMT    \n"
-        "       ori     $1, 0x400                                       \n"
-        "       xori    $1, 0x400                                       \n"
-        "       mtc0    $1, $2, 1                                       \n"
-#elif defined(CONFIG_CPU_MIPSR2)
-        "       ei                                                      \n"
-#else
-        "       mfc0    $1,$12                                          \n"
-        "       ori     $1,0x1f                                         \n"
-        "       xori    $1,0x1e                                         \n"
-        "       mtc0    $1,$12                                          \n"
-#endif
-        "       irq_enable_hazard                                       \n"
-        "       .set    pop                                             \n"
-        "       .endm");
+#if defined(CONFIG_CPU_MIPSR2) && !defined(CONFIG_MIPS_MT_SMTC)
 
-extern void smtc_ipi_replay(void);
-
-static inline void arch_local_irq_enable(void)
-{
-#ifdef CONFIG_MIPS_MT_SMTC
-        /*
-         * SMTC kernel needs to do a software replay of queued
-         * IPIs, at the cost of call overhead on each local_irq_enable()
-         */
-        smtc_ipi_replay();
-#endif
-        __asm__ __volatile__(
-                "arch_local_irq_enable"
-                : /* no outputs */
-                : /* no inputs */
-                : "memory");
-}
-
-
-/*
- * For cli() we have to insert nops to make sure that the new value
- * has actually arrived in the status register before the end of this
- * macro.
- * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
- * no nops at all.
- */
-/*
- * For TX49, operating only IE bit is not enough.
- *
- * If mfc0 $12 follows store and the mfc0 is last instruction of a
- * page and fetching the next instruction causes TLB miss, the result
- * of the mfc0 might wrongly contain EXL bit.
- *
- * ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008
- *
- * Workaround: mask EXL bit of the result or place a nop before mfc0.
- */
 __asm__(
         "       .macro  arch_local_irq_disable\n"
         "       .set    push                                            \n"
         "       .set    noat                                            \n"
-#ifdef CONFIG_MIPS_MT_SMTC
-        "       mfc0    $1, $2, 1                                       \n"
-        "       ori     $1, 0x400                                       \n"
-        "       .set    noreorder                                       \n"
-        "       mtc0    $1, $2, 1                                       \n"
-#elif defined(CONFIG_CPU_MIPSR2)
         "       di                                                      \n"
-#else
-        "       mfc0    $1,$12                                          \n"
-        "       ori     $1,0x1f                                         \n"
-        "       xori    $1,0x1f                                         \n"
-        "       .set    noreorder                                       \n"
-        "       mtc0    $1,$12                                          \n"
-#endif
         "       irq_disable_hazard                                      \n"
         "       .set    pop                                             \n"
         "       .endm                                                   \n");
@@ -106,46 +36,14 @@ static inline void arch_local_irq_disable(void)
                 : "memory");
 }
 
-__asm__(
-        "       .macro  arch_local_save_flags flags                     \n"
-        "       .set    push                                            \n"
-        "       .set    reorder                                         \n"
-#ifdef CONFIG_MIPS_MT_SMTC
-        "       mfc0    \\flags, $2, 1                                  \n"
-#else
-        "       mfc0    \\flags, $12                                    \n"
-#endif
-        "       .set    pop                                             \n"
-        "       .endm                                                   \n");
-
-static inline unsigned long arch_local_save_flags(void)
-{
-        unsigned long flags;
-        asm volatile("arch_local_save_flags %0" : "=r" (flags));
-        return flags;
-}
 
 __asm__(
         "       .macro  arch_local_irq_save result                      \n"
         "       .set    push                                            \n"
         "       .set    reorder                                         \n"
         "       .set    noat                                            \n"
-#ifdef CONFIG_MIPS_MT_SMTC
-        "       mfc0    \\result, $2, 1                                 \n"
-        "       ori     $1, \\result, 0x400                             \n"
-        "       .set    noreorder                                       \n"
-        "       mtc0    $1, $2, 1                                       \n"
-        "       andi    \\result, \\result, 0x400                       \n"
-#elif defined(CONFIG_CPU_MIPSR2)
         "       di      \\result                                        \n"
         "       andi    \\result, 1                                     \n"
-#else
-        "       mfc0    \\result, $12                                   \n"
-        "       ori     $1, \\result, 0x1f                              \n"
-        "       xori    $1, 0x1f                                        \n"
-        "       .set    noreorder                                       \n"
-        "       mtc0    $1, $12                                         \n"
-#endif
         "       irq_disable_hazard                                      \n"
         "       .set    pop                                             \n"
         "       .endm                                                   \n");
@@ -160,61 +58,37 @@ static inline unsigned long arch_local_irq_save(void)
         return flags;
 }
 
+
 __asm__(
         "       .macro  arch_local_irq_restore flags                    \n"
         "       .set    push                                            \n"
         "       .set    noreorder                                       \n"
         "       .set    noat                                            \n"
-#ifdef CONFIG_MIPS_MT_SMTC
-        "mfc0   $1, $2, 1                                               \n"
-        "andi   \\flags, 0x400                                          \n"
-        "ori    $1, 0x400                                               \n"
-        "xori   $1, 0x400                                               \n"
-        "or     \\flags, $1                                             \n"
-        "mtc0   \\flags, $2, 1                                          \n"
-#elif defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU)
+#if defined(CONFIG_IRQ_CPU)
         /*
          * Slow, but doesn't suffer from a relatively unlikely race
          * condition we're having since days 1.
          */
         "       beqz    \\flags, 1f                                     \n"
-        "        di                                                     \n"
+        "       di                                                      \n"
         "       ei                                                      \n"
         "1:                                                             \n"
-#elif defined(CONFIG_CPU_MIPSR2)
+#else
         /*
          * Fast, dangerous.  Life is fun, life is good.
          */
         "       mfc0    $1, $12                                         \n"
         "       ins     $1, \\flags, 0, 1                               \n"
         "       mtc0    $1, $12                                         \n"
-#else
-        "       mfc0    $1, $12                                         \n"
-        "       andi    \\flags, 1                                      \n"
-        "       ori     $1, 0x1f                                        \n"
-        "       xori    $1, 0x1f                                        \n"
-        "       or      \\flags, $1                                     \n"
-        "       mtc0    \\flags, $12                                    \n"
 #endif
         "       irq_disable_hazard                                      \n"
         "       .set    pop                                             \n"
         "       .endm                                                   \n");
 
-
 static inline void arch_local_irq_restore(unsigned long flags)
 {
         unsigned long __tmp1;
 
-#ifdef CONFIG_MIPS_MT_SMTC
-        /*
-         * SMTC kernel needs to do a software replay of queued
-         * IPIs, at the cost of branch and call overhead on each
-         * local_irq_restore()
-         */
-        if (unlikely(!(flags & 0x0400)))
-                smtc_ipi_replay();
-#endif
-
         __asm__ __volatile__(
                 "arch_local_irq_restore\t%0"
                 : "=r" (__tmp1)
@@ -232,6 +106,75 @@ static inline void __arch_local_irq_restore(unsigned long flags)
                 : "0" (flags)
                 : "memory");
 }
+#else
+/* Functions that require preempt_{dis,en}able() are in mips-atomic.c */
+void arch_local_irq_disable(void);
+unsigned long arch_local_irq_save(void);
+void arch_local_irq_restore(unsigned long flags);
+void __arch_local_irq_restore(unsigned long flags);
+#endif /* if defined(CONFIG_CPU_MIPSR2) && !defined(CONFIG_MIPS_MT_SMTC) */
+
+
+__asm__(
+        "       .macro  arch_local_irq_enable                           \n"
+        "       .set    push                                            \n"
+        "       .set    reorder                                         \n"
+        "       .set    noat                                            \n"
+#ifdef CONFIG_MIPS_MT_SMTC
+        "       mfc0    $1, $2, 1       # SMTC - clear TCStatus.IXMT    \n"
+        "       ori     $1, 0x400                                       \n"
+        "       xori    $1, 0x400                                       \n"
+        "       mtc0    $1, $2, 1                                       \n"
+#elif defined(CONFIG_CPU_MIPSR2)
+        "       ei                                                      \n"
+#else
+        "       mfc0    $1,$12                                          \n"
+        "       ori     $1,0x1f                                         \n"
+        "       xori    $1,0x1e                                         \n"
+        "       mtc0    $1,$12                                          \n"
+#endif
+        "       irq_enable_hazard                                       \n"
+        "       .set    pop                                             \n"
+        "       .endm");
+
+extern void smtc_ipi_replay(void);
+
+static inline void arch_local_irq_enable(void)
+{
+#ifdef CONFIG_MIPS_MT_SMTC
+        /*
+         * SMTC kernel needs to do a software replay of queued
+         * IPIs, at the cost of call overhead on each local_irq_enable()
+         */
+        smtc_ipi_replay();
+#endif
+        __asm__ __volatile__(
+                "arch_local_irq_enable"
+                : /* no outputs */
+                : /* no inputs */
+                : "memory");
+}
+
+
+__asm__(
+        "       .macro  arch_local_save_flags flags                     \n"
+        "       .set    push                                            \n"
+        "       .set    reorder                                         \n"
+#ifdef CONFIG_MIPS_MT_SMTC
+        "       mfc0    \\flags, $2, 1                                  \n"
+#else
+        "       mfc0    \\flags, $12                                    \n"
+#endif
+        "       .set    pop                                             \n"
+        "       .endm                                                   \n");
+
+static inline unsigned long arch_local_save_flags(void)
+{
+        unsigned long flags;
+        asm volatile("arch_local_save_flags %0" : "=r" (flags));
+        return flags;
+}
+
 
 static inline int arch_irqs_disabled_flags(unsigned long flags)
 {
@@ -245,7 +188,7 @@ static inline int arch_irqs_disabled_flags(unsigned long flags)
 #endif
 }
 
-#endif
+#endif /* #ifndef __ASSEMBLY__ */
 
 /*
  * Do the CPU's IRQ-state tracing from assembly code.
diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h
index 8debe9e9175..18806a52061 100644
--- a/arch/mips/include/asm/thread_info.h
+++ b/arch/mips/include/asm/thread_info.h
@@ -112,12 +112,6 @@ register struct thread_info *__current_thread_info __asm__("$28");
 #define TIF_LOAD_WATCH          25      /* If set, load watch registers */
 #define TIF_SYSCALL_TRACE       31      /* syscall trace active */
 
-#ifdef CONFIG_MIPS32_O32
-#define TIF_32BIT TIF_32BIT_REGS
-#elif defined(CONFIG_MIPS32_N32)
-#define TIF_32BIT _TIF_32BIT_ADDR
-#endif /* CONFIG_MIPS32_O32 */
-
 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING         (1<<TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED       (1<<TIF_NEED_RESCHED)
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index c4a82e841c7..eeddc58802e 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -2,8 +2,9 @@
 # Makefile for MIPS-specific library files..
 #
 
-lib-y   += csum_partial.o delay.o memcpy.o memset.o \
-           strlen_user.o strncpy_user.o strnlen_user.o uncached.o
+lib-y   += bitops.o csum_partial.o delay.o memcpy.o memset.o \
+           mips-atomic.o strlen_user.o strncpy_user.o \
+           strnlen_user.o uncached.o
 
 obj-y                   += iomap.o
 obj-$(CONFIG_PCI)       += iomap-pci.o
diff --git a/arch/mips/lib/bitops.c b/arch/mips/lib/bitops.c
new file mode 100644
index 00000000000..239a9c957b0
--- /dev/null
+++ b/arch/mips/lib/bitops.c
@@ -0,0 +1,179 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 1994-1997, 99, 2000, 06, 07 Ralf Baechle (ralf@linux-mips.org)
+ * Copyright (c) 1999, 2000  Silicon Graphics, Inc.
+ */
+#include <linux/bitops.h>
+#include <linux/irqflags.h>
+#include <linux/export.h>
+
+
+/**
+ * __mips_set_bit - Atomically set a bit in memory.  This is called by
+ * set_bit() if it cannot find a faster solution.
+ * @nr: the bit to set
+ * @addr: the address to start counting from
+ */
+void __mips_set_bit(unsigned long nr, volatile unsigned long *addr)
+{
+        volatile unsigned long *a = addr;
+        unsigned bit = nr & SZLONG_MASK;
+        unsigned long mask;
+        unsigned long flags;
+
+        a += nr >> SZLONG_LOG;
+        mask = 1UL << bit;
+        raw_local_irq_save(flags);
+        *a |= mask;
+        raw_local_irq_restore(flags);
+}
+EXPORT_SYMBOL(__mips_set_bit);
+
+
+/**
+ * __mips_clear_bit - Clears a bit in memory.  This is called by clear_bit() if
+ * it cannot find a faster solution.
+ * @nr: Bit to clear
+ * @addr: Address to start counting from
+ */
+void __mips_clear_bit(unsigned long nr, volatile unsigned long *addr)
+{
+        volatile unsigned long *a = addr;
+        unsigned bit = nr & SZLONG_MASK;
+        unsigned long mask;
+        unsigned long flags;
+
+        a += nr >> SZLONG_LOG;
+        mask = 1UL << bit;
+        raw_local_irq_save(flags);
+        *a &= ~mask;
+        raw_local_irq_restore(flags);
+}
+EXPORT_SYMBOL(__mips_clear_bit);
+
+
+/**
+ * __mips_change_bit - Toggle a bit in memory.  This is called by change_bit()
+ * if it cannot find a faster solution.
+ * @nr: Bit to change
+ * @addr: Address to start counting from
+ */
+void __mips_change_bit(unsigned long nr, volatile unsigned long *addr)
+{
+        volatile unsigned long *a = addr;
+        unsigned bit = nr & SZLONG_MASK;
+        unsigned long mask;
+        unsigned long flags;
+
+        a += nr >> SZLONG_LOG;
+        mask = 1UL << bit;
+        raw_local_irq_save(flags);
+        *a ^= mask;
+        raw_local_irq_restore(flags);
+}
+EXPORT_SYMBOL(__mips_change_bit);
+
+
+/**
+ * __mips_test_and_set_bit - Set a bit and return its old value.  This is
+ * called by test_and_set_bit() if it cannot find a faster solution.
+ * @nr: Bit to set
+ * @addr: Address to count from
+ */
+int __mips_test_and_set_bit(unsigned long nr,
+                            volatile unsigned long *addr)
+{
+        volatile unsigned long *a = addr;
+        unsigned bit = nr & SZLONG_MASK;
+        unsigned long mask;
+        unsigned long flags;
+        unsigned long res;
+
+        a += nr >> SZLONG_LOG;
+        mask = 1UL << bit;
+        raw_local_irq_save(flags);
+        res = (mask & *a);
+        *a |= mask;
+        raw_local_irq_restore(flags);
+        return res;
+}
+EXPORT_SYMBOL(__mips_test_and_set_bit);
+
+
+/**
+ * __mips_test_and_set_bit_lock - Set a bit and return its old value.  This is
+ * called by test_and_set_bit_lock() if it cannot find a faster solution.
+ * @nr: Bit to set
+ * @addr: Address to count from
+ */
+int __mips_test_and_set_bit_lock(unsigned long nr,
+                                 volatile unsigned long *addr)
+{
+        volatile unsigned long *a = addr;
+        unsigned bit = nr & SZLONG_MASK;
+        unsigned long mask;
+        unsigned long flags;
+        unsigned long res;
+
+        a += nr >> SZLONG_LOG;
+        mask = 1UL << bit;
+        raw_local_irq_save(flags);
+        res = (mask & *a);
+        *a |= mask;
+        raw_local_irq_restore(flags);
+        return res;
+}
+EXPORT_SYMBOL(__mips_test_and_set_bit_lock);
+
+
+/**
+ * __mips_test_and_clear_bit - Clear a bit and return its old value.  This is
+ * called by test_and_clear_bit() if it cannot find a faster solution.
+ * @nr: Bit to clear
+ * @addr: Address to count from
+ */
+int __mips_test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
+{
+        volatile unsigned long *a = addr;
+        unsigned bit = nr & SZLONG_MASK;
+        unsigned long mask;
+        unsigned long flags;
+        unsigned long res;
+
+        a += nr >> SZLONG_LOG;
+        mask = 1UL << bit;
+        raw_local_irq_save(flags);
+        res = (mask & *a);
+        *a &= ~mask;
+        raw_local_irq_restore(flags);
+        return res;
+}
+EXPORT_SYMBOL(__mips_test_and_clear_bit);
+
+
+/**
+ * __mips_test_and_change_bit - Change a bit and return its old value.  This is
+ * called by test_and_change_bit() if it cannot find a faster solution.
+ * @nr: Bit to change
+ * @addr: Address to count from
+ */
+int __mips_test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
+{
+        volatile unsigned long *a = addr;
+        unsigned bit = nr & SZLONG_MASK;
+        unsigned long mask;
+        unsigned long flags;
+        unsigned long res;
+
+        a += nr >> SZLONG_LOG;
+        mask = 1UL << bit;
+        raw_local_irq_save(flags);
+        res = (mask & *a);
+        *a ^= mask;
+        raw_local_irq_restore(flags);
+        return res;
+}
+EXPORT_SYMBOL(__mips_test_and_change_bit);
diff --git a/arch/mips/lib/mips-atomic.c b/arch/mips/lib/mips-atomic.c
new file mode 100644
index 00000000000..e091430dbeb
--- /dev/null
+++ b/arch/mips/lib/mips-atomic.c
@@ -0,0 +1,176 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 by Ralf Baechle
+ * Copyright (C) 1996 by Paul M. Antoine
+ * Copyright (C) 1999 Silicon Graphics
+ * Copyright (C) 2000 MIPS Technologies, Inc.
+ */
+#include <asm/irqflags.h>
+#include <asm/hazards.h>
+#include <linux/compiler.h>
+#include <linux/preempt.h>
+#include <linux/export.h>
+
+#if !defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT_SMTC)
+
+/*
+ * For cli() we have to insert nops to make sure that the new value
+ * has actually arrived in the status register before the end of this
+ * macro.
+ * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
+ * no nops at all.
+ */
+/*
+ * For TX49, operating only IE bit is not enough.
+ *
+ * If mfc0 $12 follows store and the mfc0 is last instruction of a
+ * page and fetching the next instruction causes TLB miss, the result
+ * of the mfc0 might wrongly contain EXL bit.
+ *
+ * ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008
+ *
+ * Workaround: mask EXL bit of the result or place a nop before mfc0.
+ */
+__asm__(
+        "       .macro  arch_local_irq_disable\n"
+        "       .set    push                                            \n"
+        "       .set    noat                                            \n"
+#ifdef CONFIG_MIPS_MT_SMTC
+        "       mfc0    $1, $2, 1                                       \n"
+        "       ori     $1, 0x400                                       \n"
+        "       .set    noreorder                                       \n"
+        "       mtc0    $1, $2, 1                                       \n"
+#elif defined(CONFIG_CPU_MIPSR2)
+        /* see irqflags.h for inline function */
+#else
+        "       mfc0    $1,$12                                          \n"
+        "       ori     $1,0x1f                                         \n"
+        "       xori    $1,0x1f                                         \n"
+        "       .set    noreorder                                       \n"
+        "       mtc0    $1,$12                                          \n"
+#endif
+        "       irq_disable_hazard                                      \n"
+        "       .set    pop                                             \n"
+        "       .endm                                                   \n");
+
+void arch_local_irq_disable(void)
+{
+        preempt_disable();
+        __asm__ __volatile__(
+                "arch_local_irq_disable"
+                : /* no outputs */
+                : /* no inputs */
+                : "memory");
+        preempt_enable();
+}
+EXPORT_SYMBOL(arch_local_irq_disable);
+
+
+__asm__(
+        "       .macro  arch_local_irq_save result                      \n"
+        "       .set    push                                            \n"
+        "       .set    reorder                                         \n"
+        "       .set    noat                                            \n"
+#ifdef CONFIG_MIPS_MT_SMTC
+        "       mfc0    \\result, $2, 1                                 \n"
+        "       ori     $1, \\result, 0x400                             \n"
+        "       .set    noreorder                                       \n"
+        "       mtc0    $1, $2, 1                                       \n"
+        "       andi    \\result, \\result, 0x400                       \n"
+#elif defined(CONFIG_CPU_MIPSR2)
+        /* see irqflags.h for inline function */
+#else
+        "       mfc0    \\result, $12                                   \n"
+        "       ori     $1, \\result, 0x1f                              \n"
+        "       xori    $1, 0x1f                                        \n"
+        "       .set    noreorder                                       \n"
+        "       mtc0    $1, $12                                         \n"
+#endif
+        "       irq_disable_hazard                                      \n"
+        "       .set    pop                                             \n"
+        "       .endm                                                   \n");
+
+unsigned long arch_local_irq_save(void)
+{
+        unsigned long flags;
+        preempt_disable();
+        asm volatile("arch_local_irq_save\t%0"
+                     : "=r" (flags)
+                     : /* no inputs */
+                     : "memory");
+        preempt_enable();
+        return flags;
+}
+EXPORT_SYMBOL(arch_local_irq_save);
+
+
+__asm__(
+        "       .macro  arch_local_irq_restore flags                    \n"
+        "       .set    push                                            \n"
+        "       .set    noreorder                                       \n"
+        "       .set    noat                                            \n"
+#ifdef CONFIG_MIPS_MT_SMTC
+        "mfc0   $1, $2, 1                                               \n"
+        "andi   \\flags, 0x400                                          \n"
+        "ori    $1, 0x400                                               \n"
+        "xori   $1, 0x400                                               \n"
+        "or     \\flags, $1                                             \n"
+        "mtc0   \\flags, $2, 1                                          \n"
+#elif defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU)
+        /* see irqflags.h for inline function */
+#elif defined(CONFIG_CPU_MIPSR2)
+        /* see irqflags.h for inline function */
+#else
+        "       mfc0    $1, $12                                         \n"
+        "       andi    \\flags, 1                                      \n"
+        "       ori     $1, 0x1f                                        \n"
+        "       xori    $1, 0x1f                                        \n"
+        "       or      \\flags, $1                                     \n"
+        "       mtc0    \\flags, $12                                    \n"
+#endif
+        "       irq_disable_hazard                                      \n"
+        "       .set    pop                                             \n"
+        "       .endm                                                   \n");
+
+void arch_local_irq_restore(unsigned long flags)
+{
+        unsigned long __tmp1;
+
+#ifdef CONFIG_MIPS_MT_SMTC
+        /*
+         * SMTC kernel needs to do a software replay of queued
+         * IPIs, at the cost of branch and call overhead on each
+         * local_irq_restore()
+         */
+        if (unlikely(!(flags & 0x0400)))
+                smtc_ipi_replay();
+#endif
+        preempt_disable();
+        __asm__ __volatile__(
+                "arch_local_irq_restore\t%0"
+                : "=r" (__tmp1)
+                : "0" (flags)
+                : "memory");
+        preempt_enable();
+}
+EXPORT_SYMBOL(arch_local_irq_restore);
+
+
+void __arch_local_irq_restore(unsigned long flags)
+{
+        unsigned long __tmp1;
+
+        preempt_disable();
+        __asm__ __volatile__(
+                "arch_local_irq_restore\t%0"
+                : "=r" (__tmp1)
+                : "0" (flags)
+                : "memory");
+        preempt_enable();
+}
+EXPORT_SYMBOL(__arch_local_irq_restore);
+
+#endif /* !defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT_SMTC) */
diff --git a/arch/mips/mti-malta/malta-platform.c b/arch/mips/mti-malta/malta-platform.c
index 80562b81f0f..74732177851 100644
--- a/arch/mips/mti-malta/malta-platform.c
+++ b/arch/mips/mti-malta/malta-platform.c
@@ -29,6 +29,7 @@
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
+#include <asm/mips-boards/maltaint.h>
 #include <mtd/mtd-abi.h>
 
 #define SMC_PORT(base, int)                                             \
@@ -48,7 +49,7 @@ static struct plat_serial8250_port uart8250_data[] = {
         SMC_PORT(0x2F8, 3),
         {
                 .mapbase        = 0x1f000900,   /* The CBUS UART */
-                .irq            = MIPS_CPU_IRQ_BASE + 2,
+                .irq            = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB2,
                 .uartclk        = 3686400,      /* Twice the usual clk! */
                 .iotype         = UPIO_MEM32,
                 .flags          = CBUS_UART_FLAGS,
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 5dba755a43e..d385f396dfe 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -96,6 +96,7 @@ config S390
         select HAVE_MEMBLOCK_NODE_MAP
         select HAVE_CMPXCHG_LOCAL
         select HAVE_CMPXCHG_DOUBLE
+        select HAVE_ALIGNED_STRUCT_PAGE if SLUB
         select HAVE_VIRT_CPU_ACCOUNTING
         select VIRT_CPU_ACCOUNTING
         select ARCH_DISCARD_MEMBLOCK
diff --git a/arch/s390/include/asm/cio.h b/arch/s390/include/asm/cio.h
index 55bde603521..ad2b924167d 100644
--- a/arch/s390/include/asm/cio.h
+++ b/arch/s390/include/asm/cio.h
@@ -9,6 +9,8 @@
 
 #define LPM_ANYPATH 0xff
 #define __MAX_CSSID 0
+#define __MAX_SUBCHANNEL 65535
+#define __MAX_SSID 3
 
 #include <asm/scsw.h>
 
diff --git a/arch/s390/include/asm/compat.h b/arch/s390/include/asm/compat.h
index a34a9d612fc..18cd6b59265 100644
--- a/arch/s390/include/asm/compat.h
+++ b/arch/s390/include/asm/compat.h
@@ -20,7 +20,7 @@
 #define PSW32_MASK_CC           0x00003000UL
 #define PSW32_MASK_PM           0x00000f00UL
 
-#define PSW32_MASK_USER         0x00003F00UL
+#define PSW32_MASK_USER         0x0000FF00UL
 
 #define PSW32_ADDR_AMODE        0x80000000UL
 #define PSW32_ADDR_INSN         0x7FFFFFFFUL
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index dd647c919a6..2d3b7cb2600 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -506,12 +506,15 @@ static inline int pud_bad(pud_t pud)
 
 static inline int pmd_present(pmd_t pmd)
 {
-        return (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) != 0UL;
+        unsigned long mask = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY_RO;
+        return (pmd_val(pmd) & mask) == _HPAGE_TYPE_NONE ||
+               !(pmd_val(pmd) & _SEGMENT_ENTRY_INV);
 }
 
 static inline int pmd_none(pmd_t pmd)
 {
-        return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL;
+        return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) &&
+               !(pmd_val(pmd) & _SEGMENT_ENTRY_RO);
 }
 
 static inline int pmd_large(pmd_t pmd)
@@ -1223,6 +1226,11 @@ static inline void __pmd_idte(unsigned long address, pmd_t *pmdp)
 }
 
 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
+
+#define SEGMENT_NONE    __pgprot(_HPAGE_TYPE_NONE)
+#define SEGMENT_RO      __pgprot(_HPAGE_TYPE_RO)
+#define SEGMENT_RW      __pgprot(_HPAGE_TYPE_RW)
+
 #define __HAVE_ARCH_PGTABLE_DEPOSIT
 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable);
 
@@ -1242,16 +1250,15 @@ static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
 
 static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot)
 {
-        unsigned long pgprot_pmd = 0;
-
-        if (pgprot_val(pgprot) & _PAGE_INVALID) {
-                if (pgprot_val(pgprot) & _PAGE_SWT)
-                        pgprot_pmd |= _HPAGE_TYPE_NONE;
-                pgprot_pmd |= _SEGMENT_ENTRY_INV;
-        }
-        if (pgprot_val(pgprot) & _PAGE_RO)
-                pgprot_pmd |= _SEGMENT_ENTRY_RO;
-        return pgprot_pmd;
+        /*
+         * pgprot is PAGE_NONE, PAGE_RO, or PAGE_RW (see __Pxxx / __Sxxx)
+         * Convert to segment table entry format.
+         */
+        if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE))
+                return pgprot_val(SEGMENT_NONE);
+        if (pgprot_val(pgprot) == pgprot_val(PAGE_RO))
+                return pgprot_val(SEGMENT_RO);
+        return pgprot_val(SEGMENT_RW);
 }
 
 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
@@ -1269,7 +1276,9 @@ static inline pmd_t pmd_mkhuge(pmd_t pmd)
 
 static inline pmd_t pmd_mkwrite(pmd_t pmd)
 {
-        pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO;
+        /* Do not clobber _HPAGE_TYPE_NONE pages! */
+        if (!(pmd_val(pmd) & _SEGMENT_ENTRY_INV))
+                pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO;
         return pmd;
 }
 
diff --git a/arch/s390/include/asm/topology.h b/arch/s390/include/asm/topology.h
index 9ca30538376..9935cbd6a46 100644
--- a/arch/s390/include/asm/topology.h
+++ b/arch/s390/include/asm/topology.h
@@ -8,6 +8,9 @@ struct cpu;
 
 #ifdef CONFIG_SCHED_BOOK
 
+extern unsigned char cpu_socket_id[NR_CPUS];
+#define topology_physical_package_id(cpu) (cpu_socket_id[cpu])
+
 extern unsigned char cpu_core_id[NR_CPUS];
 extern cpumask_t cpu_core_map[NR_CPUS];
 
diff --git a/arch/s390/include/uapi/asm/ptrace.h b/arch/s390/include/uapi/asm/ptrace.h
index 705588a16d7..a5ca214b34f 100644
--- a/arch/s390/include/uapi/asm/ptrace.h
+++ b/arch/s390/include/uapi/asm/ptrace.h
@@ -239,7 +239,7 @@ typedef struct
 #define PSW_MASK_EA             0x00000000UL
 #define PSW_MASK_BA             0x00000000UL
 
-#define PSW_MASK_USER           0x00003F00UL
+#define PSW_MASK_USER           0x0000FF00UL
 
 #define PSW_ADDR_AMODE          0x80000000UL
 #define PSW_ADDR_INSN           0x7FFFFFFFUL
@@ -269,7 +269,7 @@ typedef struct
 #define PSW_MASK_EA             0x0000000100000000UL
 #define PSW_MASK_BA             0x0000000080000000UL
 
-#define PSW_MASK_USER           0x00003F8180000000UL
+#define PSW_MASK_USER           0x0000FF8180000000UL
 
 #define PSW_ADDR_AMODE          0x0000000000000000UL
 #define PSW_ADDR_INSN           0xFFFFFFFFFFFFFFFFUL
diff --git a/arch/s390/kernel/compat_signal.c b/arch/s390/kernel/compat_signal.c
index a1e8a8694bb..593fcc9253f 100644
--- a/arch/s390/kernel/compat_signal.c
+++ b/arch/s390/kernel/compat_signal.c
@@ -309,6 +309,10 @@ static int restore_sigregs32(struct pt_regs *regs,_sigregs32 __user *sregs)
         regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) |
                 (__u64)(regs32.psw.mask & PSW32_MASK_USER) << 32 |
                 (__u64)(regs32.psw.addr & PSW32_ADDR_AMODE);
+        /* Check for invalid user address space control. */
+        if ((regs->psw.mask & PSW_MASK_ASC) >= (psw_kernel_bits & PSW_MASK_ASC))
+                regs->psw.mask = (psw_user_bits & PSW_MASK_ASC) |
+                        (regs->psw.mask & ~PSW_MASK_ASC);
         regs->psw.addr = (__u64)(regs32.psw.addr & PSW32_ADDR_INSN);
         for (i = 0; i < NUM_GPRS; i++)
                 regs->gprs[i] = (__u64) regs32.gprs[i];
@@ -481,7 +485,10 @@ static int setup_frame32(int sig, struct k_sigaction *ka,
 
         /* Set up registers for signal handler */
         regs->gprs[15] = (__force __u64) frame;
-        regs->psw.mask |= PSW_MASK_BA;          /* force amode 31 */
+        /* Force 31 bit amode and default user address space control. */
+        regs->psw.mask = PSW_MASK_BA |
+                (psw_user_bits & PSW_MASK_ASC) |
+                (regs->psw.mask & ~PSW_MASK_ASC);
         regs->psw.addr = (__force __u64) ka->sa.sa_handler;
 
         regs->gprs[2] = map_signal(sig);
@@ -549,7 +556,10 @@ static int setup_rt_frame32(int sig, struct k_sigaction *ka, siginfo_t *info,
 
         /* Set up registers for signal handler */
         regs->gprs[15] = (__force __u64) frame;
-        regs->psw.mask |= PSW_MASK_BA;          /* force amode 31 */
+        /* Force 31 bit amode and default user address space control. */
+        regs->psw.mask = PSW_MASK_BA |
+                (psw_user_bits & PSW_MASK_ASC) |
+                (regs->psw.mask & ~PSW_MASK_ASC);
         regs->psw.addr = (__u64) ka->sa.sa_handler;
 
         regs->gprs[2] = map_signal(sig);
diff --git a/arch/s390/kernel/sclp.S b/arch/s390/kernel/sclp.S
index bf053898630..b6506ee32a3 100644
--- a/arch/s390/kernel/sclp.S
+++ b/arch/s390/kernel/sclp.S
@@ -44,6 +44,12 @@ _sclp_wait_int:
 #endif
         mvc     .LoldpswS1-.LbaseS1(16,%r13),0(%r8)
         mvc     0(16,%r8),0(%r9)
+#ifdef CONFIG_64BIT
+        epsw    %r6,%r7                         # set current addressing mode
+        nill    %r6,0x1                         # in new psw (31 or 64 bit mode)
+        nilh    %r7,0x8000
+        stm     %r6,%r7,0(%r8)
+#endif
         lhi     %r6,0x0200                      # cr mask for ext int (cr0.54)
         ltr     %r2,%r2
         jz      .LsetctS1
@@ -87,7 +93,7 @@ _sclp_wait_int:
         .long   0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int
 #ifdef CONFIG_64BIT
 .LextpswS1_64:
-        .quad   0x0000000180000000, .LwaitS1    # PSW to handle ext int, 64 bit
+        .quad   0, .LwaitS1                     # PSW to handle ext int, 64 bit
 #endif
 .LwaitpswS1:
         .long   0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int
diff --git a/arch/s390/kernel/signal.c b/arch/s390/kernel/signal.c
index c13a2a37ef0..d1259d87507 100644
--- a/arch/s390/kernel/signal.c
+++ b/arch/s390/kernel/signal.c
@@ -136,6 +136,10 @@ static int restore_sigregs(struct pt_regs *regs, _sigregs __user *sregs)
         /* Use regs->psw.mask instead of psw_user_bits to preserve PER bit. */
         regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) |
                 (user_sregs.regs.psw.mask & PSW_MASK_USER);
+        /* Check for invalid user address space control. */
+        if ((regs->psw.mask & PSW_MASK_ASC) >= (psw_kernel_bits & PSW_MASK_ASC))
+                regs->psw.mask = (psw_user_bits & PSW_MASK_ASC) |
+                        (regs->psw.mask & ~PSW_MASK_ASC);
         /* Check for invalid amode */
         if (regs->psw.mask & PSW_MASK_EA)
                 regs->psw.mask |= PSW_MASK_BA;
@@ -273,7 +277,10 @@ static int setup_frame(int sig, struct k_sigaction *ka,
 
         /* Set up registers for signal handler */
         regs->gprs[15] = (unsigned long) frame;
-        regs->psw.mask |= PSW_MASK_EA | PSW_MASK_BA;    /* 64 bit amode */
+        /* Force default amode and default user address space control. */
+        regs->psw.mask = PSW_MASK_EA | PSW_MASK_BA |
+                (psw_user_bits & PSW_MASK_ASC) |
+                (regs->psw.mask & ~PSW_MASK_ASC);
         regs->psw.addr = (unsigned long) ka->sa.sa_handler | PSW_ADDR_AMODE;
 
         regs->gprs[2] = map_signal(sig);
@@ -346,7 +353,10 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
 
         /* Set up registers for signal handler */
         regs->gprs[15] = (unsigned long) frame;
-        regs->psw.mask |= PSW_MASK_EA | PSW_MASK_BA;    /* 64 bit amode */
+        /* Force default amode and default user address space control. */
+        regs->psw.mask = PSW_MASK_EA | PSW_MASK_BA |
+                (psw_user_bits & PSW_MASK_ASC) |
+                (regs->psw.mask & ~PSW_MASK_ASC);
         regs->psw.addr = (unsigned long) ka->sa.sa_handler | PSW_ADDR_AMODE;
 
         regs->gprs[2] = map_signal(sig);
diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c
index 54d93f4b681..dd55f7c2010 100644
--- a/arch/s390/kernel/topology.c
+++ b/arch/s390/kernel/topology.c
@@ -40,6 +40,7 @@ static DEFINE_SPINLOCK(topology_lock);
 static struct mask_info core_info;
 cpumask_t cpu_core_map[NR_CPUS];
 unsigned char cpu_core_id[NR_CPUS];
+unsigned char cpu_socket_id[NR_CPUS];
 
 static struct mask_info book_info;
 cpumask_t cpu_book_map[NR_CPUS];
@@ -83,11 +84,12 @@ static struct mask_info *add_cpus_to_mask(struct topology_cpu *tl_cpu,
                         cpumask_set_cpu(lcpu, &book->mask);
                         cpu_book_id[lcpu] = book->id;
                         cpumask_set_cpu(lcpu, &core->mask);
+                        cpu_core_id[lcpu] = rcpu;
                         if (one_core_per_cpu) {
-                                cpu_core_id[lcpu] = rcpu;
+                                cpu_socket_id[lcpu] = rcpu;
                                 core = core->next;
                         } else {
-                                cpu_core_id[lcpu] = core->id;
+                                cpu_socket_id[lcpu] = core->id;
                         }
                         smp_cpu_set_polarization(lcpu, tl_cpu->pp);
                 }
diff --git a/arch/s390/lib/uaccess_pt.c b/arch/s390/lib/uaccess_pt.c
index 2d37bb861fa..9017a63dda3 100644
--- a/arch/s390/lib/uaccess_pt.c
+++ b/arch/s390/lib/uaccess_pt.c
@@ -39,7 +39,7 @@ static __always_inline unsigned long follow_table(struct mm_struct *mm,
         pmd = pmd_offset(pud, addr);
         if (pmd_none(*pmd))
                 return -0x10UL;
-        if (pmd_huge(*pmd)) {
+        if (pmd_large(*pmd)) {
                 if (write && (pmd_val(*pmd) & _SEGMENT_ENTRY_RO))
                         return -0x04UL;
                 return (pmd_val(*pmd) & HPAGE_MASK) + (addr & ~HPAGE_MASK);
diff --git a/arch/s390/mm/gup.c b/arch/s390/mm/gup.c
index 60acb93a468..1f5315d1215 100644
--- a/arch/s390/mm/gup.c
+++ b/arch/s390/mm/gup.c
@@ -126,7 +126,7 @@ static inline int gup_pmd_range(pud_t *pudp, pud_t pud, unsigned long addr,
                  */
                 if (pmd_none(pmd) || pmd_trans_splitting(pmd))
                         return 0;
-                if (unlikely(pmd_huge(pmd))) {
+                if (unlikely(pmd_large(pmd))) {
                         if (!gup_huge_pmd(pmdp, pmd, addr, next,
                                           write, pages, nr))
                                 return 0;
@@ -180,8 +180,7 @@ int __get_user_pages_fast(unsigned long start, int nr_pages, int write,
         addr = start;
         len = (unsigned long) nr_pages << PAGE_SHIFT;
         end = start + len;
-        if (unlikely(!access_ok(write ? VERIFY_WRITE : VERIFY_READ,
-                                        (void __user *)start, len)))
+        if ((end < start) || (end > TASK_SIZE))
                 return 0;
 
         local_irq_save(flags);
@@ -229,7 +228,7 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write,
         addr = start;
         len = (unsigned long) nr_pages << PAGE_SHIFT;
         end = start + len;
-        if (end < start)
+        if ((end < start) || (end > TASK_SIZE))
                 goto slow_irqon;
 
         /*
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index b6b442b0d79..9f2edb5c555 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -20,6 +20,7 @@ config SPARC
         select HAVE_ARCH_TRACEHOOK
         select SYSCTL_EXCEPTION_TRACE
         select ARCH_WANT_OPTIONAL_GPIOLIB
+        select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
         select RTC_CLASS
         select RTC_DRV_M48T59
         select HAVE_IRQ_WORK
diff --git a/arch/sparc/crypto/Makefile b/arch/sparc/crypto/Makefile
index 6ae1ad5e502..5d469d81761 100644
--- a/arch/sparc/crypto/Makefile
+++ b/arch/sparc/crypto/Makefile
@@ -13,13 +13,13 @@ obj-$(CONFIG_CRYPTO_DES_SPARC64) += camellia-sparc64.o
 
 obj-$(CONFIG_CRYPTO_CRC32C_SPARC64) += crc32c-sparc64.o
 
-sha1-sparc64-y := sha1_asm.o sha1_glue.o crop_devid.o
-sha256-sparc64-y := sha256_asm.o sha256_glue.o crop_devid.o
-sha512-sparc64-y := sha512_asm.o sha512_glue.o crop_devid.o
-md5-sparc64-y := md5_asm.o md5_glue.o crop_devid.o
+sha1-sparc64-y := sha1_asm.o sha1_glue.o
+sha256-sparc64-y := sha256_asm.o sha256_glue.o
+sha512-sparc64-y := sha512_asm.o sha512_glue.o
+md5-sparc64-y := md5_asm.o md5_glue.o
 
-aes-sparc64-y := aes_asm.o aes_glue.o crop_devid.o
-des-sparc64-y := des_asm.o des_glue.o crop_devid.o
-camellia-sparc64-y := camellia_asm.o camellia_glue.o crop_devid.o
+aes-sparc64-y := aes_asm.o aes_glue.o
+des-sparc64-y := des_asm.o des_glue.o
+camellia-sparc64-y := camellia_asm.o camellia_glue.o
 
-crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o crop_devid.o
+crc32c-sparc64-y := crc32c_asm.o crc32c_glue.o
diff --git a/arch/sparc/crypto/aes_glue.c b/arch/sparc/crypto/aes_glue.c
index 8f1c9980f63..3965d1d36df 100644
--- a/arch/sparc/crypto/aes_glue.c
+++ b/arch/sparc/crypto/aes_glue.c
@@ -475,3 +475,5 @@ MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("AES Secure Hash Algorithm, sparc64 aes opcode accelerated");
 
 MODULE_ALIAS("aes");
+
+#include "crop_devid.c"
diff --git a/arch/sparc/crypto/camellia_glue.c b/arch/sparc/crypto/camellia_glue.c
index 42905c08429..62c89af3fd3 100644
--- a/arch/sparc/crypto/camellia_glue.c
+++ b/arch/sparc/crypto/camellia_glue.c
@@ -320,3 +320,5 @@ MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("Camellia Cipher Algorithm, sparc64 camellia opcode accelerated");
 
 MODULE_ALIAS("aes");
+
+#include "crop_devid.c"
diff --git a/arch/sparc/crypto/crc32c_glue.c b/arch/sparc/crypto/crc32c_glue.c
index 0bd89cea8d8..5162fad912c 100644
--- a/arch/sparc/crypto/crc32c_glue.c
+++ b/arch/sparc/crypto/crc32c_glue.c
@@ -177,3 +177,5 @@ MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated");
 
 MODULE_ALIAS("crc32c");
+
+#include "crop_devid.c"
diff --git a/arch/sparc/crypto/des_glue.c b/arch/sparc/crypto/des_glue.c
index c4940c2d307..41524cebcc4 100644
--- a/arch/sparc/crypto/des_glue.c
+++ b/arch/sparc/crypto/des_glue.c
@@ -527,3 +527,5 @@ MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms, sparc64 des opcode accelerated");
 
 MODULE_ALIAS("des");
+
+#include "crop_devid.c"
diff --git a/arch/sparc/crypto/md5_glue.c b/arch/sparc/crypto/md5_glue.c
index 603d723038c..09a9ea1dfb6 100644
--- a/arch/sparc/crypto/md5_glue.c
+++ b/arch/sparc/crypto/md5_glue.c
@@ -186,3 +186,5 @@ MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("MD5 Secure Hash Algorithm, sparc64 md5 opcode accelerated");
 
 MODULE_ALIAS("md5");
+
+#include "crop_devid.c"
diff --git a/arch/sparc/crypto/sha1_glue.c b/arch/sparc/crypto/sha1_glue.c
index 2bbb20bee9f..6cd5f29e1e0 100644
--- a/arch/sparc/crypto/sha1_glue.c
+++ b/arch/sparc/crypto/sha1_glue.c
@@ -181,3 +181,5 @@ MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, sparc64 sha1 opcode accelerated");
 
 MODULE_ALIAS("sha1");
+
+#include "crop_devid.c"
diff --git a/arch/sparc/crypto/sha256_glue.c b/arch/sparc/crypto/sha256_glue.c
index 591e656bd89..04f555ab268 100644
--- a/arch/sparc/crypto/sha256_glue.c
+++ b/arch/sparc/crypto/sha256_glue.c
@@ -239,3 +239,5 @@ MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm, sparc64 sha256 op
 
 MODULE_ALIAS("sha224");
 MODULE_ALIAS("sha256");
+
+#include "crop_devid.c"
diff --git a/arch/sparc/crypto/sha512_glue.c b/arch/sparc/crypto/sha512_glue.c
index 486f0a2b700..f04d1994d19 100644
--- a/arch/sparc/crypto/sha512_glue.c
+++ b/arch/sparc/crypto/sha512_glue.c
@@ -224,3 +224,5 @@ MODULE_DESCRIPTION("SHA-384 and SHA-512 Secure Hash Algorithm, sparc64 sha512 op
 
 MODULE_ALIAS("sha384");
 MODULE_ALIAS("sha512");
+
+#include "crop_devid.c"
diff --git a/arch/sparc/include/asm/atomic_64.h b/arch/sparc/include/asm/atomic_64.h
index ce35a1cf1a2..be56a244c9c 100644
--- a/arch/sparc/include/asm/atomic_64.h
+++ b/arch/sparc/include/asm/atomic_64.h
@@ -1,7 +1,7 @@
 /* atomic.h: Thankfully the V9 is at least reasonable for this
  *           stuff.
  *
- * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com)
+ * Copyright (C) 1996, 1997, 2000, 2012 David S. Miller (davem@redhat.com)
  */
 
 #ifndef __ARCH_SPARC64_ATOMIC__
@@ -106,6 +106,8 @@ static inline long atomic64_add_unless(atomic64_t *v, long a, long u)
 
 #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
 
+extern long atomic64_dec_if_positive(atomic64_t *v);
+
 /* Atomic operations are already serializing */
 #define smp_mb__before_atomic_dec()     barrier()
 #define smp_mb__after_atomic_dec()      barrier()
diff --git a/arch/sparc/include/asm/backoff.h b/arch/sparc/include/asm/backoff.h
index db3af0d30fb..4e02086b839 100644
--- a/arch/sparc/include/asm/backoff.h
+++ b/arch/sparc/include/asm/backoff.h
@@ -1,6 +1,46 @@
 #ifndef _SPARC64_BACKOFF_H
 #define _SPARC64_BACKOFF_H
 
+/* The macros in this file implement an exponential backoff facility
+ * for atomic operations.
+ *
+ * When multiple threads compete on an atomic operation, it is
+ * possible for one thread to be continually denied a successful
+ * completion of the compare-and-swap instruction.  Heavily
+ * threaded cpu implementations like Niagara can compound this
+ * problem even further.
+ *
+ * When an atomic operation fails and needs to be retried, we spin a
+ * certain number of times.  At each subsequent failure of the same
+ * operation we double the spin count, realizing an exponential
+ * backoff.
+ *
+ * When we spin, we try to use an operation that will cause the
+ * current cpu strand to block, and therefore make the core fully
+ * available to any other other runnable strands.  There are two
+ * options, based upon cpu capabilities.
+ *
+ * On all cpus prior to SPARC-T4 we do three dummy reads of the
+ * condition code register.  Each read blocks the strand for something
+ * between 40 and 50 cpu cycles.
+ *
+ * For SPARC-T4 and later we have a special "pause" instruction
+ * available.  This is implemented using writes to register %asr27.
+ * The cpu will block the number of cycles written into the register,
+ * unless a disrupting trap happens first.  SPARC-T4 specifically
+ * implements pause with a granularity of 8 cycles.  Each strand has
+ * an internal pause counter which decrements every 8 cycles.  So the
+ * chip shifts the %asr27 value down by 3 bits, and writes the result
+ * into the pause counter.  If a value smaller than 8 is written, the
+ * chip blocks for 1 cycle.
+ *
+ * To achieve the same amount of backoff as the three %ccr reads give
+ * on earlier chips, we shift the backoff value up by 7 bits.  (Three
+ * %ccr reads block for about 128 cycles, 1 << 7 == 128) We write the
+ * whole amount we want to block into the pause register, rather than
+ * loop writing 128 each time.
+ */
+
 #define BACKOFF_LIMIT   (4 * 1024)
 
 #ifdef CONFIG_SMP
@@ -11,16 +51,25 @@
 #define BACKOFF_LABEL(spin_label, continue_label) \
         spin_label
 
-#define BACKOFF_SPIN(reg, tmp, label)   \
-        mov     reg, tmp; \
-88:     brnz,pt tmp, 88b; \
-         sub    tmp, 1, tmp; \
-        set     BACKOFF_LIMIT, tmp; \
-        cmp     reg, tmp; \
-        bg,pn   %xcc, label; \
-         nop; \
-        ba,pt   %xcc, label; \
-         sllx   reg, 1, reg;
+#define BACKOFF_SPIN(reg, tmp, label)           \
+        mov             reg, tmp;               \
+88:     rd              %ccr, %g0;              \
+        rd              %ccr, %g0;              \
+        rd              %ccr, %g0;              \
+        .section        .pause_3insn_patch,"ax";\
+        .word           88b;                    \
+        sllx            tmp, 7, tmp;            \
+        wr              tmp, 0, %asr27;         \
+        clr             tmp;                    \
+        .previous;                              \
+        brnz,pt         tmp, 88b;               \
+         sub            tmp, 1, tmp;            \
+        set             BACKOFF_LIMIT, tmp;     \
+        cmp             reg, tmp;               \
+        bg,pn           %xcc, label;            \
+         nop;                                   \
+        ba,pt           %xcc, label;            \
+         sllx           reg, 1, reg;
 
 #else
 
diff --git a/arch/sparc/include/asm/compat.h b/arch/sparc/include/asm/compat.h
index cef99fbc0a2..830502fe62b 100644
--- a/arch/sparc/include/asm/compat.h
+++ b/arch/sparc/include/asm/compat.h
@@ -232,9 +232,10 @@ static inline void __user *arch_compat_alloc_user_space(long len)
         struct pt_regs *regs = current_thread_info()->kregs;
         unsigned long usp = regs->u_regs[UREG_I6];
 
-        if (!(test_thread_flag(TIF_32BIT)))
+        if (test_thread_64bit_stack(usp))
                 usp += STACK_BIAS;
-        else
+
+        if (test_thread_flag(TIF_32BIT))
                 usp &= 0xffffffffUL;
 
         usp -= len;
diff --git a/arch/sparc/include/asm/processor_64.h b/arch/sparc/include/asm/processor_64.h
index 4e5a483122a..721e25f0e2e 100644
--- a/arch/sparc/include/asm/processor_64.h
+++ b/arch/sparc/include/asm/processor_64.h
@@ -196,7 +196,22 @@ extern unsigned long get_wchan(struct task_struct *task);
 #define KSTK_EIP(tsk)  (task_pt_regs(tsk)->tpc)
 #define KSTK_ESP(tsk)  (task_pt_regs(tsk)->u_regs[UREG_FP])
 
-#define cpu_relax()     barrier()
+/* Please see the commentary in asm/backoff.h for a description of
+ * what these instructions are doing and how they have been choosen.
+ * To make a long story short, we are trying to yield the current cpu
+ * strand during busy loops.
+ */
+#define cpu_relax()     asm volatile("\n99:\n\t"                        \
+                                     "rd        %%ccr, %%g0\n\t"        \
+                                     "rd        %%ccr, %%g0\n\t"        \
+                                     "rd        %%ccr, %%g0\n\t"        \
+                                     ".section  .pause_3insn_patch,\"ax\"\n\t"\
+                                     ".word     99b\n\t"                \
+                                     "wr        %%g0, 128, %%asr27\n\t" \
+                                     "nop\n\t"                          \
+                                     "nop\n\t"                          \
+                                     ".previous"                        \
+                                     ::: "memory")
 
 /* Prefetch support.  This is tuned for UltraSPARC-III and later.
  * UltraSPARC-I will treat these as nops, and UltraSPARC-II has
diff --git a/arch/sparc/include/asm/prom.h b/arch/sparc/include/asm/prom.h
index c2876511070..f93003123bc 100644
--- a/arch/sparc/include/asm/prom.h
+++ b/arch/sparc/include/asm/prom.h
@@ -63,5 +63,10 @@ extern char *of_console_options;
 extern void irq_trans_init(struct device_node *dp);
 extern char *build_path_component(struct device_node *dp);
 
+/* SPARC has a local implementation */
+extern int of_address_to_resource(struct device_node *dev, int index,
+                                  struct resource *r);
+#define of_address_to_resource of_address_to_resource
+
 #endif /* __KERNEL__ */
 #endif /* _SPARC_PROM_H */
diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h
index 4e227663108..a3fe4dcc0aa 100644
--- a/arch/sparc/include/asm/thread_info_64.h
+++ b/arch/sparc/include/asm/thread_info_64.h
@@ -259,6 +259,11 @@ static inline bool test_and_clear_restore_sigmask(void)
 
 #define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)
 
+#define thread32_stack_is_64bit(__SP) (((__SP) & 0x1) != 0)
+#define test_thread_64bit_stack(__SP) \
+        ((test_thread_flag(TIF_32BIT) && !thread32_stack_is_64bit(__SP)) ? \
+         false : true)
+
 #endif  /* !__ASSEMBLY__ */
 
 #endif /* __KERNEL__ */
diff --git a/arch/sparc/include/asm/ttable.h b/arch/sparc/include/asm/ttable.h
index 48f2807d326..71b5a67522a 100644
--- a/arch/sparc/include/asm/ttable.h
+++ b/arch/sparc/include/asm/ttable.h
@@ -372,7 +372,9 @@ etrap_spill_fixup_64bit:				\
 
 /* Normal 32bit spill */
 #define SPILL_2_GENERIC(ASI)                            \
-        srl     %sp, 0, %sp;                            \
+        and     %sp, 1, %g3;                            \
+        brnz,pn %g3, (. - (128 + 4));                   \
+         srl    %sp, 0, %sp;                            \
         stwa    %l0, [%sp + %g0] ASI;                   \
         mov     0x04, %g3;                              \
         stwa    %l1, [%sp + %g3] ASI;                   \
@@ -398,14 +400,16 @@ etrap_spill_fixup_64bit:				\
         stwa    %i6, [%g1 + %g0] ASI;                   \
         stwa    %i7, [%g1 + %g3] ASI;                   \
         saved;                                          \
-        retry; nop; nop;                                \
+        retry;                                          \
         b,a,pt  %xcc, spill_fixup_dax;                  \
         b,a,pt  %xcc, spill_fixup_mna;                  \
         b,a,pt  %xcc, spill_fixup;
 
 #define SPILL_2_GENERIC_ETRAP           \
 etrap_user_spill_32bit:                 \
-        srl     %sp, 0, %sp;            \
+        and     %sp, 1, %g3;            \
+        brnz,pn %g3, etrap_user_spill_64bit;    \
+         srl    %sp, 0, %sp;            \
         stwa    %l0, [%sp + 0x00] %asi; \
         stwa    %l1, [%sp + 0x04] %asi; \
         stwa    %l2, [%sp + 0x08] %asi; \
@@ -427,7 +431,7 @@ etrap_user_spill_32bit:			\
         ba,pt   %xcc, etrap_save;       \
          wrpr   %g1, %cwp;              \
         nop; nop; nop; nop;             \
-        nop; nop; nop; nop;             \
+        nop; nop;                       \
         ba,a,pt %xcc, etrap_spill_fixup_32bit; \
         ba,a,pt %xcc, etrap_spill_fixup_32bit; \
         ba,a,pt %xcc, etrap_spill_fixup_32bit;
@@ -592,7 +596,9 @@ user_rtt_fill_64bit:					\
 
 /* Normal 32bit fill */
 #define FILL_2_GENERIC(ASI)                             \
-        srl     %sp, 0, %sp;                            \
+        and     %sp, 1, %g3;                            \
+        brnz,pn %g3, (. - (128 + 4));                   \
+         srl    %sp, 0, %sp;                            \
         lduwa   [%sp + %g0] ASI, %l0;                   \
         mov     0x04, %g2;                              \
         mov     0x08, %g3;                              \
@@ -616,14 +622,16 @@ user_rtt_fill_64bit:					\
         lduwa   [%g1 + %g3] ASI, %i6;                   \
         lduwa   [%g1 + %g5] ASI, %i7;                   \
         restored;                                       \
-        retry; nop; nop; nop; nop;                      \
+        retry; nop; nop;                                \
         b,a,pt  %xcc, fill_fixup_dax;                   \
         b,a,pt  %xcc, fill_fixup_mna;                   \
         b,a,pt  %xcc, fill_fixup;
 
 #define FILL_2_GENERIC_RTRAP                            \
 user_rtt_fill_32bit:                                    \
-        srl     %sp, 0, %sp;                            \
+        and     %sp, 1, %g3;                            \
+        brnz,pn %g3, user_rtt_fill_64bit;               \
+         srl    %sp, 0, %sp;                            \
         lduwa   [%sp + 0x00] %asi, %l0;                 \
         lduwa   [%sp + 0x04] %asi, %l1;                 \
         lduwa   [%sp + 0x08] %asi, %l2;                 \
@@ -643,7 +651,7 @@ user_rtt_fill_32bit:					\
         ba,pt   %xcc, user_rtt_pre_restore;             \
          restored;                                      \
         nop; nop; nop; nop; nop;                        \
-        nop; nop; nop; nop; nop;                        \
+        nop; nop; nop;                                  \
         ba,a,pt %xcc, user_rtt_fill_fixup;              \
         ba,a,pt %xcc, user_rtt_fill_fixup;              \
         ba,a,pt %xcc, user_rtt_fill_fixup;
diff --git a/arch/sparc/include/uapi/asm/unistd.h b/arch/sparc/include/uapi/asm/unistd.h
index 8974ef7ae92..cac719d1bc5 100644
--- a/arch/sparc/include/uapi/asm/unistd.h
+++ b/arch/sparc/include/uapi/asm/unistd.h
@@ -405,8 +405,13 @@
 #define __NR_setns              337
 #define __NR_process_vm_readv   338
 #define __NR_process_vm_writev  339
+#define __NR_kern_features      340
+#define __NR_kcmp               341
 
-#define NR_syscalls             340
+#define NR_syscalls             342
+
+/* Bitmask values returned from kern_features system call.  */
+#define KERN_FEATURE_MIXED_MODE_STACK   0x00000001
 
 #ifdef __32bit_syscall_numbers__
 /* Sparc 32-bit only has the "setresuid32", "getresuid32" variants,
diff --git a/arch/sparc/kernel/entry.h b/arch/sparc/kernel/entry.h
index 0c218e4c088..cc3c5cb47cd 100644
--- a/arch/sparc/kernel/entry.h
+++ b/arch/sparc/kernel/entry.h
@@ -59,6 +59,13 @@ struct popc_6insn_patch_entry {
 extern struct popc_6insn_patch_entry __popc_6insn_patch,
         __popc_6insn_patch_end;
 
+struct pause_patch_entry {
+        unsigned int    addr;
+        unsigned int    insns[3];
+};
+extern struct pause_patch_entry __pause_3insn_patch,
+        __pause_3insn_patch_end;
+
 extern void __init per_cpu_patch(void);
 extern void sun4v_patch_1insn_range(struct sun4v_1insn_patch_entry *,
                                     struct sun4v_1insn_patch_entry *);
diff --git a/arch/sparc/kernel/leon_kernel.c b/arch/sparc/kernel/leon_kernel.c
index f8b6eee40bd..87f60ee6543 100644
--- a/arch/sparc/kernel/leon_kernel.c
+++ b/arch/sparc/kernel/leon_kernel.c
@@ -56,11 +56,13 @@ static inline unsigned int leon_eirq_get(int cpu)
 static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc)
 {
         unsigned int eirq;
+        struct irq_bucket *p;
         int cpu = sparc_leon3_cpuid();
 
         eirq = leon_eirq_get(cpu);
-        if ((eirq & 0x10) && irq_map[eirq]->irq) /* bit4 tells if IRQ happened */
-                generic_handle_irq(irq_map[eirq]->irq);
+        p = irq_map[eirq];
+        if ((eirq & 0x10) && p && p->irq) /* bit4 tells if IRQ happened */
+                generic_handle_irq(p->irq);
 }
 
 /* The extended IRQ controller has been found, this function registers it */
diff --git a/arch/sparc/kernel/perf_event.c b/arch/sparc/kernel/perf_event.c
index 885a8af7406..b5c38faa4ea 100644
--- a/arch/sparc/kernel/perf_event.c
+++ b/arch/sparc/kernel/perf_event.c
@@ -1762,15 +1762,25 @@ static void perf_callchain_user_32(struct perf_callchain_entry *entry,
 
         ufp = regs->u_regs[UREG_I6] & 0xffffffffUL;
         do {
-                struct sparc_stackf32 *usf, sf;
                 unsigned long pc;
 
-                usf = (struct sparc_stackf32 *) ufp;
-                if (__copy_from_user_inatomic(&sf, usf, sizeof(sf)))
-                        break;
+                if (thread32_stack_is_64bit(ufp)) {
+                        struct sparc_stackf *usf, sf;
 
-                pc = sf.callers_pc;
-                ufp = (unsigned long)sf.fp;
+                        ufp += STACK_BIAS;
+                        usf = (struct sparc_stackf *) ufp;
+                        if (__copy_from_user_inatomic(&sf, usf, sizeof(sf)))
+                                break;
+                        pc = sf.callers_pc & 0xffffffff;
+                        ufp = ((unsigned long) sf.fp) & 0xffffffff;
+                } else {
+                        struct sparc_stackf32 *usf, sf;
+                        usf = (struct sparc_stackf32 *) ufp;
+                        if (__copy_from_user_inatomic(&sf, usf, sizeof(sf)))
+                                break;
+                        pc = sf.callers_pc;
+                        ufp = (unsigned long)sf.fp;
+                }
                 perf_callchain_store(entry, pc);
         } while (entry->nr < PERF_MAX_STACK_DEPTH);
 }
diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c
index d778248ef3f..c6e0c291004 100644
--- a/arch/sparc/kernel/process_64.c
+++ b/arch/sparc/kernel/process_64.c
@@ -452,13 +452,16 @@ void flush_thread(void)
 /* It's a bit more tricky when 64-bit tasks are involved... */
 static unsigned long clone_stackframe(unsigned long csp, unsigned long psp)
 {
+        bool stack_64bit = test_thread_64bit_stack(psp);
         unsigned long fp, distance, rval;
 
-        if (!(test_thread_flag(TIF_32BIT))) {
+        if (stack_64bit) {
                 csp += STACK_BIAS;
                 psp += STACK_BIAS;
                 __get_user(fp, &(((struct reg_window __user *)psp)->ins[6]));
                 fp += STACK_BIAS;
+                if (test_thread_flag(TIF_32BIT))
+                        fp &= 0xffffffff;
         } else
                 __get_user(fp, &(((struct reg_window32 __user *)psp)->ins[6]));
 
@@ -472,7 +475,7 @@ static unsigned long clone_stackframe(unsigned long csp, unsigned long psp)
         rval = (csp - distance);
         if (copy_in_user((void __user *) rval, (void __user *) psp, distance))
                 rval = 0;
-        else if (test_thread_flag(TIF_32BIT)) {
+        else if (!stack_64bit) {
                 if (put_user(((u32)csp),
                              &(((struct reg_window32 __user *)rval)->ins[6])))
                         rval = 0;
@@ -507,18 +510,18 @@ void synchronize_user_stack(void)
 
         flush_user_windows();
         if ((window = get_thread_wsaved()) != 0) {
-                int winsize = sizeof(struct reg_window);
-                int bias = 0;
-
-                if (test_thread_flag(TIF_32BIT))
-                        winsize = sizeof(struct reg_window32);
-                else
-                        bias = STACK_BIAS;
-
                 window -= 1;
                 do {
-                        unsigned long sp = (t->rwbuf_stkptrs[window] + bias);
                         struct reg_window *rwin = &t->reg_window[window];
+                        int winsize = sizeof(struct reg_window);
+                        unsigned long sp;
+
+                        sp = t->rwbuf_stkptrs[window];
+
+                        if (test_thread_64bit_stack(sp))
+                                sp += STACK_BIAS;
+                        else
+                                winsize = sizeof(struct reg_window32);
 
                         if (!copy_to_user((char __user *)sp, rwin, winsize)) {
                                 shift_window_buffer(window, get_thread_wsaved() - 1, t);
@@ -544,13 +547,6 @@ void fault_in_user_windows(void)
 {
         struct thread_info *t = current_thread_info();
         unsigned long window;
-        int winsize = sizeof(struct reg_window);
-        int bias = 0;
-
-        if (test_thread_flag(TIF_32BIT))
-                winsize = sizeof(struct reg_window32);
-        else
-                bias = STACK_BIAS;
 
         flush_user_windows();
         window = get_thread_wsaved();
@@ -558,8 +554,16 @@ void fault_in_user_windows(void)
         if (likely(window != 0)) {
                 window -= 1;
                 do {
-                        unsigned long sp = (t->rwbuf_stkptrs[window] + bias);
                         struct reg_window *rwin = &t->reg_window[window];
+                        int winsize = sizeof(struct reg_window);
+                        unsigned long sp;
+
+                        sp = t->rwbuf_stkptrs[window];
+
+                        if (test_thread_64bit_stack(sp))
+                                sp += STACK_BIAS;
+                        else
+                                winsize = sizeof(struct reg_window32);
 
                         if (unlikely(sp & 0x7UL))
                                 stack_unaligned(sp);
diff --git a/arch/sparc/kernel/ptrace_64.c b/arch/sparc/kernel/ptrace_64.c
index 484dabac704..7ff45e4ba68 100644
--- a/arch/sparc/kernel/ptrace_64.c
+++ b/arch/sparc/kernel/ptrace_64.c
@@ -151,7 +151,7 @@ static int regwindow64_get(struct task_struct *target,
 {
         unsigned long rw_addr = regs->u_regs[UREG_I6];
 
-        if (test_tsk_thread_flag(current, TIF_32BIT)) {
+        if (!test_thread_64bit_stack(rw_addr)) {
                 struct reg_window32 win32;
                 int i;
 
@@ -176,7 +176,7 @@ static int regwindow64_set(struct task_struct *target,
 {
         unsigned long rw_addr = regs->u_regs[UREG_I6];
 
-        if (test_tsk_thread_flag(current, TIF_32BIT)) {
+        if (!test_thread_64bit_stack(rw_addr)) {
                 struct reg_window32 win32;
                 int i;
 
diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c
index 0800e71d8a8..0eaf0059aae 100644
--- a/arch/sparc/kernel/setup_64.c
+++ b/arch/sparc/kernel/setup_64.c
@@ -316,6 +316,25 @@ static void __init popc_patch(void)
         }
 }
 
+static void __init pause_patch(void)
+{
+        struct pause_patch_entry *p;
+
+        p = &__pause_3insn_patch;
+        while (p < &__pause_3insn_patch_end) {
+                unsigned long i, addr = p->addr;
+
+                for (i = 0; i < 3; i++) {
+                        *(unsigned int *) (addr +  (i * 4)) = p->insns[i];
+                        wmb();
+                        __asm__ __volatile__("flush     %0"
+                                             : : "r" (addr +  (i * 4)));
+                }
+
+                p++;
+        }
+}
+
 #ifdef CONFIG_SMP
 void __init boot_cpu_id_too_large(int cpu)
 {
@@ -528,6 +547,8 @@ static void __init init_sparc64_elf_hwcap(void)
 
         if (sparc64_elf_hwcap & AV_SPARC_POPC)
                 popc_patch();
+        if (sparc64_elf_hwcap & AV_SPARC_PAUSE)
+                pause_patch();
 }
 
 void __init setup_arch(char **cmdline_p)
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index 11c6c9603e7..878ef3d5fec 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -751,3 +751,8 @@ int kernel_execve(const char *filename,
                       : "cc");
         return __res;
 }
+
+asmlinkage long sys_kern_features(void)
+{
+        return KERN_FEATURE_MIXED_MODE_STACK;
+}
diff --git a/arch/sparc/kernel/systbls_32.S b/arch/sparc/kernel/systbls_32.S
index 63402f9e9f5..5147f574f12 100644
--- a/arch/sparc/kernel/systbls_32.S
+++ b/arch/sparc/kernel/systbls_32.S
@@ -85,3 +85,4 @@ sys_call_table:
 /*325*/ .long sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init
 /*330*/ .long sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime
 /*335*/ .long sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev
+/*340*/ .long sys_ni_syscall, sys_kcmp
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index 3a58e0d66f5..1c9af9fa38e 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -86,6 +86,7 @@ sys_call_table32:
         .word compat_sys_pwritev, compat_sys_rt_tgsigqueueinfo, sys_perf_event_open, compat_sys_recvmmsg, sys_fanotify_init
 /*330*/ .word sys32_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, compat_sys_open_by_handle_at, compat_sys_clock_adjtime
         .word sys_syncfs, compat_sys_sendmmsg, sys_setns, compat_sys_process_vm_readv, compat_sys_process_vm_writev
+/*340*/ .word sys_kern_features, sys_kcmp
 
 #endif /* CONFIG_COMPAT */
 
@@ -163,3 +164,4 @@ sys_call_table:
         .word sys_pwritev, sys_rt_tgsigqueueinfo, sys_perf_event_open, sys_recvmmsg, sys_fanotify_init
 /*330*/ .word sys_fanotify_mark, sys_prlimit64, sys_name_to_handle_at, sys_open_by_handle_at, sys_clock_adjtime
         .word sys_syncfs, sys_sendmmsg, sys_setns, sys_process_vm_readv, sys_process_vm_writev
+/*340*/ .word sys_kern_features, sys_kcmp
diff --git a/arch/sparc/kernel/unaligned_64.c b/arch/sparc/kernel/unaligned_64.c
index f81d038f734..8201c25e766 100644
--- a/arch/sparc/kernel/unaligned_64.c
+++ b/arch/sparc/kernel/unaligned_64.c
@@ -113,21 +113,24 @@ static inline long sign_extend_imm13(long imm)
 
 static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
 {
-        unsigned long value;
+        unsigned long value, fp;
         
         if (reg < 16)
                 return (!reg ? 0 : regs->u_regs[reg]);
+
+        fp = regs->u_regs[UREG_FP];
+
         if (regs->tstate & TSTATE_PRIV) {
                 struct reg_window *win;
-                win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+                win = (struct reg_window *)(fp + STACK_BIAS);
                 value = win->locals[reg - 16];
-        } else if (test_thread_flag(TIF_32BIT)) {
+        } else if (!test_thread_64bit_stack(fp)) {
                 struct reg_window32 __user *win32;
-                win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
+                win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
                 get_user(value, &win32->locals[reg - 16]);
         } else {
                 struct reg_window __user *win;
-                win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+                win = (struct reg_window __user *)(fp + STACK_BIAS);
                 get_user(value, &win->locals[reg - 16]);
         }
         return value;
@@ -135,19 +138,24 @@ static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
 
 static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
 {
+        unsigned long fp;
+
         if (reg < 16)
                 return &regs->u_regs[reg];
+
+        fp = regs->u_regs[UREG_FP];
+
         if (regs->tstate & TSTATE_PRIV) {
                 struct reg_window *win;
-                win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+                win = (struct reg_window *)(fp + STACK_BIAS);
                 return &win->locals[reg - 16];
-        } else if (test_thread_flag(TIF_32BIT)) {
+        } else if (!test_thread_64bit_stack(fp)) {
                 struct reg_window32 *win32;
-                win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
+                win32 = (struct reg_window32 *)((unsigned long)((u32)fp));
                 return (unsigned long *)&win32->locals[reg - 16];
         } else {
                 struct reg_window *win;
-                win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+                win = (struct reg_window *)(fp + STACK_BIAS);
                 return &win->locals[reg - 16];
         }
 }
@@ -392,13 +400,15 @@ int handle_popc(u32 insn, struct pt_regs *regs)
                 if (rd)
                         regs->u_regs[rd] = ret;
         } else {
-                if (test_thread_flag(TIF_32BIT)) {
+                unsigned long fp = regs->u_regs[UREG_FP];
+
+                if (!test_thread_64bit_stack(fp)) {
                         struct reg_window32 __user *win32;
-                        win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
+                        win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
                         put_user(ret, &win32->locals[rd - 16]);
                 } else {
                         struct reg_window __user *win;
-                        win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+                        win = (struct reg_window __user *)(fp + STACK_BIAS);
                         put_user(ret, &win->locals[rd - 16]);
                 }
         }
@@ -554,7 +564,7 @@ void handle_ld_nf(u32 insn, struct pt_regs *regs)
                 reg[0] = 0;
                 if ((insn & 0x780000) == 0x180000)
                         reg[1] = 0;
-        } else if (test_thread_flag(TIF_32BIT)) {
+        } else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) {
                 put_user(0, (int __user *) reg);
                 if ((insn & 0x780000) == 0x180000)
                         put_user(0, ((int __user *) reg) + 1);
diff --git a/arch/sparc/kernel/visemul.c b/arch/sparc/kernel/visemul.c
index 08e074b7eb6..c096c624ac4 100644
--- a/arch/sparc/kernel/visemul.c
+++ b/arch/sparc/kernel/visemul.c
@@ -149,21 +149,24 @@ static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
 
 static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
 {
-        unsigned long value;
+        unsigned long value, fp;
         
         if (reg < 16)
                 return (!reg ? 0 : regs->u_regs[reg]);
+
+        fp = regs->u_regs[UREG_FP];
+
         if (regs->tstate & TSTATE_PRIV) {
                 struct reg_window *win;
-                win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+                win = (struct reg_window *)(fp + STACK_BIAS);
                 value = win->locals[reg - 16];
-        } else if (test_thread_flag(TIF_32BIT)) {
+        } else if (!test_thread_64bit_stack(fp)) {
                 struct reg_window32 __user *win32;
-                win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
+                win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
                 get_user(value, &win32->locals[reg - 16]);
         } else {
                 struct reg_window __user *win;
-                win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+                win = (struct reg_window __user *)(fp + STACK_BIAS);
                 get_user(value, &win->locals[reg - 16]);
         }
         return value;
@@ -172,16 +175,18 @@ static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
 static inline unsigned long __user *__fetch_reg_addr_user(unsigned int reg,
                                                           struct pt_regs *regs)
 {
+        unsigned long fp = regs->u_regs[UREG_FP];
+
         BUG_ON(reg < 16);
         BUG_ON(regs->tstate & TSTATE_PRIV);
 
-        if (test_thread_flag(TIF_32BIT)) {
+        if (!test_thread_64bit_stack(fp)) {
                 struct reg_window32 __user *win32;
-                win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
+                win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
                 return (unsigned long __user *)&win32->locals[reg - 16];
         } else {
                 struct reg_window __user *win;
-                win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
+                win = (struct reg_window __user *)(fp + STACK_BIAS);
                 return &win->locals[reg - 16];
         }
 }
@@ -204,7 +209,7 @@ static void store_reg(struct pt_regs *regs, unsigned long val, unsigned long rd)
         } else {
                 unsigned long __user *rd_user = __fetch_reg_addr_user(rd, regs);
 
-                if (test_thread_flag(TIF_32BIT))
+                if (!test_thread_64bit_stack(regs->u_regs[UREG_FP]))
                         __put_user((u32)val, (u32 __user *)rd_user);
                 else
                         __put_user(val, rd_user);
diff --git a/arch/sparc/kernel/vmlinux.lds.S b/arch/sparc/kernel/vmlinux.lds.S
index 89c2c29f154..0bacceb1915 100644
--- a/arch/sparc/kernel/vmlinux.lds.S
+++ b/arch/sparc/kernel/vmlinux.lds.S
@@ -132,6 +132,11 @@ SECTIONS
                 *(.popc_6insn_patch)
                 __popc_6insn_patch_end = .;
         }
+        .pause_3insn_patch : {
+                __pause_3insn_patch = .;
+                *(.pause_3insn_patch)
+                __pause_3insn_patch_end = .;
+        }
         PERCPU_SECTION(SMP_CACHE_BYTES)
 
         . = ALIGN(PAGE_SIZE);
diff --git a/arch/sparc/kernel/winfixup.S b/arch/sparc/kernel/winfixup.S
index a6b0863c27d..1e67ce95836 100644
--- a/arch/sparc/kernel/winfixup.S
+++ b/arch/sparc/kernel/winfixup.S
@@ -43,6 +43,8 @@ spill_fixup_mna:
 spill_fixup_dax:
         TRAP_LOAD_THREAD_REG(%g6, %g1)
         ldx     [%g6 + TI_FLAGS], %g1
+        andcc   %sp, 0x1, %g0
+        movne   %icc, 0, %g1
         andcc   %g1, _TIF_32BIT, %g0
         ldub    [%g6 + TI_WSAVED], %g1
         sll     %g1, 3, %g3
diff --git a/arch/sparc/lib/atomic_64.S b/arch/sparc/lib/atomic_64.S
index 4d502da3de7..85c233d0a34 100644
--- a/arch/sparc/lib/atomic_64.S
+++ b/arch/sparc/lib/atomic_64.S
@@ -1,6 +1,6 @@
 /* atomic.S: These things are too big to do inline.
  *
- * Copyright (C) 1999, 2007 David S. Miller (davem@davemloft.net)
+ * Copyright (C) 1999, 2007 2012 David S. Miller (davem@davemloft.net)
  */
 
 #include <linux/linkage.h>
@@ -117,3 +117,17 @@ ENTRY(atomic64_sub_ret) /* %o0 = decrement, %o1 = atomic_ptr */
          sub    %g1, %o0, %o0
 2:      BACKOFF_SPIN(%o2, %o3, 1b)
 ENDPROC(atomic64_sub_ret)
+
+ENTRY(atomic64_dec_if_positive) /* %o0 = atomic_ptr */
+        BACKOFF_SETUP(%o2)
+1:      ldx     [%o0], %g1
+        brlez,pn %g1, 3f
+         sub    %g1, 1, %g7
+        casx    [%o0], %g1, %g7
+        cmp     %g1, %g7
+        bne,pn  %xcc, BACKOFF_LABEL(2f, 1b)
+         nop
+3:      retl
+         sub    %g1, 1, %o0
+2:      BACKOFF_SPIN(%o2, %o3, 1b)
+ENDPROC(atomic64_dec_if_positive)
diff --git a/arch/sparc/lib/ksyms.c b/arch/sparc/lib/ksyms.c
index ee31b884c61..0c4e35e522f 100644
--- a/arch/sparc/lib/ksyms.c
+++ b/arch/sparc/lib/ksyms.c
@@ -116,6 +116,7 @@ EXPORT_SYMBOL(atomic64_add);
 EXPORT_SYMBOL(atomic64_add_ret);
 EXPORT_SYMBOL(atomic64_sub);
 EXPORT_SYMBOL(atomic64_sub_ret);
+EXPORT_SYMBOL(atomic64_dec_if_positive);
 
 /* Atomic bit operations. */
 EXPORT_SYMBOL(test_and_set_bit);
diff --git a/arch/sparc/math-emu/math_64.c b/arch/sparc/math-emu/math_64.c
index 1704068da92..034aadbff03 100644
--- a/arch/sparc/math-emu/math_64.c
+++ b/arch/sparc/math-emu/math_64.c
@@ -320,7 +320,7 @@ int do_mathemu(struct pt_regs *regs, struct fpustate *f, bool illegal_insn_trap)
                                         XR = 0;
                                 else if (freg < 16)
                                         XR = regs->u_regs[freg];
-                                else if (test_thread_flag(TIF_32BIT)) {
+                                else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) {
                                         struct reg_window32 __user *win32;
                                         flushw_user ();
                                         win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
diff --git a/arch/unicore32/Kconfig b/arch/unicore32/Kconfig
index e5c5473e69c..c4fbb21e802 100644
--- a/arch/unicore32/Kconfig
+++ b/arch/unicore32/Kconfig
@@ -16,6 +16,8 @@ config UNICORE32
         select ARCH_WANT_FRAME_POINTERS
         select GENERIC_IOMAP
         select MODULES_USE_ELF_REL
+        select GENERIC_KERNEL_THREAD
+        select GENERIC_KERNEL_EXECVE
         help
           UniCore-32 is 32-bit Instruction Set Architecture,
           including a series of low-power-consumption RISC chip
@@ -64,6 +66,9 @@ config GENERIC_CALIBRATE_DELAY
 config ARCH_MAY_HAVE_PC_FDC
         bool
 
+config ZONE_DMA
+        def_bool y
+
 config NEED_DMA_MAP_STATE
        def_bool y
 
@@ -216,7 +221,7 @@ config PUV3_GPIO
         bool
         depends on !ARCH_FPGA
         select GENERIC_GPIO
-        select GPIO_SYSFS if EXPERIMENTAL
+        select GPIO_SYSFS
         default y
 
 if PUV3_NB0916
diff --git a/arch/unicore32/include/asm/Kbuild b/arch/unicore32/include/asm/Kbuild
index c910c9857e1..601e92f18af 100644
--- a/arch/unicore32/include/asm/Kbuild
+++ b/arch/unicore32/include/asm/Kbuild
@@ -1,4 +1,3 @@
-include include/asm-generic/Kbuild.asm
 
 generic-y += atomic.h
 generic-y += auxvec.h
diff --git a/arch/unicore32/include/asm/bug.h b/arch/unicore32/include/asm/bug.h
index b1ff8cadb08..93a56f3e234 100644
--- a/arch/unicore32/include/asm/bug.h
+++ b/arch/unicore32/include/asm/bug.h
@@ -19,9 +19,4 @@ extern void die(const char *msg, struct pt_regs *regs, int err);
 extern void uc32_notify_die(const char *str, struct pt_regs *regs,
                 struct siginfo *info, unsigned long err, unsigned long trap);
 
-extern asmlinkage void __backtrace(void);
-extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
-
-extern void __show_regs(struct pt_regs *);
-
 #endif /* __UNICORE_BUG_H__ */
diff --git a/arch/unicore32/include/asm/cmpxchg.h b/arch/unicore32/include/asm/cmpxchg.h
index df4d5acfd19..8e797ad4fa2 100644
--- a/arch/unicore32/include/asm/cmpxchg.h
+++ b/arch/unicore32/include/asm/cmpxchg.h
@@ -35,7 +35,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
                         : "memory", "cc");
                 break;
         default:
-                ret = __xchg_bad_pointer();
+                __xchg_bad_pointer();
         }
 
         return ret;
diff --git a/arch/unicore32/include/asm/kvm_para.h b/arch/unicore32/include/asm/kvm_para.h
deleted file mode 100644
index 14fab8f0b95..00000000000
--- a/arch/unicore32/include/asm/kvm_para.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/kvm_para.h>
diff --git a/arch/unicore32/include/asm/processor.h b/arch/unicore32/include/asm/processor.h
index 14382cb0965..4eaa4216766 100644
--- a/arch/unicore32/include/asm/processor.h
+++ b/arch/unicore32/include/asm/processor.h
@@ -72,11 +72,6 @@ unsigned long get_wchan(struct task_struct *p);
 
 #define cpu_relax()                     barrier()
 
-/*
- * Create a new kernel thread
- */
-extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
-
 #define task_pt_regs(p) \
         ((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1)
 
diff --git a/arch/unicore32/include/asm/ptrace.h b/arch/unicore32/include/asm/ptrace.h
index b9caf9b0997..726749dab52 100644
--- a/arch/unicore32/include/asm/ptrace.h
+++ b/arch/unicore32/include/asm/ptrace.h
@@ -12,80 +12,10 @@
 #ifndef __UNICORE_PTRACE_H__
 #define __UNICORE_PTRACE_H__
 
-#define PTRACE_GET_THREAD_AREA  22
-
-/*
- * PSR bits
- */
-#define USER_MODE       0x00000010
-#define REAL_MODE       0x00000011
-#define INTR_MODE       0x00000012
-#define PRIV_MODE       0x00000013
-#define ABRT_MODE       0x00000017
-#define EXTN_MODE       0x0000001b
-#define SUSR_MODE       0x0000001f
-#define MODE_MASK       0x0000001f
-#define PSR_R_BIT       0x00000040
-#define PSR_I_BIT       0x00000080
-#define PSR_V_BIT       0x10000000
-#define PSR_C_BIT       0x20000000
-#define PSR_Z_BIT       0x40000000
-#define PSR_S_BIT       0x80000000
-
-/*
- * Groups of PSR bits
- */
-#define PSR_f           0xff000000      /* Flags                */
-#define PSR_c           0x000000ff      /* Control              */
+#include <uapi/asm/ptrace.h>
 
 #ifndef __ASSEMBLY__
 
-/*
- * This struct defines the way the registers are stored on the
- * stack during a system call.  Note that sizeof(struct pt_regs)
- * has to be a multiple of 8.
- */
-struct pt_regs {
-        unsigned long uregs[34];
-};
-
-#define UCreg_asr               uregs[32]
-#define UCreg_pc                uregs[31]
-#define UCreg_lr                uregs[30]
-#define UCreg_sp                uregs[29]
-#define UCreg_ip                uregs[28]
-#define UCreg_fp                uregs[27]
-#define UCreg_26                uregs[26]
-#define UCreg_25                uregs[25]
-#define UCreg_24                uregs[24]
-#define UCreg_23                uregs[23]
-#define UCreg_22                uregs[22]
-#define UCreg_21                uregs[21]
-#define UCreg_20                uregs[20]
-#define UCreg_19                uregs[19]
-#define UCreg_18                uregs[18]
-#define UCreg_17                uregs[17]
-#define UCreg_16                uregs[16]
-#define UCreg_15                uregs[15]
-#define UCreg_14                uregs[14]
-#define UCreg_13                uregs[13]
-#define UCreg_12                uregs[12]
-#define UCreg_11                uregs[11]
-#define UCreg_10                uregs[10]
-#define UCreg_09                uregs[9]
-#define UCreg_08                uregs[8]
-#define UCreg_07                uregs[7]
-#define UCreg_06                uregs[6]
-#define UCreg_05                uregs[5]
-#define UCreg_04                uregs[4]
-#define UCreg_03                uregs[3]
-#define UCreg_02                uregs[2]
-#define UCreg_01                uregs[1]
-#define UCreg_00                uregs[0]
-#define UCreg_ORIG_00           uregs[33]
-
-#ifdef __KERNEL__
-
 #define user_mode(regs) \
         (processor_mode(regs) == USER_MODE)
 
@@ -125,9 +55,5 @@ static inline int valid_user_regs(struct pt_regs *regs)
 
 #define instruction_pointer(regs)       ((regs)->UCreg_pc)
 
-#endif /* __KERNEL__ */
-
 #endif /* __ASSEMBLY__ */
-
 #endif
-
diff --git a/arch/unicore32/include/uapi/asm/Kbuild b/arch/unicore32/include/uapi/asm/Kbuild
index baebb3da1d4..0514d7ad685 100644
--- a/arch/unicore32/include/uapi/asm/Kbuild
+++ b/arch/unicore32/include/uapi/asm/Kbuild
@@ -1,3 +1,10 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
+header-y += byteorder.h
+header-y += kvm_para.h
+header-y += ptrace.h
+header-y += sigcontext.h
+header-y += unistd.h
+
+generic-y += kvm_para.h
diff --git a/arch/unicore32/include/asm/byteorder.h b/arch/unicore32/include/uapi/asm/byteorder.h
index ebe1b3fef3e..ebe1b3fef3e 100644
--- a/arch/unicore32/include/asm/byteorder.h
+++ b/arch/unicore32/include/uapi/asm/byteorder.h
diff --git a/arch/unicore32/include/uapi/asm/ptrace.h b/arch/unicore32/include/uapi/asm/ptrace.h
new file mode 100644
index 00000000000..187aa2e98a5
--- /dev/null
+++ b/arch/unicore32/include/uapi/asm/ptrace.h
@@ -0,0 +1,90 @@
+/*
+ * linux/arch/unicore32/include/asm/ptrace.h
+ *
+ * Code specific to PKUnity SoC and UniCore ISA
+ *
+ * Copyright (C) 2001-2010 GUAN Xue-tao
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _UAPI__UNICORE_PTRACE_H__
+#define _UAPI__UNICORE_PTRACE_H__
+
+#define PTRACE_GET_THREAD_AREA  22
+
+/*
+ * PSR bits
+ */
+#define USER_MODE       0x00000010
+#define REAL_MODE       0x00000011
+#define INTR_MODE       0x00000012
+#define PRIV_MODE       0x00000013
+#define ABRT_MODE       0x00000017
+#define EXTN_MODE       0x0000001b
+#define SUSR_MODE       0x0000001f
+#define MODE_MASK       0x0000001f
+#define PSR_R_BIT       0x00000040
+#define PSR_I_BIT       0x00000080
+#define PSR_V_BIT       0x10000000
+#define PSR_C_BIT       0x20000000
+#define PSR_Z_BIT       0x40000000
+#define PSR_S_BIT       0x80000000
+
+/*
+ * Groups of PSR bits
+ */
+#define PSR_f           0xff000000      /* Flags                */
+#define PSR_c           0x000000ff      /* Control              */
+
+#ifndef __ASSEMBLY__
+
+/*
+ * This struct defines the way the registers are stored on the
+ * stack during a system call.  Note that sizeof(struct pt_regs)
+ * has to be a multiple of 8.
+ */
+struct pt_regs {
+        unsigned long uregs[34];
+};
+
+#define UCreg_asr               uregs[32]
+#define UCreg_pc                uregs[31]
+#define UCreg_lr                uregs[30]
+#define UCreg_sp                uregs[29]
+#define UCreg_ip                uregs[28]
+#define UCreg_fp                uregs[27]
+#define UCreg_26                uregs[26]
+#define UCreg_25                uregs[25]
+#define UCreg_24                uregs[24]
+#define UCreg_23                uregs[23]
+#define UCreg_22                uregs[22]
+#define UCreg_21                uregs[21]
+#define UCreg_20                uregs[20]
+#define UCreg_19                uregs[19]
+#define UCreg_18                uregs[18]
+#define UCreg_17                uregs[17]
+#define UCreg_16                uregs[16]
+#define UCreg_15                uregs[15]
+#define UCreg_14                uregs[14]
+#define UCreg_13                uregs[13]
+#define UCreg_12                uregs[12]
+#define UCreg_11                uregs[11]
+#define UCreg_10                uregs[10]
+#define UCreg_09                uregs[9]
+#define UCreg_08                uregs[8]
+#define UCreg_07                uregs[7]
+#define UCreg_06                uregs[6]
+#define UCreg_05                uregs[5]
+#define UCreg_04                uregs[4]
+#define UCreg_03                uregs[3]
+#define UCreg_02                uregs[2]
+#define UCreg_01                uregs[1]
+#define UCreg_00                uregs[0]
+#define UCreg_ORIG_00           uregs[33]
+
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _UAPI__UNICORE_PTRACE_H__ */
diff --git a/arch/unicore32/include/asm/sigcontext.h b/arch/unicore32/include/uapi/asm/sigcontext.h
index 6a2d7671c05..6a2d7671c05 100644
--- a/arch/unicore32/include/asm/sigcontext.h
+++ b/arch/unicore32/include/uapi/asm/sigcontext.h
diff --git a/arch/unicore32/include/asm/unistd.h b/arch/unicore32/include/uapi/asm/unistd.h
index 2abcf61c615..d18a3be89b3 100644
--- a/arch/unicore32/include/asm/unistd.h
+++ b/arch/unicore32/include/uapi/asm/unistd.h
@@ -12,3 +12,4 @@
 
 /* Use the standard ABI for syscalls. */
 #include <asm-generic/unistd.h>
+#define __ARCH_WANT_SYS_EXECVE
diff --git a/arch/unicore32/kernel/entry.S b/arch/unicore32/kernel/entry.S
index dcb87ab19dd..7049350c790 100644
--- a/arch/unicore32/kernel/entry.S
+++ b/arch/unicore32/kernel/entry.S
@@ -573,17 +573,16 @@ ENDPROC(ret_to_user)
  */
 ENTRY(ret_from_fork)
         b.l     schedule_tail
-        get_thread_info tsk
-        ldw     r1, [tsk+], #TI_FLAGS           @ check for syscall tracing
-        mov     why, #1
-        cand.a  r1, #_TIF_SYSCALL_TRACE         @ are we tracing syscalls?
-        beq     ret_slow_syscall
-        mov     r1, sp
-        mov     r0, #1                          @ trace exit [IP = 1]
-        b.l     syscall_trace
         b       ret_slow_syscall
 ENDPROC(ret_from_fork)
 
+ENTRY(ret_from_kernel_thread)
+        b.l     schedule_tail
+        mov     r0, r5
+        adr     lr, ret_slow_syscall
+        mov     pc, r4
+ENDPROC(ret_from_kernel_thread)
+
 /*=============================================================================
  * SWI handler
  *-----------------------------------------------------------------------------
@@ -669,11 +668,6 @@ __cr_alignment:
 #endif
         .ltorg
 
-ENTRY(sys_execve)
-                add     r3, sp, #S_OFF
-                b       __sys_execve
-ENDPROC(sys_execve)
-
 ENTRY(sys_clone)
                 add     ip, sp, #S_OFF
                 stw     ip, [sp+], #4
diff --git a/arch/unicore32/kernel/process.c b/arch/unicore32/kernel/process.c
index b008586dad7..a8fe265ce2c 100644
--- a/arch/unicore32/kernel/process.c
+++ b/arch/unicore32/kernel/process.c
@@ -258,6 +258,7 @@ void release_thread(struct task_struct *dead_task)
 }
 
 asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
+asmlinkage void ret_from_kernel_thread(void) __asm__("ret_from_kernel_thread");
 
 int
 copy_thread(unsigned long clone_flags, unsigned long stack_start,
@@ -266,17 +267,22 @@ copy_thread(unsigned long clone_flags, unsigned long stack_start,
         struct thread_info *thread = task_thread_info(p);
         struct pt_regs *childregs = task_pt_regs(p);
 
-        *childregs = *regs;
-        childregs->UCreg_00 = 0;
-        childregs->UCreg_sp = stack_start;
-
         memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));
         thread->cpu_context.sp = (unsigned long)childregs;
-        thread->cpu_context.pc = (unsigned long)ret_from_fork;
-
-        if (clone_flags & CLONE_SETTLS)
-                childregs->UCreg_16 = regs->UCreg_03;
+        if (unlikely(!regs)) {
+                thread->cpu_context.pc = (unsigned long)ret_from_kernel_thread;
+                thread->cpu_context.r4 = stack_start;
+                thread->cpu_context.r5 = stk_sz;
+                memset(childregs, 0, sizeof(struct pt_regs));
+        } else {
+                thread->cpu_context.pc = (unsigned long)ret_from_fork;
+                *childregs = *regs;
+                childregs->UCreg_00 = 0;
+                childregs->UCreg_sp = stack_start;
 
+                if (clone_flags & CLONE_SETTLS)
+                        childregs->UCreg_16 = regs->UCreg_03;
+        }
         return 0;
 }
 
@@ -305,42 +311,6 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fp)
 }
 EXPORT_SYMBOL(dump_fpu);
 
-/*
- * Shuffle the argument into the correct register before calling the
- * thread function.  r1 is the thread argument, r2 is the pointer to
- * the thread function, and r3 points to the exit function.
- */
-asm(".pushsection .text\n"
-"       .align\n"
-"       .type   kernel_thread_helper, #function\n"
-"kernel_thread_helper:\n"
-"       mov.a   asr, r7\n"
-"       mov     r0, r4\n"
-"       mov     lr, r6\n"
-"       mov     pc, r5\n"
-"       .size   kernel_thread_helper, . - kernel_thread_helper\n"
-"       .popsection");
-
-/*
- * Create a kernel thread.
- */
-pid_t kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
-{
-        struct pt_regs regs;
-
-        memset(&regs, 0, sizeof(regs));
-
-        regs.UCreg_04 = (unsigned long)arg;
-        regs.UCreg_05 = (unsigned long)fn;
-        regs.UCreg_06 = (unsigned long)do_exit;
-        regs.UCreg_07 = PRIV_MODE;
-        regs.UCreg_pc = (unsigned long)kernel_thread_helper;
-        regs.UCreg_asr = regs.UCreg_07 | PSR_I_BIT;
-
-        return do_fork(flags|CLONE_VM|CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
-}
-EXPORT_SYMBOL(kernel_thread);
-
 unsigned long get_wchan(struct task_struct *p)
 {
         struct stackframe frame;
diff --git a/arch/unicore32/kernel/setup.h b/arch/unicore32/kernel/setup.h
index f23955028a1..30f749da8f7 100644
--- a/arch/unicore32/kernel/setup.h
+++ b/arch/unicore32/kernel/setup.h
@@ -30,4 +30,10 @@ extern char __vectors_start[], __vectors_end[];
 extern void kernel_thread_helper(void);
 
 extern void __init early_signal_init(void);
+
+extern asmlinkage void __backtrace(void);
+extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
+
+extern void __show_regs(struct pt_regs *);
+
 #endif
diff --git a/arch/unicore32/kernel/sys.c b/arch/unicore32/kernel/sys.c
index fabdee96110..9680134b31f 100644
--- a/arch/unicore32/kernel/sys.c
+++ b/arch/unicore32/kernel/sys.c
@@ -42,69 +42,6 @@ asmlinkage long __sys_clone(unsigned long clone_flags, unsigned long newsp,
                         parent_tid, child_tid);
 }
 
-/* sys_execve() executes a new program.
- * This is called indirectly via a small wrapper
- */
-asmlinkage long __sys_execve(const char __user *filename,
-                          const char __user *const __user *argv,
-                          const char __user *const __user *envp,
-                          struct pt_regs *regs)
-{
-        int error;
-        struct filename *fn;
-
-        fn = getname(filename);
-        error = PTR_ERR(fn);
-        if (IS_ERR(fn))
-                goto out;
-        error = do_execve(fn->name, argv, envp, regs);
-        putname(fn);
-out:
-        return error;
-}
-
-int kernel_execve(const char *filename,
-                  const char *const argv[],
-                  const char *const envp[])
-{
-        struct pt_regs regs;
-        int ret;
-
-        memset(&regs, 0, sizeof(struct pt_regs));
-        ret = do_execve(filename,
-                        (const char __user *const __user *)argv,
-                        (const char __user *const __user *)envp, &regs);
-        if (ret < 0)
-                goto out;
-
-        /*
-         * Save argc to the register structure for userspace.
-         */
-        regs.UCreg_00 = ret;
-
-        /*
-         * We were successful.  We won't be returning to our caller, but
-         * instead to user space by manipulating the kernel stack.
-         */
-        asm("add        r0, %0, %1\n\t"
-                "mov    r1, %2\n\t"
-                "mov    r2, %3\n\t"
-                "mov    r22, #0\n\t"    /* not a syscall */
-                "mov    r23, %0\n\t"    /* thread structure */
-                "b.l    memmove\n\t"    /* copy regs to top of stack */
-                "mov    sp, r0\n\t"     /* reposition stack pointer */
-                "b      ret_to_user"
-                :
-                : "r" (current_thread_info()),
-                  "Ir" (THREAD_START_SP - sizeof(regs)),
-                  "r" (&regs),
-                  "Ir" (sizeof(regs))
-                : "r0", "r1", "r2", "r3", "ip", "lr", "memory");
-
- out:
-        return ret;
-}
-
 /* Note: used by the compat code even in 64-bit Linux. */
 SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len,
                 unsigned long, prot, unsigned long, flags,
diff --git a/arch/unicore32/mm/fault.c b/arch/unicore32/mm/fault.c
index 2eeb9c04cab..f9b5c10bcce 100644
--- a/arch/unicore32/mm/fault.c
+++ b/arch/unicore32/mm/fault.c
@@ -168,7 +168,7 @@ static inline bool access_error(unsigned int fsr, struct vm_area_struct *vma)
 }
 
 static int __do_pf(struct mm_struct *mm, unsigned long addr, unsigned int fsr,
-                struct task_struct *tsk)
+                unsigned int flags, struct task_struct *tsk)
 {
         struct vm_area_struct *vma;
         int fault;
@@ -194,14 +194,7 @@ good_area:
          * If for any reason at all we couldn't handle the fault, make
          * sure we exit gracefully rather than endlessly redo the fault.
          */
-        fault = handle_mm_fault(mm, vma, addr & PAGE_MASK,
-                            (!(fsr ^ 0x12)) ? FAULT_FLAG_WRITE : 0);
-        if (unlikely(fault & VM_FAULT_ERROR))
-                return fault;
-        if (fault & VM_FAULT_MAJOR)
-                tsk->maj_flt++;
-        else
-                tsk->min_flt++;
+        fault = handle_mm_fault(mm, vma, addr & PAGE_MASK, flags);
         return fault;
 
 check_stack:
@@ -216,6 +209,8 @@ static int do_pf(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
         struct task_struct *tsk;
         struct mm_struct *mm;
         int fault, sig, code;
+        unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
+                                 ((!(fsr ^ 0x12)) ? FAULT_FLAG_WRITE : 0);
 
         tsk = current;
         mm = tsk->mm;
@@ -236,6 +231,7 @@ static int do_pf(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
                 if (!user_mode(regs)
                     && !search_exception_tables(regs->UCreg_pc))
                         goto no_context;
+retry:
                 down_read(&mm->mmap_sem);
         } else {
                 /*
@@ -251,7 +247,28 @@ static int do_pf(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
 #endif
         }
 
-        fault = __do_pf(mm, addr, fsr, tsk);
+        fault = __do_pf(mm, addr, fsr, flags, tsk);
+
+        /* If we need to retry but a fatal signal is pending, handle the
+         * signal first. We do not need to release the mmap_sem because
+         * it would already be released in __lock_page_or_retry in
+         * mm/filemap.c. */
+        if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
+                return 0;
+
+        if (!(fault & VM_FAULT_ERROR) && (flags & FAULT_FLAG_ALLOW_RETRY)) {
+                if (fault & VM_FAULT_MAJOR)
+                        tsk->maj_flt++;
+                else
+                        tsk->min_flt++;
+                if (fault & VM_FAULT_RETRY) {
+                        /* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
+                        * of starvation. */
+                        flags &= ~FAULT_FLAG_ALLOW_RETRY;
+                        goto retry;
+                }
+        }
+
         up_read(&mm->mmap_sem);
 
         /*
diff --git a/arch/x86/include/asm/xen/hypercall.h b/arch/x86/include/asm/xen/hypercall.h
index 59c226d120c..c20d1ce62dc 100644
--- a/arch/x86/include/asm/xen/hypercall.h
+++ b/arch/x86/include/asm/xen/hypercall.h
@@ -359,18 +359,14 @@ HYPERVISOR_update_va_mapping(unsigned long va, pte_t new_val,
                 return _hypercall4(int, update_va_mapping, va,
                                    new_val.pte, new_val.pte >> 32, flags);
 }
+extern int __must_check xen_event_channel_op_compat(int, void *);
 
 static inline int
 HYPERVISOR_event_channel_op(int cmd, void *arg)
 {
         int rc = _hypercall2(int, event_channel_op, cmd, arg);
-        if (unlikely(rc == -ENOSYS)) {
-                struct evtchn_op op;
-                op.cmd = cmd;
-                memcpy(&op.u, arg, sizeof(op.u));
-                rc = _hypercall1(int, event_channel_op_compat, &op);
-                memcpy(arg, &op.u, sizeof(op.u));
-        }
+        if (unlikely(rc == -ENOSYS))
+                rc = xen_event_channel_op_compat(cmd, arg);
         return rc;
 }
 
@@ -386,17 +382,14 @@ HYPERVISOR_console_io(int cmd, int count, char *str)
         return _hypercall3(int, console_io, cmd, count, str);
 }
 
+extern int __must_check HYPERVISOR_physdev_op_compat(int, void *);
+
 static inline int
 HYPERVISOR_physdev_op(int cmd, void *arg)
 {
         int rc = _hypercall2(int, physdev_op, cmd, arg);
-        if (unlikely(rc == -ENOSYS)) {
-                struct physdev_op op;
-                op.cmd = cmd;
-                memcpy(&op.u, arg, sizeof(op.u));
-                rc = _hypercall1(int, physdev_op_compat, &op);
-                memcpy(arg, &op.u, sizeof(op.u));
-        }
+        if (unlikely(rc == -ENOSYS))
+                rc = HYPERVISOR_physdev_op_compat(cmd, arg);
         return rc;
 }
 
diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
index a10e4601685..58fc5148882 100644
--- a/arch/x86/kvm/cpuid.h
+++ b/arch/x86/kvm/cpuid.h
@@ -24,6 +24,9 @@ static inline bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 {
         struct kvm_cpuid_entry2 *best;
 
+        if (!static_cpu_has(X86_FEATURE_XSAVE))
+                return 0;
+
         best = kvm_find_cpuid_entry(vcpu, 1, 0);
         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 }
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index ad6b1dd06f8..f85815945fc 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -6549,19 +6549,22 @@ static void vmx_cpuid_update(struct kvm_vcpu *vcpu)
                 }
         }
 
-        exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
         /* Exposing INVPCID only when PCID is exposed */
         best = kvm_find_cpuid_entry(vcpu, 0x7, 0);
         if (vmx_invpcid_supported() &&
             best && (best->ebx & bit(X86_FEATURE_INVPCID)) &&
             guest_cpuid_has_pcid(vcpu)) {
+                exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
                 exec_control |= SECONDARY_EXEC_ENABLE_INVPCID;
                 vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
                              exec_control);
         } else {
-                exec_control &= ~SECONDARY_EXEC_ENABLE_INVPCID;
-                vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
-                             exec_control);
+                if (cpu_has_secondary_exec_ctrls()) {
+                        exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
+                        exec_control &= ~SECONDARY_EXEC_ENABLE_INVPCID;
+                        vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
+                                     exec_control);
+                }
                 if (best)
                         best->ebx &= ~bit(X86_FEATURE_INVPCID);
         }
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 224a7e78cb6..4f7641756be 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -5781,6 +5781,9 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
         int pending_vec, max_bits, idx;
         struct desc_ptr dt;
 
+        if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
+                return -EINVAL;
+
         dt.size = sregs->idt.limit;
         dt.address = sregs->idt.base;
         kvm_x86_ops->set_idt(vcpu, &dt);