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-rw-r--r--arch/alpha/kernel/irq.c8
-rw-r--r--arch/alpha/kernel/irq_alpha.c2
-rw-r--r--arch/alpha/kernel/irq_i8259.c2
-rw-r--r--arch/alpha/kernel/irq_pyxis.c2
-rw-r--r--arch/alpha/kernel/irq_srm.c2
-rw-r--r--arch/alpha/kernel/setup.c2
-rw-r--r--arch/alpha/kernel/sys_alcor.c2
-rw-r--r--arch/alpha/kernel/sys_cabriolet.c2
-rw-r--r--arch/alpha/kernel/sys_dp264.c2
-rw-r--r--arch/alpha/kernel/sys_eb64p.c2
-rw-r--r--arch/alpha/kernel/sys_eiger.c2
-rw-r--r--arch/alpha/kernel/sys_jensen.c10
-rw-r--r--arch/alpha/kernel/sys_marvel.c6
-rw-r--r--arch/alpha/kernel/sys_mikasa.c2
-rw-r--r--arch/alpha/kernel/sys_noritake.c2
-rw-r--r--arch/alpha/kernel/sys_rawhide.c2
-rw-r--r--arch/alpha/kernel/sys_rx164.c2
-rw-r--r--arch/alpha/kernel/sys_sable.c2
-rw-r--r--arch/alpha/kernel/sys_takara.c2
-rw-r--r--arch/alpha/kernel/sys_titan.c2
-rw-r--r--arch/alpha/kernel/sys_wildfire.c6
-rw-r--r--arch/arm/Kconfig9
-rw-r--r--arch/arm/kernel/Makefile3
-rw-r--r--arch/arm/kernel/armksyms.c13
-rw-r--r--arch/arm/kernel/asm-offsets.c3
-rw-r--r--arch/arm/kernel/crunch-bits.S305
-rw-r--r--arch/arm/kernel/crunch.c83
-rw-r--r--arch/arm/kernel/entry-armv.S6
-rw-r--r--arch/arm/kernel/ptrace.c36
-rw-r--r--arch/arm/kernel/setup.c2
-rw-r--r--arch/arm/kernel/signal.c39
-rw-r--r--arch/arm/kernel/vmlinux.lds.S8
-rw-r--r--arch/arm/lib/Makefile13
-rw-r--r--arch/arm/lib/backtrace.S5
-rw-r--r--arch/arm/lib/clear_user.S4
-rw-r--r--arch/arm/lib/copy_from_user.S4
-rw-r--r--arch/arm/lib/copy_to_user.S4
-rw-r--r--arch/arm/lib/strncpy_from_user.S2
-rw-r--r--arch/arm/lib/strnlen_user.S4
-rw-r--r--arch/arm/lib/uaccess.S8
-rw-r--r--arch/arm/mach-ep93xx/Kconfig11
-rw-r--r--arch/arm/mach-ep93xx/Makefile1
-rw-r--r--arch/arm/mach-ep93xx/edb9315.c62
-rw-r--r--arch/arm/mach-ep93xx/gesbc9312.c2
-rw-r--r--arch/arm/mach-ep93xx/ts72xx.c2
-rw-r--r--arch/arm/mach-ixp23xx/espresso.c2
-rw-r--r--arch/arm/mach-ixp23xx/ixdp2351.c2
-rw-r--r--arch/arm/mach-ixp23xx/roadrunner.c2
-rw-r--r--arch/arm/mach-pxa/irq.c4
-rw-r--r--arch/arm/mach-s3c2410/s3c244x.c1
-rw-r--r--arch/arm/mm/Kconfig67
-rw-r--r--arch/arm/mm/Makefile10
-rw-r--r--arch/arm/mm/init.c2
-rw-r--r--arch/arm/mm/iomap.c55
-rw-r--r--arch/arm/mm/ioremap.c47
-rw-r--r--arch/arm/mm/nommu.c39
-rw-r--r--arch/arm/mm/proc-arm1020.S9
-rw-r--r--arch/arm/mm/proc-arm1020e.S9
-rw-r--r--arch/arm/mm/proc-arm1022.S9
-rw-r--r--arch/arm/mm/proc-arm1026.S9
-rw-r--r--arch/arm/mm/proc-arm6_7.S15
-rw-r--r--arch/arm/mm/proc-arm720.S12
-rw-r--r--arch/arm/mm/proc-arm920.S9
-rw-r--r--arch/arm/mm/proc-arm922.S9
-rw-r--r--arch/arm/mm/proc-arm925.S10
-rw-r--r--arch/arm/mm/proc-arm926.S9
-rw-r--r--arch/arm/mm/proc-sa110.S11
-rw-r--r--arch/arm/mm/proc-sa1100.S11
-rw-r--r--arch/arm/mm/proc-v6.S7
-rw-r--r--arch/cris/Kconfig4
-rw-r--r--arch/cris/arch-v10/kernel/irq.c2
-rw-r--r--arch/cris/arch-v32/kernel/irq.c2
-rw-r--r--arch/cris/kernel/irq.c2
-rw-r--r--arch/i386/Kconfig18
-rw-r--r--arch/i386/kernel/asm-offsets.c4
-rw-r--r--arch/i386/kernel/cpu/amd.c6
-rw-r--r--arch/i386/kernel/cpu/common.c25
-rw-r--r--arch/i386/kernel/cpu/intel_cacheinfo.c16
-rw-r--r--arch/i386/kernel/cpu/proc.c8
-rw-r--r--arch/i386/kernel/cpuid.c2
-rw-r--r--arch/i386/kernel/entry.S22
-rw-r--r--arch/i386/kernel/i8259.c6
-rw-r--r--arch/i386/kernel/io_apic.c27
-rw-r--r--arch/i386/kernel/irq.c27
-rw-r--r--arch/i386/kernel/msr.c2
-rw-r--r--arch/i386/kernel/scx200.c66
-rw-r--r--arch/i386/kernel/signal.c4
-rw-r--r--arch/i386/kernel/smpboot.c37
-rw-r--r--arch/i386/kernel/sysenter.c126
-rw-r--r--arch/i386/kernel/topology.c28
-rw-r--r--arch/i386/kernel/vsyscall-sysenter.S4
-rw-r--r--arch/i386/kernel/vsyscall.lds.S4
-rw-r--r--arch/i386/mach-visws/setup.c8
-rw-r--r--arch/i386/mach-visws/visws_apic.c12
-rw-r--r--arch/i386/mach-voyager/setup.c5
-rw-r--r--arch/i386/mach-voyager/voyager_smp.c4
-rw-r--r--arch/i386/mm/init.c5
-rw-r--r--arch/i386/mm/pageattr.c4
-rw-r--r--arch/ia64/Kconfig11
-rw-r--r--arch/ia64/configs/tiger_defconfig2
-rw-r--r--arch/ia64/hp/sim/hpsim_irq.c6
-rw-r--r--arch/ia64/kernel/iosapic.c24
-rw-r--r--arch/ia64/kernel/irq.c24
-rw-r--r--arch/ia64/kernel/irq_ia64.c4
-rw-r--r--arch/ia64/kernel/irq_lsapic.c10
-rw-r--r--arch/ia64/kernel/mca.c2
-rw-r--r--arch/ia64/kernel/palinfo.c6
-rw-r--r--arch/ia64/kernel/perfmon.c4
-rw-r--r--arch/ia64/kernel/salinfo.c6
-rw-r--r--arch/ia64/kernel/smpboot.c8
-rw-r--r--arch/ia64/kernel/topology.c32
-rw-r--r--arch/ia64/mm/discontig.c57
-rw-r--r--arch/ia64/mm/init.c5
-rw-r--r--arch/ia64/sn/kernel/irq.c6
-rw-r--r--arch/ia64/sn/kernel/setup.c12
-rw-r--r--arch/ia64/sn/pci/tioca_provider.c2
-rw-r--r--arch/m32r/kernel/irq.c2
-rw-r--r--arch/m32r/kernel/setup.c2
-rw-r--r--arch/m32r/kernel/setup_m32104ut.c8
-rw-r--r--arch/m32r/kernel/setup_m32700ut.c28
-rw-r--r--arch/m32r/kernel/setup_mappi.c16
-rw-r--r--arch/m32r/kernel/setup_mappi2.c20
-rw-r--r--arch/m32r/kernel/setup_mappi3.c20
-rw-r--r--arch/m32r/kernel/setup_oaks32r.c12
-rw-r--r--arch/m32r/kernel/setup_opsput.c28
-rw-r--r--arch/m32r/kernel/setup_usrv.c18
-rw-r--r--arch/m68knommu/Kconfig53
-rw-r--r--arch/m68knommu/Makefile24
-rw-r--r--arch/m68knommu/defconfig207
-rw-r--r--arch/m68knommu/kernel/vmlinux.lds.S66
-rw-r--r--arch/m68knommu/platform/68328/Makefile1
-rw-r--r--arch/m68knommu/platform/68328/head-rom.S18
-rw-r--r--arch/m68knommu/platform/68328/ints.c20
-rw-r--r--arch/m68knommu/platform/68328/romvec.S37
-rw-r--r--arch/m68knommu/platform/68360/config.c14
-rw-r--r--arch/m68knommu/platform/68360/head-ram.S19
-rw-r--r--arch/m68knommu/platform/68360/head-rom.S17
-rw-r--r--arch/m68knommu/platform/68360/ints.c1
-rw-r--r--arch/m68knommu/platform/68EZ328/config.c14
-rw-r--r--arch/m68knommu/platform/68VZ328/config.c14
-rw-r--r--arch/mips/Kconfig5
-rw-r--r--arch/mips/au1000/common/irq.c20
-rw-r--r--arch/mips/au1000/pb1200/irqmap.c2
-rw-r--r--arch/mips/ddb5xxx/ddb5477/irq_5477.c2
-rw-r--r--arch/mips/dec/ioasic-irq.c4
-rw-r--r--arch/mips/dec/kn02-irq.c2
-rw-r--r--arch/mips/gt64120/ev64120/irq.c2
-rw-r--r--arch/mips/ite-boards/generic/irq.c4
-rw-r--r--arch/mips/jazz/irq.c2
-rw-r--r--arch/mips/jmr3927/rbhma3100/irq.c2
-rw-r--r--arch/mips/kernel/i8259.c4
-rw-r--r--arch/mips/kernel/irq-msc01.c4
-rw-r--r--arch/mips/kernel/irq-mv6434x.c2
-rw-r--r--arch/mips/kernel/irq-rm7000.c2
-rw-r--r--arch/mips/kernel/irq-rm9000.c4
-rw-r--r--arch/mips/kernel/irq.c4
-rw-r--r--arch/mips/kernel/irq_cpu.c4
-rw-r--r--arch/mips/kernel/smp.c2
-rw-r--r--arch/mips/kernel/smtc.c4
-rw-r--r--arch/mips/lasat/interrupt.c2
-rw-r--r--arch/mips/mips-boards/atlas/atlas_int.c2
-rw-r--r--arch/mips/momentum/ocelot_c/cpci-irq.c2
-rw-r--r--arch/mips/momentum/ocelot_c/uart-irq.c4
-rw-r--r--arch/mips/philips/pnx8550/common/int.c10
-rw-r--r--arch/mips/sgi-ip22/ip22-eisa.c4
-rw-r--r--arch/mips/sgi-ip22/ip22-int.c2
-rw-r--r--arch/mips/sgi-ip27/ip27-irq.c2
-rw-r--r--arch/mips/sgi-ip32/ip32-irq.c2
-rw-r--r--arch/mips/sibyte/bcm1480/irq.c4
-rw-r--r--arch/mips/sibyte/sb1250/irq.c4
-rw-r--r--arch/mips/sni/irq.c2
-rw-r--r--arch/mips/tx4927/common/tx4927_irq.c4
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c14
-rw-r--r--arch/mips/tx4938/common/irq.c4
-rw-r--r--arch/mips/tx4938/toshiba_rbtx4938/irq.c2
-rw-r--r--arch/mips/vr41xx/common/icu.c4
-rw-r--r--arch/mips/vr41xx/common/irq.c4
-rw-r--r--arch/mips/vr41xx/common/vrc4173.c2
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/irq.c2
-rw-r--r--arch/parisc/Kconfig4
-rw-r--r--arch/parisc/kernel/irq.c29
-rw-r--r--arch/parisc/kernel/topology.c3
-rw-r--r--arch/powerpc/Kconfig7
-rw-r--r--arch/powerpc/kernel/crash.c6
-rw-r--r--arch/powerpc/kernel/irq.c10
-rw-r--r--arch/powerpc/kernel/setup_32.c2
-rw-r--r--arch/powerpc/kernel/sysfs.c31
-rw-r--r--arch/powerpc/mm/init_64.c3
-rw-r--r--arch/powerpc/mm/mem.c11
-rw-r--r--arch/powerpc/mm/numa.c11
-rw-r--r--arch/powerpc/platforms/cell/interrupt.c4
-rw-r--r--arch/powerpc/platforms/cell/spider-pic.c4
-rw-r--r--arch/powerpc/platforms/cell/spufs/switch.c2
-rw-r--r--arch/powerpc/platforms/iseries/irq.c6
-rw-r--r--arch/powerpc/platforms/powermac/backlight.c14
-rw-r--r--arch/powerpc/platforms/powermac/pfunc_core.c2
-rw-r--r--arch/powerpc/platforms/powermac/pic.c4
-rw-r--r--arch/powerpc/platforms/pseries/eeh_event.c2
-rw-r--r--arch/powerpc/platforms/pseries/xics.c12
-rw-r--r--arch/powerpc/sysdev/i8259.c2
-rw-r--r--arch/powerpc/sysdev/ipic.c2
-rw-r--r--arch/powerpc/sysdev/mmio_nvram.c2
-rw-r--r--arch/powerpc/sysdev/mpic.c10
-rw-r--r--arch/ppc/8xx_io/commproc.c2
-rw-r--r--arch/ppc/kernel/setup.c2
-rw-r--r--arch/ppc/platforms/apus_setup.c4
-rw-r--r--arch/ppc/platforms/sbc82xx.c2
-rw-r--r--arch/ppc/syslib/cpc700_pic.c4
-rw-r--r--arch/ppc/syslib/cpm2_pic.c2
-rw-r--r--arch/ppc/syslib/gt64260_pic.c2
-rw-r--r--arch/ppc/syslib/m82xx_pci.c2
-rw-r--r--arch/ppc/syslib/m8xx_setup.c4
-rw-r--r--arch/ppc/syslib/mpc52xx_pic.c4
-rw-r--r--arch/ppc/syslib/mv64360_pic.c2
-rw-r--r--arch/ppc/syslib/open_pic.c8
-rw-r--r--arch/ppc/syslib/open_pic2.c2
-rw-r--r--arch/ppc/syslib/ppc403_pic.c2
-rw-r--r--arch/ppc/syslib/ppc4xx_pic.c2
-rw-r--r--arch/ppc/syslib/xilinx_pic.c2
-rw-r--r--arch/s390/appldata/appldata_base.c2
-rw-r--r--arch/s390/kernel/smp.c2
-rw-r--r--arch/sh/boards/adx/irq_maskreg.c2
-rw-r--r--arch/sh/boards/bigsur/irq.c4
-rw-r--r--arch/sh/boards/cqreek/irq.c4
-rw-r--r--arch/sh/boards/dreamcast/setup.c2
-rw-r--r--arch/sh/boards/ec3104/setup.c2
-rw-r--r--arch/sh/boards/harp/irq.c2
-rw-r--r--arch/sh/boards/mpc1211/setup.c2
-rw-r--r--arch/sh/boards/overdrive/irq.c2
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/irq.c2
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/irq.c2
-rw-r--r--arch/sh/boards/renesas/systemh/irq.c2
-rw-r--r--arch/sh/boards/se/73180/irq.c2
-rw-r--r--arch/sh/boards/superh/microdev/irq.c2
-rw-r--r--arch/sh/cchips/hd6446x/hd64461/setup.c2
-rw-r--r--arch/sh/cchips/hd6446x/hd64465/setup.c2
-rw-r--r--arch/sh/cchips/voyagergx/irq.c2
-rw-r--r--arch/sh/kernel/cpu/irq/imask.c2
-rw-r--r--arch/sh/kernel/cpu/irq/intc2.c2
-rw-r--r--arch/sh/kernel/cpu/irq/ipr.c2
-rw-r--r--arch/sh/kernel/cpu/irq/pint.c2
-rw-r--r--arch/sh/kernel/irq.c2
-rw-r--r--arch/sh/kernel/setup.c2
-rw-r--r--arch/sh64/kernel/irq.c2
-rw-r--r--arch/sh64/kernel/irq_intc.c4
-rw-r--r--arch/sh64/kernel/setup.c2
-rw-r--r--arch/sh64/mach-cayman/irq.c2
-rw-r--r--arch/sparc/kernel/setup.c2
-rw-r--r--arch/sparc64/kernel/irq.c12
-rw-r--r--arch/sparc64/kernel/setup.c2
-rw-r--r--arch/sparc64/mm/init.c3
-rw-r--r--arch/um/kernel/irq.c6
-rw-r--r--arch/v850/kernel/irq.c6
-rw-r--r--arch/x86_64/Kconfig2
-rw-r--r--arch/x86_64/kernel/entry.S2
-rw-r--r--arch/x86_64/kernel/i8259.c6
-rw-r--r--arch/x86_64/kernel/io_apic.c25
-rw-r--r--arch/x86_64/kernel/irq.c18
-rw-r--r--arch/x86_64/kernel/mce.c4
-rw-r--r--arch/x86_64/kernel/nmi.c2
-rw-r--r--arch/x86_64/kernel/smp.c4
-rw-r--r--arch/x86_64/kernel/smpboot.c8
-rw-r--r--arch/x86_64/mm/init.c73
-rw-r--r--arch/xtensa/kernel/irq.c4
-rw-r--r--arch/xtensa/kernel/time.c2
-rw-r--r--arch/xtensa/kernel/traps.c2
266 files changed, 2032 insertions, 1006 deletions
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c
index da677f829f7..63af36cf7f6 100644
--- a/arch/alpha/kernel/irq.c
+++ b/arch/alpha/kernel/irq.c
@@ -49,15 +49,15 @@ select_smp_affinity(unsigned int irq)
49 static int last_cpu; 49 static int last_cpu;
50 int cpu = last_cpu + 1; 50 int cpu = last_cpu + 1;
51 51
52 if (!irq_desc[irq].handler->set_affinity || irq_user_affinity[irq]) 52 if (!irq_desc[irq].chip->set_affinity || irq_user_affinity[irq])
53 return 1; 53 return 1;
54 54
55 while (!cpu_possible(cpu)) 55 while (!cpu_possible(cpu))
56 cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0); 56 cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0);
57 last_cpu = cpu; 57 last_cpu = cpu;
58 58
59 irq_affinity[irq] = cpumask_of_cpu(cpu); 59 irq_desc[irq].affinity = cpumask_of_cpu(cpu);
60 irq_desc[irq].handler->set_affinity(irq, cpumask_of_cpu(cpu)); 60 irq_desc[irq].chip->set_affinity(irq, cpumask_of_cpu(cpu));
61 return 0; 61 return 0;
62} 62}
63#endif /* CONFIG_SMP */ 63#endif /* CONFIG_SMP */
@@ -93,7 +93,7 @@ show_interrupts(struct seq_file *p, void *v)
93 for_each_online_cpu(j) 93 for_each_online_cpu(j)
94 seq_printf(p, "%10u ", kstat_cpu(j).irqs[irq]); 94 seq_printf(p, "%10u ", kstat_cpu(j).irqs[irq]);
95#endif 95#endif
96 seq_printf(p, " %14s", irq_desc[irq].handler->typename); 96 seq_printf(p, " %14s", irq_desc[irq].chip->typename);
97 seq_printf(p, " %c%s", 97 seq_printf(p, " %c%s",
98 (action->flags & SA_INTERRUPT)?'+':' ', 98 (action->flags & SA_INTERRUPT)?'+':' ',
99 action->name); 99 action->name);
diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c
index 9d34ce26e5e..f20f2dff9c4 100644
--- a/arch/alpha/kernel/irq_alpha.c
+++ b/arch/alpha/kernel/irq_alpha.c
@@ -233,7 +233,7 @@ void __init
233init_rtc_irq(void) 233init_rtc_irq(void)
234{ 234{
235 irq_desc[RTC_IRQ].status = IRQ_DISABLED; 235 irq_desc[RTC_IRQ].status = IRQ_DISABLED;
236 irq_desc[RTC_IRQ].handler = &rtc_irq_type; 236 irq_desc[RTC_IRQ].chip = &rtc_irq_type;
237 setup_irq(RTC_IRQ, &timer_irqaction); 237 setup_irq(RTC_IRQ, &timer_irqaction);
238} 238}
239 239
diff --git a/arch/alpha/kernel/irq_i8259.c b/arch/alpha/kernel/irq_i8259.c
index b188683b83f..ac893bd4803 100644
--- a/arch/alpha/kernel/irq_i8259.c
+++ b/arch/alpha/kernel/irq_i8259.c
@@ -109,7 +109,7 @@ init_i8259a_irqs(void)
109 109
110 for (i = 0; i < 16; i++) { 110 for (i = 0; i < 16; i++) {
111 irq_desc[i].status = IRQ_DISABLED; 111 irq_desc[i].status = IRQ_DISABLED;
112 irq_desc[i].handler = &i8259a_irq_type; 112 irq_desc[i].chip = &i8259a_irq_type;
113 } 113 }
114 114
115 setup_irq(2, &cascade); 115 setup_irq(2, &cascade);
diff --git a/arch/alpha/kernel/irq_pyxis.c b/arch/alpha/kernel/irq_pyxis.c
index 146a20b9e3d..3b581415bab 100644
--- a/arch/alpha/kernel/irq_pyxis.c
+++ b/arch/alpha/kernel/irq_pyxis.c
@@ -120,7 +120,7 @@ init_pyxis_irqs(unsigned long ignore_mask)
120 if ((ignore_mask >> i) & 1) 120 if ((ignore_mask >> i) & 1)
121 continue; 121 continue;
122 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; 122 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
123 irq_desc[i].handler = &pyxis_irq_type; 123 irq_desc[i].chip = &pyxis_irq_type;
124 } 124 }
125 125
126 setup_irq(16+7, &isa_cascade_irqaction); 126 setup_irq(16+7, &isa_cascade_irqaction);
diff --git a/arch/alpha/kernel/irq_srm.c b/arch/alpha/kernel/irq_srm.c
index 0a87e466918..8e4d121f84c 100644
--- a/arch/alpha/kernel/irq_srm.c
+++ b/arch/alpha/kernel/irq_srm.c
@@ -67,7 +67,7 @@ init_srm_irqs(long max, unsigned long ignore_mask)
67 if (i < 64 && ((ignore_mask >> i) & 1)) 67 if (i < 64 && ((ignore_mask >> i) & 1))
68 continue; 68 continue;
69 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; 69 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
70 irq_desc[i].handler = &srm_irq_type; 70 irq_desc[i].chip = &srm_irq_type;
71 } 71 }
72} 72}
73 73
diff --git a/arch/alpha/kernel/setup.c b/arch/alpha/kernel/setup.c
index 558b8336855..254c507a608 100644
--- a/arch/alpha/kernel/setup.c
+++ b/arch/alpha/kernel/setup.c
@@ -481,7 +481,7 @@ register_cpus(void)
481 struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL); 481 struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL);
482 if (!p) 482 if (!p)
483 return -ENOMEM; 483 return -ENOMEM;
484 register_cpu(p, i, NULL); 484 register_cpu(p, i);
485 } 485 }
486 return 0; 486 return 0;
487} 487}
diff --git a/arch/alpha/kernel/sys_alcor.c b/arch/alpha/kernel/sys_alcor.c
index d7f0e97fe56..1a1a2c7a3d9 100644
--- a/arch/alpha/kernel/sys_alcor.c
+++ b/arch/alpha/kernel/sys_alcor.c
@@ -144,7 +144,7 @@ alcor_init_irq(void)
144 if (i >= 16+20 && i <= 16+30) 144 if (i >= 16+20 && i <= 16+30)
145 continue; 145 continue;
146 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; 146 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
147 irq_desc[i].handler = &alcor_irq_type; 147 irq_desc[i].chip = &alcor_irq_type;
148 } 148 }
149 i8259a_irq_type.ack = alcor_isa_mask_and_ack_irq; 149 i8259a_irq_type.ack = alcor_isa_mask_and_ack_irq;
150 150
diff --git a/arch/alpha/kernel/sys_cabriolet.c b/arch/alpha/kernel/sys_cabriolet.c
index 8e3374d34c9..8c9e443d93a 100644
--- a/arch/alpha/kernel/sys_cabriolet.c
+++ b/arch/alpha/kernel/sys_cabriolet.c
@@ -124,7 +124,7 @@ common_init_irq(void (*srm_dev_int)(unsigned long v, struct pt_regs *r))
124 124
125 for (i = 16; i < 35; ++i) { 125 for (i = 16; i < 35; ++i) {
126 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; 126 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
127 irq_desc[i].handler = &cabriolet_irq_type; 127 irq_desc[i].chip = &cabriolet_irq_type;
128 } 128 }
129 } 129 }
130 130
diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c
index d5da6b1b28e..b28c8f1c6e1 100644
--- a/arch/alpha/kernel/sys_dp264.c
+++ b/arch/alpha/kernel/sys_dp264.c
@@ -300,7 +300,7 @@ init_tsunami_irqs(struct hw_interrupt_type * ops, int imin, int imax)
300 long i; 300 long i;
301 for (i = imin; i <= imax; ++i) { 301 for (i = imin; i <= imax; ++i) {
302 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; 302 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
303 irq_desc[i].handler = ops; 303 irq_desc[i].chip = ops;
304 } 304 }
305} 305}
306 306
diff --git a/arch/alpha/kernel/sys_eb64p.c b/arch/alpha/kernel/sys_eb64p.c
index 61a79c354f0..aeb8e027790 100644
--- a/arch/alpha/kernel/sys_eb64p.c
+++ b/arch/alpha/kernel/sys_eb64p.c
@@ -137,7 +137,7 @@ eb64p_init_irq(void)
137 137
138 for (i = 16; i < 32; ++i) { 138 for (i = 16; i < 32; ++i) {
139 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; 139 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
140 irq_desc[i].handler = &eb64p_irq_type; 140 irq_desc[i].chip = &eb64p_irq_type;
141 } 141 }
142 142
143 common_init_isa_dma(); 143 common_init_isa_dma();
diff --git a/arch/alpha/kernel/sys_eiger.c b/arch/alpha/kernel/sys_eiger.c
index bd6e5f0e43c..64a785baf53 100644
--- a/arch/alpha/kernel/sys_eiger.c
+++ b/arch/alpha/kernel/sys_eiger.c
@@ -154,7 +154,7 @@ eiger_init_irq(void)
154 154
155 for (i = 16; i < 128; ++i) { 155 for (i = 16; i < 128; ++i) {
156 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; 156 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
157 irq_desc[i].handler = &eiger_irq_type; 157 irq_desc[i].chip = &eiger_irq_type;
158 } 158 }
159} 159}
160 160
diff --git a/arch/alpha/kernel/sys_jensen.c b/arch/alpha/kernel/sys_jensen.c
index fcabb7c96a1..0148e095638 100644
--- a/arch/alpha/kernel/sys_jensen.c
+++ b/arch/alpha/kernel/sys_jensen.c
@@ -206,11 +206,11 @@ jensen_init_irq(void)
206{ 206{
207 init_i8259a_irqs(); 207 init_i8259a_irqs();
208 208
209 irq_desc[1].handler = &jensen_local_irq_type; 209 irq_desc[1].chip = &jensen_local_irq_type;
210 irq_desc[4].handler = &jensen_local_irq_type; 210 irq_desc[4].chip = &jensen_local_irq_type;
211 irq_desc[3].handler = &jensen_local_irq_type; 211 irq_desc[3].chip = &jensen_local_irq_type;
212 irq_desc[7].handler = &jensen_local_irq_type; 212 irq_desc[7].chip = &jensen_local_irq_type;
213 irq_desc[9].handler = &jensen_local_irq_type; 213 irq_desc[9].chip = &jensen_local_irq_type;
214 214
215 common_init_isa_dma(); 215 common_init_isa_dma();
216} 216}
diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c
index e32fee50522..36d21595437 100644
--- a/arch/alpha/kernel/sys_marvel.c
+++ b/arch/alpha/kernel/sys_marvel.c
@@ -303,7 +303,7 @@ init_io7_irqs(struct io7 *io7,
303 /* Set up the lsi irqs. */ 303 /* Set up the lsi irqs. */
304 for (i = 0; i < 128; ++i) { 304 for (i = 0; i < 128; ++i) {
305 irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL; 305 irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL;
306 irq_desc[base + i].handler = lsi_ops; 306 irq_desc[base + i].chip = lsi_ops;
307 } 307 }
308 308
309 /* Disable the implemented irqs in hardware. */ 309 /* Disable the implemented irqs in hardware. */
@@ -317,7 +317,7 @@ init_io7_irqs(struct io7 *io7,
317 /* Set up the msi irqs. */ 317 /* Set up the msi irqs. */
318 for (i = 128; i < (128 + 512); ++i) { 318 for (i = 128; i < (128 + 512); ++i) {
319 irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL; 319 irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL;
320 irq_desc[base + i].handler = msi_ops; 320 irq_desc[base + i].chip = msi_ops;
321 } 321 }
322 322
323 for (i = 0; i < 16; ++i) 323 for (i = 0; i < 16; ++i)
@@ -335,7 +335,7 @@ marvel_init_irq(void)
335 /* Reserve the legacy irqs. */ 335 /* Reserve the legacy irqs. */
336 for (i = 0; i < 16; ++i) { 336 for (i = 0; i < 16; ++i) {
337 irq_desc[i].status = IRQ_DISABLED; 337 irq_desc[i].status = IRQ_DISABLED;
338 irq_desc[i].handler = &marvel_legacy_irq_type; 338 irq_desc[i].chip = &marvel_legacy_irq_type;
339 } 339 }
340 340
341 /* Init the io7 irqs. */ 341 /* Init the io7 irqs. */
diff --git a/arch/alpha/kernel/sys_mikasa.c b/arch/alpha/kernel/sys_mikasa.c
index d78a0daa616..b741600e376 100644
--- a/arch/alpha/kernel/sys_mikasa.c
+++ b/arch/alpha/kernel/sys_mikasa.c
@@ -117,7 +117,7 @@ mikasa_init_irq(void)
117 117
118 for (i = 16; i < 32; ++i) { 118 for (i = 16; i < 32; ++i) {
119 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; 119 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
120 irq_desc[i].handler = &mikasa_irq_type; 120 irq_desc[i].chip = &mikasa_irq_type;
121 } 121 }
122 122
123 init_i8259a_irqs(); 123 init_i8259a_irqs();
diff --git a/arch/alpha/kernel/sys_noritake.c b/arch/alpha/kernel/sys_noritake.c
index 65061f5d741..55db02d318d 100644
--- a/arch/alpha/kernel/sys_noritake.c
+++ b/arch/alpha/kernel/sys_noritake.c
@@ -139,7 +139,7 @@ noritake_init_irq(void)
139 139
140 for (i = 16; i < 48; ++i) { 140 for (i = 16; i < 48; ++i) {
141 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; 141 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
142 irq_desc[i].handler = &noritake_irq_type; 142 irq_desc[i].chip = &noritake_irq_type;
143 } 143 }
144 144
145 init_i8259a_irqs(); 145 init_i8259a_irqs();
diff --git a/arch/alpha/kernel/sys_rawhide.c b/arch/alpha/kernel/sys_rawhide.c
index 05888a02a60..949607e3d6f 100644
--- a/arch/alpha/kernel/sys_rawhide.c
+++ b/arch/alpha/kernel/sys_rawhide.c
@@ -180,7 +180,7 @@ rawhide_init_irq(void)
180 180
181 for (i = 16; i < 128; ++i) { 181 for (i = 16; i < 128; ++i) {
182 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; 182 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
183 irq_desc[i].handler = &rawhide_irq_type; 183 irq_desc[i].chip = &rawhide_irq_type;
184 } 184 }
185 185
186 init_i8259a_irqs(); 186 init_i8259a_irqs();
diff --git a/arch/alpha/kernel/sys_rx164.c b/arch/alpha/kernel/sys_rx164.c
index 58404243057..6ae50605263 100644
--- a/arch/alpha/kernel/sys_rx164.c
+++ b/arch/alpha/kernel/sys_rx164.c
@@ -117,7 +117,7 @@ rx164_init_irq(void)
117 rx164_update_irq_hw(0); 117 rx164_update_irq_hw(0);
118 for (i = 16; i < 40; ++i) { 118 for (i = 16; i < 40; ++i) {
119 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; 119 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
120 irq_desc[i].handler = &rx164_irq_type; 120 irq_desc[i].chip = &rx164_irq_type;
121 } 121 }
122 122
123 init_i8259a_irqs(); 123 init_i8259a_irqs();
diff --git a/arch/alpha/kernel/sys_sable.c b/arch/alpha/kernel/sys_sable.c
index a7ff84474ac..24dea40c9bf 100644
--- a/arch/alpha/kernel/sys_sable.c
+++ b/arch/alpha/kernel/sys_sable.c
@@ -537,7 +537,7 @@ sable_lynx_init_irq(int nr_irqs)
537 537
538 for (i = 0; i < nr_irqs; ++i) { 538 for (i = 0; i < nr_irqs; ++i) {
539 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; 539 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
540 irq_desc[i].handler = &sable_lynx_irq_type; 540 irq_desc[i].chip = &sable_lynx_irq_type;
541 } 541 }
542 542
543 common_init_isa_dma(); 543 common_init_isa_dma();
diff --git a/arch/alpha/kernel/sys_takara.c b/arch/alpha/kernel/sys_takara.c
index 7955bdfc2db..2c75cd1fd81 100644
--- a/arch/alpha/kernel/sys_takara.c
+++ b/arch/alpha/kernel/sys_takara.c
@@ -154,7 +154,7 @@ takara_init_irq(void)
154 154
155 for (i = 16; i < 128; ++i) { 155 for (i = 16; i < 128; ++i) {
156 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; 156 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
157 irq_desc[i].handler = &takara_irq_type; 157 irq_desc[i].chip = &takara_irq_type;
158 } 158 }
159 159
160 common_init_isa_dma(); 160 common_init_isa_dma();
diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c
index 2551fb49ae0..13f3ed8ed7a 100644
--- a/arch/alpha/kernel/sys_titan.c
+++ b/arch/alpha/kernel/sys_titan.c
@@ -189,7 +189,7 @@ init_titan_irqs(struct hw_interrupt_type * ops, int imin, int imax)
189 long i; 189 long i;
190 for (i = imin; i <= imax; ++i) { 190 for (i = imin; i <= imax; ++i) {
191 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; 191 irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
192 irq_desc[i].handler = ops; 192 irq_desc[i].chip = ops;
193 } 193 }
194} 194}
195 195
diff --git a/arch/alpha/kernel/sys_wildfire.c b/arch/alpha/kernel/sys_wildfire.c
index 1553f470246..22c5798fe08 100644
--- a/arch/alpha/kernel/sys_wildfire.c
+++ b/arch/alpha/kernel/sys_wildfire.c
@@ -199,14 +199,14 @@ wildfire_init_irq_per_pca(int qbbno, int pcano)
199 if (i == 2) 199 if (i == 2)
200 continue; 200 continue;
201 irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL; 201 irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
202 irq_desc[i+irq_bias].handler = &wildfire_irq_type; 202 irq_desc[i+irq_bias].chip = &wildfire_irq_type;
203 } 203 }
204 204
205 irq_desc[36+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL; 205 irq_desc[36+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
206 irq_desc[36+irq_bias].handler = &wildfire_irq_type; 206 irq_desc[36+irq_bias].chip = &wildfire_irq_type;
207 for (i = 40; i < 64; ++i) { 207 for (i = 40; i < 64; ++i) {
208 irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL; 208 irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL;
209 irq_desc[i+irq_bias].handler = &wildfire_irq_type; 209 irq_desc[i+irq_bias].chip = &wildfire_irq_type;
210 } 210 }
211 211
212 setup_irq(32+irq_bias, &isa_enable); 212 setup_irq(32+irq_bias, &isa_enable);
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3d1a3fb7d5f..f123c7c9fc9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -188,23 +188,27 @@ config ARCH_IMX
188 188
189config ARCH_IOP3XX 189config ARCH_IOP3XX
190 bool "IOP3xx-based" 190 bool "IOP3xx-based"
191 depends on MMU
191 select PCI 192 select PCI
192 help 193 help
193 Support for Intel's IOP3XX (XScale) family of processors. 194 Support for Intel's IOP3XX (XScale) family of processors.
194 195
195config ARCH_IXP4XX 196config ARCH_IXP4XX
196 bool "IXP4xx-based" 197 bool "IXP4xx-based"
198 depends on MMU
197 help 199 help
198 Support for Intel's IXP4XX (XScale) family of processors. 200 Support for Intel's IXP4XX (XScale) family of processors.
199 201
200config ARCH_IXP2000 202config ARCH_IXP2000
201 bool "IXP2400/2800-based" 203 bool "IXP2400/2800-based"
204 depends on MMU
202 select PCI 205 select PCI
203 help 206 help
204 Support for Intel's IXP2400/2800 (XScale) family of processors. 207 Support for Intel's IXP2400/2800 (XScale) family of processors.
205 208
206config ARCH_IXP23XX 209config ARCH_IXP23XX
207 bool "IXP23XX-based" 210 bool "IXP23XX-based"
211 depends on MMU
208 select PCI 212 select PCI
209 help 213 help
210 Support for Intel's IXP23xx (XScale) family of processors. 214 Support for Intel's IXP23xx (XScale) family of processors.
@@ -229,6 +233,7 @@ config ARCH_PNX4008
229 233
230config ARCH_PXA 234config ARCH_PXA
231 bool "PXA2xx-based" 235 bool "PXA2xx-based"
236 depends on MMU
232 select ARCH_MTD_XIP 237 select ARCH_MTD_XIP
233 help 238 help
234 Support for Intel's PXA2XX processor line. 239 Support for Intel's PXA2XX processor line.
@@ -339,6 +344,10 @@ config XSCALE_PMU
339 depends on CPU_XSCALE && !XSCALE_PMU_TIMER 344 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
340 default y 345 default y
341 346
347if !MMU
348source "arch/arm/Kconfig-nommu"
349endif
350
342endmenu 351endmenu
343 352
344source "arch/arm/common/Kconfig" 353source "arch/arm/common/Kconfig"
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index a601b8b55f3..7cffbaef064 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -22,6 +22,9 @@ obj-$(CONFIG_PCI) += bios32.o
22obj-$(CONFIG_SMP) += smp.o 22obj-$(CONFIG_SMP) += smp.o
23obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o 23obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o
24 24
25obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o
26AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
27
25obj-$(CONFIG_IWMMXT) += iwmmxt.o 28obj-$(CONFIG_IWMMXT) += iwmmxt.o
26AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt 29AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
27 30
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index c49b5d4d7fc..da69e660574 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -109,11 +109,13 @@ EXPORT_SYMBOL(memchr);
109EXPORT_SYMBOL(__memzero); 109EXPORT_SYMBOL(__memzero);
110 110
111 /* user mem (segment) */ 111 /* user mem (segment) */
112EXPORT_SYMBOL(__arch_copy_from_user); 112EXPORT_SYMBOL(__strnlen_user);
113EXPORT_SYMBOL(__arch_copy_to_user); 113EXPORT_SYMBOL(__strncpy_from_user);
114EXPORT_SYMBOL(__arch_clear_user); 114
115EXPORT_SYMBOL(__arch_strnlen_user); 115#ifdef CONFIG_MMU
116EXPORT_SYMBOL(__arch_strncpy_from_user); 116EXPORT_SYMBOL(__copy_from_user);
117EXPORT_SYMBOL(__copy_to_user);
118EXPORT_SYMBOL(__clear_user);
117 119
118EXPORT_SYMBOL(__get_user_1); 120EXPORT_SYMBOL(__get_user_1);
119EXPORT_SYMBOL(__get_user_2); 121EXPORT_SYMBOL(__get_user_2);
@@ -123,6 +125,7 @@ EXPORT_SYMBOL(__put_user_1);
123EXPORT_SYMBOL(__put_user_2); 125EXPORT_SYMBOL(__put_user_2);
124EXPORT_SYMBOL(__put_user_4); 126EXPORT_SYMBOL(__put_user_4);
125EXPORT_SYMBOL(__put_user_8); 127EXPORT_SYMBOL(__put_user_8);
128#endif
126 129
127 /* crypto hash */ 130 /* crypto hash */
128EXPORT_SYMBOL(sha_transform); 131EXPORT_SYMBOL(sha_transform);
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index 396efba9bac..447ede5143a 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -60,6 +60,9 @@ int main(void)
60#ifdef CONFIG_IWMMXT 60#ifdef CONFIG_IWMMXT
61 DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt)); 61 DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt));
62#endif 62#endif
63#ifdef CONFIG_CRUNCH
64 DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate));
65#endif
63 BLANK(); 66 BLANK();
64 DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0)); 67 DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0));
65 DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1)); 68 DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1));
diff --git a/arch/arm/kernel/crunch-bits.S b/arch/arm/kernel/crunch-bits.S
new file mode 100644
index 00000000000..a26886758c6
--- /dev/null
+++ b/arch/arm/kernel/crunch-bits.S
@@ -0,0 +1,305 @@
1/*
2 * arch/arm/kernel/crunch-bits.S
3 * Cirrus MaverickCrunch context switching and handling
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * Shamelessly stolen from the iWMMXt code by Nicolas Pitre, which is
8 * Copyright (c) 2003-2004, MontaVista Software, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/linkage.h>
16#include <asm/ptrace.h>
17#include <asm/thread_info.h>
18#include <asm/asm-offsets.h>
19#include <asm/arch/ep93xx-regs.h>
20
21/*
22 * We can't use hex constants here due to a bug in gas.
23 */
24#define CRUNCH_MVDX0 0
25#define CRUNCH_MVDX1 8
26#define CRUNCH_MVDX2 16
27#define CRUNCH_MVDX3 24
28#define CRUNCH_MVDX4 32
29#define CRUNCH_MVDX5 40
30#define CRUNCH_MVDX6 48
31#define CRUNCH_MVDX7 56
32#define CRUNCH_MVDX8 64
33#define CRUNCH_MVDX9 72
34#define CRUNCH_MVDX10 80
35#define CRUNCH_MVDX11 88
36#define CRUNCH_MVDX12 96
37#define CRUNCH_MVDX13 104
38#define CRUNCH_MVDX14 112
39#define CRUNCH_MVDX15 120
40#define CRUNCH_MVAX0L 128
41#define CRUNCH_MVAX0M 132
42#define CRUNCH_MVAX0H 136
43#define CRUNCH_MVAX1L 140
44#define CRUNCH_MVAX1M 144
45#define CRUNCH_MVAX1H 148
46#define CRUNCH_MVAX2L 152
47#define CRUNCH_MVAX2M 156
48#define CRUNCH_MVAX2H 160
49#define CRUNCH_MVAX3L 164
50#define CRUNCH_MVAX3M 168
51#define CRUNCH_MVAX3H 172
52#define CRUNCH_DSPSC 176
53
54#define CRUNCH_SIZE 184
55
56 .text
57
58/*
59 * Lazy switching of crunch coprocessor context
60 *
61 * r10 = struct thread_info pointer
62 * r9 = ret_from_exception
63 * lr = undefined instr exit
64 *
65 * called from prefetch exception handler with interrupts disabled
66 */
67ENTRY(crunch_task_enable)
68 ldr r8, =(EP93XX_APB_VIRT_BASE + 0x00130000) @ syscon addr
69
70 ldr r1, [r8, #0x80]
71 tst r1, #0x00800000 @ access to crunch enabled?
72 movne pc, lr @ if so no business here
73 mov r3, #0xaa @ unlock syscon swlock
74 str r3, [r8, #0xc0]
75 orr r1, r1, #0x00800000 @ enable access to crunch
76 str r1, [r8, #0x80]
77
78 ldr r3, =crunch_owner
79 add r0, r10, #TI_CRUNCH_STATE @ get task crunch save area
80 ldr r2, [sp, #60] @ current task pc value
81 ldr r1, [r3] @ get current crunch owner
82 str r0, [r3] @ this task now owns crunch
83 sub r2, r2, #4 @ adjust pc back
84 str r2, [sp, #60]
85
86 ldr r2, [r8, #0x80]
87 mov r2, r2 @ flush out enable (@@@)
88
89 teq r1, #0 @ test for last ownership
90 mov lr, r9 @ normal exit from exception
91 beq crunch_load @ no owner, skip save
92
93crunch_save:
94 cfstr64 mvdx0, [r1, #CRUNCH_MVDX0] @ save 64b registers
95 cfstr64 mvdx1, [r1, #CRUNCH_MVDX1]
96 cfstr64 mvdx2, [r1, #CRUNCH_MVDX2]
97 cfstr64 mvdx3, [r1, #CRUNCH_MVDX3]
98 cfstr64 mvdx4, [r1, #CRUNCH_MVDX4]
99 cfstr64 mvdx5, [r1, #CRUNCH_MVDX5]
100 cfstr64 mvdx6, [r1, #CRUNCH_MVDX6]
101 cfstr64 mvdx7, [r1, #CRUNCH_MVDX7]
102 cfstr64 mvdx8, [r1, #CRUNCH_MVDX8]
103 cfstr64 mvdx9, [r1, #CRUNCH_MVDX9]
104 cfstr64 mvdx10, [r1, #CRUNCH_MVDX10]
105 cfstr64 mvdx11, [r1, #CRUNCH_MVDX11]
106 cfstr64 mvdx12, [r1, #CRUNCH_MVDX12]
107 cfstr64 mvdx13, [r1, #CRUNCH_MVDX13]
108 cfstr64 mvdx14, [r1, #CRUNCH_MVDX14]
109 cfstr64 mvdx15, [r1, #CRUNCH_MVDX15]
110
111#ifdef __ARMEB__
112#error fix me for ARMEB
113#endif
114
115 cfmv32al mvfx0, mvax0 @ save 72b accumulators
116 cfstr32 mvfx0, [r1, #CRUNCH_MVAX0L]
117 cfmv32am mvfx0, mvax0
118 cfstr32 mvfx0, [r1, #CRUNCH_MVAX0M]
119 cfmv32ah mvfx0, mvax0
120 cfstr32 mvfx0, [r1, #CRUNCH_MVAX0H]
121 cfmv32al mvfx0, mvax1
122 cfstr32 mvfx0, [r1, #CRUNCH_MVAX1L]
123 cfmv32am mvfx0, mvax1
124 cfstr32 mvfx0, [r1, #CRUNCH_MVAX1M]
125 cfmv32ah mvfx0, mvax1
126 cfstr32 mvfx0, [r1, #CRUNCH_MVAX1H]
127 cfmv32al mvfx0, mvax2
128 cfstr32 mvfx0, [r1, #CRUNCH_MVAX2L]
129 cfmv32am mvfx0, mvax2
130 cfstr32 mvfx0, [r1, #CRUNCH_MVAX2M]
131 cfmv32ah mvfx0, mvax2
132 cfstr32 mvfx0, [r1, #CRUNCH_MVAX2H]
133 cfmv32al mvfx0, mvax3
134 cfstr32 mvfx0, [r1, #CRUNCH_MVAX3L]
135 cfmv32am mvfx0, mvax3
136 cfstr32 mvfx0, [r1, #CRUNCH_MVAX3M]
137 cfmv32ah mvfx0, mvax3
138 cfstr32 mvfx0, [r1, #CRUNCH_MVAX3H]
139
140 cfmv32sc mvdx0, dspsc @ save status word
141 cfstr64 mvdx0, [r1, #CRUNCH_DSPSC]
142
143 teq r0, #0 @ anything to load?
144 cfldr64eq mvdx0, [r1, #CRUNCH_MVDX0] @ mvdx0 was clobbered
145 moveq pc, lr
146
147crunch_load:
148 cfldr64 mvdx0, [r0, #CRUNCH_DSPSC] @ load status word
149 cfmvsc32 dspsc, mvdx0
150
151 cfldr32 mvfx0, [r0, #CRUNCH_MVAX0L] @ load 72b accumulators
152 cfmval32 mvax0, mvfx0
153 cfldr32 mvfx0, [r0, #CRUNCH_MVAX0M]
154 cfmvam32 mvax0, mvfx0
155 cfldr32 mvfx0, [r0, #CRUNCH_MVAX0H]
156 cfmvah32 mvax0, mvfx0
157 cfldr32 mvfx0, [r0, #CRUNCH_MVAX1L]
158 cfmval32 mvax1, mvfx0
159 cfldr32 mvfx0, [r0, #CRUNCH_MVAX1M]
160 cfmvam32 mvax1, mvfx0
161 cfldr32 mvfx0, [r0, #CRUNCH_MVAX1H]
162 cfmvah32 mvax1, mvfx0
163 cfldr32 mvfx0, [r0, #CRUNCH_MVAX2L]
164 cfmval32 mvax2, mvfx0
165 cfldr32 mvfx0, [r0, #CRUNCH_MVAX2M]
166 cfmvam32 mvax2, mvfx0
167 cfldr32 mvfx0, [r0, #CRUNCH_MVAX2H]
168 cfmvah32 mvax2, mvfx0
169 cfldr32 mvfx0, [r0, #CRUNCH_MVAX3L]
170 cfmval32 mvax3, mvfx0
171 cfldr32 mvfx0, [r0, #CRUNCH_MVAX3M]
172 cfmvam32 mvax3, mvfx0
173 cfldr32 mvfx0, [r0, #CRUNCH_MVAX3H]
174 cfmvah32 mvax3, mvfx0
175
176 cfldr64 mvdx0, [r0, #CRUNCH_MVDX0] @ load 64b registers
177 cfldr64 mvdx1, [r0, #CRUNCH_MVDX1]
178 cfldr64 mvdx2, [r0, #CRUNCH_MVDX2]
179 cfldr64 mvdx3, [r0, #CRUNCH_MVDX3]
180 cfldr64 mvdx4, [r0, #CRUNCH_MVDX4]
181 cfldr64 mvdx5, [r0, #CRUNCH_MVDX5]
182 cfldr64 mvdx6, [r0, #CRUNCH_MVDX6]
183 cfldr64 mvdx7, [r0, #CRUNCH_MVDX7]
184 cfldr64 mvdx8, [r0, #CRUNCH_MVDX8]
185 cfldr64 mvdx9, [r0, #CRUNCH_MVDX9]
186 cfldr64 mvdx10, [r0, #CRUNCH_MVDX10]
187 cfldr64 mvdx11, [r0, #CRUNCH_MVDX11]
188 cfldr64 mvdx12, [r0, #CRUNCH_MVDX12]
189 cfldr64 mvdx13, [r0, #CRUNCH_MVDX13]
190 cfldr64 mvdx14, [r0, #CRUNCH_MVDX14]
191 cfldr64 mvdx15, [r0, #CRUNCH_MVDX15]
192
193 mov pc, lr
194
195/*
196 * Back up crunch regs to save area and disable access to them
197 * (mainly for gdb or sleep mode usage)
198 *
199 * r0 = struct thread_info pointer of target task or NULL for any
200 */
201ENTRY(crunch_task_disable)
202 stmfd sp!, {r4, r5, lr}
203
204 mrs ip, cpsr
205 orr r2, ip, #PSR_I_BIT @ disable interrupts
206 msr cpsr_c, r2
207
208 ldr r4, =(EP93XX_APB_VIRT_BASE + 0x00130000) @ syscon addr
209
210 ldr r3, =crunch_owner
211 add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area
212 ldr r1, [r3] @ get current crunch owner
213 teq r1, #0 @ any current owner?
214 beq 1f @ no: quit
215 teq r0, #0 @ any owner?
216 teqne r1, r2 @ or specified one?
217 bne 1f @ no: quit
218
219 ldr r5, [r4, #0x80] @ enable access to crunch
220 mov r2, #0xaa
221 str r2, [r4, #0xc0]
222 orr r5, r5, #0x00800000
223 str r5, [r4, #0x80]
224
225 mov r0, #0 @ nothing to load
226 str r0, [r3] @ no more current owner
227 ldr r2, [r4, #0x80] @ flush out enable (@@@)
228 mov r2, r2
229 bl crunch_save
230
231 mov r2, #0xaa @ disable access to crunch
232 str r2, [r4, #0xc0]
233 bic r5, r5, #0x00800000
234 str r5, [r4, #0x80]
235 ldr r5, [r4, #0x80] @ flush out enable (@@@)
236 mov r5, r5
237
2381: msr cpsr_c, ip @ restore interrupt mode
239 ldmfd sp!, {r4, r5, pc}
240
241/*
242 * Copy crunch state to given memory address
243 *
244 * r0 = struct thread_info pointer of target task
245 * r1 = memory address where to store crunch state
246 *
247 * this is called mainly in the creation of signal stack frames
248 */
249ENTRY(crunch_task_copy)
250 mrs ip, cpsr
251 orr r2, ip, #PSR_I_BIT @ disable interrupts
252 msr cpsr_c, r2
253
254 ldr r3, =crunch_owner
255 add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area
256 ldr r3, [r3] @ get current crunch owner
257 teq r2, r3 @ does this task own it...
258 beq 1f
259
260 @ current crunch values are in the task save area
261 msr cpsr_c, ip @ restore interrupt mode
262 mov r0, r1
263 mov r1, r2
264 mov r2, #CRUNCH_SIZE
265 b memcpy
266
2671: @ this task owns crunch regs -- grab a copy from there
268 mov r0, #0 @ nothing to load
269 mov r3, lr @ preserve return address
270 bl crunch_save
271 msr cpsr_c, ip @ restore interrupt mode
272 mov pc, r3
273
274/*
275 * Restore crunch state from given memory address
276 *
277 * r0 = struct thread_info pointer of target task
278 * r1 = memory address where to get crunch state from
279 *
280 * this is used to restore crunch state when unwinding a signal stack frame
281 */
282ENTRY(crunch_task_restore)
283 mrs ip, cpsr
284 orr r2, ip, #PSR_I_BIT @ disable interrupts
285 msr cpsr_c, r2
286
287 ldr r3, =crunch_owner
288 add r2, r0, #TI_CRUNCH_STATE @ get task crunch save area
289 ldr r3, [r3] @ get current crunch owner
290 teq r2, r3 @ does this task own it...
291 beq 1f
292
293 @ this task doesn't own crunch regs -- use its save area
294 msr cpsr_c, ip @ restore interrupt mode
295 mov r0, r2
296 mov r2, #CRUNCH_SIZE
297 b memcpy
298
2991: @ this task owns crunch regs -- load them directly
300 mov r0, r1
301 mov r1, #0 @ nothing to save
302 mov r3, lr @ preserve return address
303 bl crunch_load
304 msr cpsr_c, ip @ restore interrupt mode
305 mov pc, r3
diff --git a/arch/arm/kernel/crunch.c b/arch/arm/kernel/crunch.c
new file mode 100644
index 00000000000..748175921f9
--- /dev/null
+++ b/arch/arm/kernel/crunch.c
@@ -0,0 +1,83 @@
1/*
2 * arch/arm/kernel/crunch.c
3 * Cirrus MaverickCrunch context switching and handling
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/config.h>
14#include <linux/types.h>
15#include <linux/kernel.h>
16#include <linux/signal.h>
17#include <linux/sched.h>
18#include <linux/init.h>
19#include <asm/arch/ep93xx-regs.h>
20#include <asm/thread_notify.h>
21#include <asm/io.h>
22
23struct crunch_state *crunch_owner;
24
25void crunch_task_release(struct thread_info *thread)
26{
27 local_irq_disable();
28 if (crunch_owner == &thread->crunchstate)
29 crunch_owner = NULL;
30 local_irq_enable();
31}
32
33static int crunch_enabled(u32 devcfg)
34{
35 return !!(devcfg & EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE);
36}
37
38static int crunch_do(struct notifier_block *self, unsigned long cmd, void *t)
39{
40 struct thread_info *thread = (struct thread_info *)t;
41 struct crunch_state *crunch_state;
42 u32 devcfg;
43
44 crunch_state = &thread->crunchstate;
45
46 switch (cmd) {
47 case THREAD_NOTIFY_FLUSH:
48 memset(crunch_state, 0, sizeof(*crunch_state));
49
50 /*
51 * FALLTHROUGH: Ensure we don't try to overwrite our newly
52 * initialised state information on the first fault.
53 */
54
55 case THREAD_NOTIFY_RELEASE:
56 crunch_task_release(thread);
57 break;
58
59 case THREAD_NOTIFY_SWITCH:
60 devcfg = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
61 if (crunch_enabled(devcfg) || crunch_owner == crunch_state) {
62 devcfg ^= EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE;
63 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
64 __raw_writel(devcfg, EP93XX_SYSCON_DEVICE_CONFIG);
65 }
66 break;
67 }
68
69 return NOTIFY_DONE;
70}
71
72static struct notifier_block crunch_notifier_block = {
73 .notifier_call = crunch_do,
74};
75
76static int __init crunch_init(void)
77{
78 thread_register_notifier(&crunch_notifier_block);
79
80 return 0;
81}
82
83late_initcall(crunch_init);
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 86c92523a34..6423a38839b 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -492,9 +492,15 @@ call_fpe:
492 b do_fpe @ CP#1 (FPE) 492 b do_fpe @ CP#1 (FPE)
493 b do_fpe @ CP#2 (FPE) 493 b do_fpe @ CP#2 (FPE)
494 mov pc, lr @ CP#3 494 mov pc, lr @ CP#3
495#ifdef CONFIG_CRUNCH
496 b crunch_task_enable @ CP#4 (MaverickCrunch)
497 b crunch_task_enable @ CP#5 (MaverickCrunch)
498 b crunch_task_enable @ CP#6 (MaverickCrunch)
499#else
495 mov pc, lr @ CP#4 500 mov pc, lr @ CP#4
496 mov pc, lr @ CP#5 501 mov pc, lr @ CP#5
497 mov pc, lr @ CP#6 502 mov pc, lr @ CP#6
503#endif
498 mov pc, lr @ CP#7 504 mov pc, lr @ CP#7
499 mov pc, lr @ CP#8 505 mov pc, lr @ CP#8
500 mov pc, lr @ CP#9 506 mov pc, lr @ CP#9
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index a1d1b2906e8..c40bdc77005 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -634,6 +634,32 @@ static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp)
634 634
635#endif 635#endif
636 636
637#ifdef CONFIG_CRUNCH
638/*
639 * Get the child Crunch state.
640 */
641static int ptrace_getcrunchregs(struct task_struct *tsk, void __user *ufp)
642{
643 struct thread_info *thread = task_thread_info(tsk);
644
645 crunch_task_disable(thread); /* force it to ram */
646 return copy_to_user(ufp, &thread->crunchstate, CRUNCH_SIZE)
647 ? -EFAULT : 0;
648}
649
650/*
651 * Set the child Crunch state.
652 */
653static int ptrace_setcrunchregs(struct task_struct *tsk, void __user *ufp)
654{
655 struct thread_info *thread = task_thread_info(tsk);
656
657 crunch_task_release(thread); /* force a reload */
658 return copy_from_user(&thread->crunchstate, ufp, CRUNCH_SIZE)
659 ? -EFAULT : 0;
660}
661#endif
662
637long arch_ptrace(struct task_struct *child, long request, long addr, long data) 663long arch_ptrace(struct task_struct *child, long request, long addr, long data)
638{ 664{
639 unsigned long tmp; 665 unsigned long tmp;
@@ -765,6 +791,16 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
765 child->ptrace_message = data; 791 child->ptrace_message = data;
766 break; 792 break;
767 793
794#ifdef CONFIG_CRUNCH
795 case PTRACE_GETCRUNCHREGS:
796 ret = ptrace_getcrunchregs(child, (void __user *)data);
797 break;
798
799 case PTRACE_SETCRUNCHREGS:
800 ret = ptrace_setcrunchregs(child, (void __user *)data);
801 break;
802#endif
803
768 default: 804 default:
769 ret = ptrace_request(child, request, addr, data); 805 ret = ptrace_request(child, request, addr, data);
770 break; 806 break;
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index d6941272885..6bdf70def01 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -838,7 +838,7 @@ static int __init topology_init(void)
838 int cpu; 838 int cpu;
839 839
840 for_each_possible_cpu(cpu) 840 for_each_possible_cpu(cpu)
841 register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu, NULL); 841 register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
842 842
843 return 0; 843 return 0;
844} 844}
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index 1ce05ec086c..83a8d3c95eb 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -132,6 +132,37 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,
132 return ret; 132 return ret;
133} 133}
134 134
135#ifdef CONFIG_CRUNCH
136static int preserve_crunch_context(struct crunch_sigframe *frame)
137{
138 char kbuf[sizeof(*frame) + 8];
139 struct crunch_sigframe *kframe;
140
141 /* the crunch context must be 64 bit aligned */
142 kframe = (struct crunch_sigframe *)((unsigned long)(kbuf + 8) & ~7);
143 kframe->magic = CRUNCH_MAGIC;
144 kframe->size = CRUNCH_STORAGE_SIZE;
145 crunch_task_copy(current_thread_info(), &kframe->storage);
146 return __copy_to_user(frame, kframe, sizeof(*frame));
147}
148
149static int restore_crunch_context(struct crunch_sigframe *frame)
150{
151 char kbuf[sizeof(*frame) + 8];
152 struct crunch_sigframe *kframe;
153
154 /* the crunch context must be 64 bit aligned */
155 kframe = (struct crunch_sigframe *)((unsigned long)(kbuf + 8) & ~7);
156 if (__copy_from_user(kframe, frame, sizeof(*frame)))
157 return -1;
158 if (kframe->magic != CRUNCH_MAGIC ||
159 kframe->size != CRUNCH_STORAGE_SIZE)
160 return -1;
161 crunch_task_restore(current_thread_info(), &kframe->storage);
162 return 0;
163}
164#endif
165
135#ifdef CONFIG_IWMMXT 166#ifdef CONFIG_IWMMXT
136 167
137static int preserve_iwmmxt_context(struct iwmmxt_sigframe *frame) 168static int preserve_iwmmxt_context(struct iwmmxt_sigframe *frame)
@@ -214,6 +245,10 @@ static int restore_sigframe(struct pt_regs *regs, struct sigframe __user *sf)
214 err |= !valid_user_regs(regs); 245 err |= !valid_user_regs(regs);
215 246
216 aux = (struct aux_sigframe __user *) sf->uc.uc_regspace; 247 aux = (struct aux_sigframe __user *) sf->uc.uc_regspace;
248#ifdef CONFIG_CRUNCH
249 if (err == 0)
250 err |= restore_crunch_context(&aux->crunch);
251#endif
217#ifdef CONFIG_IWMMXT 252#ifdef CONFIG_IWMMXT
218 if (err == 0 && test_thread_flag(TIF_USING_IWMMXT)) 253 if (err == 0 && test_thread_flag(TIF_USING_IWMMXT))
219 err |= restore_iwmmxt_context(&aux->iwmmxt); 254 err |= restore_iwmmxt_context(&aux->iwmmxt);
@@ -333,6 +368,10 @@ setup_sigframe(struct sigframe __user *sf, struct pt_regs *regs, sigset_t *set)
333 err |= __copy_to_user(&sf->uc.uc_sigmask, set, sizeof(*set)); 368 err |= __copy_to_user(&sf->uc.uc_sigmask, set, sizeof(*set));
334 369
335 aux = (struct aux_sigframe __user *) sf->uc.uc_regspace; 370 aux = (struct aux_sigframe __user *) sf->uc.uc_regspace;
371#ifdef CONFIG_CRUNCH
372 if (err == 0)
373 err |= preserve_crunch_context(&aux->crunch);
374#endif
336#ifdef CONFIG_IWMMXT 375#ifdef CONFIG_IWMMXT
337 if (err == 0 && test_thread_flag(TIF_USING_IWMMXT)) 376 if (err == 0 && test_thread_flag(TIF_USING_IWMMXT))
338 err |= preserve_iwmmxt_context(&aux->iwmmxt); 377 err |= preserve_iwmmxt_context(&aux->iwmmxt);
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 2b254e88595..2df9688a702 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -80,6 +80,10 @@ SECTIONS
80 *(.exit.text) 80 *(.exit.text)
81 *(.exit.data) 81 *(.exit.data)
82 *(.exitcall.exit) 82 *(.exitcall.exit)
83#ifndef CONFIG_MMU
84 *(.fixup)
85 *(__ex_table)
86#endif
83 } 87 }
84 88
85 .text : { /* Real text segment */ 89 .text : { /* Real text segment */
@@ -87,7 +91,9 @@ SECTIONS
87 *(.text) 91 *(.text)
88 SCHED_TEXT 92 SCHED_TEXT
89 LOCK_TEXT 93 LOCK_TEXT
94#ifdef CONFIG_MMU
90 *(.fixup) 95 *(.fixup)
96#endif
91 *(.gnu.warning) 97 *(.gnu.warning)
92 *(.rodata) 98 *(.rodata)
93 *(.rodata.*) 99 *(.rodata.*)
@@ -142,7 +148,9 @@ SECTIONS
142 */ 148 */
143 . = ALIGN(32); 149 . = ALIGN(32);
144 __start___ex_table = .; 150 __start___ex_table = .;
151#ifdef CONFIG_MMU
145 *(__ex_table) 152 *(__ex_table)
153#endif
146 __stop___ex_table = .; 154 __stop___ex_table = .;
147 155
148 /* 156 /*
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 7b726b627ea..30351cd4560 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -6,28 +6,31 @@
6 6
7lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \ 7lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \
8 csumpartialcopy.o csumpartialcopyuser.o clearbit.o \ 8 csumpartialcopy.o csumpartialcopyuser.o clearbit.o \
9 copy_page.o delay.o findbit.o memchr.o memcpy.o \ 9 delay.o findbit.o memchr.o memcpy.o \
10 memmove.o memset.o memzero.o setbit.o \ 10 memmove.o memset.o memzero.o setbit.o \
11 strncpy_from_user.o strnlen_user.o \ 11 strncpy_from_user.o strnlen_user.o \
12 strchr.o strrchr.o \ 12 strchr.o strrchr.o \
13 testchangebit.o testclearbit.o testsetbit.o \ 13 testchangebit.o testclearbit.o testsetbit.o \
14 getuser.o putuser.o clear_user.o \
15 ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ 14 ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \
16 ucmpdi2.o lib1funcs.o div64.o sha1.o \ 15 ucmpdi2.o lib1funcs.o div64.o sha1.o \
17 io-readsb.o io-writesb.o io-readsl.o io-writesl.o 16 io-readsb.o io-writesb.o io-readsl.o io-writesl.o
18 17
18mmu-y := clear_user.o copy_page.o getuser.o putuser.o
19
19# the code in uaccess.S is not preemption safe and 20# the code in uaccess.S is not preemption safe and
20# probably faster on ARMv3 only 21# probably faster on ARMv3 only
21ifeq ($(CONFIG_PREEMPT),y) 22ifeq ($(CONFIG_PREEMPT),y)
22 lib-y += copy_from_user.o copy_to_user.o 23 mmu-y += copy_from_user.o copy_to_user.o
23else 24else
24ifneq ($(CONFIG_CPU_32v3),y) 25ifneq ($(CONFIG_CPU_32v3),y)
25 lib-y += copy_from_user.o copy_to_user.o 26 mmu-y += copy_from_user.o copy_to_user.o
26else 27else
27 lib-y += uaccess.o 28 mmu-y += uaccess.o
28endif 29endif
29endif 30endif
30 31
32lib-$(CONFIG_MMU) += $(mmu-y)
33
31ifeq ($(CONFIG_CPU_32v3),y) 34ifeq ($(CONFIG_CPU_32v3),y)
32 lib-y += io-readsw-armv3.o io-writesw-armv3.o 35 lib-y += io-readsw-armv3.o io-writesw-armv3.o
33else 36else
diff --git a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S
index 058b80d72aa..91f993f2e9d 100644
--- a/arch/arm/lib/backtrace.S
+++ b/arch/arm/lib/backtrace.S
@@ -97,16 +97,13 @@ ENTRY(c_backtrace)
97 b 1007f 97 b 1007f
98 98
99/* 99/*
100 * Fixup for LDMDB 100 * Fixup for LDMDB. Note that this must not be in the fixup section.
101 */ 101 */
102 .section .fixup,"ax"
103 .align 0
1041007: ldr r0, =.Lbad 1021007: ldr r0, =.Lbad
105 mov r1, frame 103 mov r1, frame
106 bl printk 104 bl printk
107 ldmfd sp!, {r4 - r8, pc} 105 ldmfd sp!, {r4 - r8, pc}
108 .ltorg 106 .ltorg
109 .previous
110 107
111 .section __ex_table,"a" 108 .section __ex_table,"a"
112 .align 3 109 .align 3
diff --git a/arch/arm/lib/clear_user.S b/arch/arm/lib/clear_user.S
index ea435ae2e4a..ecb28dcdaf7 100644
--- a/arch/arm/lib/clear_user.S
+++ b/arch/arm/lib/clear_user.S
@@ -12,13 +12,13 @@
12 12
13 .text 13 .text
14 14
15/* Prototype: int __arch_clear_user(void *addr, size_t sz) 15/* Prototype: int __clear_user(void *addr, size_t sz)
16 * Purpose : clear some user memory 16 * Purpose : clear some user memory
17 * Params : addr - user memory address to clear 17 * Params : addr - user memory address to clear
18 * : sz - number of bytes to clear 18 * : sz - number of bytes to clear
19 * Returns : number of bytes NOT cleared 19 * Returns : number of bytes NOT cleared
20 */ 20 */
21ENTRY(__arch_clear_user) 21ENTRY(__clear_user)
22 stmfd sp!, {r1, lr} 22 stmfd sp!, {r1, lr}
23 mov r2, #0 23 mov r2, #0
24 cmp r1, #4 24 cmp r1, #4
diff --git a/arch/arm/lib/copy_from_user.S b/arch/arm/lib/copy_from_user.S
index 7497393a0e8..6b7363ce749 100644
--- a/arch/arm/lib/copy_from_user.S
+++ b/arch/arm/lib/copy_from_user.S
@@ -16,7 +16,7 @@
16/* 16/*
17 * Prototype: 17 * Prototype:
18 * 18 *
19 * size_t __arch_copy_from_user(void *to, const void *from, size_t n) 19 * size_t __copy_from_user(void *to, const void *from, size_t n)
20 * 20 *
21 * Purpose: 21 * Purpose:
22 * 22 *
@@ -83,7 +83,7 @@
83 83
84 .text 84 .text
85 85
86ENTRY(__arch_copy_from_user) 86ENTRY(__copy_from_user)
87 87
88#include "copy_template.S" 88#include "copy_template.S"
89 89
diff --git a/arch/arm/lib/copy_to_user.S b/arch/arm/lib/copy_to_user.S
index 4a6d8ea1402..5224d94688d 100644
--- a/arch/arm/lib/copy_to_user.S
+++ b/arch/arm/lib/copy_to_user.S
@@ -16,7 +16,7 @@
16/* 16/*
17 * Prototype: 17 * Prototype:
18 * 18 *
19 * size_t __arch_copy_to_user(void *to, const void *from, size_t n) 19 * size_t __copy_to_user(void *to, const void *from, size_t n)
20 * 20 *
21 * Purpose: 21 * Purpose:
22 * 22 *
@@ -86,7 +86,7 @@
86 86
87 .text 87 .text
88 88
89ENTRY(__arch_copy_to_user) 89ENTRY(__copy_to_user)
90 90
91#include "copy_template.S" 91#include "copy_template.S"
92 92
diff --git a/arch/arm/lib/strncpy_from_user.S b/arch/arm/lib/strncpy_from_user.S
index 35649f04fca..36e3741a377 100644
--- a/arch/arm/lib/strncpy_from_user.S
+++ b/arch/arm/lib/strncpy_from_user.S
@@ -20,7 +20,7 @@
20 * returns the number of characters copied (strlen of copied string), 20 * returns the number of characters copied (strlen of copied string),
21 * -EFAULT on exception, or "len" if we fill the whole buffer 21 * -EFAULT on exception, or "len" if we fill the whole buffer
22 */ 22 */
23ENTRY(__arch_strncpy_from_user) 23ENTRY(__strncpy_from_user)
24 mov ip, r1 24 mov ip, r1
251: subs r2, r2, #1 251: subs r2, r2, #1
26USER( ldrplbt r3, [r1], #1) 26USER( ldrplbt r3, [r1], #1)
diff --git a/arch/arm/lib/strnlen_user.S b/arch/arm/lib/strnlen_user.S
index 3668a15991e..18d8fa4f925 100644
--- a/arch/arm/lib/strnlen_user.S
+++ b/arch/arm/lib/strnlen_user.S
@@ -14,13 +14,13 @@
14 .text 14 .text
15 .align 5 15 .align 5
16 16
17/* Prototype: unsigned long __arch_strnlen_user(const char *str, long n) 17/* Prototype: unsigned long __strnlen_user(const char *str, long n)
18 * Purpose : get length of a string in user memory 18 * Purpose : get length of a string in user memory
19 * Params : str - address of string in user memory 19 * Params : str - address of string in user memory
20 * Returns : length of string *including terminator* 20 * Returns : length of string *including terminator*
21 * or zero on exception, or n + 1 if too long 21 * or zero on exception, or n + 1 if too long
22 */ 22 */
23ENTRY(__arch_strnlen_user) 23ENTRY(__strnlen_user)
24 mov r2, r0 24 mov r2, r0
251: 251:
26USER( ldrbt r3, [r0], #1) 26USER( ldrbt r3, [r0], #1)
diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S
index 1f1545d737b..b48bd6d5fd8 100644
--- a/arch/arm/lib/uaccess.S
+++ b/arch/arm/lib/uaccess.S
@@ -19,7 +19,7 @@
19 19
20#define PAGE_SHIFT 12 20#define PAGE_SHIFT 12
21 21
22/* Prototype: int __arch_copy_to_user(void *to, const char *from, size_t n) 22/* Prototype: int __copy_to_user(void *to, const char *from, size_t n)
23 * Purpose : copy a block to user memory from kernel memory 23 * Purpose : copy a block to user memory from kernel memory
24 * Params : to - user memory 24 * Params : to - user memory
25 * : from - kernel memory 25 * : from - kernel memory
@@ -39,7 +39,7 @@ USER( strgtbt r3, [r0], #1) @ May fault
39 sub r2, r2, ip 39 sub r2, r2, ip
40 b .Lc2u_dest_aligned 40 b .Lc2u_dest_aligned
41 41
42ENTRY(__arch_copy_to_user) 42ENTRY(__copy_to_user)
43 stmfd sp!, {r2, r4 - r7, lr} 43 stmfd sp!, {r2, r4 - r7, lr}
44 cmp r2, #4 44 cmp r2, #4
45 blt .Lc2u_not_enough 45 blt .Lc2u_not_enough
@@ -283,7 +283,7 @@ USER( strgtbt r3, [r0], #1) @ May fault
2839001: ldmfd sp!, {r0, r4 - r7, pc} 2839001: ldmfd sp!, {r0, r4 - r7, pc}
284 .previous 284 .previous
285 285
286/* Prototype: unsigned long __arch_copy_from_user(void *to,const void *from,unsigned long n); 286/* Prototype: unsigned long __copy_from_user(void *to,const void *from,unsigned long n);
287 * Purpose : copy a block from user memory to kernel memory 287 * Purpose : copy a block from user memory to kernel memory
288 * Params : to - kernel memory 288 * Params : to - kernel memory
289 * : from - user memory 289 * : from - user memory
@@ -302,7 +302,7 @@ USER( ldrgtbt r3, [r1], #1) @ May fault
302 sub r2, r2, ip 302 sub r2, r2, ip
303 b .Lcfu_dest_aligned 303 b .Lcfu_dest_aligned
304 304
305ENTRY(__arch_copy_from_user) 305ENTRY(__copy_from_user)
306 stmfd sp!, {r0, r2, r4 - r7, lr} 306 stmfd sp!, {r0, r2, r4 - r7, lr}
307 cmp r2, #4 307 cmp r2, #4
308 blt .Lcfu_not_enough 308 blt .Lcfu_not_enough
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index cec5a21ca4e..e15e4c54a25 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -2,8 +2,19 @@ if ARCH_EP93XX
2 2
3menu "Cirrus EP93xx Implementation Options" 3menu "Cirrus EP93xx Implementation Options"
4 4
5config CRUNCH
6 bool "Support for MaverickCrunch"
7 help
8 Enable kernel support for MaverickCrunch.
9
5comment "EP93xx Platforms" 10comment "EP93xx Platforms"
6 11
12config MACH_EDB9315
13 bool "Support Cirrus Logic EDB9315"
14 help
15 Say 'Y' here if you want your kernel to support the Cirrus
16 Logic EDB9315 Evaluation Board.
17
7config MACH_GESBC9312 18config MACH_GESBC9312
8 bool "Support Glomation GESBC-9312-sx" 19 bool "Support Glomation GESBC-9312-sx"
9 help 20 help
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index 05a48a21038..dfa7e2e8a18 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -6,5 +6,6 @@ obj-m :=
6obj-n := 6obj-n :=
7obj- := 7obj- :=
8 8
9obj-$(CONFIG_MACH_EDB9315) += edb9315.o
9obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o 10obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o
10obj-$(CONFIG_MACH_TS72XX) += ts72xx.o 11obj-$(CONFIG_MACH_TS72XX) += ts72xx.o
diff --git a/arch/arm/mach-ep93xx/edb9315.c b/arch/arm/mach-ep93xx/edb9315.c
new file mode 100644
index 00000000000..ef7482faad8
--- /dev/null
+++ b/arch/arm/mach-ep93xx/edb9315.c
@@ -0,0 +1,62 @@
1/*
2 * arch/arm/mach-ep93xx/edb9315.c
3 * Cirrus Logic EDB9315 support.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12
13#include <linux/config.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/mm.h>
17#include <linux/sched.h>
18#include <linux/interrupt.h>
19#include <linux/ioport.h>
20#include <linux/mtd/physmap.h>
21#include <linux/platform_device.h>
22#include <asm/io.h>
23#include <asm/hardware.h>
24#include <asm/mach-types.h>
25#include <asm/mach/arch.h>
26
27static struct physmap_flash_data edb9315_flash_data = {
28 .width = 4,
29};
30
31static struct resource edb9315_flash_resource = {
32 .start = 0x60000000,
33 .end = 0x61ffffff,
34 .flags = IORESOURCE_MEM,
35};
36
37static struct platform_device edb9315_flash = {
38 .name = "physmap-flash",
39 .id = 0,
40 .dev = {
41 .platform_data = &edb9315_flash_data,
42 },
43 .num_resources = 1,
44 .resource = &edb9315_flash_resource,
45};
46
47static void __init edb9315_init_machine(void)
48{
49 ep93xx_init_devices();
50 platform_device_register(&edb9315_flash);
51}
52
53MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
54 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
55 .phys_io = EP93XX_APB_PHYS_BASE,
56 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
57 .boot_params = 0x00000100,
58 .map_io = ep93xx_map_io,
59 .init_irq = ep93xx_init_irq,
60 .timer = &ep93xx_timer,
61 .init_machine = edb9315_init_machine,
62MACHINE_END
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 47cc6c8b7c7..2c28d66d260 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -30,7 +30,7 @@ static struct physmap_flash_data gesbc9312_flash_data = {
30 30
31static struct resource gesbc9312_flash_resource = { 31static struct resource gesbc9312_flash_resource = {
32 .start = 0x60000000, 32 .start = 0x60000000,
33 .end = 0x60800000, 33 .end = 0x607fffff,
34 .flags = IORESOURCE_MEM, 34 .flags = IORESOURCE_MEM,
35}; 35};
36 36
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index 6e5a56cd5ae..0b3b875b187 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -118,7 +118,7 @@ static struct physmap_flash_data ts72xx_flash_data = {
118 118
119static struct resource ts72xx_flash_resource = { 119static struct resource ts72xx_flash_resource = {
120 .start = TS72XX_NOR_PHYS_BASE, 120 .start = TS72XX_NOR_PHYS_BASE,
121 .end = TS72XX_NOR_PHYS_BASE + 0x01000000, 121 .end = TS72XX_NOR_PHYS_BASE + 0x00ffffff,
122 .flags = IORESOURCE_MEM, 122 .flags = IORESOURCE_MEM,
123}; 123};
124 124
diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c
index dc5e489c70b..357351fbb1e 100644
--- a/arch/arm/mach-ixp23xx/espresso.c
+++ b/arch/arm/mach-ixp23xx/espresso.c
@@ -59,7 +59,7 @@ static struct physmap_flash_data espresso_flash_data = {
59 59
60static struct resource espresso_flash_resource = { 60static struct resource espresso_flash_resource = {
61 .start = 0x90000000, 61 .start = 0x90000000,
62 .end = 0x92000000, 62 .end = 0x91ffffff,
63 .flags = IORESOURCE_MEM, 63 .flags = IORESOURCE_MEM,
64}; 64};
65 65
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c
index 535b334ee04..e0886871cc7 100644
--- a/arch/arm/mach-ixp23xx/ixdp2351.c
+++ b/arch/arm/mach-ixp23xx/ixdp2351.c
@@ -304,7 +304,7 @@ static struct physmap_flash_data ixdp2351_flash_data = {
304 304
305static struct resource ixdp2351_flash_resource = { 305static struct resource ixdp2351_flash_resource = {
306 .start = 0x90000000, 306 .start = 0x90000000,
307 .end = 0x94000000, 307 .end = 0x93ffffff,
308 .flags = IORESOURCE_MEM, 308 .flags = IORESOURCE_MEM,
309}; 309};
310 310
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c
index b9f5d13fcfe..92ad18f4125 100644
--- a/arch/arm/mach-ixp23xx/roadrunner.c
+++ b/arch/arm/mach-ixp23xx/roadrunner.c
@@ -143,7 +143,7 @@ static struct physmap_flash_data roadrunner_flash_data = {
143 143
144static struct resource roadrunner_flash_resource = { 144static struct resource roadrunner_flash_resource = {
145 .start = 0x90000000, 145 .start = 0x90000000,
146 .end = 0x94000000, 146 .end = 0x93ffffff,
147 .flags = IORESOURCE_MEM, 147 .flags = IORESOURCE_MEM,
148}; 148};
149 149
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 539b596005f..d9635ff4b10 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -88,8 +88,8 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
88 88
89 if (type == IRQT_PROBE) { 89 if (type == IRQT_PROBE) {
90 /* Don't mess with enabled GPIOs using preconfigured edges or 90 /* Don't mess with enabled GPIOs using preconfigured edges or
91 GPIOs set to alternate function during probe */ 91 GPIOs set to alternate function or to output during probe */
92 if ((GPIO_IRQ_rising_edge[idx] | GPIO_IRQ_falling_edge[idx]) & 92 if ((GPIO_IRQ_rising_edge[idx] | GPIO_IRQ_falling_edge[idx] | GPDR(gpio)) &
93 GPIO_bit(gpio)) 93 GPIO_bit(gpio))
94 return 0; 94 return 0;
95 if (GAFR(gpio) & (0x3 << (((gpio) & 0xf)*2))) 95 if (GAFR(gpio) & (0x3 << (((gpio) & 0xf)*2)))
diff --git a/arch/arm/mach-s3c2410/s3c244x.c b/arch/arm/mach-s3c2410/s3c244x.c
index 838bc525e83..9a2258270de 100644
--- a/arch/arm/mach-s3c2410/s3c244x.c
+++ b/arch/arm/mach-s3c2410/s3c244x.c
@@ -69,6 +69,7 @@ void __init s3c244x_map_io(struct map_desc *mach_desc, int size)
69 69
70 s3c_device_i2c.name = "s3c2440-i2c"; 70 s3c_device_i2c.name = "s3c2440-i2c";
71 s3c_device_nand.name = "s3c2440-nand"; 71 s3c_device_nand.name = "s3c2440-nand";
72 s3c_device_usbgadget.name = "s3c2440-usbgadget";
72} 73}
73 74
74void __init s3c244x_init_clocks(int xtal) 75void __init s3c244x_init_clocks(int xtal)
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index ecf5e232a6f..c4bca753165 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -15,8 +15,8 @@ config CPU_ARM610
15 select CPU_32v3 15 select CPU_32v3
16 select CPU_CACHE_V3 16 select CPU_CACHE_V3
17 select CPU_CACHE_VIVT 17 select CPU_CACHE_VIVT
18 select CPU_COPY_V3 18 select CPU_COPY_V3 if MMU
19 select CPU_TLB_V3 19 select CPU_TLB_V3 if MMU
20 help 20 help
21 The ARM610 is the successor to the ARM3 processor 21 The ARM610 is the successor to the ARM3 processor
22 and was produced by VLSI Technology Inc. 22 and was produced by VLSI Technology Inc.
@@ -31,8 +31,8 @@ config CPU_ARM710
31 select CPU_32v3 31 select CPU_32v3
32 select CPU_CACHE_V3 32 select CPU_CACHE_V3
33 select CPU_CACHE_VIVT 33 select CPU_CACHE_VIVT
34 select CPU_COPY_V3 34 select CPU_COPY_V3 if MMU
35 select CPU_TLB_V3 35 select CPU_TLB_V3 if MMU
36 help 36 help
37 A 32-bit RISC microprocessor based on the ARM7 processor core 37 A 32-bit RISC microprocessor based on the ARM7 processor core
38 designed by Advanced RISC Machines Ltd. The ARM710 is the 38 designed by Advanced RISC Machines Ltd. The ARM710 is the
@@ -50,8 +50,8 @@ config CPU_ARM720T
50 select CPU_ABRT_LV4T 50 select CPU_ABRT_LV4T
51 select CPU_CACHE_V4 51 select CPU_CACHE_V4
52 select CPU_CACHE_VIVT 52 select CPU_CACHE_VIVT
53 select CPU_COPY_V4WT 53 select CPU_COPY_V4WT if MMU
54 select CPU_TLB_V4WT 54 select CPU_TLB_V4WT if MMU
55 help 55 help
56 A 32-bit RISC processor with 8kByte Cache, Write Buffer and 56 A 32-bit RISC processor with 8kByte Cache, Write Buffer and
57 MMU built around an ARM7TDMI core. 57 MMU built around an ARM7TDMI core.
@@ -68,8 +68,8 @@ config CPU_ARM920T
68 select CPU_ABRT_EV4T 68 select CPU_ABRT_EV4T
69 select CPU_CACHE_V4WT 69 select CPU_CACHE_V4WT
70 select CPU_CACHE_VIVT 70 select CPU_CACHE_VIVT
71 select CPU_COPY_V4WB 71 select CPU_COPY_V4WB if MMU
72 select CPU_TLB_V4WBI 72 select CPU_TLB_V4WBI if MMU
73 help 73 help
74 The ARM920T is licensed to be produced by numerous vendors, 74 The ARM920T is licensed to be produced by numerous vendors,
75 and is used in the Maverick EP9312 and the Samsung S3C2410. 75 and is used in the Maverick EP9312 and the Samsung S3C2410.
@@ -89,8 +89,8 @@ config CPU_ARM922T
89 select CPU_ABRT_EV4T 89 select CPU_ABRT_EV4T
90 select CPU_CACHE_V4WT 90 select CPU_CACHE_V4WT
91 select CPU_CACHE_VIVT 91 select CPU_CACHE_VIVT
92 select CPU_COPY_V4WB 92 select CPU_COPY_V4WB if MMU
93 select CPU_TLB_V4WBI 93 select CPU_TLB_V4WBI if MMU
94 help 94 help
95 The ARM922T is a version of the ARM920T, but with smaller 95 The ARM922T is a version of the ARM920T, but with smaller
96 instruction and data caches. It is used in Altera's 96 instruction and data caches. It is used in Altera's
@@ -108,8 +108,8 @@ config CPU_ARM925T
108 select CPU_ABRT_EV4T 108 select CPU_ABRT_EV4T
109 select CPU_CACHE_V4WT 109 select CPU_CACHE_V4WT
110 select CPU_CACHE_VIVT 110 select CPU_CACHE_VIVT
111 select CPU_COPY_V4WB 111 select CPU_COPY_V4WB if MMU
112 select CPU_TLB_V4WBI 112 select CPU_TLB_V4WBI if MMU
113 help 113 help
114 The ARM925T is a mix between the ARM920T and ARM926T, but with 114 The ARM925T is a mix between the ARM920T and ARM926T, but with
115 different instruction and data caches. It is used in TI's OMAP 115 different instruction and data caches. It is used in TI's OMAP
@@ -126,8 +126,8 @@ config CPU_ARM926T
126 select CPU_32v5 126 select CPU_32v5
127 select CPU_ABRT_EV5TJ 127 select CPU_ABRT_EV5TJ
128 select CPU_CACHE_VIVT 128 select CPU_CACHE_VIVT
129 select CPU_COPY_V4WB 129 select CPU_COPY_V4WB if MMU
130 select CPU_TLB_V4WBI 130 select CPU_TLB_V4WBI if MMU
131 help 131 help
132 This is a variant of the ARM920. It has slightly different 132 This is a variant of the ARM920. It has slightly different
133 instruction sequences for cache and TLB operations. Curiously, 133 instruction sequences for cache and TLB operations. Curiously,
@@ -144,8 +144,8 @@ config CPU_ARM1020
144 select CPU_ABRT_EV4T 144 select CPU_ABRT_EV4T
145 select CPU_CACHE_V4WT 145 select CPU_CACHE_V4WT
146 select CPU_CACHE_VIVT 146 select CPU_CACHE_VIVT
147 select CPU_COPY_V4WB 147 select CPU_COPY_V4WB if MMU
148 select CPU_TLB_V4WBI 148 select CPU_TLB_V4WBI if MMU
149 help 149 help
150 The ARM1020 is the 32K cached version of the ARM10 processor, 150 The ARM1020 is the 32K cached version of the ARM10 processor,
151 with an addition of a floating-point unit. 151 with an addition of a floating-point unit.
@@ -161,8 +161,8 @@ config CPU_ARM1020E
161 select CPU_ABRT_EV4T 161 select CPU_ABRT_EV4T
162 select CPU_CACHE_V4WT 162 select CPU_CACHE_V4WT
163 select CPU_CACHE_VIVT 163 select CPU_CACHE_VIVT
164 select CPU_COPY_V4WB 164 select CPU_COPY_V4WB if MMU
165 select CPU_TLB_V4WBI 165 select CPU_TLB_V4WBI if MMU
166 depends on n 166 depends on n
167 167
168# ARM1022E 168# ARM1022E
@@ -172,8 +172,8 @@ config CPU_ARM1022
172 select CPU_32v5 172 select CPU_32v5
173 select CPU_ABRT_EV4T 173 select CPU_ABRT_EV4T
174 select CPU_CACHE_VIVT 174 select CPU_CACHE_VIVT
175 select CPU_COPY_V4WB # can probably do better 175 select CPU_COPY_V4WB if MMU # can probably do better
176 select CPU_TLB_V4WBI 176 select CPU_TLB_V4WBI if MMU
177 help 177 help
178 The ARM1022E is an implementation of the ARMv5TE architecture 178 The ARM1022E is an implementation of the ARMv5TE architecture
179 based upon the ARM10 integer core with a 16KiB L1 Harvard cache, 179 based upon the ARM10 integer core with a 16KiB L1 Harvard cache,
@@ -189,8 +189,8 @@ config CPU_ARM1026
189 select CPU_32v5 189 select CPU_32v5
190 select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10 190 select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10
191 select CPU_CACHE_VIVT 191 select CPU_CACHE_VIVT
192 select CPU_COPY_V4WB # can probably do better 192 select CPU_COPY_V4WB if MMU # can probably do better
193 select CPU_TLB_V4WBI 193 select CPU_TLB_V4WBI if MMU
194 help 194 help
195 The ARM1026EJ-S is an implementation of the ARMv5TEJ architecture 195 The ARM1026EJ-S is an implementation of the ARMv5TEJ architecture
196 based upon the ARM10 integer core. 196 based upon the ARM10 integer core.
@@ -207,8 +207,8 @@ config CPU_SA110
207 select CPU_ABRT_EV4 207 select CPU_ABRT_EV4
208 select CPU_CACHE_V4WB 208 select CPU_CACHE_V4WB
209 select CPU_CACHE_VIVT 209 select CPU_CACHE_VIVT
210 select CPU_COPY_V4WB 210 select CPU_COPY_V4WB if MMU
211 select CPU_TLB_V4WB 211 select CPU_TLB_V4WB if MMU
212 help 212 help
213 The Intel StrongARM(R) SA-110 is a 32-bit microprocessor and 213 The Intel StrongARM(R) SA-110 is a 32-bit microprocessor and
214 is available at five speeds ranging from 100 MHz to 233 MHz. 214 is available at five speeds ranging from 100 MHz to 233 MHz.
@@ -227,7 +227,7 @@ config CPU_SA1100
227 select CPU_ABRT_EV4 227 select CPU_ABRT_EV4
228 select CPU_CACHE_V4WB 228 select CPU_CACHE_V4WB
229 select CPU_CACHE_VIVT 229 select CPU_CACHE_VIVT
230 select CPU_TLB_V4WB 230 select CPU_TLB_V4WB if MMU
231 231
232# XScale 232# XScale
233config CPU_XSCALE 233config CPU_XSCALE
@@ -237,7 +237,7 @@ config CPU_XSCALE
237 select CPU_32v5 237 select CPU_32v5
238 select CPU_ABRT_EV5T 238 select CPU_ABRT_EV5T
239 select CPU_CACHE_VIVT 239 select CPU_CACHE_VIVT
240 select CPU_TLB_V4WBI 240 select CPU_TLB_V4WBI if MMU
241 241
242# XScale Core Version 3 242# XScale Core Version 3
243config CPU_XSC3 243config CPU_XSC3
@@ -247,7 +247,7 @@ config CPU_XSC3
247 select CPU_32v5 247 select CPU_32v5
248 select CPU_ABRT_EV5T 248 select CPU_ABRT_EV5T
249 select CPU_CACHE_VIVT 249 select CPU_CACHE_VIVT
250 select CPU_TLB_V4WBI 250 select CPU_TLB_V4WBI if MMU
251 select IO_36 251 select IO_36
252 252
253# ARMv6 253# ARMv6
@@ -258,8 +258,8 @@ config CPU_V6
258 select CPU_ABRT_EV6 258 select CPU_ABRT_EV6
259 select CPU_CACHE_V6 259 select CPU_CACHE_V6
260 select CPU_CACHE_VIPT 260 select CPU_CACHE_VIPT
261 select CPU_COPY_V6 261 select CPU_COPY_V6 if MMU
262 select CPU_TLB_V6 262 select CPU_TLB_V6 if MMU
263 263
264# ARMv6k 264# ARMv6k
265config CPU_32v6K 265config CPU_32v6K
@@ -277,17 +277,17 @@ config CPU_32v6K
277# This defines the compiler instruction set which depends on the machine type. 277# This defines the compiler instruction set which depends on the machine type.
278config CPU_32v3 278config CPU_32v3
279 bool 279 bool
280 select TLS_REG_EMUL if SMP 280 select TLS_REG_EMUL if SMP || !MMU
281 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP 281 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
282 282
283config CPU_32v4 283config CPU_32v4
284 bool 284 bool
285 select TLS_REG_EMUL if SMP 285 select TLS_REG_EMUL if SMP || !MMU
286 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP 286 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
287 287
288config CPU_32v5 288config CPU_32v5
289 bool 289 bool
290 select TLS_REG_EMUL if SMP 290 select TLS_REG_EMUL if SMP || !MMU
291 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP 291 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
292 292
293config CPU_32v6 293config CPU_32v6
@@ -334,6 +334,7 @@ config CPU_CACHE_VIVT
334config CPU_CACHE_VIPT 334config CPU_CACHE_VIPT
335 bool 335 bool
336 336
337if MMU
337# The copy-page model 338# The copy-page model
338config CPU_COPY_V3 339config CPU_COPY_V3
339 bool 340 bool
@@ -372,6 +373,8 @@ config CPU_TLB_V4WBI
372config CPU_TLB_V6 373config CPU_TLB_V6
373 bool 374 bool
374 375
376endif
377
375# 378#
376# CPU supports 36-bit I/O 379# CPU supports 36-bit I/O
377# 380#
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 07a53850578..21a2770226e 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -2,10 +2,16 @@
2# Makefile for the linux arm-specific parts of the memory manager. 2# Makefile for the linux arm-specific parts of the memory manager.
3# 3#
4 4
5obj-y := consistent.o extable.o fault-armv.o \ 5obj-y := consistent.o extable.o fault.o init.o \
6 fault.o flush.o init.o ioremap.o mmap.o \ 6 iomap.o
7
8obj-$(CONFIG_MMU) += fault-armv.o flush.o ioremap.o mmap.o \
7 mm-armv.o 9 mm-armv.o
8 10
11ifneq ($(CONFIG_MMU),y)
12obj-y += nommu.o
13endif
14
9obj-$(CONFIG_MODULES) += proc-syms.o 15obj-$(CONFIG_MODULES) += proc-syms.o
10 16
11obj-$(CONFIG_ALIGNMENT_TRAP) += alignment.o 17obj-$(CONFIG_ALIGNMENT_TRAP) += alignment.o
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 9ea1f87a707..989fd681c82 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -26,8 +26,6 @@
26#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
27#include <asm/mach/map.h> 27#include <asm/mach/map.h>
28 28
29#define TABLE_SIZE (2 * PTRS_PER_PTE * sizeof(pte_t))
30
31DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); 29DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
32 30
33extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; 31extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
diff --git a/arch/arm/mm/iomap.c b/arch/arm/mm/iomap.c
new file mode 100644
index 00000000000..62066f3020c
--- /dev/null
+++ b/arch/arm/mm/iomap.c
@@ -0,0 +1,55 @@
1/*
2 * linux/arch/arm/mm/iomap.c
3 *
4 * Map IO port and PCI memory spaces so that {read,write}[bwl] can
5 * be used to access this memory.
6 */
7#include <linux/module.h>
8#include <linux/pci.h>
9#include <linux/ioport.h>
10
11#include <asm/io.h>
12
13#ifdef __io
14void __iomem *ioport_map(unsigned long port, unsigned int nr)
15{
16 return __io(port);
17}
18EXPORT_SYMBOL(ioport_map);
19
20void ioport_unmap(void __iomem *addr)
21{
22}
23EXPORT_SYMBOL(ioport_unmap);
24#endif
25
26#ifdef CONFIG_PCI
27void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
28{
29 unsigned long start = pci_resource_start(dev, bar);
30 unsigned long len = pci_resource_len(dev, bar);
31 unsigned long flags = pci_resource_flags(dev, bar);
32
33 if (!len || !start)
34 return NULL;
35 if (maxlen && len > maxlen)
36 len = maxlen;
37 if (flags & IORESOURCE_IO)
38 return ioport_map(start, len);
39 if (flags & IORESOURCE_MEM) {
40 if (flags & IORESOURCE_CACHEABLE)
41 return ioremap(start, len);
42 return ioremap_nocache(start, len);
43 }
44 return NULL;
45}
46EXPORT_SYMBOL(pci_iomap);
47
48void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
49{
50 if ((unsigned long)addr >= VMALLOC_START &&
51 (unsigned long)addr < VMALLOC_END)
52 iounmap(addr);
53}
54EXPORT_SYMBOL(pci_iounmap);
55#endif
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index c1f7180c7be..7691cfdba56 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -176,50 +176,3 @@ void __iounmap(void __iomem *addr)
176 vunmap((void *)(PAGE_MASK & (unsigned long)addr)); 176 vunmap((void *)(PAGE_MASK & (unsigned long)addr));
177} 177}
178EXPORT_SYMBOL(__iounmap); 178EXPORT_SYMBOL(__iounmap);
179
180#ifdef __io
181void __iomem *ioport_map(unsigned long port, unsigned int nr)
182{
183 return __io(port);
184}
185EXPORT_SYMBOL(ioport_map);
186
187void ioport_unmap(void __iomem *addr)
188{
189}
190EXPORT_SYMBOL(ioport_unmap);
191#endif
192
193#ifdef CONFIG_PCI
194#include <linux/pci.h>
195#include <linux/ioport.h>
196
197void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
198{
199 unsigned long start = pci_resource_start(dev, bar);
200 unsigned long len = pci_resource_len(dev, bar);
201 unsigned long flags = pci_resource_flags(dev, bar);
202
203 if (!len || !start)
204 return NULL;
205 if (maxlen && len > maxlen)
206 len = maxlen;
207 if (flags & IORESOURCE_IO)
208 return ioport_map(start, len);
209 if (flags & IORESOURCE_MEM) {
210 if (flags & IORESOURCE_CACHEABLE)
211 return ioremap(start, len);
212 return ioremap_nocache(start, len);
213 }
214 return NULL;
215}
216EXPORT_SYMBOL(pci_iomap);
217
218void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
219{
220 if ((unsigned long)addr >= VMALLOC_START &&
221 (unsigned long)addr < VMALLOC_END)
222 iounmap(addr);
223}
224EXPORT_SYMBOL(pci_iounmap);
225#endif
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
new file mode 100644
index 00000000000..1464ed817b5
--- /dev/null
+++ b/arch/arm/mm/nommu.c
@@ -0,0 +1,39 @@
1/*
2 * linux/arch/arm/mm/nommu.c
3 *
4 * ARM uCLinux supporting functions.
5 */
6#include <linux/module.h>
7#include <linux/mm.h>
8#include <linux/pagemap.h>
9
10#include <asm/cacheflush.h>
11#include <asm/io.h>
12#include <asm/page.h>
13
14void flush_dcache_page(struct page *page)
15{
16 __cpuc_flush_dcache_page(page_address(page));
17}
18EXPORT_SYMBOL(flush_dcache_page);
19
20void __iomem *__ioremap_pfn(unsigned long pfn, unsigned long offset,
21 size_t size, unsigned long flags)
22{
23 if (pfn >= (0x100000000ULL >> PAGE_SHIFT))
24 return NULL;
25 return (void __iomem *) (offset + (pfn << PAGE_SHIFT));
26}
27EXPORT_SYMBOL(__ioremap_pfn);
28
29void __iomem *__ioremap(unsigned long phys_addr, size_t size,
30 unsigned long flags)
31{
32 return (void __iomem *)phys_addr;
33}
34EXPORT_SYMBOL(__ioremap);
35
36void __iounmap(void __iomem *addr)
37{
38}
39EXPORT_SYMBOL(__iounmap);
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index 959588884fa..b9abbafca81 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -3,6 +3,7 @@
3 * 3 *
4 * Copyright (C) 2000 ARM Limited 4 * Copyright (C) 2000 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * Copyright (C) 2000 Deep Blue Solutions Ltd.
6 * hacked for non-paged-MM by Hyok S. Choi, 2003.
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -101,7 +102,9 @@ ENTRY(cpu_arm1020_reset)
101 mov ip, #0 102 mov ip, #0
102 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 103 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
103 mcr p15, 0, ip, c7, c10, 4 @ drain WB 104 mcr p15, 0, ip, c7, c10, 4 @ drain WB
105#ifdef CONFIG_MMU
104 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 106 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
107#endif
105 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 108 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
106 bic ip, ip, #0x000f @ ............wcam 109 bic ip, ip, #0x000f @ ............wcam
107 bic ip, ip, #0x1100 @ ...i...s........ 110 bic ip, ip, #0x1100 @ ...i...s........
@@ -359,6 +362,7 @@ ENTRY(cpu_arm1020_dcache_clean_area)
359 */ 362 */
360 .align 5 363 .align 5
361ENTRY(cpu_arm1020_switch_mm) 364ENTRY(cpu_arm1020_switch_mm)
365#ifdef CONFIG_MMU
362#ifndef CONFIG_CPU_DCACHE_DISABLE 366#ifndef CONFIG_CPU_DCACHE_DISABLE
363 mcr p15, 0, r3, c7, c10, 4 367 mcr p15, 0, r3, c7, c10, 4
364 mov r1, #0xF @ 16 segments 368 mov r1, #0xF @ 16 segments
@@ -383,6 +387,7 @@ ENTRY(cpu_arm1020_switch_mm)
383 mcr p15, 0, r1, c7, c10, 4 @ drain WB 387 mcr p15, 0, r1, c7, c10, 4 @ drain WB
384 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer 388 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
385 mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs 389 mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs
390#endif /* CONFIG_MMU */
386 mov pc, lr 391 mov pc, lr
387 392
388/* 393/*
@@ -392,6 +397,7 @@ ENTRY(cpu_arm1020_switch_mm)
392 */ 397 */
393 .align 5 398 .align 5
394ENTRY(cpu_arm1020_set_pte) 399ENTRY(cpu_arm1020_set_pte)
400#ifdef CONFIG_MMU
395 str r1, [r0], #-2048 @ linux version 401 str r1, [r0], #-2048 @ linux version
396 402
397 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY 403 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -421,6 +427,7 @@ ENTRY(cpu_arm1020_set_pte)
421 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 427 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
422#endif 428#endif
423 mcr p15, 0, r0, c7, c10, 4 @ drain WB 429 mcr p15, 0, r0, c7, c10, 4 @ drain WB
430#endif /* CONFIG_MMU */
424 mov pc, lr 431 mov pc, lr
425 432
426 __INIT 433 __INIT
@@ -430,7 +437,9 @@ __arm1020_setup:
430 mov r0, #0 437 mov r0, #0
431 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 438 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
432 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 439 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
440#ifdef CONFIG_MMU
433 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 441 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
442#endif
434 mrc p15, 0, r0, c1, c0 @ get control register v4 443 mrc p15, 0, r0, c1, c0 @ get control register v4
435 ldr r5, arm1020_cr1_clear 444 ldr r5, arm1020_cr1_clear
436 bic r0, r0, r5 445 bic r0, r0, r5
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index be6d081ff2b..bcd5ee022e0 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -3,6 +3,7 @@
3 * 3 *
4 * Copyright (C) 2000 ARM Limited 4 * Copyright (C) 2000 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * Copyright (C) 2000 Deep Blue Solutions Ltd.
6 * hacked for non-paged-MM by Hyok S. Choi, 2003.
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -101,7 +102,9 @@ ENTRY(cpu_arm1020e_reset)
101 mov ip, #0 102 mov ip, #0
102 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 103 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
103 mcr p15, 0, ip, c7, c10, 4 @ drain WB 104 mcr p15, 0, ip, c7, c10, 4 @ drain WB
105#ifdef CONFIG_MMU
104 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 106 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
107#endif
105 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 108 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
106 bic ip, ip, #0x000f @ ............wcam 109 bic ip, ip, #0x000f @ ............wcam
107 bic ip, ip, #0x1100 @ ...i...s........ 110 bic ip, ip, #0x1100 @ ...i...s........
@@ -344,6 +347,7 @@ ENTRY(cpu_arm1020e_dcache_clean_area)
344 */ 347 */
345 .align 5 348 .align 5
346ENTRY(cpu_arm1020e_switch_mm) 349ENTRY(cpu_arm1020e_switch_mm)
350#ifdef CONFIG_MMU
347#ifndef CONFIG_CPU_DCACHE_DISABLE 351#ifndef CONFIG_CPU_DCACHE_DISABLE
348 mcr p15, 0, r3, c7, c10, 4 352 mcr p15, 0, r3, c7, c10, 4
349 mov r1, #0xF @ 16 segments 353 mov r1, #0xF @ 16 segments
@@ -367,6 +371,7 @@ ENTRY(cpu_arm1020e_switch_mm)
367 mcr p15, 0, r1, c7, c10, 4 @ drain WB 371 mcr p15, 0, r1, c7, c10, 4 @ drain WB
368 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer 372 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
369 mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs 373 mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs
374#endif
370 mov pc, lr 375 mov pc, lr
371 376
372/* 377/*
@@ -376,6 +381,7 @@ ENTRY(cpu_arm1020e_switch_mm)
376 */ 381 */
377 .align 5 382 .align 5
378ENTRY(cpu_arm1020e_set_pte) 383ENTRY(cpu_arm1020e_set_pte)
384#ifdef CONFIG_MMU
379 str r1, [r0], #-2048 @ linux version 385 str r1, [r0], #-2048 @ linux version
380 386
381 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY 387 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -403,6 +409,7 @@ ENTRY(cpu_arm1020e_set_pte)
403#ifndef CONFIG_CPU_DCACHE_DISABLE 409#ifndef CONFIG_CPU_DCACHE_DISABLE
404 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 410 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
405#endif 411#endif
412#endif /* CONFIG_MMU */
406 mov pc, lr 413 mov pc, lr
407 414
408 __INIT 415 __INIT
@@ -412,7 +419,9 @@ __arm1020e_setup:
412 mov r0, #0 419 mov r0, #0
413 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 420 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
414 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 421 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
422#ifdef CONFIG_MMU
415 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 423 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
424#endif
416 mrc p15, 0, r0, c1, c0 @ get control register v4 425 mrc p15, 0, r0, c1, c0 @ get control register v4
417 ldr r5, arm1020e_cr1_clear 426 ldr r5, arm1020e_cr1_clear
418 bic r0, r0, r5 427 bic r0, r0, r5
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index f778545d57a..b0ccff4fadd 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -3,6 +3,7 @@
3 * 3 *
4 * Copyright (C) 2000 ARM Limited 4 * Copyright (C) 2000 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * Copyright (C) 2000 Deep Blue Solutions Ltd.
6 * hacked for non-paged-MM by Hyok S. Choi, 2003.
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -90,7 +91,9 @@ ENTRY(cpu_arm1022_reset)
90 mov ip, #0 91 mov ip, #0
91 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 92 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
92 mcr p15, 0, ip, c7, c10, 4 @ drain WB 93 mcr p15, 0, ip, c7, c10, 4 @ drain WB
94#ifdef CONFIG_MMU
93 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 95 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
96#endif
94 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 97 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
95 bic ip, ip, #0x000f @ ............wcam 98 bic ip, ip, #0x000f @ ............wcam
96 bic ip, ip, #0x1100 @ ...i...s........ 99 bic ip, ip, #0x1100 @ ...i...s........
@@ -333,6 +336,7 @@ ENTRY(cpu_arm1022_dcache_clean_area)
333 */ 336 */
334 .align 5 337 .align 5
335ENTRY(cpu_arm1022_switch_mm) 338ENTRY(cpu_arm1022_switch_mm)
339#ifdef CONFIG_MMU
336#ifndef CONFIG_CPU_DCACHE_DISABLE 340#ifndef CONFIG_CPU_DCACHE_DISABLE
337 mov r1, #(CACHE_DSEGMENTS - 1) << 5 @ 16 segments 341 mov r1, #(CACHE_DSEGMENTS - 1) << 5 @ 16 segments
3381: orr r3, r1, #(CACHE_DENTRIES - 1) << 26 @ 64 entries 3421: orr r3, r1, #(CACHE_DENTRIES - 1) << 26 @ 64 entries
@@ -349,6 +353,7 @@ ENTRY(cpu_arm1022_switch_mm)
349 mcr p15, 0, r1, c7, c10, 4 @ drain WB 353 mcr p15, 0, r1, c7, c10, 4 @ drain WB
350 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer 354 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
351 mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs 355 mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs
356#endif
352 mov pc, lr 357 mov pc, lr
353 358
354/* 359/*
@@ -358,6 +363,7 @@ ENTRY(cpu_arm1022_switch_mm)
358 */ 363 */
359 .align 5 364 .align 5
360ENTRY(cpu_arm1022_set_pte) 365ENTRY(cpu_arm1022_set_pte)
366#ifdef CONFIG_MMU
361 str r1, [r0], #-2048 @ linux version 367 str r1, [r0], #-2048 @ linux version
362 368
363 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY 369 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -385,6 +391,7 @@ ENTRY(cpu_arm1022_set_pte)
385#ifndef CONFIG_CPU_DCACHE_DISABLE 391#ifndef CONFIG_CPU_DCACHE_DISABLE
386 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 392 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
387#endif 393#endif
394#endif /* CONFIG_MMU */
388 mov pc, lr 395 mov pc, lr
389 396
390 __INIT 397 __INIT
@@ -394,7 +401,9 @@ __arm1022_setup:
394 mov r0, #0 401 mov r0, #0
395 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 402 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
396 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 403 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
404#ifdef CONFIG_MMU
397 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 405 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
406#endif
398 mrc p15, 0, r0, c1, c0 @ get control register v4 407 mrc p15, 0, r0, c1, c0 @ get control register v4
399 ldr r5, arm1022_cr1_clear 408 ldr r5, arm1022_cr1_clear
400 bic r0, r0, r5 409 bic r0, r0, r5
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 148c111fde7..abe850c9a64 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -3,6 +3,7 @@
3 * 3 *
4 * Copyright (C) 2000 ARM Limited 4 * Copyright (C) 2000 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * Copyright (C) 2000 Deep Blue Solutions Ltd.
6 * hacked for non-paged-MM by Hyok S. Choi, 2003.
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -90,7 +91,9 @@ ENTRY(cpu_arm1026_reset)
90 mov ip, #0 91 mov ip, #0
91 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 92 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
92 mcr p15, 0, ip, c7, c10, 4 @ drain WB 93 mcr p15, 0, ip, c7, c10, 4 @ drain WB
94#ifdef CONFIG_MMU
93 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 95 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
96#endif
94 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 97 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
95 bic ip, ip, #0x000f @ ............wcam 98 bic ip, ip, #0x000f @ ............wcam
96 bic ip, ip, #0x1100 @ ...i...s........ 99 bic ip, ip, #0x1100 @ ...i...s........
@@ -327,6 +330,7 @@ ENTRY(cpu_arm1026_dcache_clean_area)
327 */ 330 */
328 .align 5 331 .align 5
329ENTRY(cpu_arm1026_switch_mm) 332ENTRY(cpu_arm1026_switch_mm)
333#ifdef CONFIG_MMU
330 mov r1, #0 334 mov r1, #0
331#ifndef CONFIG_CPU_DCACHE_DISABLE 335#ifndef CONFIG_CPU_DCACHE_DISABLE
3321: mrc p15, 0, r15, c7, c14, 3 @ test, clean, invalidate 3361: mrc p15, 0, r15, c7, c14, 3 @ test, clean, invalidate
@@ -338,6 +342,7 @@ ENTRY(cpu_arm1026_switch_mm)
338 mcr p15, 0, r1, c7, c10, 4 @ drain WB 342 mcr p15, 0, r1, c7, c10, 4 @ drain WB
339 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer 343 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
340 mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs 344 mcr p15, 0, r1, c8, c7, 0 @ invalidate I & D TLBs
345#endif
341 mov pc, lr 346 mov pc, lr
342 347
343/* 348/*
@@ -347,6 +352,7 @@ ENTRY(cpu_arm1026_switch_mm)
347 */ 352 */
348 .align 5 353 .align 5
349ENTRY(cpu_arm1026_set_pte) 354ENTRY(cpu_arm1026_set_pte)
355#ifdef CONFIG_MMU
350 str r1, [r0], #-2048 @ linux version 356 str r1, [r0], #-2048 @ linux version
351 357
352 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY 358 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -374,6 +380,7 @@ ENTRY(cpu_arm1026_set_pte)
374#ifndef CONFIG_CPU_DCACHE_DISABLE 380#ifndef CONFIG_CPU_DCACHE_DISABLE
375 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 381 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
376#endif 382#endif
383#endif /* CONFIG_MMU */
377 mov pc, lr 384 mov pc, lr
378 385
379 386
@@ -384,8 +391,10 @@ __arm1026_setup:
384 mov r0, #0 391 mov r0, #0
385 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 392 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
386 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 393 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
394#ifdef CONFIG_MMU
387 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 395 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
388 mcr p15, 0, r4, c2, c0 @ load page table pointer 396 mcr p15, 0, r4, c2, c0 @ load page table pointer
397#endif
389#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH 398#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
390 mov r0, #4 @ explicitly disable writeback 399 mov r0, #4 @ explicitly disable writeback
391 mcr p15, 7, r0, c15, c0, 0 400 mcr p15, 7, r0, c15, c0, 0
diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
index 540359b475d..7a705edfa4b 100644
--- a/arch/arm/mm/proc-arm6_7.S
+++ b/arch/arm/mm/proc-arm6_7.S
@@ -2,6 +2,7 @@
2 * linux/arch/arm/mm/proc-arm6,7.S 2 * linux/arch/arm/mm/proc-arm6,7.S
3 * 3 *
4 * Copyright (C) 1997-2000 Russell King 4 * Copyright (C) 1997-2000 Russell King
5 * hacked for non-paged-MM by Hyok S. Choi, 2003.
5 * 6 *
6 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
@@ -199,10 +200,12 @@ ENTRY(cpu_arm7_do_idle)
199 */ 200 */
200ENTRY(cpu_arm6_switch_mm) 201ENTRY(cpu_arm6_switch_mm)
201ENTRY(cpu_arm7_switch_mm) 202ENTRY(cpu_arm7_switch_mm)
203#ifdef CONFIG_MMU
202 mov r1, #0 204 mov r1, #0
203 mcr p15, 0, r1, c7, c0, 0 @ flush cache 205 mcr p15, 0, r1, c7, c0, 0 @ flush cache
204 mcr p15, 0, r0, c2, c0, 0 @ update page table ptr 206 mcr p15, 0, r0, c2, c0, 0 @ update page table ptr
205 mcr p15, 0, r1, c5, c0, 0 @ flush TLBs 207 mcr p15, 0, r1, c5, c0, 0 @ flush TLBs
208#endif
206 mov pc, lr 209 mov pc, lr
207 210
208/* 211/*
@@ -214,6 +217,7 @@ ENTRY(cpu_arm7_switch_mm)
214 .align 5 217 .align 5
215ENTRY(cpu_arm6_set_pte) 218ENTRY(cpu_arm6_set_pte)
216ENTRY(cpu_arm7_set_pte) 219ENTRY(cpu_arm7_set_pte)
220#ifdef CONFIG_MMU
217 str r1, [r0], #-2048 @ linux version 221 str r1, [r0], #-2048 @ linux version
218 222
219 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY 223 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -232,6 +236,7 @@ ENTRY(cpu_arm7_set_pte)
232 movne r2, #0 236 movne r2, #0
233 237
234 str r2, [r0] @ hardware version 238 str r2, [r0] @ hardware version
239#endif /* CONFIG_MMU */
235 mov pc, lr 240 mov pc, lr
236 241
237/* 242/*
@@ -243,7 +248,9 @@ ENTRY(cpu_arm6_reset)
243ENTRY(cpu_arm7_reset) 248ENTRY(cpu_arm7_reset)
244 mov r1, #0 249 mov r1, #0
245 mcr p15, 0, r1, c7, c0, 0 @ flush cache 250 mcr p15, 0, r1, c7, c0, 0 @ flush cache
251#ifdef CONFIG_MMU
246 mcr p15, 0, r1, c5, c0, 0 @ flush TLB 252 mcr p15, 0, r1, c5, c0, 0 @ flush TLB
253#endif
247 mov r1, #0x30 254 mov r1, #0x30
248 mcr p15, 0, r1, c1, c0, 0 @ turn off MMU etc 255 mcr p15, 0, r1, c1, c0, 0 @ turn off MMU etc
249 mov pc, r0 256 mov pc, r0
@@ -253,19 +260,27 @@ ENTRY(cpu_arm7_reset)
253 .type __arm6_setup, #function 260 .type __arm6_setup, #function
254__arm6_setup: mov r0, #0 261__arm6_setup: mov r0, #0
255 mcr p15, 0, r0, c7, c0 @ flush caches on v3 262 mcr p15, 0, r0, c7, c0 @ flush caches on v3
263#ifdef CONFIG_MMU
256 mcr p15, 0, r0, c5, c0 @ flush TLBs on v3 264 mcr p15, 0, r0, c5, c0 @ flush TLBs on v3
257 mov r0, #0x3d @ . ..RS BLDP WCAM 265 mov r0, #0x3d @ . ..RS BLDP WCAM
258 orr r0, r0, #0x100 @ . ..01 0011 1101 266 orr r0, r0, #0x100 @ . ..01 0011 1101
267#else
268 mov r0, #0x3c @ . ..RS BLDP WCA.
269#endif
259 mov pc, lr 270 mov pc, lr
260 .size __arm6_setup, . - __arm6_setup 271 .size __arm6_setup, . - __arm6_setup
261 272
262 .type __arm7_setup, #function 273 .type __arm7_setup, #function
263__arm7_setup: mov r0, #0 274__arm7_setup: mov r0, #0
264 mcr p15, 0, r0, c7, c0 @ flush caches on v3 275 mcr p15, 0, r0, c7, c0 @ flush caches on v3
276#ifdef CONFIG_MMU
265 mcr p15, 0, r0, c5, c0 @ flush TLBs on v3 277 mcr p15, 0, r0, c5, c0 @ flush TLBs on v3
266 mcr p15, 0, r0, c3, c0 @ load domain access register 278 mcr p15, 0, r0, c3, c0 @ load domain access register
267 mov r0, #0x7d @ . ..RS BLDP WCAM 279 mov r0, #0x7d @ . ..RS BLDP WCAM
268 orr r0, r0, #0x100 @ . ..01 0111 1101 280 orr r0, r0, #0x100 @ . ..01 0111 1101
281#else
282 mov r0, #0x7c @ . ..RS BLDP WCA.
283#endif
269 mov pc, lr 284 mov pc, lr
270 .size __arm7_setup, . - __arm7_setup 285 .size __arm7_setup, . - __arm7_setup
271 286
diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S
index 26f00ee2ad9..86102467d37 100644
--- a/arch/arm/mm/proc-arm720.S
+++ b/arch/arm/mm/proc-arm720.S
@@ -4,6 +4,7 @@
4 * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) 4 * Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
5 * Rob Scott (rscott@mtrob.fdns.net) 5 * Rob Scott (rscott@mtrob.fdns.net)
6 * Copyright (C) 2000 ARM Limited, Deep Blue Solutions Ltd. 6 * Copyright (C) 2000 ARM Limited, Deep Blue Solutions Ltd.
7 * hacked for non-paged-MM by Hyok S. Choi, 2004.
7 * 8 *
8 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
@@ -29,6 +30,7 @@
29 * out of 'proc-arm6,7.S' per RMK discussion 30 * out of 'proc-arm6,7.S' per RMK discussion
30 * 07-25-2000 SJH Added idle function. 31 * 07-25-2000 SJH Added idle function.
31 * 08-25-2000 DBS Updated for integration of ARM Ltd version. 32 * 08-25-2000 DBS Updated for integration of ARM Ltd version.
33 * 04-20-2004 HSC modified for non-paged memory management mode.
32 */ 34 */
33#include <linux/linkage.h> 35#include <linux/linkage.h>
34#include <linux/init.h> 36#include <linux/init.h>
@@ -75,10 +77,12 @@ ENTRY(cpu_arm720_do_idle)
75 * the new. 77 * the new.
76 */ 78 */
77ENTRY(cpu_arm720_switch_mm) 79ENTRY(cpu_arm720_switch_mm)
80#ifdef CONFIG_MMU
78 mov r1, #0 81 mov r1, #0
79 mcr p15, 0, r1, c7, c7, 0 @ invalidate cache 82 mcr p15, 0, r1, c7, c7, 0 @ invalidate cache
80 mcr p15, 0, r0, c2, c0, 0 @ update page table ptr 83 mcr p15, 0, r0, c2, c0, 0 @ update page table ptr
81 mcr p15, 0, r1, c8, c7, 0 @ flush TLB (v4) 84 mcr p15, 0, r1, c8, c7, 0 @ flush TLB (v4)
85#endif
82 mov pc, lr 86 mov pc, lr
83 87
84/* 88/*
@@ -89,6 +93,7 @@ ENTRY(cpu_arm720_switch_mm)
89 */ 93 */
90 .align 5 94 .align 5
91ENTRY(cpu_arm720_set_pte) 95ENTRY(cpu_arm720_set_pte)
96#ifdef CONFIG_MMU
92 str r1, [r0], #-2048 @ linux version 97 str r1, [r0], #-2048 @ linux version
93 98
94 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY 99 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -107,6 +112,7 @@ ENTRY(cpu_arm720_set_pte)
107 movne r2, #0 112 movne r2, #0
108 113
109 str r2, [r0] @ hardware version 114 str r2, [r0] @ hardware version
115#endif
110 mov pc, lr 116 mov pc, lr
111 117
112/* 118/*
@@ -117,7 +123,9 @@ ENTRY(cpu_arm720_set_pte)
117ENTRY(cpu_arm720_reset) 123ENTRY(cpu_arm720_reset)
118 mov ip, #0 124 mov ip, #0
119 mcr p15, 0, ip, c7, c7, 0 @ invalidate cache 125 mcr p15, 0, ip, c7, c7, 0 @ invalidate cache
126#ifdef CONFIG_MMU
120 mcr p15, 0, ip, c8, c7, 0 @ flush TLB (v4) 127 mcr p15, 0, ip, c8, c7, 0 @ flush TLB (v4)
128#endif
121 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register 129 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register
122 bic ip, ip, #0x000f @ ............wcam 130 bic ip, ip, #0x000f @ ............wcam
123 bic ip, ip, #0x2100 @ ..v....s........ 131 bic ip, ip, #0x2100 @ ..v....s........
@@ -130,7 +138,9 @@ ENTRY(cpu_arm720_reset)
130__arm710_setup: 138__arm710_setup:
131 mov r0, #0 139 mov r0, #0
132 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches 140 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
141#ifdef CONFIG_MMU
133 mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4) 142 mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4)
143#endif
134 mrc p15, 0, r0, c1, c0 @ get control register 144 mrc p15, 0, r0, c1, c0 @ get control register
135 ldr r5, arm710_cr1_clear 145 ldr r5, arm710_cr1_clear
136 bic r0, r0, r5 146 bic r0, r0, r5
@@ -156,7 +166,9 @@ arm710_cr1_set:
156__arm720_setup: 166__arm720_setup:
157 mov r0, #0 167 mov r0, #0
158 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches 168 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
169#ifdef CONFIG_MMU
159 mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4) 170 mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4)
171#endif
160 mrc p15, 0, r0, c1, c0 @ get control register 172 mrc p15, 0, r0, c1, c0 @ get control register
161 ldr r5, arm720_cr1_clear 173 ldr r5, arm720_cr1_clear
162 bic r0, r0, r5 174 bic r0, r0, r5
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index a17f79e0199..31dc839ba07 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -3,6 +3,7 @@
3 * 3 *
4 * Copyright (C) 1999,2000 ARM Limited 4 * Copyright (C) 1999,2000 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * Copyright (C) 2000 Deep Blue Solutions Ltd.
6 * hacked for non-paged-MM by Hyok S. Choi, 2003.
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -97,7 +98,9 @@ ENTRY(cpu_arm920_reset)
97 mov ip, #0 98 mov ip, #0
98 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 99 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
99 mcr p15, 0, ip, c7, c10, 4 @ drain WB 100 mcr p15, 0, ip, c7, c10, 4 @ drain WB
101#ifdef CONFIG_MMU
100 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 102 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
103#endif
101 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 104 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
102 bic ip, ip, #0x000f @ ............wcam 105 bic ip, ip, #0x000f @ ............wcam
103 bic ip, ip, #0x1100 @ ...i...s........ 106 bic ip, ip, #0x1100 @ ...i...s........
@@ -317,6 +320,7 @@ ENTRY(cpu_arm920_dcache_clean_area)
317 */ 320 */
318 .align 5 321 .align 5
319ENTRY(cpu_arm920_switch_mm) 322ENTRY(cpu_arm920_switch_mm)
323#ifdef CONFIG_MMU
320 mov ip, #0 324 mov ip, #0
321#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH 325#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
322 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache 326 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
@@ -337,6 +341,7 @@ ENTRY(cpu_arm920_switch_mm)
337 mcr p15, 0, ip, c7, c10, 4 @ drain WB 341 mcr p15, 0, ip, c7, c10, 4 @ drain WB
338 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer 342 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
339 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 343 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
344#endif
340 mov pc, lr 345 mov pc, lr
341 346
342/* 347/*
@@ -346,6 +351,7 @@ ENTRY(cpu_arm920_switch_mm)
346 */ 351 */
347 .align 5 352 .align 5
348ENTRY(cpu_arm920_set_pte) 353ENTRY(cpu_arm920_set_pte)
354#ifdef CONFIG_MMU
349 str r1, [r0], #-2048 @ linux version 355 str r1, [r0], #-2048 @ linux version
350 356
351 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY 357 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -372,6 +378,7 @@ ENTRY(cpu_arm920_set_pte)
372 mov r0, r0 378 mov r0, r0
373 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 379 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
374 mcr p15, 0, r0, c7, c10, 4 @ drain WB 380 mcr p15, 0, r0, c7, c10, 4 @ drain WB
381#endif /* CONFIG_MMU */
375 mov pc, lr 382 mov pc, lr
376 383
377 __INIT 384 __INIT
@@ -381,7 +388,9 @@ __arm920_setup:
381 mov r0, #0 388 mov r0, #0
382 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 389 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
383 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 390 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
391#ifdef CONFIG_MMU
384 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 392 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
393#endif
385 mrc p15, 0, r0, c1, c0 @ get control register v4 394 mrc p15, 0, r0, c1, c0 @ get control register v4
386 ldr r5, arm920_cr1_clear 395 ldr r5, arm920_cr1_clear
387 bic r0, r0, r5 396 bic r0, r0, r5
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index bbde4a024a4..9e57c34f5c0 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -4,6 +4,7 @@
4 * Copyright (C) 1999,2000 ARM Limited 4 * Copyright (C) 1999,2000 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * Copyright (C) 2000 Deep Blue Solutions Ltd.
6 * Copyright (C) 2001 Altera Corporation 6 * Copyright (C) 2001 Altera Corporation
7 * hacked for non-paged-MM by Hyok S. Choi, 2003.
7 * 8 *
8 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
@@ -99,7 +100,9 @@ ENTRY(cpu_arm922_reset)
99 mov ip, #0 100 mov ip, #0
100 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 101 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
101 mcr p15, 0, ip, c7, c10, 4 @ drain WB 102 mcr p15, 0, ip, c7, c10, 4 @ drain WB
103#ifdef CONFIG_MMU
102 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 104 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
105#endif
103 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 106 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
104 bic ip, ip, #0x000f @ ............wcam 107 bic ip, ip, #0x000f @ ............wcam
105 bic ip, ip, #0x1100 @ ...i...s........ 108 bic ip, ip, #0x1100 @ ...i...s........
@@ -321,6 +324,7 @@ ENTRY(cpu_arm922_dcache_clean_area)
321 */ 324 */
322 .align 5 325 .align 5
323ENTRY(cpu_arm922_switch_mm) 326ENTRY(cpu_arm922_switch_mm)
327#ifdef CONFIG_MMU
324 mov ip, #0 328 mov ip, #0
325#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH 329#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
326 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache 330 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
@@ -341,6 +345,7 @@ ENTRY(cpu_arm922_switch_mm)
341 mcr p15, 0, ip, c7, c10, 4 @ drain WB 345 mcr p15, 0, ip, c7, c10, 4 @ drain WB
342 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer 346 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
343 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 347 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
348#endif
344 mov pc, lr 349 mov pc, lr
345 350
346/* 351/*
@@ -350,6 +355,7 @@ ENTRY(cpu_arm922_switch_mm)
350 */ 355 */
351 .align 5 356 .align 5
352ENTRY(cpu_arm922_set_pte) 357ENTRY(cpu_arm922_set_pte)
358#ifdef CONFIG_MMU
353 str r1, [r0], #-2048 @ linux version 359 str r1, [r0], #-2048 @ linux version
354 360
355 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY 361 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -376,6 +382,7 @@ ENTRY(cpu_arm922_set_pte)
376 mov r0, r0 382 mov r0, r0
377 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 383 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
378 mcr p15, 0, r0, c7, c10, 4 @ drain WB 384 mcr p15, 0, r0, c7, c10, 4 @ drain WB
385#endif /* CONFIG_MMU */
379 mov pc, lr 386 mov pc, lr
380 387
381 __INIT 388 __INIT
@@ -385,7 +392,9 @@ __arm922_setup:
385 mov r0, #0 392 mov r0, #0
386 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 393 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
387 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 394 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
395#ifdef CONFIG_MMU
388 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 396 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
397#endif
389 mrc p15, 0, r0, c1, c0 @ get control register v4 398 mrc p15, 0, r0, c1, c0 @ get control register v4
390 ldr r5, arm922_cr1_clear 399 ldr r5, arm922_cr1_clear
391 bic r0, r0, r5 400 bic r0, r0, r5
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 224ce226a01..8d47c9f3f93 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -9,6 +9,8 @@
9 * Update for Linux-2.6 and cache flush improvements 9 * Update for Linux-2.6 and cache flush improvements
10 * Copyright (C) 2004 Nokia Corporation by Tony Lindgren <tony@atomide.com> 10 * Copyright (C) 2004 Nokia Corporation by Tony Lindgren <tony@atomide.com>
11 * 11 *
12 * hacked for non-paged-MM by Hyok S. Choi, 2004.
13 *
12 * This program is free software; you can redistribute it and/or modify 14 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by 15 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or 16 * the Free Software Foundation; either version 2 of the License, or
@@ -122,7 +124,9 @@ ENTRY(cpu_arm925_reset)
122 mov ip, #0 124 mov ip, #0
123 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 125 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
124 mcr p15, 0, ip, c7, c10, 4 @ drain WB 126 mcr p15, 0, ip, c7, c10, 4 @ drain WB
127#ifdef CONFIG_MMU
125 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 128 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
129#endif
126 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 130 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
127 bic ip, ip, #0x000f @ ............wcam 131 bic ip, ip, #0x000f @ ............wcam
128 bic ip, ip, #0x1100 @ ...i...s........ 132 bic ip, ip, #0x1100 @ ...i...s........
@@ -369,6 +373,7 @@ ENTRY(cpu_arm925_dcache_clean_area)
369 */ 373 */
370 .align 5 374 .align 5
371ENTRY(cpu_arm925_switch_mm) 375ENTRY(cpu_arm925_switch_mm)
376#ifdef CONFIG_MMU
372 mov ip, #0 377 mov ip, #0
373#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH 378#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
374 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache 379 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
@@ -383,6 +388,7 @@ ENTRY(cpu_arm925_switch_mm)
383 mcr p15, 0, ip, c7, c10, 4 @ drain WB 388 mcr p15, 0, ip, c7, c10, 4 @ drain WB
384 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer 389 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
385 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 390 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
391#endif
386 mov pc, lr 392 mov pc, lr
387 393
388/* 394/*
@@ -392,6 +398,7 @@ ENTRY(cpu_arm925_switch_mm)
392 */ 398 */
393 .align 5 399 .align 5
394ENTRY(cpu_arm925_set_pte) 400ENTRY(cpu_arm925_set_pte)
401#ifdef CONFIG_MMU
395 str r1, [r0], #-2048 @ linux version 402 str r1, [r0], #-2048 @ linux version
396 403
397 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY 404 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -420,6 +427,7 @@ ENTRY(cpu_arm925_set_pte)
420 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 427 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
421#endif 428#endif
422 mcr p15, 0, r0, c7, c10, 4 @ drain WB 429 mcr p15, 0, r0, c7, c10, 4 @ drain WB
430#endif /* CONFIG_MMU */
423 mov pc, lr 431 mov pc, lr
424 432
425 __INIT 433 __INIT
@@ -438,7 +446,9 @@ __arm925_setup:
438 mov r0, #0 446 mov r0, #0
439 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 447 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
440 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 448 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
449#ifdef CONFIG_MMU
441 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 450 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
451#endif
442 452
443#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH 453#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
444 mov r0, #4 @ disable write-back on caches explicitly 454 mov r0, #4 @ disable write-back on caches explicitly
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 4e2a087cf38..cb4d8f33d2a 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -3,6 +3,7 @@
3 * 3 *
4 * Copyright (C) 1999-2001 ARM Limited 4 * Copyright (C) 1999-2001 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd. 5 * Copyright (C) 2000 Deep Blue Solutions Ltd.
6 * hacked for non-paged-MM by Hyok S. Choi, 2003.
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -85,7 +86,9 @@ ENTRY(cpu_arm926_reset)
85 mov ip, #0 86 mov ip, #0
86 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 87 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
87 mcr p15, 0, ip, c7, c10, 4 @ drain WB 88 mcr p15, 0, ip, c7, c10, 4 @ drain WB
89#ifdef CONFIG_MMU
88 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 90 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
91#endif
89 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 92 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
90 bic ip, ip, #0x000f @ ............wcam 93 bic ip, ip, #0x000f @ ............wcam
91 bic ip, ip, #0x1100 @ ...i...s........ 94 bic ip, ip, #0x1100 @ ...i...s........
@@ -329,6 +332,7 @@ ENTRY(cpu_arm926_dcache_clean_area)
329 */ 332 */
330 .align 5 333 .align 5
331ENTRY(cpu_arm926_switch_mm) 334ENTRY(cpu_arm926_switch_mm)
335#ifdef CONFIG_MMU
332 mov ip, #0 336 mov ip, #0
333#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH 337#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
334 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache 338 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
@@ -341,6 +345,7 @@ ENTRY(cpu_arm926_switch_mm)
341 mcr p15, 0, ip, c7, c10, 4 @ drain WB 345 mcr p15, 0, ip, c7, c10, 4 @ drain WB
342 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer 346 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
343 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 347 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
348#endif
344 mov pc, lr 349 mov pc, lr
345 350
346/* 351/*
@@ -350,6 +355,7 @@ ENTRY(cpu_arm926_switch_mm)
350 */ 355 */
351 .align 5 356 .align 5
352ENTRY(cpu_arm926_set_pte) 357ENTRY(cpu_arm926_set_pte)
358#ifdef CONFIG_MMU
353 str r1, [r0], #-2048 @ linux version 359 str r1, [r0], #-2048 @ linux version
354 360
355 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY 361 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -378,6 +384,7 @@ ENTRY(cpu_arm926_set_pte)
378 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 384 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
379#endif 385#endif
380 mcr p15, 0, r0, c7, c10, 4 @ drain WB 386 mcr p15, 0, r0, c7, c10, 4 @ drain WB
387#endif
381 mov pc, lr 388 mov pc, lr
382 389
383 __INIT 390 __INIT
@@ -387,7 +394,9 @@ __arm926_setup:
387 mov r0, #0 394 mov r0, #0
388 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 395 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
389 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 396 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
397#ifdef CONFIG_MMU
390 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 398 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
399#endif
391 400
392 401
393#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH 402#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S
index a2dd5ae1077..5a760a2c629 100644
--- a/arch/arm/mm/proc-sa110.S
+++ b/arch/arm/mm/proc-sa110.S
@@ -2,6 +2,7 @@
2 * linux/arch/arm/mm/proc-sa110.S 2 * linux/arch/arm/mm/proc-sa110.S
3 * 3 *
4 * Copyright (C) 1997-2002 Russell King 4 * Copyright (C) 1997-2002 Russell King
5 * hacked for non-paged-MM by Hyok S. Choi, 2003.
5 * 6 *
6 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
@@ -67,7 +68,9 @@ ENTRY(cpu_sa110_reset)
67 mov ip, #0 68 mov ip, #0
68 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 69 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
69 mcr p15, 0, ip, c7, c10, 4 @ drain WB 70 mcr p15, 0, ip, c7, c10, 4 @ drain WB
71#ifdef CONFIG_MMU
70 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 72 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
73#endif
71 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 74 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
72 bic ip, ip, #0x000f @ ............wcam 75 bic ip, ip, #0x000f @ ............wcam
73 bic ip, ip, #0x1100 @ ...i...s........ 76 bic ip, ip, #0x1100 @ ...i...s........
@@ -130,11 +133,15 @@ ENTRY(cpu_sa110_dcache_clean_area)
130 */ 133 */
131 .align 5 134 .align 5
132ENTRY(cpu_sa110_switch_mm) 135ENTRY(cpu_sa110_switch_mm)
136#ifdef CONFIG_MMU
133 str lr, [sp, #-4]! 137 str lr, [sp, #-4]!
134 bl v4wb_flush_kern_cache_all @ clears IP 138 bl v4wb_flush_kern_cache_all @ clears IP
135 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer 139 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
136 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 140 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
137 ldr pc, [sp], #4 141 ldr pc, [sp], #4
142#else
143 mov pc, lr
144#endif
138 145
139/* 146/*
140 * cpu_sa110_set_pte(ptep, pte) 147 * cpu_sa110_set_pte(ptep, pte)
@@ -143,6 +150,7 @@ ENTRY(cpu_sa110_switch_mm)
143 */ 150 */
144 .align 5 151 .align 5
145ENTRY(cpu_sa110_set_pte) 152ENTRY(cpu_sa110_set_pte)
153#ifdef CONFIG_MMU
146 str r1, [r0], #-2048 @ linux version 154 str r1, [r0], #-2048 @ linux version
147 155
148 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY 156 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -164,6 +172,7 @@ ENTRY(cpu_sa110_set_pte)
164 mov r0, r0 172 mov r0, r0
165 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 173 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
166 mcr p15, 0, r0, c7, c10, 4 @ drain WB 174 mcr p15, 0, r0, c7, c10, 4 @ drain WB
175#endif
167 mov pc, lr 176 mov pc, lr
168 177
169 __INIT 178 __INIT
@@ -173,7 +182,9 @@ __sa110_setup:
173 mov r10, #0 182 mov r10, #0
174 mcr p15, 0, r10, c7, c7 @ invalidate I,D caches on v4 183 mcr p15, 0, r10, c7, c7 @ invalidate I,D caches on v4
175 mcr p15, 0, r10, c7, c10, 4 @ drain write buffer on v4 184 mcr p15, 0, r10, c7, c10, 4 @ drain write buffer on v4
185#ifdef CONFIG_MMU
176 mcr p15, 0, r10, c8, c7 @ invalidate I,D TLBs on v4 186 mcr p15, 0, r10, c8, c7 @ invalidate I,D TLBs on v4
187#endif
177 mrc p15, 0, r0, c1, c0 @ get control register v4 188 mrc p15, 0, r0, c1, c0 @ get control register v4
178 ldr r5, sa110_cr1_clear 189 ldr r5, sa110_cr1_clear
179 bic r0, r0, r5 190 bic r0, r0, r5
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index 777ad99c143..0a2107ad4c3 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -2,6 +2,7 @@
2 * linux/arch/arm/mm/proc-sa1100.S 2 * linux/arch/arm/mm/proc-sa1100.S
3 * 3 *
4 * Copyright (C) 1997-2002 Russell King 4 * Copyright (C) 1997-2002 Russell King
5 * hacked for non-paged-MM by Hyok S. Choi, 2003.
5 * 6 *
6 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
@@ -77,7 +78,9 @@ ENTRY(cpu_sa1100_reset)
77 mov ip, #0 78 mov ip, #0
78 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 79 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
79 mcr p15, 0, ip, c7, c10, 4 @ drain WB 80 mcr p15, 0, ip, c7, c10, 4 @ drain WB
81#ifdef CONFIG_MMU
80 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 82 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
83#endif
81 mrc p15, 0, ip, c1, c0, 0 @ ctrl register 84 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
82 bic ip, ip, #0x000f @ ............wcam 85 bic ip, ip, #0x000f @ ............wcam
83 bic ip, ip, #0x1100 @ ...i...s........ 86 bic ip, ip, #0x1100 @ ...i...s........
@@ -142,12 +145,16 @@ ENTRY(cpu_sa1100_dcache_clean_area)
142 */ 145 */
143 .align 5 146 .align 5
144ENTRY(cpu_sa1100_switch_mm) 147ENTRY(cpu_sa1100_switch_mm)
148#ifdef CONFIG_MMU
145 str lr, [sp, #-4]! 149 str lr, [sp, #-4]!
146 bl v4wb_flush_kern_cache_all @ clears IP 150 bl v4wb_flush_kern_cache_all @ clears IP
147 mcr p15, 0, ip, c9, c0, 0 @ invalidate RB 151 mcr p15, 0, ip, c9, c0, 0 @ invalidate RB
148 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer 152 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
149 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs 153 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
150 ldr pc, [sp], #4 154 ldr pc, [sp], #4
155#else
156 mov pc, lr
157#endif
151 158
152/* 159/*
153 * cpu_sa1100_set_pte(ptep, pte) 160 * cpu_sa1100_set_pte(ptep, pte)
@@ -156,6 +163,7 @@ ENTRY(cpu_sa1100_switch_mm)
156 */ 163 */
157 .align 5 164 .align 5
158ENTRY(cpu_sa1100_set_pte) 165ENTRY(cpu_sa1100_set_pte)
166#ifdef CONFIG_MMU
159 str r1, [r0], #-2048 @ linux version 167 str r1, [r0], #-2048 @ linux version
160 168
161 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY 169 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -177,6 +185,7 @@ ENTRY(cpu_sa1100_set_pte)
177 mov r0, r0 185 mov r0, r0
178 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 186 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
179 mcr p15, 0, r0, c7, c10, 4 @ drain WB 187 mcr p15, 0, r0, c7, c10, 4 @ drain WB
188#endif
180 mov pc, lr 189 mov pc, lr
181 190
182 __INIT 191 __INIT
@@ -186,7 +195,9 @@ __sa1100_setup:
186 mov r0, #0 195 mov r0, #0
187 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 196 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
188 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 197 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4
198#ifdef CONFIG_MMU
189 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 199 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
200#endif
190 mrc p15, 0, r0, c1, c0 @ get control register v4 201 mrc p15, 0, r0, c1, c0 @ get control register v4
191 ldr r5, sa1100_cr1_clear 202 ldr r5, sa1100_cr1_clear
192 bic r0, r0, r5 203 bic r0, r0, r5
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 09b1a41a6de..ca13d4d05f6 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -2,6 +2,7 @@
2 * linux/arch/arm/mm/proc-v6.S 2 * linux/arch/arm/mm/proc-v6.S
3 * 3 *
4 * Copyright (C) 2001 Deep Blue Solutions Ltd. 4 * Copyright (C) 2001 Deep Blue Solutions Ltd.
5 * Modified by Catalin Marinas for noMMU support
5 * 6 *
6 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
@@ -88,6 +89,7 @@ ENTRY(cpu_v6_dcache_clean_area)
88 * - we are not using split page tables 89 * - we are not using split page tables
89 */ 90 */
90ENTRY(cpu_v6_switch_mm) 91ENTRY(cpu_v6_switch_mm)
92#ifdef CONFIG_MMU
91 mov r2, #0 93 mov r2, #0
92 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id 94 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id
93#ifdef CONFIG_SMP 95#ifdef CONFIG_SMP
@@ -97,6 +99,7 @@ ENTRY(cpu_v6_switch_mm)
97 mcr p15, 0, r2, c7, c10, 4 @ drain write buffer 99 mcr p15, 0, r2, c7, c10, 4 @ drain write buffer
98 mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 100 mcr p15, 0, r0, c2, c0, 0 @ set TTB 0
99 mcr p15, 0, r1, c13, c0, 1 @ set context ID 101 mcr p15, 0, r1, c13, c0, 1 @ set context ID
102#endif
100 mov pc, lr 103 mov pc, lr
101 104
102/* 105/*
@@ -119,6 +122,7 @@ ENTRY(cpu_v6_switch_mm)
119 * 1111 0 1 1 r/w r/w 122 * 1111 0 1 1 r/w r/w
120 */ 123 */
121ENTRY(cpu_v6_set_pte) 124ENTRY(cpu_v6_set_pte)
125#ifdef CONFIG_MMU
122 str r1, [r0], #-2048 @ linux version 126 str r1, [r0], #-2048 @ linux version
123 127
124 bic r2, r1, #0x000003f0 128 bic r2, r1, #0x000003f0
@@ -145,6 +149,7 @@ ENTRY(cpu_v6_set_pte)
145 149
146 str r2, [r0] 150 str r2, [r0]
147 mcr p15, 0, r0, c7, c10, 1 @ flush_pte 151 mcr p15, 0, r0, c7, c10, 1 @ flush_pte
152#endif
148 mov pc, lr 153 mov pc, lr
149 154
150 155
@@ -194,12 +199,14 @@ __v6_setup:
194 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache 199 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
195 mcr p15, 0, r0, c7, c15, 0 @ clean+invalidate cache 200 mcr p15, 0, r0, c7, c15, 0 @ clean+invalidate cache
196 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer 201 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
202#ifdef CONFIG_MMU
197 mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs 203 mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs
198 mcr p15, 0, r0, c2, c0, 2 @ TTB control register 204 mcr p15, 0, r0, c2, c0, 2 @ TTB control register
199#ifdef CONFIG_SMP 205#ifdef CONFIG_SMP
200 orr r4, r4, #TTB_RGN_WBWA|TTB_S @ mark PTWs shared, outer cacheable 206 orr r4, r4, #TTB_RGN_WBWA|TTB_S @ mark PTWs shared, outer cacheable
201#endif 207#endif
202 mcr p15, 0, r4, c2, c0, 1 @ load TTB1 208 mcr p15, 0, r4, c2, c0, 1 @ load TTB1
209#endif /* CONFIG_MMU */
203#ifdef CONFIG_VFP 210#ifdef CONFIG_VFP
204 mrc p15, 0, r0, c1, c0, 2 211 mrc p15, 0, r0, c1, c0, 2
205 orr r0, r0, #(0xf << 20) 212 orr r0, r0, #(0xf << 20)
diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig
index 856b665020e..6a1238a29d6 100644
--- a/arch/cris/Kconfig
+++ b/arch/cris/Kconfig
@@ -28,6 +28,10 @@ config GENERIC_CALIBRATE_DELAY
28 bool 28 bool
29 default y 29 default y
30 30
31config IRQ_PER_CPU
32 bool
33 default y
34
31config CRIS 35config CRIS
32 bool 36 bool
33 default y 37 default y
diff --git a/arch/cris/arch-v10/kernel/irq.c b/arch/cris/arch-v10/kernel/irq.c
index 4b368a12201..2d5be93b519 100644
--- a/arch/cris/arch-v10/kernel/irq.c
+++ b/arch/cris/arch-v10/kernel/irq.c
@@ -172,7 +172,7 @@ init_IRQ(void)
172 172
173 /* Initialize IRQ handler descriptiors. */ 173 /* Initialize IRQ handler descriptiors. */
174 for(i = 2; i < NR_IRQS; i++) { 174 for(i = 2; i < NR_IRQS; i++) {
175 irq_desc[i].handler = &crisv10_irq_type; 175 irq_desc[i].chip = &crisv10_irq_type;
176 set_int_vector(i, interrupt[i]); 176 set_int_vector(i, interrupt[i]);
177 } 177 }
178 178
diff --git a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c
index c78cc268513..06260874f01 100644
--- a/arch/cris/arch-v32/kernel/irq.c
+++ b/arch/cris/arch-v32/kernel/irq.c
@@ -369,7 +369,7 @@ init_IRQ(void)
369 369
370 /* Point all IRQ's to bad handlers. */ 370 /* Point all IRQ's to bad handlers. */
371 for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) { 371 for (i = FIRST_IRQ, j = 0; j < NR_IRQS; i++, j++) {
372 irq_desc[j].handler = &crisv32_irq_type; 372 irq_desc[j].chip = &crisv32_irq_type;
373 set_exception_vector(i, interrupt[j]); 373 set_exception_vector(i, interrupt[j]);
374 } 374 }
375 375
diff --git a/arch/cris/kernel/irq.c b/arch/cris/kernel/irq.c
index b504def3e34..6547bb64636 100644
--- a/arch/cris/kernel/irq.c
+++ b/arch/cris/kernel/irq.c
@@ -69,7 +69,7 @@ int show_interrupts(struct seq_file *p, void *v)
69 for_each_online_cpu(j) 69 for_each_online_cpu(j)
70 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 70 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
71#endif 71#endif
72 seq_printf(p, " %14s", irq_desc[i].handler->typename); 72 seq_printf(p, " %14s", irq_desc[i].chip->typename);
73 seq_printf(p, " %s", action->name); 73 seq_printf(p, " %s", action->name);
74 74
75 for (action=action->next; action; action = action->next) 75 for (action=action->next; action; action = action->next)
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index 7e46ad7a7b6..0463f633590 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -233,7 +233,7 @@ config NR_CPUS
233 233
234config SCHED_SMT 234config SCHED_SMT
235 bool "SMT (Hyperthreading) scheduler support" 235 bool "SMT (Hyperthreading) scheduler support"
236 depends on SMP 236 depends on X86_HT
237 help 237 help
238 SMT scheduler support improves the CPU scheduler's decision making 238 SMT scheduler support improves the CPU scheduler's decision making
239 when dealing with Intel Pentium 4 chips with HyperThreading at a 239 when dealing with Intel Pentium 4 chips with HyperThreading at a
@@ -242,7 +242,7 @@ config SCHED_SMT
242 242
243config SCHED_MC 243config SCHED_MC
244 bool "Multi-core scheduler support" 244 bool "Multi-core scheduler support"
245 depends on SMP 245 depends on X86_HT
246 default y 246 default y
247 help 247 help
248 Multi-core scheduler support improves the CPU scheduler's decision 248 Multi-core scheduler support improves the CPU scheduler's decision
@@ -781,9 +781,23 @@ config HOTPLUG_CPU
781 enable suspend on SMP systems. CPUs can be controlled through 781 enable suspend on SMP systems. CPUs can be controlled through
782 /sys/devices/system/cpu. 782 /sys/devices/system/cpu.
783 783
784config COMPAT_VDSO
785 bool "Compat VDSO support"
786 default y
787 help
788 Map the VDSO to the predictable old-style address too.
789 ---help---
790 Say N here if you are running a sufficiently recent glibc
791 version (2.3.3 or later), to remove the high-mapped
792 VDSO mapping and to exclusively use the randomized VDSO.
793
794 If unsure, say Y.
784 795
785endmenu 796endmenu
786 797
798config ARCH_ENABLE_MEMORY_HOTPLUG
799 def_bool y
800 depends on HIGHMEM
787 801
788menu "Power management options (ACPI, APM)" 802menu "Power management options (ACPI, APM)"
789 depends on !X86_VOYAGER 803 depends on !X86_VOYAGER
diff --git a/arch/i386/kernel/asm-offsets.c b/arch/i386/kernel/asm-offsets.c
index 1c3a809e642..c80271f8f08 100644
--- a/arch/i386/kernel/asm-offsets.c
+++ b/arch/i386/kernel/asm-offsets.c
@@ -14,6 +14,7 @@
14#include <asm/fixmap.h> 14#include <asm/fixmap.h>
15#include <asm/processor.h> 15#include <asm/processor.h>
16#include <asm/thread_info.h> 16#include <asm/thread_info.h>
17#include <asm/elf.h>
17 18
18#define DEFINE(sym, val) \ 19#define DEFINE(sym, val) \
19 asm volatile("\n->" #sym " %0 " #val : : "i" (val)) 20 asm volatile("\n->" #sym " %0 " #val : : "i" (val))
@@ -54,6 +55,7 @@ void foo(void)
54 OFFSET(TI_preempt_count, thread_info, preempt_count); 55 OFFSET(TI_preempt_count, thread_info, preempt_count);
55 OFFSET(TI_addr_limit, thread_info, addr_limit); 56 OFFSET(TI_addr_limit, thread_info, addr_limit);
56 OFFSET(TI_restart_block, thread_info, restart_block); 57 OFFSET(TI_restart_block, thread_info, restart_block);
58 OFFSET(TI_sysenter_return, thread_info, sysenter_return);
57 BLANK(); 59 BLANK();
58 60
59 OFFSET(EXEC_DOMAIN_handler, exec_domain, handler); 61 OFFSET(EXEC_DOMAIN_handler, exec_domain, handler);
@@ -69,7 +71,7 @@ void foo(void)
69 sizeof(struct tss_struct)); 71 sizeof(struct tss_struct));
70 72
71 DEFINE(PAGE_SIZE_asm, PAGE_SIZE); 73 DEFINE(PAGE_SIZE_asm, PAGE_SIZE);
72 DEFINE(VSYSCALL_BASE, __fix_to_virt(FIX_VSYSCALL)); 74 DEFINE(VDSO_PRELINK, VDSO_PRELINK);
73 75
74 OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx); 76 OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx);
75} 77}
diff --git a/arch/i386/kernel/cpu/amd.c b/arch/i386/kernel/cpu/amd.c
index fd0457c9c82..e6a2d6b80cd 100644
--- a/arch/i386/kernel/cpu/amd.c
+++ b/arch/i386/kernel/cpu/amd.c
@@ -235,10 +235,10 @@ static void __init init_amd(struct cpuinfo_x86 *c)
235 while ((1 << bits) < c->x86_max_cores) 235 while ((1 << bits) < c->x86_max_cores)
236 bits++; 236 bits++;
237 } 237 }
238 cpu_core_id[cpu] = phys_proc_id[cpu] & ((1<<bits)-1); 238 c->cpu_core_id = c->phys_proc_id & ((1<<bits)-1);
239 phys_proc_id[cpu] >>= bits; 239 c->phys_proc_id >>= bits;
240 printk(KERN_INFO "CPU %d(%d) -> Core %d\n", 240 printk(KERN_INFO "CPU %d(%d) -> Core %d\n",
241 cpu, c->x86_max_cores, cpu_core_id[cpu]); 241 cpu, c->x86_max_cores, c->cpu_core_id);
242 } 242 }
243#endif 243#endif
244 244
diff --git a/arch/i386/kernel/cpu/common.c b/arch/i386/kernel/cpu/common.c
index 44f2c5f2dda..70c87de582c 100644
--- a/arch/i386/kernel/cpu/common.c
+++ b/arch/i386/kernel/cpu/common.c
@@ -294,7 +294,7 @@ void __cpuinit generic_identify(struct cpuinfo_x86 * c)
294 if (c->x86 >= 0x6) 294 if (c->x86 >= 0x6)
295 c->x86_model += ((tfms >> 16) & 0xF) << 4; 295 c->x86_model += ((tfms >> 16) & 0xF) << 4;
296 c->x86_mask = tfms & 15; 296 c->x86_mask = tfms & 15;
297#ifdef CONFIG_SMP 297#ifdef CONFIG_X86_HT
298 c->apicid = phys_pkg_id((ebx >> 24) & 0xFF, 0); 298 c->apicid = phys_pkg_id((ebx >> 24) & 0xFF, 0);
299#else 299#else
300 c->apicid = (ebx >> 24) & 0xFF; 300 c->apicid = (ebx >> 24) & 0xFF;
@@ -319,7 +319,7 @@ void __cpuinit generic_identify(struct cpuinfo_x86 * c)
319 early_intel_workaround(c); 319 early_intel_workaround(c);
320 320
321#ifdef CONFIG_X86_HT 321#ifdef CONFIG_X86_HT
322 phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff; 322 c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
323#endif 323#endif
324} 324}
325 325
@@ -477,11 +477,9 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c)
477{ 477{
478 u32 eax, ebx, ecx, edx; 478 u32 eax, ebx, ecx, edx;
479 int index_msb, core_bits; 479 int index_msb, core_bits;
480 int cpu = smp_processor_id();
481 480
482 cpuid(1, &eax, &ebx, &ecx, &edx); 481 cpuid(1, &eax, &ebx, &ecx, &edx);
483 482
484
485 if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY)) 483 if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
486 return; 484 return;
487 485
@@ -492,16 +490,17 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c)
492 } else if (smp_num_siblings > 1 ) { 490 } else if (smp_num_siblings > 1 ) {
493 491
494 if (smp_num_siblings > NR_CPUS) { 492 if (smp_num_siblings > NR_CPUS) {
495 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings); 493 printk(KERN_WARNING "CPU: Unsupported number of the "
494 "siblings %d", smp_num_siblings);
496 smp_num_siblings = 1; 495 smp_num_siblings = 1;
497 return; 496 return;
498 } 497 }
499 498
500 index_msb = get_count_order(smp_num_siblings); 499 index_msb = get_count_order(smp_num_siblings);
501 phys_proc_id[cpu] = phys_pkg_id((ebx >> 24) & 0xFF, index_msb); 500 c->phys_proc_id = phys_pkg_id((ebx >> 24) & 0xFF, index_msb);
502 501
503 printk(KERN_INFO "CPU: Physical Processor ID: %d\n", 502 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
504 phys_proc_id[cpu]); 503 c->phys_proc_id);
505 504
506 smp_num_siblings = smp_num_siblings / c->x86_max_cores; 505 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
507 506
@@ -509,12 +508,12 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c)
509 508
510 core_bits = get_count_order(c->x86_max_cores); 509 core_bits = get_count_order(c->x86_max_cores);
511 510
512 cpu_core_id[cpu] = phys_pkg_id((ebx >> 24) & 0xFF, index_msb) & 511 c->cpu_core_id = phys_pkg_id((ebx >> 24) & 0xFF, index_msb) &
513 ((1 << core_bits) - 1); 512 ((1 << core_bits) - 1);
514 513
515 if (c->x86_max_cores > 1) 514 if (c->x86_max_cores > 1)
516 printk(KERN_INFO "CPU: Processor Core ID: %d\n", 515 printk(KERN_INFO "CPU: Processor Core ID: %d\n",
517 cpu_core_id[cpu]); 516 c->cpu_core_id);
518 } 517 }
519} 518}
520#endif 519#endif
@@ -613,6 +612,12 @@ void __cpuinit cpu_init(void)
613 set_in_cr4(X86_CR4_TSD); 612 set_in_cr4(X86_CR4_TSD);
614 } 613 }
615 614
615 /* The CPU hotplug case */
616 if (cpu_gdt_descr->address) {
617 gdt = (struct desc_struct *)cpu_gdt_descr->address;
618 memset(gdt, 0, PAGE_SIZE);
619 goto old_gdt;
620 }
616 /* 621 /*
617 * This is a horrible hack to allocate the GDT. The problem 622 * This is a horrible hack to allocate the GDT. The problem
618 * is that cpu_init() is called really early for the boot CPU 623 * is that cpu_init() is called really early for the boot CPU
@@ -631,7 +636,7 @@ void __cpuinit cpu_init(void)
631 local_irq_enable(); 636 local_irq_enable();
632 } 637 }
633 } 638 }
634 639old_gdt:
635 /* 640 /*
636 * Initialize the per-CPU GDT with the boot GDT, 641 * Initialize the per-CPU GDT with the boot GDT,
637 * and set up the GDT descriptor: 642 * and set up the GDT descriptor:
diff --git a/arch/i386/kernel/cpu/intel_cacheinfo.c b/arch/i386/kernel/cpu/intel_cacheinfo.c
index 6c37b4fd8ce..e9f0b928b0a 100644
--- a/arch/i386/kernel/cpu/intel_cacheinfo.c
+++ b/arch/i386/kernel/cpu/intel_cacheinfo.c
@@ -159,13 +159,13 @@ union l2_cache {
159 unsigned val; 159 unsigned val;
160}; 160};
161 161
162static unsigned short assocs[] = { 162static const unsigned short assocs[] = {
163 [1] = 1, [2] = 2, [4] = 4, [6] = 8, 163 [1] = 1, [2] = 2, [4] = 4, [6] = 8,
164 [8] = 16, 164 [8] = 16,
165 [0xf] = 0xffff // ?? 165 [0xf] = 0xffff // ??
166 }; 166 };
167static unsigned char levels[] = { 1, 1, 2 }; 167static const unsigned char levels[] = { 1, 1, 2 };
168static unsigned char types[] = { 1, 2, 3 }; 168static const unsigned char types[] = { 1, 2, 3 };
169 169
170static void __cpuinit amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax, 170static void __cpuinit amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
171 union _cpuid4_leaf_ebx *ebx, 171 union _cpuid4_leaf_ebx *ebx,
@@ -261,7 +261,7 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
261 unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */ 261 unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */
262 unsigned int new_l2 = 0, new_l3 = 0, i; /* Cache sizes from cpuid(4) */ 262 unsigned int new_l2 = 0, new_l3 = 0, i; /* Cache sizes from cpuid(4) */
263 unsigned int l2_id = 0, l3_id = 0, num_threads_sharing, index_msb; 263 unsigned int l2_id = 0, l3_id = 0, num_threads_sharing, index_msb;
264#ifdef CONFIG_SMP 264#ifdef CONFIG_X86_HT
265 unsigned int cpu = (c == &boot_cpu_data) ? 0 : (c - cpu_data); 265 unsigned int cpu = (c == &boot_cpu_data) ? 0 : (c - cpu_data);
266#endif 266#endif
267 267
@@ -383,14 +383,14 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
383 383
384 if (new_l2) { 384 if (new_l2) {
385 l2 = new_l2; 385 l2 = new_l2;
386#ifdef CONFIG_SMP 386#ifdef CONFIG_X86_HT
387 cpu_llc_id[cpu] = l2_id; 387 cpu_llc_id[cpu] = l2_id;
388#endif 388#endif
389 } 389 }
390 390
391 if (new_l3) { 391 if (new_l3) {
392 l3 = new_l3; 392 l3 = new_l3;
393#ifdef CONFIG_SMP 393#ifdef CONFIG_X86_HT
394 cpu_llc_id[cpu] = l3_id; 394 cpu_llc_id[cpu] = l3_id;
395#endif 395#endif
396 } 396 }
@@ -729,7 +729,7 @@ static void __cpuexit cache_remove_dev(struct sys_device * sys_dev)
729 return; 729 return;
730} 730}
731 731
732static int cacheinfo_cpu_callback(struct notifier_block *nfb, 732static int __cpuinit cacheinfo_cpu_callback(struct notifier_block *nfb,
733 unsigned long action, void *hcpu) 733 unsigned long action, void *hcpu)
734{ 734{
735 unsigned int cpu = (unsigned long)hcpu; 735 unsigned int cpu = (unsigned long)hcpu;
@@ -747,7 +747,7 @@ static int cacheinfo_cpu_callback(struct notifier_block *nfb,
747 return NOTIFY_OK; 747 return NOTIFY_OK;
748} 748}
749 749
750static struct notifier_block cacheinfo_cpu_notifier = 750static struct notifier_block __cpuinitdata cacheinfo_cpu_notifier =
751{ 751{
752 .notifier_call = cacheinfo_cpu_callback, 752 .notifier_call = cacheinfo_cpu_callback,
753}; 753};
diff --git a/arch/i386/kernel/cpu/proc.c b/arch/i386/kernel/cpu/proc.c
index a19fcb262db..f54a15268ed 100644
--- a/arch/i386/kernel/cpu/proc.c
+++ b/arch/i386/kernel/cpu/proc.c
@@ -18,7 +18,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
18 * applications want to get the raw CPUID data, they should access 18 * applications want to get the raw CPUID data, they should access
19 * /dev/cpu/<cpu_nr>/cpuid instead. 19 * /dev/cpu/<cpu_nr>/cpuid instead.
20 */ 20 */
21 static char *x86_cap_flags[] = { 21 static const char * const x86_cap_flags[] = {
22 /* Intel-defined */ 22 /* Intel-defined */
23 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", 23 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
24 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov", 24 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
@@ -62,7 +62,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
62 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 62 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
63 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 63 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
64 }; 64 };
65 static char *x86_power_flags[] = { 65 static const char * const x86_power_flags[] = {
66 "ts", /* temperature sensor */ 66 "ts", /* temperature sensor */
67 "fid", /* frequency id control */ 67 "fid", /* frequency id control */
68 "vid", /* voltage id control */ 68 "vid", /* voltage id control */
@@ -109,9 +109,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
109 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size); 109 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
110#ifdef CONFIG_X86_HT 110#ifdef CONFIG_X86_HT
111 if (c->x86_max_cores * smp_num_siblings > 1) { 111 if (c->x86_max_cores * smp_num_siblings > 1) {
112 seq_printf(m, "physical id\t: %d\n", phys_proc_id[n]); 112 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
113 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[n])); 113 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[n]));
114 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[n]); 114 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
115 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores); 115 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
116 } 116 }
117#endif 117#endif
diff --git a/arch/i386/kernel/cpuid.c b/arch/i386/kernel/cpuid.c
index 1d9a4abcdfc..f6dfa9fb675 100644
--- a/arch/i386/kernel/cpuid.c
+++ b/arch/i386/kernel/cpuid.c
@@ -183,7 +183,7 @@ static int cpuid_class_cpu_callback(struct notifier_block *nfb, unsigned long ac
183 return NOTIFY_OK; 183 return NOTIFY_OK;
184} 184}
185 185
186static struct notifier_block cpuid_class_cpu_notifier = 186static struct notifier_block __cpuinitdata cpuid_class_cpu_notifier =
187{ 187{
188 .notifier_call = cpuid_class_cpu_callback, 188 .notifier_call = cpuid_class_cpu_callback,
189}; 189};
diff --git a/arch/i386/kernel/entry.S b/arch/i386/kernel/entry.S
index e6e4506e749..fbdb933251b 100644
--- a/arch/i386/kernel/entry.S
+++ b/arch/i386/kernel/entry.S
@@ -83,6 +83,12 @@ VM_MASK = 0x00020000
83#define resume_kernel restore_nocheck 83#define resume_kernel restore_nocheck
84#endif 84#endif
85 85
86#ifdef CONFIG_VM86
87#define resume_userspace_sig check_userspace
88#else
89#define resume_userspace_sig resume_userspace
90#endif
91
86#define SAVE_ALL \ 92#define SAVE_ALL \
87 cld; \ 93 cld; \
88 pushl %es; \ 94 pushl %es; \
@@ -211,6 +217,7 @@ ret_from_exception:
211 preempt_stop 217 preempt_stop
212ret_from_intr: 218ret_from_intr:
213 GET_THREAD_INFO(%ebp) 219 GET_THREAD_INFO(%ebp)
220check_userspace:
214 movl EFLAGS(%esp), %eax # mix EFLAGS and CS 221 movl EFLAGS(%esp), %eax # mix EFLAGS and CS
215 movb CS(%esp), %al 222 movb CS(%esp), %al
216 testl $(VM_MASK | 3), %eax 223 testl $(VM_MASK | 3), %eax
@@ -263,7 +270,12 @@ sysenter_past_esp:
263 pushl $(__USER_CS) 270 pushl $(__USER_CS)
264 CFI_ADJUST_CFA_OFFSET 4 271 CFI_ADJUST_CFA_OFFSET 4
265 /*CFI_REL_OFFSET cs, 0*/ 272 /*CFI_REL_OFFSET cs, 0*/
266 pushl $SYSENTER_RETURN 273 /*
274 * Push current_thread_info()->sysenter_return to the stack.
275 * A tiny bit of offset fixup is necessary - 4*4 means the 4 words
276 * pushed above; +8 corresponds to copy_thread's esp0 setting.
277 */
278 pushl (TI_sysenter_return-THREAD_SIZE+8+4*4)(%esp)
267 CFI_ADJUST_CFA_OFFSET 4 279 CFI_ADJUST_CFA_OFFSET 4
268 CFI_REL_OFFSET eip, 0 280 CFI_REL_OFFSET eip, 0
269 281
@@ -415,7 +427,7 @@ work_notifysig: # deal with pending signals and
415 # vm86-space 427 # vm86-space
416 xorl %edx, %edx 428 xorl %edx, %edx
417 call do_notify_resume 429 call do_notify_resume
418 jmp resume_userspace 430 jmp resume_userspace_sig
419 431
420 ALIGN 432 ALIGN
421work_notifysig_v86: 433work_notifysig_v86:
@@ -428,7 +440,7 @@ work_notifysig_v86:
428 movl %eax, %esp 440 movl %eax, %esp
429 xorl %edx, %edx 441 xorl %edx, %edx
430 call do_notify_resume 442 call do_notify_resume
431 jmp resume_userspace 443 jmp resume_userspace_sig
432#endif 444#endif
433 445
434 # perform syscall exit tracing 446 # perform syscall exit tracing
@@ -515,7 +527,7 @@ ENTRY(irq_entries_start)
515 .if vector 527 .if vector
516 CFI_ADJUST_CFA_OFFSET -4 528 CFI_ADJUST_CFA_OFFSET -4
517 .endif 529 .endif
5181: pushl $vector-256 5301: pushl $~(vector)
519 CFI_ADJUST_CFA_OFFSET 4 531 CFI_ADJUST_CFA_OFFSET 4
520 jmp common_interrupt 532 jmp common_interrupt
521.data 533.data
@@ -535,7 +547,7 @@ common_interrupt:
535#define BUILD_INTERRUPT(name, nr) \ 547#define BUILD_INTERRUPT(name, nr) \
536ENTRY(name) \ 548ENTRY(name) \
537 RING0_INT_FRAME; \ 549 RING0_INT_FRAME; \
538 pushl $nr-256; \ 550 pushl $~(nr); \
539 CFI_ADJUST_CFA_OFFSET 4; \ 551 CFI_ADJUST_CFA_OFFSET 4; \
540 SAVE_ALL; \ 552 SAVE_ALL; \
541 movl %esp,%eax; \ 553 movl %esp,%eax; \
diff --git a/arch/i386/kernel/i8259.c b/arch/i386/kernel/i8259.c
index c1a42feba28..3c6063671a9 100644
--- a/arch/i386/kernel/i8259.c
+++ b/arch/i386/kernel/i8259.c
@@ -132,7 +132,7 @@ void make_8259A_irq(unsigned int irq)
132{ 132{
133 disable_irq_nosync(irq); 133 disable_irq_nosync(irq);
134 io_apic_irqs &= ~(1<<irq); 134 io_apic_irqs &= ~(1<<irq);
135 irq_desc[irq].handler = &i8259A_irq_type; 135 irq_desc[irq].chip = &i8259A_irq_type;
136 enable_irq(irq); 136 enable_irq(irq);
137} 137}
138 138
@@ -386,12 +386,12 @@ void __init init_ISA_irqs (void)
386 /* 386 /*
387 * 16 old-style INTA-cycle interrupts: 387 * 16 old-style INTA-cycle interrupts:
388 */ 388 */
389 irq_desc[i].handler = &i8259A_irq_type; 389 irq_desc[i].chip = &i8259A_irq_type;
390 } else { 390 } else {
391 /* 391 /*
392 * 'high' PCI IRQs filled in on demand 392 * 'high' PCI IRQs filled in on demand
393 */ 393 */
394 irq_desc[i].handler = &no_irq_type; 394 irq_desc[i].chip = &no_irq_type;
395 } 395 }
396 } 396 }
397} 397}
diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c
index 72ae414e4d4..ec9ea0269d3 100644
--- a/arch/i386/kernel/io_apic.c
+++ b/arch/i386/kernel/io_apic.c
@@ -581,7 +581,7 @@ static int balanced_irq(void *unused)
581 581
582 /* push everything to CPU 0 to give us a starting point. */ 582 /* push everything to CPU 0 to give us a starting point. */
583 for (i = 0 ; i < NR_IRQS ; i++) { 583 for (i = 0 ; i < NR_IRQS ; i++) {
584 pending_irq_cpumask[i] = cpumask_of_cpu(0); 584 irq_desc[i].pending_mask = cpumask_of_cpu(0);
585 set_pending_irq(i, cpumask_of_cpu(0)); 585 set_pending_irq(i, cpumask_of_cpu(0));
586 } 586 }
587 587
@@ -1205,15 +1205,17 @@ static struct hw_interrupt_type ioapic_edge_type;
1205#define IOAPIC_EDGE 0 1205#define IOAPIC_EDGE 0
1206#define IOAPIC_LEVEL 1 1206#define IOAPIC_LEVEL 1
1207 1207
1208static inline void ioapic_register_intr(int irq, int vector, unsigned long trigger) 1208static void ioapic_register_intr(int irq, int vector, unsigned long trigger)
1209{ 1209{
1210 unsigned idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq; 1210 unsigned idx;
1211
1212 idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq;
1211 1213
1212 if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || 1214 if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
1213 trigger == IOAPIC_LEVEL) 1215 trigger == IOAPIC_LEVEL)
1214 irq_desc[idx].handler = &ioapic_level_type; 1216 irq_desc[idx].chip = &ioapic_level_type;
1215 else 1217 else
1216 irq_desc[idx].handler = &ioapic_edge_type; 1218 irq_desc[idx].chip = &ioapic_edge_type;
1217 set_intr_gate(vector, interrupt[idx]); 1219 set_intr_gate(vector, interrupt[idx]);
1218} 1220}
1219 1221
@@ -1325,7 +1327,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in
1325 * The timer IRQ doesn't have to know that behind the 1327 * The timer IRQ doesn't have to know that behind the
1326 * scene we have a 8259A-master in AEOI mode ... 1328 * scene we have a 8259A-master in AEOI mode ...
1327 */ 1329 */
1328 irq_desc[0].handler = &ioapic_edge_type; 1330 irq_desc[0].chip = &ioapic_edge_type;
1329 1331
1330 /* 1332 /*
1331 * Add it to the IO-APIC irq-routing table: 1333 * Add it to the IO-APIC irq-routing table:
@@ -2069,6 +2071,13 @@ static void set_ioapic_affinity_vector (unsigned int vector,
2069#endif 2071#endif
2070#endif 2072#endif
2071 2073
2074static int ioapic_retrigger(unsigned int irq)
2075{
2076 send_IPI_self(IO_APIC_VECTOR(irq));
2077
2078 return 1;
2079}
2080
2072/* 2081/*
2073 * Level and edge triggered IO-APIC interrupts need different handling, 2082 * Level and edge triggered IO-APIC interrupts need different handling,
2074 * so we use two separate IRQ descriptors. Edge triggered IRQs can be 2083 * so we use two separate IRQ descriptors. Edge triggered IRQs can be
@@ -2088,6 +2097,7 @@ static struct hw_interrupt_type ioapic_edge_type __read_mostly = {
2088#ifdef CONFIG_SMP 2097#ifdef CONFIG_SMP
2089 .set_affinity = set_ioapic_affinity, 2098 .set_affinity = set_ioapic_affinity,
2090#endif 2099#endif
2100 .retrigger = ioapic_retrigger,
2091}; 2101};
2092 2102
2093static struct hw_interrupt_type ioapic_level_type __read_mostly = { 2103static struct hw_interrupt_type ioapic_level_type __read_mostly = {
@@ -2101,6 +2111,7 @@ static struct hw_interrupt_type ioapic_level_type __read_mostly = {
2101#ifdef CONFIG_SMP 2111#ifdef CONFIG_SMP
2102 .set_affinity = set_ioapic_affinity, 2112 .set_affinity = set_ioapic_affinity,
2103#endif 2113#endif
2114 .retrigger = ioapic_retrigger,
2104}; 2115};
2105 2116
2106static inline void init_IO_APIC_traps(void) 2117static inline void init_IO_APIC_traps(void)
@@ -2135,7 +2146,7 @@ static inline void init_IO_APIC_traps(void)
2135 make_8259A_irq(irq); 2146 make_8259A_irq(irq);
2136 else 2147 else
2137 /* Strange. Oh, well.. */ 2148 /* Strange. Oh, well.. */
2138 irq_desc[irq].handler = &no_irq_type; 2149 irq_desc[irq].chip = &no_irq_type;
2139 } 2150 }
2140 } 2151 }
2141} 2152}
@@ -2351,7 +2362,7 @@ static inline void check_timer(void)
2351 printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); 2362 printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ...");
2352 2363
2353 disable_8259A_irq(0); 2364 disable_8259A_irq(0);
2354 irq_desc[0].handler = &lapic_irq_type; 2365 irq_desc[0].chip = &lapic_irq_type;
2355 apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ 2366 apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */
2356 enable_8259A_irq(0); 2367 enable_8259A_irq(0);
2357 2368
diff --git a/arch/i386/kernel/irq.c b/arch/i386/kernel/irq.c
index 061533e0cb5..16b49170396 100644
--- a/arch/i386/kernel/irq.c
+++ b/arch/i386/kernel/irq.c
@@ -53,13 +53,19 @@ static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly;
53 */ 53 */
54fastcall unsigned int do_IRQ(struct pt_regs *regs) 54fastcall unsigned int do_IRQ(struct pt_regs *regs)
55{ 55{
56 /* high bits used in ret_from_ code */ 56 /* high bit used in ret_from_ code */
57 int irq = regs->orig_eax & 0xff; 57 int irq = ~regs->orig_eax;
58#ifdef CONFIG_4KSTACKS 58#ifdef CONFIG_4KSTACKS
59 union irq_ctx *curctx, *irqctx; 59 union irq_ctx *curctx, *irqctx;
60 u32 *isp; 60 u32 *isp;
61#endif 61#endif
62 62
63 if (unlikely((unsigned)irq >= NR_IRQS)) {
64 printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
65 __FUNCTION__, irq);
66 BUG();
67 }
68
63 irq_enter(); 69 irq_enter();
64#ifdef CONFIG_DEBUG_STACKOVERFLOW 70#ifdef CONFIG_DEBUG_STACKOVERFLOW
65 /* Debugging check for stack overflow: is there less than 1KB free? */ 71 /* Debugging check for stack overflow: is there less than 1KB free? */
@@ -76,6 +82,10 @@ fastcall unsigned int do_IRQ(struct pt_regs *regs)
76 } 82 }
77#endif 83#endif
78 84
85 if (!irq_desc[irq].handle_irq) {
86 __do_IRQ(irq, regs);
87 goto out_exit;
88 }
79#ifdef CONFIG_4KSTACKS 89#ifdef CONFIG_4KSTACKS
80 90
81 curctx = (union irq_ctx *) current_thread_info(); 91 curctx = (union irq_ctx *) current_thread_info();
@@ -100,8 +110,8 @@ fastcall unsigned int do_IRQ(struct pt_regs *regs)
100 * softirq checks work in the hardirq context. 110 * softirq checks work in the hardirq context.
101 */ 111 */
102 irqctx->tinfo.preempt_count = 112 irqctx->tinfo.preempt_count =
103 irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK | 113 (irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) |
104 curctx->tinfo.preempt_count & SOFTIRQ_MASK; 114 (curctx->tinfo.preempt_count & SOFTIRQ_MASK);
105 115
106 asm volatile( 116 asm volatile(
107 " xchgl %%ebx,%%esp \n" 117 " xchgl %%ebx,%%esp \n"
@@ -115,6 +125,7 @@ fastcall unsigned int do_IRQ(struct pt_regs *regs)
115#endif 125#endif
116 __do_IRQ(irq, regs); 126 __do_IRQ(irq, regs);
117 127
128out_exit:
118 irq_exit(); 129 irq_exit();
119 130
120 return 1; 131 return 1;
@@ -243,7 +254,7 @@ int show_interrupts(struct seq_file *p, void *v)
243 for_each_online_cpu(j) 254 for_each_online_cpu(j)
244 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 255 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
245#endif 256#endif
246 seq_printf(p, " %14s", irq_desc[i].handler->typename); 257 seq_printf(p, " %14s", irq_desc[i].chip->typename);
247 seq_printf(p, " %s", action->name); 258 seq_printf(p, " %s", action->name);
248 259
249 for (action=action->next; action; action = action->next) 260 for (action=action->next; action; action = action->next)
@@ -285,13 +296,13 @@ void fixup_irqs(cpumask_t map)
285 if (irq == 2) 296 if (irq == 2)
286 continue; 297 continue;
287 298
288 cpus_and(mask, irq_affinity[irq], map); 299 cpus_and(mask, irq_desc[irq].affinity, map);
289 if (any_online_cpu(mask) == NR_CPUS) { 300 if (any_online_cpu(mask) == NR_CPUS) {
290 printk("Breaking affinity for irq %i\n", irq); 301 printk("Breaking affinity for irq %i\n", irq);
291 mask = map; 302 mask = map;
292 } 303 }
293 if (irq_desc[irq].handler->set_affinity) 304 if (irq_desc[irq].chip->set_affinity)
294 irq_desc[irq].handler->set_affinity(irq, mask); 305 irq_desc[irq].chip->set_affinity(irq, mask);
295 else if (irq_desc[irq].action && !(warned++)) 306 else if (irq_desc[irq].action && !(warned++))
296 printk("Cannot set affinity for irq %i\n", irq); 307 printk("Cannot set affinity for irq %i\n", irq);
297 } 308 }
diff --git a/arch/i386/kernel/msr.c b/arch/i386/kernel/msr.c
index 7a328230e54..d022cb8fd72 100644
--- a/arch/i386/kernel/msr.c
+++ b/arch/i386/kernel/msr.c
@@ -266,7 +266,7 @@ static int msr_class_cpu_callback(struct notifier_block *nfb, unsigned long acti
266 return NOTIFY_OK; 266 return NOTIFY_OK;
267} 267}
268 268
269static struct notifier_block msr_class_cpu_notifier = 269static struct notifier_block __cpuinitdata msr_class_cpu_notifier =
270{ 270{
271 .notifier_call = msr_class_cpu_callback, 271 .notifier_call = msr_class_cpu_callback,
272}; 272};
diff --git a/arch/i386/kernel/scx200.c b/arch/i386/kernel/scx200.c
index 321f5fd26e7..9bf590cefc7 100644
--- a/arch/i386/kernel/scx200.c
+++ b/arch/i386/kernel/scx200.c
@@ -9,6 +9,7 @@
9#include <linux/errno.h> 9#include <linux/errno.h>
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/mutex.h>
12#include <linux/pci.h> 13#include <linux/pci.h>
13 14
14#include <linux/scx200.h> 15#include <linux/scx200.h>
@@ -45,11 +46,19 @@ static struct pci_driver scx200_pci_driver = {
45 .probe = scx200_probe, 46 .probe = scx200_probe,
46}; 47};
47 48
48static DEFINE_SPINLOCK(scx200_gpio_config_lock); 49static DEFINE_MUTEX(scx200_gpio_config_lock);
49 50
50static int __devinit scx200_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 51static void __devinit scx200_init_shadow(void)
51{ 52{
52 int bank; 53 int bank;
54
55 /* read the current values driven on the GPIO signals */
56 for (bank = 0; bank < 2; ++bank)
57 scx200_gpio_shadow[bank] = inl(scx200_gpio_base + 0x10 * bank);
58}
59
60static int __devinit scx200_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
61{
53 unsigned base; 62 unsigned base;
54 63
55 if (pdev->device == PCI_DEVICE_ID_NS_SCx200_BRIDGE || 64 if (pdev->device == PCI_DEVICE_ID_NS_SCx200_BRIDGE ||
@@ -63,10 +72,7 @@ static int __devinit scx200_probe(struct pci_dev *pdev, const struct pci_device_
63 } 72 }
64 73
65 scx200_gpio_base = base; 74 scx200_gpio_base = base;
66 75 scx200_init_shadow();
67 /* read the current values driven on the GPIO signals */
68 for (bank = 0; bank < 2; ++bank)
69 scx200_gpio_shadow[bank] = inl(scx200_gpio_base + 0x10 * bank);
70 76
71 } else { 77 } else {
72 /* find the base of the Configuration Block */ 78 /* find the base of the Configuration Block */
@@ -87,12 +93,11 @@ static int __devinit scx200_probe(struct pci_dev *pdev, const struct pci_device_
87 return 0; 93 return 0;
88} 94}
89 95
90u32 scx200_gpio_configure(int index, u32 mask, u32 bits) 96u32 scx200_gpio_configure(unsigned index, u32 mask, u32 bits)
91{ 97{
92 u32 config, new_config; 98 u32 config, new_config;
93 unsigned long flags;
94 99
95 spin_lock_irqsave(&scx200_gpio_config_lock, flags); 100 mutex_lock(&scx200_gpio_config_lock);
96 101
97 outl(index, scx200_gpio_base + 0x20); 102 outl(index, scx200_gpio_base + 0x20);
98 config = inl(scx200_gpio_base + 0x24); 103 config = inl(scx200_gpio_base + 0x24);
@@ -100,45 +105,11 @@ u32 scx200_gpio_configure(int index, u32 mask, u32 bits)
100 new_config = (config & mask) | bits; 105 new_config = (config & mask) | bits;
101 outl(new_config, scx200_gpio_base + 0x24); 106 outl(new_config, scx200_gpio_base + 0x24);
102 107
103 spin_unlock_irqrestore(&scx200_gpio_config_lock, flags); 108 mutex_unlock(&scx200_gpio_config_lock);
104 109
105 return config; 110 return config;
106} 111}
107 112
108#if 0
109void scx200_gpio_dump(unsigned index)
110{
111 u32 config = scx200_gpio_configure(index, ~0, 0);
112 printk(KERN_DEBUG "GPIO%02u: 0x%08lx", index, (unsigned long)config);
113
114 if (config & 1)
115 printk(" OE"); /* output enabled */
116 else
117 printk(" TS"); /* tristate */
118 if (config & 2)
119 printk(" PP"); /* push pull */
120 else
121 printk(" OD"); /* open drain */
122 if (config & 4)
123 printk(" PUE"); /* pull up enabled */
124 else
125 printk(" PUD"); /* pull up disabled */
126 if (config & 8)
127 printk(" LOCKED"); /* locked */
128 if (config & 16)
129 printk(" LEVEL"); /* level input */
130 else
131 printk(" EDGE"); /* edge input */
132 if (config & 32)
133 printk(" HI"); /* trigger on rising edge */
134 else
135 printk(" LO"); /* trigger on falling edge */
136 if (config & 64)
137 printk(" DEBOUNCE"); /* debounce */
138 printk("\n");
139}
140#endif /* 0 */
141
142static int __init scx200_init(void) 113static int __init scx200_init(void)
143{ 114{
144 printk(KERN_INFO NAME ": NatSemi SCx200 Driver\n"); 115 printk(KERN_INFO NAME ": NatSemi SCx200 Driver\n");
@@ -159,10 +130,3 @@ EXPORT_SYMBOL(scx200_gpio_base);
159EXPORT_SYMBOL(scx200_gpio_shadow); 130EXPORT_SYMBOL(scx200_gpio_shadow);
160EXPORT_SYMBOL(scx200_gpio_configure); 131EXPORT_SYMBOL(scx200_gpio_configure);
161EXPORT_SYMBOL(scx200_cb_base); 132EXPORT_SYMBOL(scx200_cb_base);
162
163/*
164 Local variables:
165 compile-command: "make -k -C ../../.. SUBDIRS=arch/i386/kernel modules"
166 c-basic-offset: 8
167 End:
168*/
diff --git a/arch/i386/kernel/signal.c b/arch/i386/kernel/signal.c
index 5c352c3a9e7..43002cfb40c 100644
--- a/arch/i386/kernel/signal.c
+++ b/arch/i386/kernel/signal.c
@@ -351,7 +351,7 @@ static int setup_frame(int sig, struct k_sigaction *ka,
351 goto give_sigsegv; 351 goto give_sigsegv;
352 } 352 }
353 353
354 restorer = &__kernel_sigreturn; 354 restorer = (void *)VDSO_SYM(&__kernel_sigreturn);
355 if (ka->sa.sa_flags & SA_RESTORER) 355 if (ka->sa.sa_flags & SA_RESTORER)
356 restorer = ka->sa.sa_restorer; 356 restorer = ka->sa.sa_restorer;
357 357
@@ -447,7 +447,7 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
447 goto give_sigsegv; 447 goto give_sigsegv;
448 448
449 /* Set up to return from userspace. */ 449 /* Set up to return from userspace. */
450 restorer = &__kernel_rt_sigreturn; 450 restorer = (void *)VDSO_SYM(&__kernel_rt_sigreturn);
451 if (ka->sa.sa_flags & SA_RESTORER) 451 if (ka->sa.sa_flags & SA_RESTORER)
452 restorer = ka->sa.sa_restorer; 452 restorer = ka->sa.sa_restorer;
453 err |= __put_user(restorer, &frame->pretcode); 453 err |= __put_user(restorer, &frame->pretcode);
diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c
index bce5470ecb4..89e7315e539 100644
--- a/arch/i386/kernel/smpboot.c
+++ b/arch/i386/kernel/smpboot.c
@@ -67,12 +67,6 @@ int smp_num_siblings = 1;
67EXPORT_SYMBOL(smp_num_siblings); 67EXPORT_SYMBOL(smp_num_siblings);
68#endif 68#endif
69 69
70/* Package ID of each logical CPU */
71int phys_proc_id[NR_CPUS] __read_mostly = {[0 ... NR_CPUS-1] = BAD_APICID};
72
73/* Core ID of each logical CPU */
74int cpu_core_id[NR_CPUS] __read_mostly = {[0 ... NR_CPUS-1] = BAD_APICID};
75
76/* Last level cache ID of each logical CPU */ 70/* Last level cache ID of each logical CPU */
77int cpu_llc_id[NR_CPUS] __cpuinitdata = {[0 ... NR_CPUS-1] = BAD_APICID}; 71int cpu_llc_id[NR_CPUS] __cpuinitdata = {[0 ... NR_CPUS-1] = BAD_APICID};
78 72
@@ -454,10 +448,12 @@ cpumask_t cpu_coregroup_map(int cpu)
454 struct cpuinfo_x86 *c = cpu_data + cpu; 448 struct cpuinfo_x86 *c = cpu_data + cpu;
455 /* 449 /*
456 * For perf, we return last level cache shared map. 450 * For perf, we return last level cache shared map.
457 * TBD: when power saving sched policy is added, we will return 451 * And for power savings, we return cpu_core_map
458 * cpu_core_map when power saving policy is enabled
459 */ 452 */
460 return c->llc_shared_map; 453 if (sched_mc_power_savings || sched_smt_power_savings)
454 return cpu_core_map[cpu];
455 else
456 return c->llc_shared_map;
461} 457}
462 458
463/* representing cpus for which sibling maps can be computed */ 459/* representing cpus for which sibling maps can be computed */
@@ -473,8 +469,8 @@ set_cpu_sibling_map(int cpu)
473 469
474 if (smp_num_siblings > 1) { 470 if (smp_num_siblings > 1) {
475 for_each_cpu_mask(i, cpu_sibling_setup_map) { 471 for_each_cpu_mask(i, cpu_sibling_setup_map) {
476 if (phys_proc_id[cpu] == phys_proc_id[i] && 472 if (c[cpu].phys_proc_id == c[i].phys_proc_id &&
477 cpu_core_id[cpu] == cpu_core_id[i]) { 473 c[cpu].cpu_core_id == c[i].cpu_core_id) {
478 cpu_set(i, cpu_sibling_map[cpu]); 474 cpu_set(i, cpu_sibling_map[cpu]);
479 cpu_set(cpu, cpu_sibling_map[i]); 475 cpu_set(cpu, cpu_sibling_map[i]);
480 cpu_set(i, cpu_core_map[cpu]); 476 cpu_set(i, cpu_core_map[cpu]);
@@ -501,7 +497,7 @@ set_cpu_sibling_map(int cpu)
501 cpu_set(i, c[cpu].llc_shared_map); 497 cpu_set(i, c[cpu].llc_shared_map);
502 cpu_set(cpu, c[i].llc_shared_map); 498 cpu_set(cpu, c[i].llc_shared_map);
503 } 499 }
504 if (phys_proc_id[cpu] == phys_proc_id[i]) { 500 if (c[cpu].phys_proc_id == c[i].phys_proc_id) {
505 cpu_set(i, cpu_core_map[cpu]); 501 cpu_set(i, cpu_core_map[cpu]);
506 cpu_set(cpu, cpu_core_map[i]); 502 cpu_set(cpu, cpu_core_map[i]);
507 /* 503 /*
@@ -1056,6 +1052,7 @@ static int __cpuinit __smp_prepare_cpu(int cpu)
1056 struct warm_boot_cpu_info info; 1052 struct warm_boot_cpu_info info;
1057 struct work_struct task; 1053 struct work_struct task;
1058 int apicid, ret; 1054 int apicid, ret;
1055 struct Xgt_desc_struct *cpu_gdt_descr = &per_cpu(cpu_gdt_descr, cpu);
1059 1056
1060 apicid = x86_cpu_to_apicid[cpu]; 1057 apicid = x86_cpu_to_apicid[cpu];
1061 if (apicid == BAD_APICID) { 1058 if (apicid == BAD_APICID) {
@@ -1063,6 +1060,18 @@ static int __cpuinit __smp_prepare_cpu(int cpu)
1063 goto exit; 1060 goto exit;
1064 } 1061 }
1065 1062
1063 /*
1064 * the CPU isn't initialized at boot time, allocate gdt table here.
1065 * cpu_init will initialize it
1066 */
1067 if (!cpu_gdt_descr->address) {
1068 cpu_gdt_descr->address = get_zeroed_page(GFP_KERNEL);
1069 if (!cpu_gdt_descr->address)
1070 printk(KERN_CRIT "CPU%d failed to allocate GDT\n", cpu);
1071 ret = -ENOMEM;
1072 goto exit;
1073 }
1074
1066 info.complete = &done; 1075 info.complete = &done;
1067 info.apicid = apicid; 1076 info.apicid = apicid;
1068 info.cpu = cpu; 1077 info.cpu = cpu;
@@ -1340,8 +1349,8 @@ remove_siblinginfo(int cpu)
1340 cpu_clear(cpu, cpu_sibling_map[sibling]); 1349 cpu_clear(cpu, cpu_sibling_map[sibling]);
1341 cpus_clear(cpu_sibling_map[cpu]); 1350 cpus_clear(cpu_sibling_map[cpu]);
1342 cpus_clear(cpu_core_map[cpu]); 1351 cpus_clear(cpu_core_map[cpu]);
1343 phys_proc_id[cpu] = BAD_APICID; 1352 c[cpu].phys_proc_id = 0;
1344 cpu_core_id[cpu] = BAD_APICID; 1353 c[cpu].cpu_core_id = 0;
1345 cpu_clear(cpu, cpu_sibling_setup_map); 1354 cpu_clear(cpu, cpu_sibling_setup_map);
1346} 1355}
1347 1356
diff --git a/arch/i386/kernel/sysenter.c b/arch/i386/kernel/sysenter.c
index 0bada1870bd..713ba39d32c 100644
--- a/arch/i386/kernel/sysenter.c
+++ b/arch/i386/kernel/sysenter.c
@@ -2,6 +2,8 @@
2 * linux/arch/i386/kernel/sysenter.c 2 * linux/arch/i386/kernel/sysenter.c
3 * 3 *
4 * (C) Copyright 2002 Linus Torvalds 4 * (C) Copyright 2002 Linus Torvalds
5 * Portions based on the vdso-randomization code from exec-shield:
6 * Copyright(C) 2005-2006, Red Hat, Inc., Ingo Molnar
5 * 7 *
6 * This file contains the needed initializations to support sysenter. 8 * This file contains the needed initializations to support sysenter.
7 */ 9 */
@@ -13,12 +15,31 @@
13#include <linux/gfp.h> 15#include <linux/gfp.h>
14#include <linux/string.h> 16#include <linux/string.h>
15#include <linux/elf.h> 17#include <linux/elf.h>
18#include <linux/mm.h>
19#include <linux/module.h>
16 20
17#include <asm/cpufeature.h> 21#include <asm/cpufeature.h>
18#include <asm/msr.h> 22#include <asm/msr.h>
19#include <asm/pgtable.h> 23#include <asm/pgtable.h>
20#include <asm/unistd.h> 24#include <asm/unistd.h>
21 25
26/*
27 * Should the kernel map a VDSO page into processes and pass its
28 * address down to glibc upon exec()?
29 */
30unsigned int __read_mostly vdso_enabled = 1;
31
32EXPORT_SYMBOL_GPL(vdso_enabled);
33
34static int __init vdso_setup(char *s)
35{
36 vdso_enabled = simple_strtoul(s, NULL, 0);
37
38 return 1;
39}
40
41__setup("vdso=", vdso_setup);
42
22extern asmlinkage void sysenter_entry(void); 43extern asmlinkage void sysenter_entry(void);
23 44
24void enable_sep_cpu(void) 45void enable_sep_cpu(void)
@@ -45,23 +66,120 @@ void enable_sep_cpu(void)
45 */ 66 */
46extern const char vsyscall_int80_start, vsyscall_int80_end; 67extern const char vsyscall_int80_start, vsyscall_int80_end;
47extern const char vsyscall_sysenter_start, vsyscall_sysenter_end; 68extern const char vsyscall_sysenter_start, vsyscall_sysenter_end;
69static void *syscall_page;
48 70
49int __init sysenter_setup(void) 71int __init sysenter_setup(void)
50{ 72{
51 void *page = (void *)get_zeroed_page(GFP_ATOMIC); 73 syscall_page = (void *)get_zeroed_page(GFP_ATOMIC);
52 74
53 __set_fixmap(FIX_VSYSCALL, __pa(page), PAGE_READONLY_EXEC); 75#ifdef CONFIG_COMPAT_VDSO
76 __set_fixmap(FIX_VDSO, __pa(syscall_page), PAGE_READONLY);
77 printk("Compat vDSO mapped to %08lx.\n", __fix_to_virt(FIX_VDSO));
78#else
79 /*
80 * In the non-compat case the ELF coredumping code needs the fixmap:
81 */
82 __set_fixmap(FIX_VDSO, __pa(syscall_page), PAGE_KERNEL_RO);
83#endif
54 84
55 if (!boot_cpu_has(X86_FEATURE_SEP)) { 85 if (!boot_cpu_has(X86_FEATURE_SEP)) {
56 memcpy(page, 86 memcpy(syscall_page,
57 &vsyscall_int80_start, 87 &vsyscall_int80_start,
58 &vsyscall_int80_end - &vsyscall_int80_start); 88 &vsyscall_int80_end - &vsyscall_int80_start);
59 return 0; 89 return 0;
60 } 90 }
61 91
62 memcpy(page, 92 memcpy(syscall_page,
63 &vsyscall_sysenter_start, 93 &vsyscall_sysenter_start,
64 &vsyscall_sysenter_end - &vsyscall_sysenter_start); 94 &vsyscall_sysenter_end - &vsyscall_sysenter_start);
65 95
66 return 0; 96 return 0;
67} 97}
98
99static struct page *syscall_nopage(struct vm_area_struct *vma,
100 unsigned long adr, int *type)
101{
102 struct page *p = virt_to_page(adr - vma->vm_start + syscall_page);
103 get_page(p);
104 return p;
105}
106
107/* Prevent VMA merging */
108static void syscall_vma_close(struct vm_area_struct *vma)
109{
110}
111
112static struct vm_operations_struct syscall_vm_ops = {
113 .close = syscall_vma_close,
114 .nopage = syscall_nopage,
115};
116
117/* Defined in vsyscall-sysenter.S */
118extern void SYSENTER_RETURN;
119
120/* Setup a VMA at program startup for the vsyscall page */
121int arch_setup_additional_pages(struct linux_binprm *bprm, int exstack)
122{
123 struct vm_area_struct *vma;
124 struct mm_struct *mm = current->mm;
125 unsigned long addr;
126 int ret;
127
128 down_write(&mm->mmap_sem);
129 addr = get_unmapped_area(NULL, 0, PAGE_SIZE, 0, 0);
130 if (IS_ERR_VALUE(addr)) {
131 ret = addr;
132 goto up_fail;
133 }
134
135 vma = kmem_cache_zalloc(vm_area_cachep, SLAB_KERNEL);
136 if (!vma) {
137 ret = -ENOMEM;
138 goto up_fail;
139 }
140
141 vma->vm_start = addr;
142 vma->vm_end = addr + PAGE_SIZE;
143 /* MAYWRITE to allow gdb to COW and set breakpoints */
144 vma->vm_flags = VM_READ|VM_EXEC|VM_MAYREAD|VM_MAYEXEC|VM_MAYWRITE;
145 vma->vm_flags |= mm->def_flags;
146 vma->vm_page_prot = protection_map[vma->vm_flags & 7];
147 vma->vm_ops = &syscall_vm_ops;
148 vma->vm_mm = mm;
149
150 ret = insert_vm_struct(mm, vma);
151 if (unlikely(ret)) {
152 kmem_cache_free(vm_area_cachep, vma);
153 goto up_fail;
154 }
155
156 current->mm->context.vdso = (void *)addr;
157 current_thread_info()->sysenter_return =
158 (void *)VDSO_SYM(&SYSENTER_RETURN);
159 mm->total_vm++;
160up_fail:
161 up_write(&mm->mmap_sem);
162 return ret;
163}
164
165const char *arch_vma_name(struct vm_area_struct *vma)
166{
167 if (vma->vm_mm && vma->vm_start == (long)vma->vm_mm->context.vdso)
168 return "[vdso]";
169 return NULL;
170}
171
172struct vm_area_struct *get_gate_vma(struct task_struct *tsk)
173{
174 return NULL;
175}
176
177int in_gate_area(struct task_struct *task, unsigned long addr)
178{
179 return 0;
180}
181
182int in_gate_area_no_task(unsigned long addr)
183{
184 return 0;
185}
diff --git a/arch/i386/kernel/topology.c b/arch/i386/kernel/topology.c
index 296355292c7..e2e281d4bcc 100644
--- a/arch/i386/kernel/topology.c
+++ b/arch/i386/kernel/topology.c
@@ -32,15 +32,8 @@
32 32
33static struct i386_cpu cpu_devices[NR_CPUS]; 33static struct i386_cpu cpu_devices[NR_CPUS];
34 34
35int arch_register_cpu(int num){ 35int arch_register_cpu(int num)
36 struct node *parent = NULL; 36{
37
38#ifdef CONFIG_NUMA
39 int node = cpu_to_node(num);
40 if (node_online(node))
41 parent = &node_devices[node].node;
42#endif /* CONFIG_NUMA */
43
44 /* 37 /*
45 * CPU0 cannot be offlined due to several 38 * CPU0 cannot be offlined due to several
46 * restrictions and assumptions in kernel. This basically 39 * restrictions and assumptions in kernel. This basically
@@ -50,21 +43,13 @@ int arch_register_cpu(int num){
50 if (!num) 43 if (!num)
51 cpu_devices[num].cpu.no_control = 1; 44 cpu_devices[num].cpu.no_control = 1;
52 45
53 return register_cpu(&cpu_devices[num].cpu, num, parent); 46 return register_cpu(&cpu_devices[num].cpu, num);
54} 47}
55 48
56#ifdef CONFIG_HOTPLUG_CPU 49#ifdef CONFIG_HOTPLUG_CPU
57 50
58void arch_unregister_cpu(int num) { 51void arch_unregister_cpu(int num) {
59 struct node *parent = NULL; 52 return unregister_cpu(&cpu_devices[num].cpu);
60
61#ifdef CONFIG_NUMA
62 int node = cpu_to_node(num);
63 if (node_online(node))
64 parent = &node_devices[node].node;
65#endif /* CONFIG_NUMA */
66
67 return unregister_cpu(&cpu_devices[num].cpu, parent);
68} 53}
69EXPORT_SYMBOL(arch_register_cpu); 54EXPORT_SYMBOL(arch_register_cpu);
70EXPORT_SYMBOL(arch_unregister_cpu); 55EXPORT_SYMBOL(arch_unregister_cpu);
@@ -74,16 +59,13 @@ EXPORT_SYMBOL(arch_unregister_cpu);
74 59
75#ifdef CONFIG_NUMA 60#ifdef CONFIG_NUMA
76#include <linux/mmzone.h> 61#include <linux/mmzone.h>
77#include <asm/node.h>
78
79struct i386_node node_devices[MAX_NUMNODES];
80 62
81static int __init topology_init(void) 63static int __init topology_init(void)
82{ 64{
83 int i; 65 int i;
84 66
85 for_each_online_node(i) 67 for_each_online_node(i)
86 arch_register_node(i); 68 register_one_node(i);
87 69
88 for_each_present_cpu(i) 70 for_each_present_cpu(i)
89 arch_register_cpu(i); 71 arch_register_cpu(i);
diff --git a/arch/i386/kernel/vsyscall-sysenter.S b/arch/i386/kernel/vsyscall-sysenter.S
index 3b62baa6a37..1a36d26e15e 100644
--- a/arch/i386/kernel/vsyscall-sysenter.S
+++ b/arch/i386/kernel/vsyscall-sysenter.S
@@ -42,10 +42,10 @@ __kernel_vsyscall:
42 /* 7: align return point with nop's to make disassembly easier */ 42 /* 7: align return point with nop's to make disassembly easier */
43 .space 7,0x90 43 .space 7,0x90
44 44
45 /* 14: System call restart point is here! (SYSENTER_RETURN - 2) */ 45 /* 14: System call restart point is here! (SYSENTER_RETURN-2) */
46 jmp .Lenter_kernel 46 jmp .Lenter_kernel
47 /* 16: System call normal return point is here! */ 47 /* 16: System call normal return point is here! */
48 .globl SYSENTER_RETURN /* Symbol used by entry.S. */ 48 .globl SYSENTER_RETURN /* Symbol used by sysenter.c */
49SYSENTER_RETURN: 49SYSENTER_RETURN:
50 pop %ebp 50 pop %ebp
51.Lpop_ebp: 51.Lpop_ebp:
diff --git a/arch/i386/kernel/vsyscall.lds.S b/arch/i386/kernel/vsyscall.lds.S
index 98699ca6e52..e26975fc68b 100644
--- a/arch/i386/kernel/vsyscall.lds.S
+++ b/arch/i386/kernel/vsyscall.lds.S
@@ -7,7 +7,7 @@
7 7
8SECTIONS 8SECTIONS
9{ 9{
10 . = VSYSCALL_BASE + SIZEOF_HEADERS; 10 . = VDSO_PRELINK + SIZEOF_HEADERS;
11 11
12 .hash : { *(.hash) } :text 12 .hash : { *(.hash) } :text
13 .dynsym : { *(.dynsym) } 13 .dynsym : { *(.dynsym) }
@@ -20,7 +20,7 @@ SECTIONS
20 For the layouts to match, we need to skip more than enough 20 For the layouts to match, we need to skip more than enough
21 space for the dynamic symbol table et al. If this amount 21 space for the dynamic symbol table et al. If this amount
22 is insufficient, ld -shared will barf. Just increase it here. */ 22 is insufficient, ld -shared will barf. Just increase it here. */
23 . = VSYSCALL_BASE + 0x400; 23 . = VDSO_PRELINK + 0x400;
24 24
25 .text : { *(.text) } :text =0x90909090 25 .text : { *(.text) } :text =0x90909090
26 .note : { *(.note.*) } :text :note 26 .note : { *(.note.*) } :text :note
diff --git a/arch/i386/mach-visws/setup.c b/arch/i386/mach-visws/setup.c
index 8a9e1a6f745..1f84cdb2477 100644
--- a/arch/i386/mach-visws/setup.c
+++ b/arch/i386/mach-visws/setup.c
@@ -140,8 +140,8 @@ void __init time_init_hook(void)
140 140
141#define MB (1024 * 1024) 141#define MB (1024 * 1024)
142 142
143static unsigned long sgivwfb_mem_phys; 143unsigned long sgivwfb_mem_phys;
144static unsigned long sgivwfb_mem_size; 144unsigned long sgivwfb_mem_size;
145 145
146long long mem_size __initdata = 0; 146long long mem_size __initdata = 0;
147 147
@@ -177,8 +177,4 @@ char * __init machine_specific_memory_setup(void)
177 add_memory_region(sgivwfb_mem_phys, sgivwfb_mem_size, E820_RESERVED); 177 add_memory_region(sgivwfb_mem_phys, sgivwfb_mem_size, E820_RESERVED);
178 178
179 return "PROM"; 179 return "PROM";
180
181 /* Remove gcc warnings */
182 (void) sanitize_e820_map(NULL, NULL);
183 (void) copy_e820_map(NULL, 0);
184} 180}
diff --git a/arch/i386/mach-visws/visws_apic.c b/arch/i386/mach-visws/visws_apic.c
index 3e64fb72129..c418521dd55 100644
--- a/arch/i386/mach-visws/visws_apic.c
+++ b/arch/i386/mach-visws/visws_apic.c
@@ -278,22 +278,22 @@ void init_VISWS_APIC_irqs(void)
278 irq_desc[i].depth = 1; 278 irq_desc[i].depth = 1;
279 279
280 if (i == 0) { 280 if (i == 0) {
281 irq_desc[i].handler = &cobalt_irq_type; 281 irq_desc[i].chip = &cobalt_irq_type;
282 } 282 }
283 else if (i == CO_IRQ_IDE0) { 283 else if (i == CO_IRQ_IDE0) {
284 irq_desc[i].handler = &cobalt_irq_type; 284 irq_desc[i].chip = &cobalt_irq_type;
285 } 285 }
286 else if (i == CO_IRQ_IDE1) { 286 else if (i == CO_IRQ_IDE1) {
287 irq_desc[i].handler = &cobalt_irq_type; 287 irq_desc[i].chip = &cobalt_irq_type;
288 } 288 }
289 else if (i == CO_IRQ_8259) { 289 else if (i == CO_IRQ_8259) {
290 irq_desc[i].handler = &piix4_master_irq_type; 290 irq_desc[i].chip = &piix4_master_irq_type;
291 } 291 }
292 else if (i < CO_IRQ_APIC0) { 292 else if (i < CO_IRQ_APIC0) {
293 irq_desc[i].handler = &piix4_virtual_irq_type; 293 irq_desc[i].chip = &piix4_virtual_irq_type;
294 } 294 }
295 else if (IS_CO_APIC(i)) { 295 else if (IS_CO_APIC(i)) {
296 irq_desc[i].handler = &cobalt_irq_type; 296 irq_desc[i].chip = &cobalt_irq_type;
297 } 297 }
298 } 298 }
299 299
diff --git a/arch/i386/mach-voyager/setup.c b/arch/i386/mach-voyager/setup.c
index 0e225054e22..defc6ebbd56 100644
--- a/arch/i386/mach-voyager/setup.c
+++ b/arch/i386/mach-voyager/setup.c
@@ -5,10 +5,10 @@
5#include <linux/config.h> 5#include <linux/config.h>
6#include <linux/init.h> 6#include <linux/init.h>
7#include <linux/interrupt.h> 7#include <linux/interrupt.h>
8#include <asm/acpi.h>
9#include <asm/arch_hooks.h> 8#include <asm/arch_hooks.h>
10#include <asm/voyager.h> 9#include <asm/voyager.h>
11#include <asm/e820.h> 10#include <asm/e820.h>
11#include <asm/io.h>
12#include <asm/setup.h> 12#include <asm/setup.h>
13 13
14void __init pre_intr_init_hook(void) 14void __init pre_intr_init_hook(void)
@@ -27,8 +27,7 @@ void __init intr_init_hook(void)
27 smp_intr_init(); 27 smp_intr_init();
28#endif 28#endif
29 29
30 if (!acpi_ioapic) 30 setup_irq(2, &irq2);
31 setup_irq(2, &irq2);
32} 31}
33 32
34void __init pre_setup_arch_hook(void) 33void __init pre_setup_arch_hook(void)
diff --git a/arch/i386/mach-voyager/voyager_smp.c b/arch/i386/mach-voyager/voyager_smp.c
index 70e560a1b79..5b8b579a079 100644
--- a/arch/i386/mach-voyager/voyager_smp.c
+++ b/arch/i386/mach-voyager/voyager_smp.c
@@ -661,6 +661,7 @@ do_boot_cpu(__u8 cpu)
661 print_cpu_info(&cpu_data[cpu]); 661 print_cpu_info(&cpu_data[cpu]);
662 wmb(); 662 wmb();
663 cpu_set(cpu, cpu_callout_map); 663 cpu_set(cpu, cpu_callout_map);
664 cpu_set(cpu, cpu_present_map);
664 } 665 }
665 else { 666 else {
666 printk("CPU%d FAILED TO BOOT: ", cpu); 667 printk("CPU%d FAILED TO BOOT: ", cpu);
@@ -1418,7 +1419,7 @@ smp_intr_init(void)
1418 * This is for later: first 16 correspond to PC IRQs; next 16 1419 * This is for later: first 16 correspond to PC IRQs; next 16
1419 * are Primary MC IRQs and final 16 are Secondary MC IRQs */ 1420 * are Primary MC IRQs and final 16 are Secondary MC IRQs */
1420 for(i = 0; i < 48; i++) 1421 for(i = 0; i < 48; i++)
1421 irq_desc[i].handler = &vic_irq_type; 1422 irq_desc[i].chip = &vic_irq_type;
1422} 1423}
1423 1424
1424/* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per 1425/* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per
@@ -1912,6 +1913,7 @@ void __devinit smp_prepare_boot_cpu(void)
1912 cpu_set(smp_processor_id(), cpu_online_map); 1913 cpu_set(smp_processor_id(), cpu_online_map);
1913 cpu_set(smp_processor_id(), cpu_callout_map); 1914 cpu_set(smp_processor_id(), cpu_callout_map);
1914 cpu_set(smp_processor_id(), cpu_possible_map); 1915 cpu_set(smp_processor_id(), cpu_possible_map);
1916 cpu_set(smp_processor_id(), cpu_present_map);
1915} 1917}
1916 1918
1917int __devinit 1919int __devinit
diff --git a/arch/i386/mm/init.c b/arch/i386/mm/init.c
index bf19513f0ce..f84b16e007f 100644
--- a/arch/i386/mm/init.c
+++ b/arch/i386/mm/init.c
@@ -23,6 +23,7 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/highmem.h> 24#include <linux/highmem.h>
25#include <linux/pagemap.h> 25#include <linux/pagemap.h>
26#include <linux/poison.h>
26#include <linux/bootmem.h> 27#include <linux/bootmem.h>
27#include <linux/slab.h> 28#include <linux/slab.h>
28#include <linux/proc_fs.h> 29#include <linux/proc_fs.h>
@@ -654,7 +655,7 @@ void __init mem_init(void)
654 */ 655 */
655#ifdef CONFIG_MEMORY_HOTPLUG 656#ifdef CONFIG_MEMORY_HOTPLUG
656#ifndef CONFIG_NEED_MULTIPLE_NODES 657#ifndef CONFIG_NEED_MULTIPLE_NODES
657int add_memory(u64 start, u64 size) 658int arch_add_memory(int nid, u64 start, u64 size)
658{ 659{
659 struct pglist_data *pgdata = &contig_page_data; 660 struct pglist_data *pgdata = &contig_page_data;
660 struct zone *zone = pgdata->node_zones + MAX_NR_ZONES-1; 661 struct zone *zone = pgdata->node_zones + MAX_NR_ZONES-1;
@@ -753,7 +754,7 @@ void free_init_pages(char *what, unsigned long begin, unsigned long end)
753 for (addr = begin; addr < end; addr += PAGE_SIZE) { 754 for (addr = begin; addr < end; addr += PAGE_SIZE) {
754 ClearPageReserved(virt_to_page(addr)); 755 ClearPageReserved(virt_to_page(addr));
755 init_page_count(virt_to_page(addr)); 756 init_page_count(virt_to_page(addr));
756 memset((void *)addr, 0xcc, PAGE_SIZE); 757 memset((void *)addr, POISON_FREE_INITMEM, PAGE_SIZE);
757 free_page(addr); 758 free_page(addr);
758 totalram_pages++; 759 totalram_pages++;
759 } 760 }
diff --git a/arch/i386/mm/pageattr.c b/arch/i386/mm/pageattr.c
index 0887b34bc59..353a836ed63 100644
--- a/arch/i386/mm/pageattr.c
+++ b/arch/i386/mm/pageattr.c
@@ -229,8 +229,8 @@ void kernel_map_pages(struct page *page, int numpages, int enable)
229 if (PageHighMem(page)) 229 if (PageHighMem(page))
230 return; 230 return;
231 if (!enable) 231 if (!enable)
232 mutex_debug_check_no_locks_freed(page_address(page), 232 debug_check_no_locks_freed(page_address(page),
233 numpages * PAGE_SIZE); 233 numpages * PAGE_SIZE);
234 234
235 /* the return value is ignored - the calls cannot fail, 235 /* the return value is ignored - the calls cannot fail,
236 * large pages are disabled at boot time. 236 * large pages are disabled at boot time.
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 18318749884..b487e227a1f 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -271,6 +271,9 @@ config HOTPLUG_CPU
271 can be controlled through /sys/devices/system/cpu/cpu#. 271 can be controlled through /sys/devices/system/cpu/cpu#.
272 Say N if you want to disable CPU hotplug. 272 Say N if you want to disable CPU hotplug.
273 273
274config ARCH_ENABLE_MEMORY_HOTPLUG
275 def_bool y
276
274config SCHED_SMT 277config SCHED_SMT
275 bool "SMT scheduler support" 278 bool "SMT scheduler support"
276 depends on SMP 279 depends on SMP
@@ -374,6 +377,10 @@ config HAVE_ARCH_EARLY_PFN_TO_NID
374 def_bool y 377 def_bool y
375 depends on NEED_MULTIPLE_NODES 378 depends on NEED_MULTIPLE_NODES
376 379
380config HAVE_ARCH_NODEDATA_EXTENSION
381 def_bool y
382 depends on NUMA
383
377config IA32_SUPPORT 384config IA32_SUPPORT
378 bool "Support for Linux/x86 binaries" 385 bool "Support for Linux/x86 binaries"
379 help 386 help
@@ -485,6 +492,10 @@ config GENERIC_PENDING_IRQ
485 depends on GENERIC_HARDIRQS && SMP 492 depends on GENERIC_HARDIRQS && SMP
486 default y 493 default y
487 494
495config IRQ_PER_CPU
496 bool
497 default y
498
488source "arch/ia64/hp/sim/Kconfig" 499source "arch/ia64/hp/sim/Kconfig"
489 500
490menu "Instrumentation Support" 501menu "Instrumentation Support"
diff --git a/arch/ia64/configs/tiger_defconfig b/arch/ia64/configs/tiger_defconfig
index 766bf495543..9d1cffb57cd 100644
--- a/arch/ia64/configs/tiger_defconfig
+++ b/arch/ia64/configs/tiger_defconfig
@@ -114,7 +114,7 @@ CONFIG_IA64_CYCLONE=y
114CONFIG_IOSAPIC=y 114CONFIG_IOSAPIC=y
115CONFIG_FORCE_MAX_ZONEORDER=17 115CONFIG_FORCE_MAX_ZONEORDER=17
116CONFIG_SMP=y 116CONFIG_SMP=y
117CONFIG_NR_CPUS=4 117CONFIG_NR_CPUS=16
118CONFIG_HOTPLUG_CPU=y 118CONFIG_HOTPLUG_CPU=y
119CONFIG_PERMIT_BSP_REMOVE=y 119CONFIG_PERMIT_BSP_REMOVE=y
120CONFIG_FORCE_CPEI_RETARGET=y 120CONFIG_FORCE_CPEI_RETARGET=y
diff --git a/arch/ia64/hp/sim/hpsim_irq.c b/arch/ia64/hp/sim/hpsim_irq.c
index c0d25a2a3e9..8145547bb52 100644
--- a/arch/ia64/hp/sim/hpsim_irq.c
+++ b/arch/ia64/hp/sim/hpsim_irq.c
@@ -44,8 +44,8 @@ hpsim_irq_init (void)
44 int i; 44 int i;
45 45
46 for (i = 0; i < NR_IRQS; ++i) { 46 for (i = 0; i < NR_IRQS; ++i) {
47 idesc = irq_descp(i); 47 idesc = irq_desc + i;
48 if (idesc->handler == &no_irq_type) 48 if (idesc->chip == &no_irq_type)
49 idesc->handler = &irq_type_hp_sim; 49 idesc->chip = &irq_type_hp_sim;
50 } 50 }
51} 51}
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c
index d58c1c5c903..efc7df4b0fd 100644
--- a/arch/ia64/kernel/iosapic.c
+++ b/arch/ia64/kernel/iosapic.c
@@ -456,7 +456,7 @@ iosapic_startup_edge_irq (unsigned int irq)
456static void 456static void
457iosapic_ack_edge_irq (unsigned int irq) 457iosapic_ack_edge_irq (unsigned int irq)
458{ 458{
459 irq_desc_t *idesc = irq_descp(irq); 459 irq_desc_t *idesc = irq_desc + irq;
460 460
461 move_native_irq(irq); 461 move_native_irq(irq);
462 /* 462 /*
@@ -659,14 +659,14 @@ register_intr (unsigned int gsi, int vector, unsigned char delivery,
659 else 659 else
660 irq_type = &irq_type_iosapic_level; 660 irq_type = &irq_type_iosapic_level;
661 661
662 idesc = irq_descp(vector); 662 idesc = irq_desc + vector;
663 if (idesc->handler != irq_type) { 663 if (idesc->chip != irq_type) {
664 if (idesc->handler != &no_irq_type) 664 if (idesc->chip != &no_irq_type)
665 printk(KERN_WARNING 665 printk(KERN_WARNING
666 "%s: changing vector %d from %s to %s\n", 666 "%s: changing vector %d from %s to %s\n",
667 __FUNCTION__, vector, 667 __FUNCTION__, vector,
668 idesc->handler->typename, irq_type->typename); 668 idesc->chip->typename, irq_type->typename);
669 idesc->handler = irq_type; 669 idesc->chip = irq_type;
670 } 670 }
671 return 0; 671 return 0;
672} 672}
@@ -793,14 +793,14 @@ again:
793 return -ENOSPC; 793 return -ENOSPC;
794 } 794 }
795 795
796 spin_lock_irqsave(&irq_descp(vector)->lock, flags); 796 spin_lock_irqsave(&irq_desc[vector].lock, flags);
797 spin_lock(&iosapic_lock); 797 spin_lock(&iosapic_lock);
798 { 798 {
799 if (gsi_to_vector(gsi) > 0) { 799 if (gsi_to_vector(gsi) > 0) {
800 if (list_empty(&iosapic_intr_info[vector].rtes)) 800 if (list_empty(&iosapic_intr_info[vector].rtes))
801 free_irq_vector(vector); 801 free_irq_vector(vector);
802 spin_unlock(&iosapic_lock); 802 spin_unlock(&iosapic_lock);
803 spin_unlock_irqrestore(&irq_descp(vector)->lock, 803 spin_unlock_irqrestore(&irq_desc[vector].lock,
804 flags); 804 flags);
805 goto again; 805 goto again;
806 } 806 }
@@ -810,7 +810,7 @@ again:
810 polarity, trigger); 810 polarity, trigger);
811 if (err < 0) { 811 if (err < 0) {
812 spin_unlock(&iosapic_lock); 812 spin_unlock(&iosapic_lock);
813 spin_unlock_irqrestore(&irq_descp(vector)->lock, 813 spin_unlock_irqrestore(&irq_desc[vector].lock,
814 flags); 814 flags);
815 return err; 815 return err;
816 } 816 }
@@ -825,7 +825,7 @@ again:
825 set_rte(gsi, vector, dest, mask); 825 set_rte(gsi, vector, dest, mask);
826 } 826 }
827 spin_unlock(&iosapic_lock); 827 spin_unlock(&iosapic_lock);
828 spin_unlock_irqrestore(&irq_descp(vector)->lock, flags); 828 spin_unlock_irqrestore(&irq_desc[vector].lock, flags);
829 829
830 printk(KERN_INFO "GSI %u (%s, %s) -> CPU %d (0x%04x) vector %d\n", 830 printk(KERN_INFO "GSI %u (%s, %s) -> CPU %d (0x%04x) vector %d\n",
831 gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"), 831 gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"),
@@ -860,7 +860,7 @@ iosapic_unregister_intr (unsigned int gsi)
860 } 860 }
861 vector = irq_to_vector(irq); 861 vector = irq_to_vector(irq);
862 862
863 idesc = irq_descp(irq); 863 idesc = irq_desc + irq;
864 spin_lock_irqsave(&idesc->lock, flags); 864 spin_lock_irqsave(&idesc->lock, flags);
865 spin_lock(&iosapic_lock); 865 spin_lock(&iosapic_lock);
866 { 866 {
@@ -903,7 +903,7 @@ iosapic_unregister_intr (unsigned int gsi)
903 BUG_ON(iosapic_intr_info[vector].count); 903 BUG_ON(iosapic_intr_info[vector].count);
904 904
905 /* Clear the interrupt controller descriptor */ 905 /* Clear the interrupt controller descriptor */
906 idesc->handler = &no_irq_type; 906 idesc->chip = &no_irq_type;
907 907
908 /* Clear the interrupt information */ 908 /* Clear the interrupt information */
909 memset(&iosapic_intr_info[vector], 0, 909 memset(&iosapic_intr_info[vector], 0,
diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c
index 9c72ea3f643..7852382de2f 100644
--- a/arch/ia64/kernel/irq.c
+++ b/arch/ia64/kernel/irq.c
@@ -76,7 +76,7 @@ int show_interrupts(struct seq_file *p, void *v)
76 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 76 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
77 } 77 }
78#endif 78#endif
79 seq_printf(p, " %14s", irq_desc[i].handler->typename); 79 seq_printf(p, " %14s", irq_desc[i].chip->typename);
80 seq_printf(p, " %s", action->name); 80 seq_printf(p, " %s", action->name);
81 81
82 for (action=action->next; action; action = action->next) 82 for (action=action->next; action; action = action->next)
@@ -100,7 +100,7 @@ void set_irq_affinity_info (unsigned int irq, int hwid, int redir)
100 cpu_set(cpu_logical_id(hwid), mask); 100 cpu_set(cpu_logical_id(hwid), mask);
101 101
102 if (irq < NR_IRQS) { 102 if (irq < NR_IRQS) {
103 irq_affinity[irq] = mask; 103 irq_desc[irq].affinity = mask;
104 irq_redir[irq] = (char) (redir & 0xff); 104 irq_redir[irq] = (char) (redir & 0xff);
105 } 105 }
106} 106}
@@ -120,7 +120,7 @@ static void migrate_irqs(void)
120 int irq, new_cpu; 120 int irq, new_cpu;
121 121
122 for (irq=0; irq < NR_IRQS; irq++) { 122 for (irq=0; irq < NR_IRQS; irq++) {
123 desc = irq_descp(irq); 123 desc = irq_desc + irq;
124 124
125 /* 125 /*
126 * No handling for now. 126 * No handling for now.
@@ -131,7 +131,7 @@ static void migrate_irqs(void)
131 if (desc->status == IRQ_PER_CPU) 131 if (desc->status == IRQ_PER_CPU)
132 continue; 132 continue;
133 133
134 cpus_and(mask, irq_affinity[irq], cpu_online_map); 134 cpus_and(mask, irq_desc[irq].affinity, cpu_online_map);
135 if (any_online_cpu(mask) == NR_CPUS) { 135 if (any_online_cpu(mask) == NR_CPUS) {
136 /* 136 /*
137 * Save it for phase 2 processing 137 * Save it for phase 2 processing
@@ -144,15 +144,15 @@ static void migrate_irqs(void)
144 /* 144 /*
145 * Al three are essential, currently WARN_ON.. maybe panic? 145 * Al three are essential, currently WARN_ON.. maybe panic?
146 */ 146 */
147 if (desc->handler && desc->handler->disable && 147 if (desc->chip && desc->chip->disable &&
148 desc->handler->enable && desc->handler->set_affinity) { 148 desc->chip->enable && desc->chip->set_affinity) {
149 desc->handler->disable(irq); 149 desc->chip->disable(irq);
150 desc->handler->set_affinity(irq, mask); 150 desc->chip->set_affinity(irq, mask);
151 desc->handler->enable(irq); 151 desc->chip->enable(irq);
152 } else { 152 } else {
153 WARN_ON((!(desc->handler) || !(desc->handler->disable) || 153 WARN_ON((!(desc->chip) || !(desc->chip->disable) ||
154 !(desc->handler->enable) || 154 !(desc->chip->enable) ||
155 !(desc->handler->set_affinity))); 155 !(desc->chip->set_affinity)));
156 } 156 }
157 } 157 }
158 } 158 }
diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c
index ef9a2b49307..f5035304594 100644
--- a/arch/ia64/kernel/irq_ia64.c
+++ b/arch/ia64/kernel/irq_ia64.c
@@ -249,9 +249,9 @@ register_percpu_irq (ia64_vector vec, struct irqaction *action)
249 249
250 for (irq = 0; irq < NR_IRQS; ++irq) 250 for (irq = 0; irq < NR_IRQS; ++irq)
251 if (irq_to_vector(irq) == vec) { 251 if (irq_to_vector(irq) == vec) {
252 desc = irq_descp(irq); 252 desc = irq_desc + irq;
253 desc->status |= IRQ_PER_CPU; 253 desc->status |= IRQ_PER_CPU;
254 desc->handler = &irq_type_ia64_lsapic; 254 desc->chip = &irq_type_ia64_lsapic;
255 if (action) 255 if (action)
256 setup_irq(irq, action); 256 setup_irq(irq, action);
257 } 257 }
diff --git a/arch/ia64/kernel/irq_lsapic.c b/arch/ia64/kernel/irq_lsapic.c
index ea14e6a0440..1ab58b09f3d 100644
--- a/arch/ia64/kernel/irq_lsapic.c
+++ b/arch/ia64/kernel/irq_lsapic.c
@@ -26,6 +26,13 @@ lsapic_noop (unsigned int irq)
26 /* nuthing to do... */ 26 /* nuthing to do... */
27} 27}
28 28
29static int lsapic_retrigger(unsigned int irq)
30{
31 ia64_resend_irq(irq);
32
33 return 1;
34}
35
29struct hw_interrupt_type irq_type_ia64_lsapic = { 36struct hw_interrupt_type irq_type_ia64_lsapic = {
30 .typename = "LSAPIC", 37 .typename = "LSAPIC",
31 .startup = lsapic_noop_startup, 38 .startup = lsapic_noop_startup,
@@ -33,5 +40,6 @@ struct hw_interrupt_type irq_type_ia64_lsapic = {
33 .enable = lsapic_noop, 40 .enable = lsapic_noop,
34 .disable = lsapic_noop, 41 .disable = lsapic_noop,
35 .ack = lsapic_noop, 42 .ack = lsapic_noop,
36 .end = lsapic_noop 43 .end = lsapic_noop,
44 .retrigger = lsapic_retrigger,
37}; 45};
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index 6a0880639bc..d7dc5e63de6 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -1788,7 +1788,7 @@ ia64_mca_late_init(void)
1788 cpe_poll_enabled = 0; 1788 cpe_poll_enabled = 0;
1789 for (irq = 0; irq < NR_IRQS; ++irq) 1789 for (irq = 0; irq < NR_IRQS; ++irq)
1790 if (irq_to_vector(irq) == cpe_vector) { 1790 if (irq_to_vector(irq) == cpe_vector) {
1791 desc = irq_descp(irq); 1791 desc = irq_desc + irq;
1792 desc->status |= IRQ_PER_CPU; 1792 desc->status |= IRQ_PER_CPU;
1793 setup_irq(irq, &mca_cpe_irqaction); 1793 setup_irq(irq, &mca_cpe_irqaction);
1794 ia64_cpe_irq = irq; 1794 ia64_cpe_irq = irq;
diff --git a/arch/ia64/kernel/palinfo.c b/arch/ia64/kernel/palinfo.c
index 859fb37ff49..8a120841913 100644
--- a/arch/ia64/kernel/palinfo.c
+++ b/arch/ia64/kernel/palinfo.c
@@ -959,7 +959,7 @@ remove_palinfo_proc_entries(unsigned int hcpu)
959 } 959 }
960} 960}
961 961
962static int palinfo_cpu_callback(struct notifier_block *nfb, 962static int __cpuinit palinfo_cpu_callback(struct notifier_block *nfb,
963 unsigned long action, 963 unsigned long action,
964 void *hcpu) 964 void *hcpu)
965{ 965{
@@ -978,7 +978,7 @@ static int palinfo_cpu_callback(struct notifier_block *nfb,
978 return NOTIFY_OK; 978 return NOTIFY_OK;
979} 979}
980 980
981static struct notifier_block palinfo_cpu_notifier = 981static struct notifier_block __cpuinitdata palinfo_cpu_notifier =
982{ 982{
983 .notifier_call = palinfo_cpu_callback, 983 .notifier_call = palinfo_cpu_callback,
984 .priority = 0, 984 .priority = 0,
@@ -998,7 +998,7 @@ palinfo_init(void)
998 } 998 }
999 999
1000 /* Register for future delivery via notify registration */ 1000 /* Register for future delivery via notify registration */
1001 register_cpu_notifier(&palinfo_cpu_notifier); 1001 register_hotcpu_notifier(&palinfo_cpu_notifier);
1002 1002
1003 return 0; 1003 return 0;
1004} 1004}
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 6d7bc8ff7b3..a0055d3d695 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -6165,7 +6165,7 @@ pfm_load_regs (struct task_struct *task)
6165 /* 6165 /*
6166 * will replay the PMU interrupt 6166 * will replay the PMU interrupt
6167 */ 6167 */
6168 if (need_irq_resend) hw_resend_irq(NULL, IA64_PERFMON_VECTOR); 6168 if (need_irq_resend) ia64_resend_irq(IA64_PERFMON_VECTOR);
6169 6169
6170 pfm_stats[smp_processor_id()].pfm_replay_ovfl_intr_count++; 6170 pfm_stats[smp_processor_id()].pfm_replay_ovfl_intr_count++;
6171 } 6171 }
@@ -6305,7 +6305,7 @@ pfm_load_regs (struct task_struct *task)
6305 /* 6305 /*
6306 * will replay the PMU interrupt 6306 * will replay the PMU interrupt
6307 */ 6307 */
6308 if (need_irq_resend) hw_resend_irq(NULL, IA64_PERFMON_VECTOR); 6308 if (need_irq_resend) ia64_resend_irq(IA64_PERFMON_VECTOR);
6309 6309
6310 pfm_stats[smp_processor_id()].pfm_replay_ovfl_intr_count++; 6310 pfm_stats[smp_processor_id()].pfm_replay_ovfl_intr_count++;
6311 } 6311 }
diff --git a/arch/ia64/kernel/salinfo.c b/arch/ia64/kernel/salinfo.c
index 663a186ad19..9065f0f01ba 100644
--- a/arch/ia64/kernel/salinfo.c
+++ b/arch/ia64/kernel/salinfo.c
@@ -572,7 +572,7 @@ static struct file_operations salinfo_data_fops = {
572}; 572};
573 573
574#ifdef CONFIG_HOTPLUG_CPU 574#ifdef CONFIG_HOTPLUG_CPU
575static int 575static int __devinit
576salinfo_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu) 576salinfo_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu)
577{ 577{
578 unsigned int i, cpu = (unsigned long)hcpu; 578 unsigned int i, cpu = (unsigned long)hcpu;
@@ -673,9 +673,7 @@ salinfo_init(void)
673 salinfo_timer.function = &salinfo_timeout; 673 salinfo_timer.function = &salinfo_timeout;
674 add_timer(&salinfo_timer); 674 add_timer(&salinfo_timer);
675 675
676#ifdef CONFIG_HOTPLUG_CPU 676 register_hotcpu_notifier(&salinfo_cpu_notifier);
677 register_cpu_notifier(&salinfo_cpu_notifier);
678#endif
679 677
680 return 0; 678 return 0;
681} 679}
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c
index 44e9547878a..5203df78f15 100644
--- a/arch/ia64/kernel/smpboot.c
+++ b/arch/ia64/kernel/smpboot.c
@@ -677,16 +677,16 @@ int migrate_platform_irqs(unsigned int cpu)
677 new_cpei_cpu = any_online_cpu(cpu_online_map); 677 new_cpei_cpu = any_online_cpu(cpu_online_map);
678 mask = cpumask_of_cpu(new_cpei_cpu); 678 mask = cpumask_of_cpu(new_cpei_cpu);
679 set_cpei_target_cpu(new_cpei_cpu); 679 set_cpei_target_cpu(new_cpei_cpu);
680 desc = irq_descp(ia64_cpe_irq); 680 desc = irq_desc + ia64_cpe_irq;
681 /* 681 /*
682 * Switch for now, immediatly, we need to do fake intr 682 * Switch for now, immediatly, we need to do fake intr
683 * as other interrupts, but need to study CPEI behaviour with 683 * as other interrupts, but need to study CPEI behaviour with
684 * polling before making changes. 684 * polling before making changes.
685 */ 685 */
686 if (desc) { 686 if (desc) {
687 desc->handler->disable(ia64_cpe_irq); 687 desc->chip->disable(ia64_cpe_irq);
688 desc->handler->set_affinity(ia64_cpe_irq, mask); 688 desc->chip->set_affinity(ia64_cpe_irq, mask);
689 desc->handler->enable(ia64_cpe_irq); 689 desc->chip->enable(ia64_cpe_irq);
690 printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu); 690 printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu);
691 } 691 }
692 } 692 }
diff --git a/arch/ia64/kernel/topology.c b/arch/ia64/kernel/topology.c
index 879edb51d1e..5511d9c6c70 100644
--- a/arch/ia64/kernel/topology.c
+++ b/arch/ia64/kernel/topology.c
@@ -26,19 +26,10 @@
26#include <asm/numa.h> 26#include <asm/numa.h>
27#include <asm/cpu.h> 27#include <asm/cpu.h>
28 28
29#ifdef CONFIG_NUMA
30static struct node *sysfs_nodes;
31#endif
32static struct ia64_cpu *sysfs_cpus; 29static struct ia64_cpu *sysfs_cpus;
33 30
34int arch_register_cpu(int num) 31int arch_register_cpu(int num)
35{ 32{
36 struct node *parent = NULL;
37
38#ifdef CONFIG_NUMA
39 parent = &sysfs_nodes[cpu_to_node(num)];
40#endif /* CONFIG_NUMA */
41
42#if defined (CONFIG_ACPI) && defined (CONFIG_HOTPLUG_CPU) 33#if defined (CONFIG_ACPI) && defined (CONFIG_HOTPLUG_CPU)
43 /* 34 /*
44 * If CPEI cannot be re-targetted, and this is 35 * If CPEI cannot be re-targetted, and this is
@@ -48,21 +39,14 @@ int arch_register_cpu(int num)
48 sysfs_cpus[num].cpu.no_control = 1; 39 sysfs_cpus[num].cpu.no_control = 1;
49#endif 40#endif
50 41
51 return register_cpu(&sysfs_cpus[num].cpu, num, parent); 42 return register_cpu(&sysfs_cpus[num].cpu, num);
52} 43}
53 44
54#ifdef CONFIG_HOTPLUG_CPU 45#ifdef CONFIG_HOTPLUG_CPU
55 46
56void arch_unregister_cpu(int num) 47void arch_unregister_cpu(int num)
57{ 48{
58 struct node *parent = NULL; 49 return unregister_cpu(&sysfs_cpus[num].cpu);
59
60#ifdef CONFIG_NUMA
61 int node = cpu_to_node(num);
62 parent = &sysfs_nodes[node];
63#endif /* CONFIG_NUMA */
64
65 return unregister_cpu(&sysfs_cpus[num].cpu, parent);
66} 50}
67EXPORT_SYMBOL(arch_register_cpu); 51EXPORT_SYMBOL(arch_register_cpu);
68EXPORT_SYMBOL(arch_unregister_cpu); 52EXPORT_SYMBOL(arch_unregister_cpu);
@@ -74,17 +58,11 @@ static int __init topology_init(void)
74 int i, err = 0; 58 int i, err = 0;
75 59
76#ifdef CONFIG_NUMA 60#ifdef CONFIG_NUMA
77 sysfs_nodes = kzalloc(sizeof(struct node) * MAX_NUMNODES, GFP_KERNEL);
78 if (!sysfs_nodes) {
79 err = -ENOMEM;
80 goto out;
81 }
82
83 /* 61 /*
84 * MCD - Do we want to register all ONLINE nodes, or all POSSIBLE nodes? 62 * MCD - Do we want to register all ONLINE nodes, or all POSSIBLE nodes?
85 */ 63 */
86 for_each_online_node(i) { 64 for_each_online_node(i) {
87 if ((err = register_node(&sysfs_nodes[i], i, 0))) 65 if ((err = register_one_node(i)))
88 goto out; 66 goto out;
89 } 67 }
90#endif 68#endif
@@ -426,7 +404,7 @@ static int __cpuinit cache_remove_dev(struct sys_device * sys_dev)
426 * When a cpu is hot-plugged, do a check and initiate 404 * When a cpu is hot-plugged, do a check and initiate
427 * cache kobject if necessary 405 * cache kobject if necessary
428 */ 406 */
429static int cache_cpu_callback(struct notifier_block *nfb, 407static int __cpuinit cache_cpu_callback(struct notifier_block *nfb,
430 unsigned long action, void *hcpu) 408 unsigned long action, void *hcpu)
431{ 409{
432 unsigned int cpu = (unsigned long)hcpu; 410 unsigned int cpu = (unsigned long)hcpu;
@@ -444,7 +422,7 @@ static int cache_cpu_callback(struct notifier_block *nfb,
444 return NOTIFY_OK; 422 return NOTIFY_OK;
445} 423}
446 424
447static struct notifier_block cache_cpu_notifier = 425static struct notifier_block __cpuinitdata cache_cpu_notifier =
448{ 426{
449 .notifier_call = cache_cpu_callback 427 .notifier_call = cache_cpu_callback
450}; 428};
diff --git a/arch/ia64/mm/discontig.c b/arch/ia64/mm/discontig.c
index b6bcc9fa360..525b082eb66 100644
--- a/arch/ia64/mm/discontig.c
+++ b/arch/ia64/mm/discontig.c
@@ -33,7 +33,6 @@
33 */ 33 */
34struct early_node_data { 34struct early_node_data {
35 struct ia64_node_data *node_data; 35 struct ia64_node_data *node_data;
36 pg_data_t *pgdat;
37 unsigned long pernode_addr; 36 unsigned long pernode_addr;
38 unsigned long pernode_size; 37 unsigned long pernode_size;
39 struct bootmem_data bootmem_data; 38 struct bootmem_data bootmem_data;
@@ -46,6 +45,8 @@ struct early_node_data {
46static struct early_node_data mem_data[MAX_NUMNODES] __initdata; 45static struct early_node_data mem_data[MAX_NUMNODES] __initdata;
47static nodemask_t memory_less_mask __initdata; 46static nodemask_t memory_less_mask __initdata;
48 47
48static pg_data_t *pgdat_list[MAX_NUMNODES];
49
49/* 50/*
50 * To prevent cache aliasing effects, align per-node structures so that they 51 * To prevent cache aliasing effects, align per-node structures so that they
51 * start at addresses that are strided by node number. 52 * start at addresses that are strided by node number.
@@ -99,7 +100,7 @@ static int __init build_node_maps(unsigned long start, unsigned long len,
99 * acpi_boot_init() (which builds the node_to_cpu_mask array) hasn't been 100 * acpi_boot_init() (which builds the node_to_cpu_mask array) hasn't been
100 * called yet. Note that node 0 will also count all non-existent cpus. 101 * called yet. Note that node 0 will also count all non-existent cpus.
101 */ 102 */
102static int __init early_nr_cpus_node(int node) 103static int __meminit early_nr_cpus_node(int node)
103{ 104{
104 int cpu, n = 0; 105 int cpu, n = 0;
105 106
@@ -114,7 +115,7 @@ static int __init early_nr_cpus_node(int node)
114 * compute_pernodesize - compute size of pernode data 115 * compute_pernodesize - compute size of pernode data
115 * @node: the node id. 116 * @node: the node id.
116 */ 117 */
117static unsigned long __init compute_pernodesize(int node) 118static unsigned long __meminit compute_pernodesize(int node)
118{ 119{
119 unsigned long pernodesize = 0, cpus; 120 unsigned long pernodesize = 0, cpus;
120 121
@@ -175,13 +176,13 @@ static void __init fill_pernode(int node, unsigned long pernode,
175 pernode += PERCPU_PAGE_SIZE * cpus; 176 pernode += PERCPU_PAGE_SIZE * cpus;
176 pernode += node * L1_CACHE_BYTES; 177 pernode += node * L1_CACHE_BYTES;
177 178
178 mem_data[node].pgdat = __va(pernode); 179 pgdat_list[node] = __va(pernode);
179 pernode += L1_CACHE_ALIGN(sizeof(pg_data_t)); 180 pernode += L1_CACHE_ALIGN(sizeof(pg_data_t));
180 181
181 mem_data[node].node_data = __va(pernode); 182 mem_data[node].node_data = __va(pernode);
182 pernode += L1_CACHE_ALIGN(sizeof(struct ia64_node_data)); 183 pernode += L1_CACHE_ALIGN(sizeof(struct ia64_node_data));
183 184
184 mem_data[node].pgdat->bdata = bdp; 185 pgdat_list[node]->bdata = bdp;
185 pernode += L1_CACHE_ALIGN(sizeof(pg_data_t)); 186 pernode += L1_CACHE_ALIGN(sizeof(pg_data_t));
186 187
187 cpu_data = per_cpu_node_setup(cpu_data, node); 188 cpu_data = per_cpu_node_setup(cpu_data, node);
@@ -268,7 +269,7 @@ static int __init find_pernode_space(unsigned long start, unsigned long len,
268static int __init free_node_bootmem(unsigned long start, unsigned long len, 269static int __init free_node_bootmem(unsigned long start, unsigned long len,
269 int node) 270 int node)
270{ 271{
271 free_bootmem_node(mem_data[node].pgdat, start, len); 272 free_bootmem_node(pgdat_list[node], start, len);
272 273
273 return 0; 274 return 0;
274} 275}
@@ -287,7 +288,7 @@ static void __init reserve_pernode_space(void)
287 int node; 288 int node;
288 289
289 for_each_online_node(node) { 290 for_each_online_node(node) {
290 pg_data_t *pdp = mem_data[node].pgdat; 291 pg_data_t *pdp = pgdat_list[node];
291 292
292 if (node_isset(node, memory_less_mask)) 293 if (node_isset(node, memory_less_mask))
293 continue; 294 continue;
@@ -307,6 +308,17 @@ static void __init reserve_pernode_space(void)
307 } 308 }
308} 309}
309 310
311static void __meminit scatter_node_data(void)
312{
313 pg_data_t **dst;
314 int node;
315
316 for_each_online_node(node) {
317 dst = LOCAL_DATA_ADDR(pgdat_list[node])->pg_data_ptrs;
318 memcpy(dst, pgdat_list, sizeof(pgdat_list));
319 }
320}
321
310/** 322/**
311 * initialize_pernode_data - fixup per-cpu & per-node pointers 323 * initialize_pernode_data - fixup per-cpu & per-node pointers
312 * 324 *
@@ -317,17 +329,10 @@ static void __init reserve_pernode_space(void)
317 */ 329 */
318static void __init initialize_pernode_data(void) 330static void __init initialize_pernode_data(void)
319{ 331{
320 pg_data_t *pgdat_list[MAX_NUMNODES];
321 int cpu, node; 332 int cpu, node;
322 333
323 for_each_online_node(node) 334 scatter_node_data();
324 pgdat_list[node] = mem_data[node].pgdat;
325 335
326 /* Copy the pg_data_t list to each node and init the node field */
327 for_each_online_node(node) {
328 memcpy(mem_data[node].node_data->pg_data_ptrs, pgdat_list,
329 sizeof(pgdat_list));
330 }
331#ifdef CONFIG_SMP 336#ifdef CONFIG_SMP
332 /* Set the node_data pointer for each per-cpu struct */ 337 /* Set the node_data pointer for each per-cpu struct */
333 for (cpu = 0; cpu < NR_CPUS; cpu++) { 338 for (cpu = 0; cpu < NR_CPUS; cpu++) {
@@ -372,7 +377,7 @@ static void __init *memory_less_node_alloc(int nid, unsigned long pernodesize)
372 if (bestnode == -1) 377 if (bestnode == -1)
373 bestnode = anynode; 378 bestnode = anynode;
374 379
375 ptr = __alloc_bootmem_node(mem_data[bestnode].pgdat, pernodesize, 380 ptr = __alloc_bootmem_node(pgdat_list[bestnode], pernodesize,
376 PERCPU_PAGE_SIZE, __pa(MAX_DMA_ADDRESS)); 381 PERCPU_PAGE_SIZE, __pa(MAX_DMA_ADDRESS));
377 382
378 return ptr; 383 return ptr;
@@ -476,7 +481,7 @@ void __init find_memory(void)
476 pernodesize = mem_data[node].pernode_size; 481 pernodesize = mem_data[node].pernode_size;
477 map = pernode + pernodesize; 482 map = pernode + pernodesize;
478 483
479 init_bootmem_node(mem_data[node].pgdat, 484 init_bootmem_node(pgdat_list[node],
480 map>>PAGE_SHIFT, 485 map>>PAGE_SHIFT,
481 bdp->node_boot_start>>PAGE_SHIFT, 486 bdp->node_boot_start>>PAGE_SHIFT,
482 bdp->node_low_pfn); 487 bdp->node_low_pfn);
@@ -786,3 +791,21 @@ void __init paging_init(void)
786 791
787 zero_page_memmap_ptr = virt_to_page(ia64_imva(empty_zero_page)); 792 zero_page_memmap_ptr = virt_to_page(ia64_imva(empty_zero_page));
788} 793}
794
795pg_data_t *arch_alloc_nodedata(int nid)
796{
797 unsigned long size = compute_pernodesize(nid);
798
799 return kzalloc(size, GFP_KERNEL);
800}
801
802void arch_free_nodedata(pg_data_t *pgdat)
803{
804 kfree(pgdat);
805}
806
807void arch_refresh_nodedata(int update_node, pg_data_t *update_pgdat)
808{
809 pgdat_list[update_node] = update_pgdat;
810 scatter_node_data();
811}
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index 11f08001f8c..38306e98f04 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -652,7 +652,7 @@ void online_page(struct page *page)
652 num_physpages++; 652 num_physpages++;
653} 653}
654 654
655int add_memory(u64 start, u64 size) 655int arch_add_memory(int nid, u64 start, u64 size)
656{ 656{
657 pg_data_t *pgdat; 657 pg_data_t *pgdat;
658 struct zone *zone; 658 struct zone *zone;
@@ -660,7 +660,7 @@ int add_memory(u64 start, u64 size)
660 unsigned long nr_pages = size >> PAGE_SHIFT; 660 unsigned long nr_pages = size >> PAGE_SHIFT;
661 int ret; 661 int ret;
662 662
663 pgdat = NODE_DATA(0); 663 pgdat = NODE_DATA(nid);
664 664
665 zone = pgdat->node_zones + ZONE_NORMAL; 665 zone = pgdat->node_zones + ZONE_NORMAL;
666 ret = __add_pages(zone, start_pfn, nr_pages); 666 ret = __add_pages(zone, start_pfn, nr_pages);
@@ -671,7 +671,6 @@ int add_memory(u64 start, u64 size)
671 671
672 return ret; 672 return ret;
673} 673}
674EXPORT_SYMBOL_GPL(add_memory);
675 674
676int remove_memory(u64 start, u64 size) 675int remove_memory(u64 start, u64 size)
677{ 676{
diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c
index dc8e2b69671..7bb6ad188ba 100644
--- a/arch/ia64/sn/kernel/irq.c
+++ b/arch/ia64/sn/kernel/irq.c
@@ -27,7 +27,7 @@ static void unregister_intr_pda(struct sn_irq_info *sn_irq_info);
27int sn_force_interrupt_flag = 1; 27int sn_force_interrupt_flag = 1;
28extern int sn_ioif_inited; 28extern int sn_ioif_inited;
29struct list_head **sn_irq_lh; 29struct list_head **sn_irq_lh;
30static spinlock_t sn_irq_info_lock = SPIN_LOCK_UNLOCKED; /* non-IRQ lock */ 30static DEFINE_SPINLOCK(sn_irq_info_lock); /* non-IRQ lock */
31 31
32u64 sn_intr_alloc(nasid_t local_nasid, int local_widget, 32u64 sn_intr_alloc(nasid_t local_nasid, int local_widget,
33 struct sn_irq_info *sn_irq_info, 33 struct sn_irq_info *sn_irq_info,
@@ -225,8 +225,8 @@ void sn_irq_init(void)
225 ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR; 225 ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR;
226 226
227 for (i = 0; i < NR_IRQS; i++) { 227 for (i = 0; i < NR_IRQS; i++) {
228 if (base_desc[i].handler == &no_irq_type) { 228 if (base_desc[i].chip == &no_irq_type) {
229 base_desc[i].handler = &irq_type_sn; 229 base_desc[i].chip = &irq_type_sn;
230 } 230 }
231 } 231 }
232} 232}
diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c
index 93577abae36..3bfccf35434 100644
--- a/arch/ia64/sn/kernel/setup.c
+++ b/arch/ia64/sn/kernel/setup.c
@@ -458,7 +458,7 @@ void __init sn_setup(char **cmdline_p)
458 * support here so we don't have to listen to failed keyboard probe 458 * support here so we don't have to listen to failed keyboard probe
459 * messages. 459 * messages.
460 */ 460 */
461 if (version <= 0x0209 && acpi_kbd_controller_present) { 461 if (is_shub1() && version <= 0x0209 && acpi_kbd_controller_present) {
462 printk(KERN_INFO "Disabling legacy keyboard support as prom " 462 printk(KERN_INFO "Disabling legacy keyboard support as prom "
463 "is too old and doesn't provide FADT\n"); 463 "is too old and doesn't provide FADT\n");
464 acpi_kbd_controller_present = 0; 464 acpi_kbd_controller_present = 0;
@@ -577,7 +577,8 @@ void __init sn_cpu_init(void)
577 int i; 577 int i;
578 static int wars_have_been_checked; 578 static int wars_have_been_checked;
579 579
580 if (smp_processor_id() == 0 && IS_MEDUSA()) { 580 cpuid = smp_processor_id();
581 if (cpuid == 0 && IS_MEDUSA()) {
581 if (ia64_sn_is_fake_prom()) 582 if (ia64_sn_is_fake_prom())
582 sn_prom_type = 2; 583 sn_prom_type = 2;
583 else 584 else
@@ -597,6 +598,12 @@ void __init sn_cpu_init(void)
597 sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2; 598 sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2;
598 599
599 /* 600 /*
601 * Don't check status. The SAL call is not supported on all PROMs
602 * but a failure is harmless.
603 */
604 (void) ia64_sn_set_cpu_number(cpuid);
605
606 /*
600 * The boot cpu makes this call again after platform initialization is 607 * The boot cpu makes this call again after platform initialization is
601 * complete. 608 * complete.
602 */ 609 */
@@ -607,7 +614,6 @@ void __init sn_cpu_init(void)
607 if (ia64_sn_get_prom_feature_set(i, &sn_prom_features[i]) != 0) 614 if (ia64_sn_get_prom_feature_set(i, &sn_prom_features[i]) != 0)
608 break; 615 break;
609 616
610 cpuid = smp_processor_id();
611 cpuphyid = get_sapicid(); 617 cpuphyid = get_sapicid();
612 618
613 if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice)) 619 if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice))
diff --git a/arch/ia64/sn/pci/tioca_provider.c b/arch/ia64/sn/pci/tioca_provider.c
index 20de72791b9..e4aa839d018 100644
--- a/arch/ia64/sn/pci/tioca_provider.c
+++ b/arch/ia64/sn/pci/tioca_provider.c
@@ -595,7 +595,7 @@ tioca_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
595 595
596 /* sanity check prom rev */ 596 /* sanity check prom rev */
597 597
598 if (sn_sal_rev() < 0x0406) { 598 if (is_shub1() && sn_sal_rev() < 0x0406) {
599 printk 599 printk
600 (KERN_ERR "%s: SGI prom rev 4.06 or greater required " 600 (KERN_ERR "%s: SGI prom rev 4.06 or greater required "
601 "for tioca support\n", __FUNCTION__); 601 "for tioca support\n", __FUNCTION__);
diff --git a/arch/m32r/kernel/irq.c b/arch/m32r/kernel/irq.c
index a4634b06f67..3841861df6a 100644
--- a/arch/m32r/kernel/irq.c
+++ b/arch/m32r/kernel/irq.c
@@ -54,7 +54,7 @@ int show_interrupts(struct seq_file *p, void *v)
54 for_each_online_cpu(j) 54 for_each_online_cpu(j)
55 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 55 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
56#endif 56#endif
57 seq_printf(p, " %14s", irq_desc[i].handler->typename); 57 seq_printf(p, " %14s", irq_desc[i].chip->typename);
58 seq_printf(p, " %s", action->name); 58 seq_printf(p, " %s", action->name);
59 59
60 for (action=action->next; action; action = action->next) 60 for (action=action->next; action; action = action->next)
diff --git a/arch/m32r/kernel/setup.c b/arch/m32r/kernel/setup.c
index 3cd3c2988a4..1ff483c8a4c 100644
--- a/arch/m32r/kernel/setup.c
+++ b/arch/m32r/kernel/setup.c
@@ -275,7 +275,7 @@ static int __init topology_init(void)
275 int i; 275 int i;
276 276
277 for_each_present_cpu(i) 277 for_each_present_cpu(i)
278 register_cpu(&cpu_devices[i], i, NULL); 278 register_cpu(&cpu_devices[i], i);
279 279
280 return 0; 280 return 0;
281} 281}
diff --git a/arch/m32r/kernel/setup_m32104ut.c b/arch/m32r/kernel/setup_m32104ut.c
index 6328e1357a8..f9f56c27019 100644
--- a/arch/m32r/kernel/setup_m32104ut.c
+++ b/arch/m32r/kernel/setup_m32104ut.c
@@ -87,7 +87,7 @@ void __init init_IRQ(void)
87#if defined(CONFIG_SMC91X) 87#if defined(CONFIG_SMC91X)
88 /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/ 88 /* INT#0: LAN controller on M32104UT-LAN (SMC91C111)*/
89 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; 89 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
90 irq_desc[M32R_IRQ_INT0].handler = &m32104ut_irq_type; 90 irq_desc[M32R_IRQ_INT0].chip = &m32104ut_irq_type;
91 irq_desc[M32R_IRQ_INT0].action = 0; 91 irq_desc[M32R_IRQ_INT0].action = 0;
92 irq_desc[M32R_IRQ_INT0].depth = 1; 92 irq_desc[M32R_IRQ_INT0].depth = 1;
93 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */ 93 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; /* "H" level sense */
@@ -96,7 +96,7 @@ void __init init_IRQ(void)
96 96
97 /* MFT2 : system timer */ 97 /* MFT2 : system timer */
98 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; 98 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
99 irq_desc[M32R_IRQ_MFT2].handler = &m32104ut_irq_type; 99 irq_desc[M32R_IRQ_MFT2].chip = &m32104ut_irq_type;
100 irq_desc[M32R_IRQ_MFT2].action = 0; 100 irq_desc[M32R_IRQ_MFT2].action = 0;
101 irq_desc[M32R_IRQ_MFT2].depth = 1; 101 irq_desc[M32R_IRQ_MFT2].depth = 1;
102 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 102 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -105,7 +105,7 @@ void __init init_IRQ(void)
105#ifdef CONFIG_SERIAL_M32R_SIO 105#ifdef CONFIG_SERIAL_M32R_SIO
106 /* SIO0_R : uart receive data */ 106 /* SIO0_R : uart receive data */
107 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; 107 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
108 irq_desc[M32R_IRQ_SIO0_R].handler = &m32104ut_irq_type; 108 irq_desc[M32R_IRQ_SIO0_R].chip = &m32104ut_irq_type;
109 irq_desc[M32R_IRQ_SIO0_R].action = 0; 109 irq_desc[M32R_IRQ_SIO0_R].action = 0;
110 irq_desc[M32R_IRQ_SIO0_R].depth = 1; 110 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
111 icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN; 111 icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN;
@@ -113,7 +113,7 @@ void __init init_IRQ(void)
113 113
114 /* SIO0_S : uart send data */ 114 /* SIO0_S : uart send data */
115 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; 115 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
116 irq_desc[M32R_IRQ_SIO0_S].handler = &m32104ut_irq_type; 116 irq_desc[M32R_IRQ_SIO0_S].chip = &m32104ut_irq_type;
117 irq_desc[M32R_IRQ_SIO0_S].action = 0; 117 irq_desc[M32R_IRQ_SIO0_S].action = 0;
118 irq_desc[M32R_IRQ_SIO0_S].depth = 1; 118 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
119 icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN; 119 icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN;
diff --git a/arch/m32r/kernel/setup_m32700ut.c b/arch/m32r/kernel/setup_m32700ut.c
index fad1fc99bb2..b6ab00eff58 100644
--- a/arch/m32r/kernel/setup_m32700ut.c
+++ b/arch/m32r/kernel/setup_m32700ut.c
@@ -301,7 +301,7 @@ void __init init_IRQ(void)
301#if defined(CONFIG_SMC91X) 301#if defined(CONFIG_SMC91X)
302 /* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/ 302 /* INT#0: LAN controller on M32700UT-LAN (SMC91C111)*/
303 irq_desc[M32700UT_LAN_IRQ_LAN].status = IRQ_DISABLED; 303 irq_desc[M32700UT_LAN_IRQ_LAN].status = IRQ_DISABLED;
304 irq_desc[M32700UT_LAN_IRQ_LAN].handler = &m32700ut_lanpld_irq_type; 304 irq_desc[M32700UT_LAN_IRQ_LAN].chip = &m32700ut_lanpld_irq_type;
305 irq_desc[M32700UT_LAN_IRQ_LAN].action = 0; 305 irq_desc[M32700UT_LAN_IRQ_LAN].action = 0;
306 irq_desc[M32700UT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */ 306 irq_desc[M32700UT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */
307 lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */ 307 lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */
@@ -310,7 +310,7 @@ void __init init_IRQ(void)
310 310
311 /* MFT2 : system timer */ 311 /* MFT2 : system timer */
312 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; 312 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
313 irq_desc[M32R_IRQ_MFT2].handler = &m32700ut_irq_type; 313 irq_desc[M32R_IRQ_MFT2].chip = &m32700ut_irq_type;
314 irq_desc[M32R_IRQ_MFT2].action = 0; 314 irq_desc[M32R_IRQ_MFT2].action = 0;
315 irq_desc[M32R_IRQ_MFT2].depth = 1; 315 irq_desc[M32R_IRQ_MFT2].depth = 1;
316 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 316 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -318,7 +318,7 @@ void __init init_IRQ(void)
318 318
319 /* SIO0 : receive */ 319 /* SIO0 : receive */
320 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; 320 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
321 irq_desc[M32R_IRQ_SIO0_R].handler = &m32700ut_irq_type; 321 irq_desc[M32R_IRQ_SIO0_R].chip = &m32700ut_irq_type;
322 irq_desc[M32R_IRQ_SIO0_R].action = 0; 322 irq_desc[M32R_IRQ_SIO0_R].action = 0;
323 irq_desc[M32R_IRQ_SIO0_R].depth = 1; 323 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
324 icu_data[M32R_IRQ_SIO0_R].icucr = 0; 324 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -326,7 +326,7 @@ void __init init_IRQ(void)
326 326
327 /* SIO0 : send */ 327 /* SIO0 : send */
328 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; 328 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
329 irq_desc[M32R_IRQ_SIO0_S].handler = &m32700ut_irq_type; 329 irq_desc[M32R_IRQ_SIO0_S].chip = &m32700ut_irq_type;
330 irq_desc[M32R_IRQ_SIO0_S].action = 0; 330 irq_desc[M32R_IRQ_SIO0_S].action = 0;
331 irq_desc[M32R_IRQ_SIO0_S].depth = 1; 331 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
332 icu_data[M32R_IRQ_SIO0_S].icucr = 0; 332 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -334,7 +334,7 @@ void __init init_IRQ(void)
334 334
335 /* SIO1 : receive */ 335 /* SIO1 : receive */
336 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; 336 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
337 irq_desc[M32R_IRQ_SIO1_R].handler = &m32700ut_irq_type; 337 irq_desc[M32R_IRQ_SIO1_R].chip = &m32700ut_irq_type;
338 irq_desc[M32R_IRQ_SIO1_R].action = 0; 338 irq_desc[M32R_IRQ_SIO1_R].action = 0;
339 irq_desc[M32R_IRQ_SIO1_R].depth = 1; 339 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
340 icu_data[M32R_IRQ_SIO1_R].icucr = 0; 340 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -342,7 +342,7 @@ void __init init_IRQ(void)
342 342
343 /* SIO1 : send */ 343 /* SIO1 : send */
344 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; 344 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
345 irq_desc[M32R_IRQ_SIO1_S].handler = &m32700ut_irq_type; 345 irq_desc[M32R_IRQ_SIO1_S].chip = &m32700ut_irq_type;
346 irq_desc[M32R_IRQ_SIO1_S].action = 0; 346 irq_desc[M32R_IRQ_SIO1_S].action = 0;
347 irq_desc[M32R_IRQ_SIO1_S].depth = 1; 347 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
348 icu_data[M32R_IRQ_SIO1_S].icucr = 0; 348 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -350,7 +350,7 @@ void __init init_IRQ(void)
350 350
351 /* DMA1 : */ 351 /* DMA1 : */
352 irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED; 352 irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
353 irq_desc[M32R_IRQ_DMA1].handler = &m32700ut_irq_type; 353 irq_desc[M32R_IRQ_DMA1].chip = &m32700ut_irq_type;
354 irq_desc[M32R_IRQ_DMA1].action = 0; 354 irq_desc[M32R_IRQ_DMA1].action = 0;
355 irq_desc[M32R_IRQ_DMA1].depth = 1; 355 irq_desc[M32R_IRQ_DMA1].depth = 1;
356 icu_data[M32R_IRQ_DMA1].icucr = 0; 356 icu_data[M32R_IRQ_DMA1].icucr = 0;
@@ -359,7 +359,7 @@ void __init init_IRQ(void)
359#ifdef CONFIG_SERIAL_M32R_PLDSIO 359#ifdef CONFIG_SERIAL_M32R_PLDSIO
360 /* INT#1: SIO0 Receive on PLD */ 360 /* INT#1: SIO0 Receive on PLD */
361 irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED; 361 irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED;
362 irq_desc[PLD_IRQ_SIO0_RCV].handler = &m32700ut_pld_irq_type; 362 irq_desc[PLD_IRQ_SIO0_RCV].chip = &m32700ut_pld_irq_type;
363 irq_desc[PLD_IRQ_SIO0_RCV].action = 0; 363 irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
364 irq_desc[PLD_IRQ_SIO0_RCV].depth = 1; /* disable nested irq */ 364 irq_desc[PLD_IRQ_SIO0_RCV].depth = 1; /* disable nested irq */
365 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; 365 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
@@ -367,7 +367,7 @@ void __init init_IRQ(void)
367 367
368 /* INT#1: SIO0 Send on PLD */ 368 /* INT#1: SIO0 Send on PLD */
369 irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED; 369 irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
370 irq_desc[PLD_IRQ_SIO0_SND].handler = &m32700ut_pld_irq_type; 370 irq_desc[PLD_IRQ_SIO0_SND].chip = &m32700ut_pld_irq_type;
371 irq_desc[PLD_IRQ_SIO0_SND].action = 0; 371 irq_desc[PLD_IRQ_SIO0_SND].action = 0;
372 irq_desc[PLD_IRQ_SIO0_SND].depth = 1; /* disable nested irq */ 372 irq_desc[PLD_IRQ_SIO0_SND].depth = 1; /* disable nested irq */
373 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; 373 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
@@ -376,7 +376,7 @@ void __init init_IRQ(void)
376 376
377 /* INT#1: CFC IREQ on PLD */ 377 /* INT#1: CFC IREQ on PLD */
378 irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; 378 irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
379 irq_desc[PLD_IRQ_CFIREQ].handler = &m32700ut_pld_irq_type; 379 irq_desc[PLD_IRQ_CFIREQ].chip = &m32700ut_pld_irq_type;
380 irq_desc[PLD_IRQ_CFIREQ].action = 0; 380 irq_desc[PLD_IRQ_CFIREQ].action = 0;
381 irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ 381 irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
382 pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */ 382 pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */
@@ -384,7 +384,7 @@ void __init init_IRQ(void)
384 384
385 /* INT#1: CFC Insert on PLD */ 385 /* INT#1: CFC Insert on PLD */
386 irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; 386 irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
387 irq_desc[PLD_IRQ_CFC_INSERT].handler = &m32700ut_pld_irq_type; 387 irq_desc[PLD_IRQ_CFC_INSERT].chip = &m32700ut_pld_irq_type;
388 irq_desc[PLD_IRQ_CFC_INSERT].action = 0; 388 irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
389 irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ 389 irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
390 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */ 390 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */
@@ -392,7 +392,7 @@ void __init init_IRQ(void)
392 392
393 /* INT#1: CFC Eject on PLD */ 393 /* INT#1: CFC Eject on PLD */
394 irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED; 394 irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
395 irq_desc[PLD_IRQ_CFC_EJECT].handler = &m32700ut_pld_irq_type; 395 irq_desc[PLD_IRQ_CFC_EJECT].chip = &m32700ut_pld_irq_type;
396 irq_desc[PLD_IRQ_CFC_EJECT].action = 0; 396 irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
397 irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */ 397 irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
398 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */ 398 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */
@@ -416,7 +416,7 @@ void __init init_IRQ(void)
416 outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */ 416 outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */
417 417
418 irq_desc[M32700UT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED; 418 irq_desc[M32700UT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
419 irq_desc[M32700UT_LCD_IRQ_USB_INT1].handler = &m32700ut_lcdpld_irq_type; 419 irq_desc[M32700UT_LCD_IRQ_USB_INT1].chip = &m32700ut_lcdpld_irq_type;
420 irq_desc[M32700UT_LCD_IRQ_USB_INT1].action = 0; 420 irq_desc[M32700UT_LCD_IRQ_USB_INT1].action = 0;
421 irq_desc[M32700UT_LCD_IRQ_USB_INT1].depth = 1; 421 irq_desc[M32700UT_LCD_IRQ_USB_INT1].depth = 1;
422 lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */ 422 lcdpld_icu_data[irq2lcdpldirq(M32700UT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */
@@ -434,7 +434,7 @@ void __init init_IRQ(void)
434 * INT3# is used for AR 434 * INT3# is used for AR
435 */ 435 */
436 irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED; 436 irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
437 irq_desc[M32R_IRQ_INT3].handler = &m32700ut_irq_type; 437 irq_desc[M32R_IRQ_INT3].chip = &m32700ut_irq_type;
438 irq_desc[M32R_IRQ_INT3].action = 0; 438 irq_desc[M32R_IRQ_INT3].action = 0;
439 irq_desc[M32R_IRQ_INT3].depth = 1; 439 irq_desc[M32R_IRQ_INT3].depth = 1;
440 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 440 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
diff --git a/arch/m32r/kernel/setup_mappi.c b/arch/m32r/kernel/setup_mappi.c
index 00f253209cb..c268044185f 100644
--- a/arch/m32r/kernel/setup_mappi.c
+++ b/arch/m32r/kernel/setup_mappi.c
@@ -86,7 +86,7 @@ void __init init_IRQ(void)
86#ifdef CONFIG_NE2000 86#ifdef CONFIG_NE2000
87 /* INT0 : LAN controller (RTL8019AS) */ 87 /* INT0 : LAN controller (RTL8019AS) */
88 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; 88 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
89 irq_desc[M32R_IRQ_INT0].handler = &mappi_irq_type; 89 irq_desc[M32R_IRQ_INT0].chip = &mappi_irq_type;
90 irq_desc[M32R_IRQ_INT0].action = 0; 90 irq_desc[M32R_IRQ_INT0].action = 0;
91 irq_desc[M32R_IRQ_INT0].depth = 1; 91 irq_desc[M32R_IRQ_INT0].depth = 1;
92 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 92 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -95,7 +95,7 @@ void __init init_IRQ(void)
95 95
96 /* MFT2 : system timer */ 96 /* MFT2 : system timer */
97 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; 97 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
98 irq_desc[M32R_IRQ_MFT2].handler = &mappi_irq_type; 98 irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
99 irq_desc[M32R_IRQ_MFT2].action = 0; 99 irq_desc[M32R_IRQ_MFT2].action = 0;
100 irq_desc[M32R_IRQ_MFT2].depth = 1; 100 irq_desc[M32R_IRQ_MFT2].depth = 1;
101 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 101 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -104,7 +104,7 @@ void __init init_IRQ(void)
104#ifdef CONFIG_SERIAL_M32R_SIO 104#ifdef CONFIG_SERIAL_M32R_SIO
105 /* SIO0_R : uart receive data */ 105 /* SIO0_R : uart receive data */
106 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; 106 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
107 irq_desc[M32R_IRQ_SIO0_R].handler = &mappi_irq_type; 107 irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
108 irq_desc[M32R_IRQ_SIO0_R].action = 0; 108 irq_desc[M32R_IRQ_SIO0_R].action = 0;
109 irq_desc[M32R_IRQ_SIO0_R].depth = 1; 109 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
110 icu_data[M32R_IRQ_SIO0_R].icucr = 0; 110 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -112,7 +112,7 @@ void __init init_IRQ(void)
112 112
113 /* SIO0_S : uart send data */ 113 /* SIO0_S : uart send data */
114 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; 114 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
115 irq_desc[M32R_IRQ_SIO0_S].handler = &mappi_irq_type; 115 irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
116 irq_desc[M32R_IRQ_SIO0_S].action = 0; 116 irq_desc[M32R_IRQ_SIO0_S].action = 0;
117 irq_desc[M32R_IRQ_SIO0_S].depth = 1; 117 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
118 icu_data[M32R_IRQ_SIO0_S].icucr = 0; 118 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -120,7 +120,7 @@ void __init init_IRQ(void)
120 120
121 /* SIO1_R : uart receive data */ 121 /* SIO1_R : uart receive data */
122 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; 122 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
123 irq_desc[M32R_IRQ_SIO1_R].handler = &mappi_irq_type; 123 irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
124 irq_desc[M32R_IRQ_SIO1_R].action = 0; 124 irq_desc[M32R_IRQ_SIO1_R].action = 0;
125 irq_desc[M32R_IRQ_SIO1_R].depth = 1; 125 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
126 icu_data[M32R_IRQ_SIO1_R].icucr = 0; 126 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -128,7 +128,7 @@ void __init init_IRQ(void)
128 128
129 /* SIO1_S : uart send data */ 129 /* SIO1_S : uart send data */
130 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; 130 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
131 irq_desc[M32R_IRQ_SIO1_S].handler = &mappi_irq_type; 131 irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
132 irq_desc[M32R_IRQ_SIO1_S].action = 0; 132 irq_desc[M32R_IRQ_SIO1_S].action = 0;
133 irq_desc[M32R_IRQ_SIO1_S].depth = 1; 133 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
134 icu_data[M32R_IRQ_SIO1_S].icucr = 0; 134 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -138,7 +138,7 @@ void __init init_IRQ(void)
138#if defined(CONFIG_M32R_PCC) 138#if defined(CONFIG_M32R_PCC)
139 /* INT1 : pccard0 interrupt */ 139 /* INT1 : pccard0 interrupt */
140 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; 140 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
141 irq_desc[M32R_IRQ_INT1].handler = &mappi_irq_type; 141 irq_desc[M32R_IRQ_INT1].chip = &mappi_irq_type;
142 irq_desc[M32R_IRQ_INT1].action = 0; 142 irq_desc[M32R_IRQ_INT1].action = 0;
143 irq_desc[M32R_IRQ_INT1].depth = 1; 143 irq_desc[M32R_IRQ_INT1].depth = 1;
144 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; 144 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
@@ -146,7 +146,7 @@ void __init init_IRQ(void)
146 146
147 /* INT2 : pccard1 interrupt */ 147 /* INT2 : pccard1 interrupt */
148 irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED; 148 irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED;
149 irq_desc[M32R_IRQ_INT2].handler = &mappi_irq_type; 149 irq_desc[M32R_IRQ_INT2].chip = &mappi_irq_type;
150 irq_desc[M32R_IRQ_INT2].action = 0; 150 irq_desc[M32R_IRQ_INT2].action = 0;
151 irq_desc[M32R_IRQ_INT2].depth = 1; 151 irq_desc[M32R_IRQ_INT2].depth = 1;
152 icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; 152 icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
diff --git a/arch/m32r/kernel/setup_mappi2.c b/arch/m32r/kernel/setup_mappi2.c
index eebc9d8b4e7..bd2327d5cca 100644
--- a/arch/m32r/kernel/setup_mappi2.c
+++ b/arch/m32r/kernel/setup_mappi2.c
@@ -87,7 +87,7 @@ void __init init_IRQ(void)
87#if defined(CONFIG_SMC91X) 87#if defined(CONFIG_SMC91X)
88 /* INT0 : LAN controller (SMC91111) */ 88 /* INT0 : LAN controller (SMC91111) */
89 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; 89 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
90 irq_desc[M32R_IRQ_INT0].handler = &mappi2_irq_type; 90 irq_desc[M32R_IRQ_INT0].chip = &mappi2_irq_type;
91 irq_desc[M32R_IRQ_INT0].action = 0; 91 irq_desc[M32R_IRQ_INT0].action = 0;
92 irq_desc[M32R_IRQ_INT0].depth = 1; 92 irq_desc[M32R_IRQ_INT0].depth = 1;
93 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 93 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -96,7 +96,7 @@ void __init init_IRQ(void)
96 96
97 /* MFT2 : system timer */ 97 /* MFT2 : system timer */
98 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; 98 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
99 irq_desc[M32R_IRQ_MFT2].handler = &mappi2_irq_type; 99 irq_desc[M32R_IRQ_MFT2].chip = &mappi2_irq_type;
100 irq_desc[M32R_IRQ_MFT2].action = 0; 100 irq_desc[M32R_IRQ_MFT2].action = 0;
101 irq_desc[M32R_IRQ_MFT2].depth = 1; 101 irq_desc[M32R_IRQ_MFT2].depth = 1;
102 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 102 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -105,7 +105,7 @@ void __init init_IRQ(void)
105#ifdef CONFIG_SERIAL_M32R_SIO 105#ifdef CONFIG_SERIAL_M32R_SIO
106 /* SIO0_R : uart receive data */ 106 /* SIO0_R : uart receive data */
107 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; 107 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
108 irq_desc[M32R_IRQ_SIO0_R].handler = &mappi2_irq_type; 108 irq_desc[M32R_IRQ_SIO0_R].chip = &mappi2_irq_type;
109 irq_desc[M32R_IRQ_SIO0_R].action = 0; 109 irq_desc[M32R_IRQ_SIO0_R].action = 0;
110 irq_desc[M32R_IRQ_SIO0_R].depth = 1; 110 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
111 icu_data[M32R_IRQ_SIO0_R].icucr = 0; 111 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -113,14 +113,14 @@ void __init init_IRQ(void)
113 113
114 /* SIO0_S : uart send data */ 114 /* SIO0_S : uart send data */
115 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; 115 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
116 irq_desc[M32R_IRQ_SIO0_S].handler = &mappi2_irq_type; 116 irq_desc[M32R_IRQ_SIO0_S].chip = &mappi2_irq_type;
117 irq_desc[M32R_IRQ_SIO0_S].action = 0; 117 irq_desc[M32R_IRQ_SIO0_S].action = 0;
118 irq_desc[M32R_IRQ_SIO0_S].depth = 1; 118 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
119 icu_data[M32R_IRQ_SIO0_S].icucr = 0; 119 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
120 disable_mappi2_irq(M32R_IRQ_SIO0_S); 120 disable_mappi2_irq(M32R_IRQ_SIO0_S);
121 /* SIO1_R : uart receive data */ 121 /* SIO1_R : uart receive data */
122 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; 122 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
123 irq_desc[M32R_IRQ_SIO1_R].handler = &mappi2_irq_type; 123 irq_desc[M32R_IRQ_SIO1_R].chip = &mappi2_irq_type;
124 irq_desc[M32R_IRQ_SIO1_R].action = 0; 124 irq_desc[M32R_IRQ_SIO1_R].action = 0;
125 irq_desc[M32R_IRQ_SIO1_R].depth = 1; 125 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
126 icu_data[M32R_IRQ_SIO1_R].icucr = 0; 126 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -128,7 +128,7 @@ void __init init_IRQ(void)
128 128
129 /* SIO1_S : uart send data */ 129 /* SIO1_S : uart send data */
130 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; 130 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
131 irq_desc[M32R_IRQ_SIO1_S].handler = &mappi2_irq_type; 131 irq_desc[M32R_IRQ_SIO1_S].chip = &mappi2_irq_type;
132 irq_desc[M32R_IRQ_SIO1_S].action = 0; 132 irq_desc[M32R_IRQ_SIO1_S].action = 0;
133 irq_desc[M32R_IRQ_SIO1_S].depth = 1; 133 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
134 icu_data[M32R_IRQ_SIO1_S].icucr = 0; 134 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -138,7 +138,7 @@ void __init init_IRQ(void)
138#if defined(CONFIG_USB) 138#if defined(CONFIG_USB)
139 /* INT1 : USB Host controller interrupt */ 139 /* INT1 : USB Host controller interrupt */
140 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; 140 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
141 irq_desc[M32R_IRQ_INT1].handler = &mappi2_irq_type; 141 irq_desc[M32R_IRQ_INT1].chip = &mappi2_irq_type;
142 irq_desc[M32R_IRQ_INT1].action = 0; 142 irq_desc[M32R_IRQ_INT1].action = 0;
143 irq_desc[M32R_IRQ_INT1].depth = 1; 143 irq_desc[M32R_IRQ_INT1].depth = 1;
144 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01; 144 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
@@ -147,7 +147,7 @@ void __init init_IRQ(void)
147 147
148 /* ICUCR40: CFC IREQ */ 148 /* ICUCR40: CFC IREQ */
149 irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; 149 irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
150 irq_desc[PLD_IRQ_CFIREQ].handler = &mappi2_irq_type; 150 irq_desc[PLD_IRQ_CFIREQ].chip = &mappi2_irq_type;
151 irq_desc[PLD_IRQ_CFIREQ].action = 0; 151 irq_desc[PLD_IRQ_CFIREQ].action = 0;
152 irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ 152 irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
153 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; 153 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
@@ -156,7 +156,7 @@ void __init init_IRQ(void)
156#if defined(CONFIG_M32R_CFC) 156#if defined(CONFIG_M32R_CFC)
157 /* ICUCR41: CFC Insert */ 157 /* ICUCR41: CFC Insert */
158 irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; 158 irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
159 irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi2_irq_type; 159 irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi2_irq_type;
160 irq_desc[PLD_IRQ_CFC_INSERT].action = 0; 160 irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
161 irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ 161 irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
162 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00; 162 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
@@ -164,7 +164,7 @@ void __init init_IRQ(void)
164 164
165 /* ICUCR42: CFC Eject */ 165 /* ICUCR42: CFC Eject */
166 irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED; 166 irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
167 irq_desc[PLD_IRQ_CFC_EJECT].handler = &mappi2_irq_type; 167 irq_desc[PLD_IRQ_CFC_EJECT].chip = &mappi2_irq_type;
168 irq_desc[PLD_IRQ_CFC_EJECT].action = 0; 168 irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
169 irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */ 169 irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
170 icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 170 icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
diff --git a/arch/m32r/kernel/setup_mappi3.c b/arch/m32r/kernel/setup_mappi3.c
index d2ff021e2d3..014b51d1750 100644
--- a/arch/m32r/kernel/setup_mappi3.c
+++ b/arch/m32r/kernel/setup_mappi3.c
@@ -87,7 +87,7 @@ void __init init_IRQ(void)
87#if defined(CONFIG_SMC91X) 87#if defined(CONFIG_SMC91X)
88 /* INT0 : LAN controller (SMC91111) */ 88 /* INT0 : LAN controller (SMC91111) */
89 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED; 89 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
90 irq_desc[M32R_IRQ_INT0].handler = &mappi3_irq_type; 90 irq_desc[M32R_IRQ_INT0].chip = &mappi3_irq_type;
91 irq_desc[M32R_IRQ_INT0].action = 0; 91 irq_desc[M32R_IRQ_INT0].action = 0;
92 irq_desc[M32R_IRQ_INT0].depth = 1; 92 irq_desc[M32R_IRQ_INT0].depth = 1;
93 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 93 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -96,7 +96,7 @@ void __init init_IRQ(void)
96 96
97 /* MFT2 : system timer */ 97 /* MFT2 : system timer */
98 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; 98 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
99 irq_desc[M32R_IRQ_MFT2].handler = &mappi3_irq_type; 99 irq_desc[M32R_IRQ_MFT2].chip = &mappi3_irq_type;
100 irq_desc[M32R_IRQ_MFT2].action = 0; 100 irq_desc[M32R_IRQ_MFT2].action = 0;
101 irq_desc[M32R_IRQ_MFT2].depth = 1; 101 irq_desc[M32R_IRQ_MFT2].depth = 1;
102 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 102 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -105,7 +105,7 @@ void __init init_IRQ(void)
105#ifdef CONFIG_SERIAL_M32R_SIO 105#ifdef CONFIG_SERIAL_M32R_SIO
106 /* SIO0_R : uart receive data */ 106 /* SIO0_R : uart receive data */
107 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; 107 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
108 irq_desc[M32R_IRQ_SIO0_R].handler = &mappi3_irq_type; 108 irq_desc[M32R_IRQ_SIO0_R].chip = &mappi3_irq_type;
109 irq_desc[M32R_IRQ_SIO0_R].action = 0; 109 irq_desc[M32R_IRQ_SIO0_R].action = 0;
110 irq_desc[M32R_IRQ_SIO0_R].depth = 1; 110 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
111 icu_data[M32R_IRQ_SIO0_R].icucr = 0; 111 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -113,14 +113,14 @@ void __init init_IRQ(void)
113 113
114 /* SIO0_S : uart send data */ 114 /* SIO0_S : uart send data */
115 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; 115 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
116 irq_desc[M32R_IRQ_SIO0_S].handler = &mappi3_irq_type; 116 irq_desc[M32R_IRQ_SIO0_S].chip = &mappi3_irq_type;
117 irq_desc[M32R_IRQ_SIO0_S].action = 0; 117 irq_desc[M32R_IRQ_SIO0_S].action = 0;
118 irq_desc[M32R_IRQ_SIO0_S].depth = 1; 118 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
119 icu_data[M32R_IRQ_SIO0_S].icucr = 0; 119 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
120 disable_mappi3_irq(M32R_IRQ_SIO0_S); 120 disable_mappi3_irq(M32R_IRQ_SIO0_S);
121 /* SIO1_R : uart receive data */ 121 /* SIO1_R : uart receive data */
122 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; 122 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
123 irq_desc[M32R_IRQ_SIO1_R].handler = &mappi3_irq_type; 123 irq_desc[M32R_IRQ_SIO1_R].chip = &mappi3_irq_type;
124 irq_desc[M32R_IRQ_SIO1_R].action = 0; 124 irq_desc[M32R_IRQ_SIO1_R].action = 0;
125 irq_desc[M32R_IRQ_SIO1_R].depth = 1; 125 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
126 icu_data[M32R_IRQ_SIO1_R].icucr = 0; 126 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -128,7 +128,7 @@ void __init init_IRQ(void)
128 128
129 /* SIO1_S : uart send data */ 129 /* SIO1_S : uart send data */
130 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; 130 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
131 irq_desc[M32R_IRQ_SIO1_S].handler = &mappi3_irq_type; 131 irq_desc[M32R_IRQ_SIO1_S].chip = &mappi3_irq_type;
132 irq_desc[M32R_IRQ_SIO1_S].action = 0; 132 irq_desc[M32R_IRQ_SIO1_S].action = 0;
133 irq_desc[M32R_IRQ_SIO1_S].depth = 1; 133 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
134 icu_data[M32R_IRQ_SIO1_S].icucr = 0; 134 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -138,7 +138,7 @@ void __init init_IRQ(void)
138#if defined(CONFIG_USB) 138#if defined(CONFIG_USB)
139 /* INT1 : USB Host controller interrupt */ 139 /* INT1 : USB Host controller interrupt */
140 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED; 140 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
141 irq_desc[M32R_IRQ_INT1].handler = &mappi3_irq_type; 141 irq_desc[M32R_IRQ_INT1].chip = &mappi3_irq_type;
142 irq_desc[M32R_IRQ_INT1].action = 0; 142 irq_desc[M32R_IRQ_INT1].action = 0;
143 irq_desc[M32R_IRQ_INT1].depth = 1; 143 irq_desc[M32R_IRQ_INT1].depth = 1;
144 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01; 144 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
@@ -147,7 +147,7 @@ void __init init_IRQ(void)
147 147
148 /* CFC IREQ */ 148 /* CFC IREQ */
149 irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; 149 irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
150 irq_desc[PLD_IRQ_CFIREQ].handler = &mappi3_irq_type; 150 irq_desc[PLD_IRQ_CFIREQ].chip = &mappi3_irq_type;
151 irq_desc[PLD_IRQ_CFIREQ].action = 0; 151 irq_desc[PLD_IRQ_CFIREQ].action = 0;
152 irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ 152 irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
153 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; 153 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
@@ -156,7 +156,7 @@ void __init init_IRQ(void)
156#if defined(CONFIG_M32R_CFC) 156#if defined(CONFIG_M32R_CFC)
157 /* ICUCR41: CFC Insert & eject */ 157 /* ICUCR41: CFC Insert & eject */
158 irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; 158 irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
159 irq_desc[PLD_IRQ_CFC_INSERT].handler = &mappi3_irq_type; 159 irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi3_irq_type;
160 irq_desc[PLD_IRQ_CFC_INSERT].action = 0; 160 irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
161 irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ 161 irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
162 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00; 162 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
@@ -166,7 +166,7 @@ void __init init_IRQ(void)
166 166
167 /* IDE IREQ */ 167 /* IDE IREQ */
168 irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED; 168 irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED;
169 irq_desc[PLD_IRQ_IDEIREQ].handler = &mappi3_irq_type; 169 irq_desc[PLD_IRQ_IDEIREQ].chip = &mappi3_irq_type;
170 irq_desc[PLD_IRQ_IDEIREQ].action = 0; 170 irq_desc[PLD_IRQ_IDEIREQ].action = 0;
171 irq_desc[PLD_IRQ_IDEIREQ].depth = 1; /* disable nested irq */ 171 irq_desc[PLD_IRQ_IDEIREQ].depth = 1; /* disable nested irq */
172 icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 172 icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
diff --git a/arch/m32r/kernel/setup_oaks32r.c b/arch/m32r/kernel/setup_oaks32r.c
index 0e9e63538c0..ea64831aef7 100644
--- a/arch/m32r/kernel/setup_oaks32r.c
+++ b/arch/m32r/kernel/setup_oaks32r.c
@@ -85,7 +85,7 @@ void __init init_IRQ(void)
85#ifdef CONFIG_NE2000 85#ifdef CONFIG_NE2000
86 /* INT3 : LAN controller (RTL8019AS) */ 86 /* INT3 : LAN controller (RTL8019AS) */
87 irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED; 87 irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
88 irq_desc[M32R_IRQ_INT3].handler = &oaks32r_irq_type; 88 irq_desc[M32R_IRQ_INT3].chip = &oaks32r_irq_type;
89 irq_desc[M32R_IRQ_INT3].action = 0; 89 irq_desc[M32R_IRQ_INT3].action = 0;
90 irq_desc[M32R_IRQ_INT3].depth = 1; 90 irq_desc[M32R_IRQ_INT3].depth = 1;
91 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 91 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
@@ -94,7 +94,7 @@ void __init init_IRQ(void)
94 94
95 /* MFT2 : system timer */ 95 /* MFT2 : system timer */
96 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; 96 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
97 irq_desc[M32R_IRQ_MFT2].handler = &oaks32r_irq_type; 97 irq_desc[M32R_IRQ_MFT2].chip = &oaks32r_irq_type;
98 irq_desc[M32R_IRQ_MFT2].action = 0; 98 irq_desc[M32R_IRQ_MFT2].action = 0;
99 irq_desc[M32R_IRQ_MFT2].depth = 1; 99 irq_desc[M32R_IRQ_MFT2].depth = 1;
100 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 100 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -103,7 +103,7 @@ void __init init_IRQ(void)
103#ifdef CONFIG_SERIAL_M32R_SIO 103#ifdef CONFIG_SERIAL_M32R_SIO
104 /* SIO0_R : uart receive data */ 104 /* SIO0_R : uart receive data */
105 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; 105 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
106 irq_desc[M32R_IRQ_SIO0_R].handler = &oaks32r_irq_type; 106 irq_desc[M32R_IRQ_SIO0_R].chip = &oaks32r_irq_type;
107 irq_desc[M32R_IRQ_SIO0_R].action = 0; 107 irq_desc[M32R_IRQ_SIO0_R].action = 0;
108 irq_desc[M32R_IRQ_SIO0_R].depth = 1; 108 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
109 icu_data[M32R_IRQ_SIO0_R].icucr = 0; 109 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -111,7 +111,7 @@ void __init init_IRQ(void)
111 111
112 /* SIO0_S : uart send data */ 112 /* SIO0_S : uart send data */
113 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; 113 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
114 irq_desc[M32R_IRQ_SIO0_S].handler = &oaks32r_irq_type; 114 irq_desc[M32R_IRQ_SIO0_S].chip = &oaks32r_irq_type;
115 irq_desc[M32R_IRQ_SIO0_S].action = 0; 115 irq_desc[M32R_IRQ_SIO0_S].action = 0;
116 irq_desc[M32R_IRQ_SIO0_S].depth = 1; 116 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
117 icu_data[M32R_IRQ_SIO0_S].icucr = 0; 117 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -119,7 +119,7 @@ void __init init_IRQ(void)
119 119
120 /* SIO1_R : uart receive data */ 120 /* SIO1_R : uart receive data */
121 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; 121 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
122 irq_desc[M32R_IRQ_SIO1_R].handler = &oaks32r_irq_type; 122 irq_desc[M32R_IRQ_SIO1_R].chip = &oaks32r_irq_type;
123 irq_desc[M32R_IRQ_SIO1_R].action = 0; 123 irq_desc[M32R_IRQ_SIO1_R].action = 0;
124 irq_desc[M32R_IRQ_SIO1_R].depth = 1; 124 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
125 icu_data[M32R_IRQ_SIO1_R].icucr = 0; 125 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -127,7 +127,7 @@ void __init init_IRQ(void)
127 127
128 /* SIO1_S : uart send data */ 128 /* SIO1_S : uart send data */
129 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; 129 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
130 irq_desc[M32R_IRQ_SIO1_S].handler = &oaks32r_irq_type; 130 irq_desc[M32R_IRQ_SIO1_S].chip = &oaks32r_irq_type;
131 irq_desc[M32R_IRQ_SIO1_S].action = 0; 131 irq_desc[M32R_IRQ_SIO1_S].action = 0;
132 irq_desc[M32R_IRQ_SIO1_S].depth = 1; 132 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
133 icu_data[M32R_IRQ_SIO1_S].icucr = 0; 133 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
diff --git a/arch/m32r/kernel/setup_opsput.c b/arch/m32r/kernel/setup_opsput.c
index 548e8fc7949..55e8972d455 100644
--- a/arch/m32r/kernel/setup_opsput.c
+++ b/arch/m32r/kernel/setup_opsput.c
@@ -302,7 +302,7 @@ void __init init_IRQ(void)
302#if defined(CONFIG_SMC91X) 302#if defined(CONFIG_SMC91X)
303 /* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/ 303 /* INT#0: LAN controller on OPSPUT-LAN (SMC91C111)*/
304 irq_desc[OPSPUT_LAN_IRQ_LAN].status = IRQ_DISABLED; 304 irq_desc[OPSPUT_LAN_IRQ_LAN].status = IRQ_DISABLED;
305 irq_desc[OPSPUT_LAN_IRQ_LAN].handler = &opsput_lanpld_irq_type; 305 irq_desc[OPSPUT_LAN_IRQ_LAN].chip = &opsput_lanpld_irq_type;
306 irq_desc[OPSPUT_LAN_IRQ_LAN].action = 0; 306 irq_desc[OPSPUT_LAN_IRQ_LAN].action = 0;
307 irq_desc[OPSPUT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */ 307 irq_desc[OPSPUT_LAN_IRQ_LAN].depth = 1; /* disable nested irq */
308 lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */ 308 lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H" edge sense */
@@ -311,7 +311,7 @@ void __init init_IRQ(void)
311 311
312 /* MFT2 : system timer */ 312 /* MFT2 : system timer */
313 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; 313 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
314 irq_desc[M32R_IRQ_MFT2].handler = &opsput_irq_type; 314 irq_desc[M32R_IRQ_MFT2].chip = &opsput_irq_type;
315 irq_desc[M32R_IRQ_MFT2].action = 0; 315 irq_desc[M32R_IRQ_MFT2].action = 0;
316 irq_desc[M32R_IRQ_MFT2].depth = 1; 316 irq_desc[M32R_IRQ_MFT2].depth = 1;
317 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 317 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -319,7 +319,7 @@ void __init init_IRQ(void)
319 319
320 /* SIO0 : receive */ 320 /* SIO0 : receive */
321 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; 321 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
322 irq_desc[M32R_IRQ_SIO0_R].handler = &opsput_irq_type; 322 irq_desc[M32R_IRQ_SIO0_R].chip = &opsput_irq_type;
323 irq_desc[M32R_IRQ_SIO0_R].action = 0; 323 irq_desc[M32R_IRQ_SIO0_R].action = 0;
324 irq_desc[M32R_IRQ_SIO0_R].depth = 1; 324 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
325 icu_data[M32R_IRQ_SIO0_R].icucr = 0; 325 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -327,7 +327,7 @@ void __init init_IRQ(void)
327 327
328 /* SIO0 : send */ 328 /* SIO0 : send */
329 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; 329 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
330 irq_desc[M32R_IRQ_SIO0_S].handler = &opsput_irq_type; 330 irq_desc[M32R_IRQ_SIO0_S].chip = &opsput_irq_type;
331 irq_desc[M32R_IRQ_SIO0_S].action = 0; 331 irq_desc[M32R_IRQ_SIO0_S].action = 0;
332 irq_desc[M32R_IRQ_SIO0_S].depth = 1; 332 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
333 icu_data[M32R_IRQ_SIO0_S].icucr = 0; 333 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -335,7 +335,7 @@ void __init init_IRQ(void)
335 335
336 /* SIO1 : receive */ 336 /* SIO1 : receive */
337 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; 337 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
338 irq_desc[M32R_IRQ_SIO1_R].handler = &opsput_irq_type; 338 irq_desc[M32R_IRQ_SIO1_R].chip = &opsput_irq_type;
339 irq_desc[M32R_IRQ_SIO1_R].action = 0; 339 irq_desc[M32R_IRQ_SIO1_R].action = 0;
340 irq_desc[M32R_IRQ_SIO1_R].depth = 1; 340 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
341 icu_data[M32R_IRQ_SIO1_R].icucr = 0; 341 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -343,7 +343,7 @@ void __init init_IRQ(void)
343 343
344 /* SIO1 : send */ 344 /* SIO1 : send */
345 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; 345 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
346 irq_desc[M32R_IRQ_SIO1_S].handler = &opsput_irq_type; 346 irq_desc[M32R_IRQ_SIO1_S].chip = &opsput_irq_type;
347 irq_desc[M32R_IRQ_SIO1_S].action = 0; 347 irq_desc[M32R_IRQ_SIO1_S].action = 0;
348 irq_desc[M32R_IRQ_SIO1_S].depth = 1; 348 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
349 icu_data[M32R_IRQ_SIO1_S].icucr = 0; 349 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -351,7 +351,7 @@ void __init init_IRQ(void)
351 351
352 /* DMA1 : */ 352 /* DMA1 : */
353 irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED; 353 irq_desc[M32R_IRQ_DMA1].status = IRQ_DISABLED;
354 irq_desc[M32R_IRQ_DMA1].handler = &opsput_irq_type; 354 irq_desc[M32R_IRQ_DMA1].chip = &opsput_irq_type;
355 irq_desc[M32R_IRQ_DMA1].action = 0; 355 irq_desc[M32R_IRQ_DMA1].action = 0;
356 irq_desc[M32R_IRQ_DMA1].depth = 1; 356 irq_desc[M32R_IRQ_DMA1].depth = 1;
357 icu_data[M32R_IRQ_DMA1].icucr = 0; 357 icu_data[M32R_IRQ_DMA1].icucr = 0;
@@ -360,7 +360,7 @@ void __init init_IRQ(void)
360#ifdef CONFIG_SERIAL_M32R_PLDSIO 360#ifdef CONFIG_SERIAL_M32R_PLDSIO
361 /* INT#1: SIO0 Receive on PLD */ 361 /* INT#1: SIO0 Receive on PLD */
362 irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED; 362 irq_desc[PLD_IRQ_SIO0_RCV].status = IRQ_DISABLED;
363 irq_desc[PLD_IRQ_SIO0_RCV].handler = &opsput_pld_irq_type; 363 irq_desc[PLD_IRQ_SIO0_RCV].chip = &opsput_pld_irq_type;
364 irq_desc[PLD_IRQ_SIO0_RCV].action = 0; 364 irq_desc[PLD_IRQ_SIO0_RCV].action = 0;
365 irq_desc[PLD_IRQ_SIO0_RCV].depth = 1; /* disable nested irq */ 365 irq_desc[PLD_IRQ_SIO0_RCV].depth = 1; /* disable nested irq */
366 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; 366 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_RCV)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
@@ -368,7 +368,7 @@ void __init init_IRQ(void)
368 368
369 /* INT#1: SIO0 Send on PLD */ 369 /* INT#1: SIO0 Send on PLD */
370 irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED; 370 irq_desc[PLD_IRQ_SIO0_SND].status = IRQ_DISABLED;
371 irq_desc[PLD_IRQ_SIO0_SND].handler = &opsput_pld_irq_type; 371 irq_desc[PLD_IRQ_SIO0_SND].chip = &opsput_pld_irq_type;
372 irq_desc[PLD_IRQ_SIO0_SND].action = 0; 372 irq_desc[PLD_IRQ_SIO0_SND].action = 0;
373 irq_desc[PLD_IRQ_SIO0_SND].depth = 1; /* disable nested irq */ 373 irq_desc[PLD_IRQ_SIO0_SND].depth = 1; /* disable nested irq */
374 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03; 374 pld_icu_data[irq2pldirq(PLD_IRQ_SIO0_SND)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD03;
@@ -378,7 +378,7 @@ void __init init_IRQ(void)
378#if defined(CONFIG_M32R_CFC) 378#if defined(CONFIG_M32R_CFC)
379 /* INT#1: CFC IREQ on PLD */ 379 /* INT#1: CFC IREQ on PLD */
380 irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED; 380 irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
381 irq_desc[PLD_IRQ_CFIREQ].handler = &opsput_pld_irq_type; 381 irq_desc[PLD_IRQ_CFIREQ].chip = &opsput_pld_irq_type;
382 irq_desc[PLD_IRQ_CFIREQ].action = 0; 382 irq_desc[PLD_IRQ_CFIREQ].action = 0;
383 irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */ 383 irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
384 pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */ 384 pld_icu_data[irq2pldirq(PLD_IRQ_CFIREQ)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* 'L' level sense */
@@ -386,7 +386,7 @@ void __init init_IRQ(void)
386 386
387 /* INT#1: CFC Insert on PLD */ 387 /* INT#1: CFC Insert on PLD */
388 irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED; 388 irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
389 irq_desc[PLD_IRQ_CFC_INSERT].handler = &opsput_pld_irq_type; 389 irq_desc[PLD_IRQ_CFC_INSERT].chip = &opsput_pld_irq_type;
390 irq_desc[PLD_IRQ_CFC_INSERT].action = 0; 390 irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
391 irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */ 391 irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
392 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */ 392 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_INSERT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD00; /* 'L' edge sense */
@@ -394,7 +394,7 @@ void __init init_IRQ(void)
394 394
395 /* INT#1: CFC Eject on PLD */ 395 /* INT#1: CFC Eject on PLD */
396 irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED; 396 irq_desc[PLD_IRQ_CFC_EJECT].status = IRQ_DISABLED;
397 irq_desc[PLD_IRQ_CFC_EJECT].handler = &opsput_pld_irq_type; 397 irq_desc[PLD_IRQ_CFC_EJECT].chip = &opsput_pld_irq_type;
398 irq_desc[PLD_IRQ_CFC_EJECT].action = 0; 398 irq_desc[PLD_IRQ_CFC_EJECT].action = 0;
399 irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */ 399 irq_desc[PLD_IRQ_CFC_EJECT].depth = 1; /* disable nested irq */
400 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */ 400 pld_icu_data[irq2pldirq(PLD_IRQ_CFC_EJECT)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* 'H' edge sense */
@@ -420,7 +420,7 @@ void __init init_IRQ(void)
420 outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */ 420 outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */
421 421
422 irq_desc[OPSPUT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED; 422 irq_desc[OPSPUT_LCD_IRQ_USB_INT1].status = IRQ_DISABLED;
423 irq_desc[OPSPUT_LCD_IRQ_USB_INT1].handler = &opsput_lcdpld_irq_type; 423 irq_desc[OPSPUT_LCD_IRQ_USB_INT1].chip = &opsput_lcdpld_irq_type;
424 irq_desc[OPSPUT_LCD_IRQ_USB_INT1].action = 0; 424 irq_desc[OPSPUT_LCD_IRQ_USB_INT1].action = 0;
425 irq_desc[OPSPUT_LCD_IRQ_USB_INT1].depth = 1; 425 irq_desc[OPSPUT_LCD_IRQ_USB_INT1].depth = 1;
426 lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */ 426 lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */
@@ -438,7 +438,7 @@ void __init init_IRQ(void)
438 * INT3# is used for AR 438 * INT3# is used for AR
439 */ 439 */
440 irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED; 440 irq_desc[M32R_IRQ_INT3].status = IRQ_DISABLED;
441 irq_desc[M32R_IRQ_INT3].handler = &opsput_irq_type; 441 irq_desc[M32R_IRQ_INT3].chip = &opsput_irq_type;
442 irq_desc[M32R_IRQ_INT3].action = 0; 442 irq_desc[M32R_IRQ_INT3].action = 0;
443 irq_desc[M32R_IRQ_INT3].depth = 1; 443 irq_desc[M32R_IRQ_INT3].depth = 1;
444 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; 444 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
diff --git a/arch/m32r/kernel/setup_usrv.c b/arch/m32r/kernel/setup_usrv.c
index 64be659a23e..7fa12d8f66b 100644
--- a/arch/m32r/kernel/setup_usrv.c
+++ b/arch/m32r/kernel/setup_usrv.c
@@ -158,7 +158,7 @@ void __init init_IRQ(void)
158 158
159 /* MFT2 : system timer */ 159 /* MFT2 : system timer */
160 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED; 160 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
161 irq_desc[M32R_IRQ_MFT2].handler = &mappi_irq_type; 161 irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
162 irq_desc[M32R_IRQ_MFT2].action = 0; 162 irq_desc[M32R_IRQ_MFT2].action = 0;
163 irq_desc[M32R_IRQ_MFT2].depth = 1; 163 irq_desc[M32R_IRQ_MFT2].depth = 1;
164 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; 164 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
@@ -167,7 +167,7 @@ void __init init_IRQ(void)
167#if defined(CONFIG_SERIAL_M32R_SIO) 167#if defined(CONFIG_SERIAL_M32R_SIO)
168 /* SIO0_R : uart receive data */ 168 /* SIO0_R : uart receive data */
169 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED; 169 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
170 irq_desc[M32R_IRQ_SIO0_R].handler = &mappi_irq_type; 170 irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
171 irq_desc[M32R_IRQ_SIO0_R].action = 0; 171 irq_desc[M32R_IRQ_SIO0_R].action = 0;
172 irq_desc[M32R_IRQ_SIO0_R].depth = 1; 172 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
173 icu_data[M32R_IRQ_SIO0_R].icucr = 0; 173 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
@@ -175,7 +175,7 @@ void __init init_IRQ(void)
175 175
176 /* SIO0_S : uart send data */ 176 /* SIO0_S : uart send data */
177 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED; 177 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
178 irq_desc[M32R_IRQ_SIO0_S].handler = &mappi_irq_type; 178 irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
179 irq_desc[M32R_IRQ_SIO0_S].action = 0; 179 irq_desc[M32R_IRQ_SIO0_S].action = 0;
180 irq_desc[M32R_IRQ_SIO0_S].depth = 1; 180 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
181 icu_data[M32R_IRQ_SIO0_S].icucr = 0; 181 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
@@ -183,7 +183,7 @@ void __init init_IRQ(void)
183 183
184 /* SIO1_R : uart receive data */ 184 /* SIO1_R : uart receive data */
185 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED; 185 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
186 irq_desc[M32R_IRQ_SIO1_R].handler = &mappi_irq_type; 186 irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
187 irq_desc[M32R_IRQ_SIO1_R].action = 0; 187 irq_desc[M32R_IRQ_SIO1_R].action = 0;
188 irq_desc[M32R_IRQ_SIO1_R].depth = 1; 188 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
189 icu_data[M32R_IRQ_SIO1_R].icucr = 0; 189 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
@@ -191,7 +191,7 @@ void __init init_IRQ(void)
191 191
192 /* SIO1_S : uart send data */ 192 /* SIO1_S : uart send data */
193 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED; 193 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
194 irq_desc[M32R_IRQ_SIO1_S].handler = &mappi_irq_type; 194 irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
195 irq_desc[M32R_IRQ_SIO1_S].action = 0; 195 irq_desc[M32R_IRQ_SIO1_S].action = 0;
196 irq_desc[M32R_IRQ_SIO1_S].depth = 1; 196 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
197 icu_data[M32R_IRQ_SIO1_S].icucr = 0; 197 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
@@ -201,7 +201,7 @@ void __init init_IRQ(void)
201 /* INT#67-#71: CFC#0 IREQ on PLD */ 201 /* INT#67-#71: CFC#0 IREQ on PLD */
202 for (i = 0 ; i < CONFIG_CFC_NUM ; i++ ) { 202 for (i = 0 ; i < CONFIG_CFC_NUM ; i++ ) {
203 irq_desc[PLD_IRQ_CF0 + i].status = IRQ_DISABLED; 203 irq_desc[PLD_IRQ_CF0 + i].status = IRQ_DISABLED;
204 irq_desc[PLD_IRQ_CF0 + i].handler = &m32700ut_pld_irq_type; 204 irq_desc[PLD_IRQ_CF0 + i].chip = &m32700ut_pld_irq_type;
205 irq_desc[PLD_IRQ_CF0 + i].action = 0; 205 irq_desc[PLD_IRQ_CF0 + i].action = 0;
206 irq_desc[PLD_IRQ_CF0 + i].depth = 1; /* disable nested irq */ 206 irq_desc[PLD_IRQ_CF0 + i].depth = 1; /* disable nested irq */
207 pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr 207 pld_icu_data[irq2pldirq(PLD_IRQ_CF0 + i)].icucr
@@ -212,7 +212,7 @@ void __init init_IRQ(void)
212#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) 212#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
213 /* INT#76: 16552D#0 IREQ on PLD */ 213 /* INT#76: 16552D#0 IREQ on PLD */
214 irq_desc[PLD_IRQ_UART0].status = IRQ_DISABLED; 214 irq_desc[PLD_IRQ_UART0].status = IRQ_DISABLED;
215 irq_desc[PLD_IRQ_UART0].handler = &m32700ut_pld_irq_type; 215 irq_desc[PLD_IRQ_UART0].chip = &m32700ut_pld_irq_type;
216 irq_desc[PLD_IRQ_UART0].action = 0; 216 irq_desc[PLD_IRQ_UART0].action = 0;
217 irq_desc[PLD_IRQ_UART0].depth = 1; /* disable nested irq */ 217 irq_desc[PLD_IRQ_UART0].depth = 1; /* disable nested irq */
218 pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr 218 pld_icu_data[irq2pldirq(PLD_IRQ_UART0)].icucr
@@ -221,7 +221,7 @@ void __init init_IRQ(void)
221 221
222 /* INT#77: 16552D#1 IREQ on PLD */ 222 /* INT#77: 16552D#1 IREQ on PLD */
223 irq_desc[PLD_IRQ_UART1].status = IRQ_DISABLED; 223 irq_desc[PLD_IRQ_UART1].status = IRQ_DISABLED;
224 irq_desc[PLD_IRQ_UART1].handler = &m32700ut_pld_irq_type; 224 irq_desc[PLD_IRQ_UART1].chip = &m32700ut_pld_irq_type;
225 irq_desc[PLD_IRQ_UART1].action = 0; 225 irq_desc[PLD_IRQ_UART1].action = 0;
226 irq_desc[PLD_IRQ_UART1].depth = 1; /* disable nested irq */ 226 irq_desc[PLD_IRQ_UART1].depth = 1; /* disable nested irq */
227 pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr 227 pld_icu_data[irq2pldirq(PLD_IRQ_UART1)].icucr
@@ -232,7 +232,7 @@ void __init init_IRQ(void)
232#if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE) 232#if defined(CONFIG_IDC_AK4524) || defined(CONFIG_IDC_AK4524_MODULE)
233 /* INT#80: AK4524 IREQ on PLD */ 233 /* INT#80: AK4524 IREQ on PLD */
234 irq_desc[PLD_IRQ_SNDINT].status = IRQ_DISABLED; 234 irq_desc[PLD_IRQ_SNDINT].status = IRQ_DISABLED;
235 irq_desc[PLD_IRQ_SNDINT].handler = &m32700ut_pld_irq_type; 235 irq_desc[PLD_IRQ_SNDINT].chip = &m32700ut_pld_irq_type;
236 irq_desc[PLD_IRQ_SNDINT].action = 0; 236 irq_desc[PLD_IRQ_SNDINT].action = 0;
237 irq_desc[PLD_IRQ_SNDINT].depth = 1; /* disable nested irq */ 237 irq_desc[PLD_IRQ_SNDINT].depth = 1; /* disable nested irq */
238 pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr 238 pld_icu_data[irq2pldirq(PLD_IRQ_SNDINT)].icucr
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig
index 8b6e723eb82..e767f2ddae7 100644
--- a/arch/m68knommu/Kconfig
+++ b/arch/m68knommu/Kconfig
@@ -540,6 +540,59 @@ config RAM32BIT
540 540
541endchoice 541endchoice
542 542
543comment "ROM configuration"
544
545config ROM
546 bool "Specify ROM linker regions"
547 default n
548 help
549 Define a ROM region for the linker script. This creates a kernel
550 that can be stored in flash, with possibly the text, and data
551 regions being copied out to RAM at startup.
552
553config ROMBASE
554 hex "Address of the base of ROM device"
555 default "0"
556 depends on ROM
557 help
558 Define the address that the ROM region starts at. Some platforms
559 use this to set their chip select region accordingly for the boot
560 device.
561
562config ROMVEC
563 hex "Address of the base of the ROM vectors"
564 default "0"
565 depends on ROM
566 help
567 This is almost always the same as the base of the ROM. Since on all
568 68000 type varients the vectors are at the base of the boot device
569 on system startup.
570
571config ROMVECSIZE
572 hex "Size of ROM vector region (in bytes)"
573 default "0x400"
574 depends on ROM
575 help
576 Define the size of the vector region in ROM. For most 68000
577 varients this would be 0x400 bytes in size. Set to 0 if you do
578 not want a vector region at the start of the ROM.
579
580config ROMSTART
581 hex "Address of the base of system image in ROM"
582 default "0x400"
583 depends on ROM
584 help
585 Define the start address of the system image in ROM. Commonly this
586 is strait after the ROM vectors.
587
588config ROMSIZE
589 hex "Size of the ROM device"
590 default "0x100000"
591 depends on ROM
592 help
593 Size of the ROM device. On some platforms this is used to setup
594 the chip select that controls the boot ROM device.
595
543choice 596choice
544 prompt "Kernel executes from" 597 prompt "Kernel executes from"
545 ---help--- 598 ---help---
diff --git a/arch/m68knommu/Makefile b/arch/m68knommu/Makefile
index 6f880cbff1c..8951793fd8d 100644
--- a/arch/m68knommu/Makefile
+++ b/arch/m68knommu/Makefile
@@ -21,6 +21,7 @@ platform-$(CONFIG_M527x) := 527x
21platform-$(CONFIG_M5272) := 5272 21platform-$(CONFIG_M5272) := 5272
22platform-$(CONFIG_M528x) := 528x 22platform-$(CONFIG_M528x) := 528x
23platform-$(CONFIG_M5307) := 5307 23platform-$(CONFIG_M5307) := 5307
24platform-$(CONFIG_M532x) := 532x
24platform-$(CONFIG_M5407) := 5407 25platform-$(CONFIG_M5407) := 5407
25PLATFORM := $(platform-y) 26PLATFORM := $(platform-y)
26 27
@@ -44,6 +45,7 @@ board-$(CONFIG_senTec) := senTec
44board-$(CONFIG_SNEHA) := SNEHA 45board-$(CONFIG_SNEHA) := SNEHA
45board-$(CONFIG_M5208EVB) := M5208EVB 46board-$(CONFIG_M5208EVB) := M5208EVB
46board-$(CONFIG_MOD5272) := MOD5272 47board-$(CONFIG_MOD5272) := MOD5272
48board-$(CONFIG_AVNET) := AVNET
47BOARD := $(board-y) 49BOARD := $(board-y)
48 50
49model-$(CONFIG_RAMKERNEL) := ram 51model-$(CONFIG_RAMKERNEL) := ram
@@ -65,6 +67,7 @@ cpuclass-$(CONFIG_M527x) := 5307
65cpuclass-$(CONFIG_M5272) := 5307 67cpuclass-$(CONFIG_M5272) := 5307
66cpuclass-$(CONFIG_M528x) := 5307 68cpuclass-$(CONFIG_M528x) := 5307
67cpuclass-$(CONFIG_M5307) := 5307 69cpuclass-$(CONFIG_M5307) := 5307
70cpuclass-$(CONFIG_M532x) := 5307
68cpuclass-$(CONFIG_M5407) := 5307 71cpuclass-$(CONFIG_M5407) := 5307
69cpuclass-$(CONFIG_M68328) := 68328 72cpuclass-$(CONFIG_M68328) := 68328
70cpuclass-$(CONFIG_M68EZ328) := 68328 73cpuclass-$(CONFIG_M68EZ328) := 68328
@@ -81,16 +84,17 @@ export PLATFORM BOARD MODEL CPUCLASS
81# 84#
82# Some CFLAG additions based on specific CPU type. 85# Some CFLAG additions based on specific CPU type.
83# 86#
84cflags-$(CONFIG_M5206) := -m5200 -Wa,-S -Wa,-m5200 87cflags-$(CONFIG_M5206) := -m5200
85cflags-$(CONFIG_M5206e) := -m5200 -Wa,-S -Wa,-m5200 88cflags-$(CONFIG_M5206e) := -m5200
86cflags-$(CONFIG_M520x) := -m5307 -Wa,-S -Wa,-m5307 89cflags-$(CONFIG_M520x) := -m5307
87cflags-$(CONFIG_M523x) := -m5307 -Wa,-S -Wa,-m5307 90cflags-$(CONFIG_M523x) := -m5307
88cflags-$(CONFIG_M5249) := -m5200 -Wa,-S -Wa,-m5200 91cflags-$(CONFIG_M5249) := -m5200
89cflags-$(CONFIG_M527x) := -m5307 -Wa,-S -Wa,-m5307 92cflags-$(CONFIG_M527x) := -m5307
90cflags-$(CONFIG_M5272) := -m5307 -Wa,-S -Wa,-m5307 93cflags-$(CONFIG_M5272) := -m5307
91cflags-$(CONFIG_M528x) := -m5307 -Wa,-S -Wa,-m5307 94cflags-$(CONFIG_M528x) := -m5307
92cflags-$(CONFIG_M5307) := -m5307 -Wa,-S -Wa,-m5307 95cflags-$(CONFIG_M5307) := -m5307
93cflags-$(CONFIG_M5407) := -m5200 -Wa,-S -Wa,-m5200 96cflags-$(CONFIG_M532x) := -m5307
97cflags-$(CONFIG_M5407) := -m5200
94cflags-$(CONFIG_M68328) := -m68000 98cflags-$(CONFIG_M68328) := -m68000
95cflags-$(CONFIG_M68EZ328) := -m68000 99cflags-$(CONFIG_M68EZ328) := -m68000
96cflags-$(CONFIG_M68VZ328) := -m68000 100cflags-$(CONFIG_M68VZ328) := -m68000
diff --git a/arch/m68knommu/defconfig b/arch/m68knommu/defconfig
index 2d59ba1a79b..3891de09ac2 100644
--- a/arch/m68knommu/defconfig
+++ b/arch/m68knommu/defconfig
@@ -1,21 +1,22 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.13-uc0 3# Linux kernel version: 2.6.17
4# Wed Aug 31 15:03:26 2005 4# Tue Jun 27 12:57:06 2006
5# 5#
6CONFIG_M68KNOMMU=y 6CONFIG_M68K=y
7# CONFIG_MMU is not set 7# CONFIG_MMU is not set
8# CONFIG_FPU is not set 8# CONFIG_FPU is not set
9CONFIG_UID16=y
10CONFIG_RWSEM_GENERIC_SPINLOCK=y 9CONFIG_RWSEM_GENERIC_SPINLOCK=y
11# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set 10# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
11CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y
12CONFIG_GENERIC_CALIBRATE_DELAY=y 13CONFIG_GENERIC_CALIBRATE_DELAY=y
14CONFIG_TIME_LOW_RES=y
13 15
14# 16#
15# Code maturity level options 17# Code maturity level options
16# 18#
17CONFIG_EXPERIMENTAL=y 19CONFIG_EXPERIMENTAL=y
18CONFIG_CLEAN_COMPILE=y
19CONFIG_BROKEN_ON_SMP=y 20CONFIG_BROKEN_ON_SMP=y
20CONFIG_INIT_ENV_ARG_LIMIT=32 21CONFIG_INIT_ENV_ARG_LIMIT=32
21 22
@@ -23,26 +24,30 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
23# General setup 24# General setup
24# 25#
25CONFIG_LOCALVERSION="" 26CONFIG_LOCALVERSION=""
27CONFIG_LOCALVERSION_AUTO=y
28# CONFIG_SYSVIPC is not set
26# CONFIG_POSIX_MQUEUE is not set 29# CONFIG_POSIX_MQUEUE is not set
27# CONFIG_BSD_PROCESS_ACCT is not set 30# CONFIG_BSD_PROCESS_ACCT is not set
28# CONFIG_SYSCTL is not set 31# CONFIG_SYSCTL is not set
29# CONFIG_AUDIT is not set 32# CONFIG_AUDIT is not set
30# CONFIG_HOTPLUG is not set
31# CONFIG_KOBJECT_UEVENT is not set
32# CONFIG_IKCONFIG is not set 33# CONFIG_IKCONFIG is not set
34# CONFIG_RELAY is not set
35CONFIG_INITRAMFS_SOURCE=""
36CONFIG_UID16=y
37# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
33CONFIG_EMBEDDED=y 38CONFIG_EMBEDDED=y
34# CONFIG_KALLSYMS is not set 39# CONFIG_KALLSYMS is not set
40# CONFIG_HOTPLUG is not set
35CONFIG_PRINTK=y 41CONFIG_PRINTK=y
36CONFIG_BUG=y 42CONFIG_BUG=y
43CONFIG_ELF_CORE=y
37CONFIG_BASE_FULL=y 44CONFIG_BASE_FULL=y
38# CONFIG_FUTEX is not set 45# CONFIG_FUTEX is not set
39# CONFIG_EPOLL is not set 46# CONFIG_EPOLL is not set
40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 47CONFIG_SLAB=y
41CONFIG_CC_ALIGN_FUNCTIONS=0 48CONFIG_TINY_SHMEM=y
42CONFIG_CC_ALIGN_LABELS=0
43CONFIG_CC_ALIGN_LOOPS=0
44CONFIG_CC_ALIGN_JUMPS=0
45CONFIG_BASE_SMALL=0 49CONFIG_BASE_SMALL=0
50# CONFIG_SLOB is not set
46 51
47# 52#
48# Loadable module support 53# Loadable module support
@@ -50,6 +55,24 @@ CONFIG_BASE_SMALL=0
50# CONFIG_MODULES is not set 55# CONFIG_MODULES is not set
51 56
52# 57#
58# Block layer
59#
60# CONFIG_BLK_DEV_IO_TRACE is not set
61
62#
63# IO Schedulers
64#
65CONFIG_IOSCHED_NOOP=y
66# CONFIG_IOSCHED_AS is not set
67# CONFIG_IOSCHED_DEADLINE is not set
68# CONFIG_IOSCHED_CFQ is not set
69# CONFIG_DEFAULT_AS is not set
70# CONFIG_DEFAULT_DEADLINE is not set
71# CONFIG_DEFAULT_CFQ is not set
72CONFIG_DEFAULT_NOOP=y
73CONFIG_DEFAULT_IOSCHED="noop"
74
75#
53# Processor type and features 76# Processor type and features
54# 77#
55# CONFIG_M68328 is not set 78# CONFIG_M68328 is not set
@@ -58,6 +81,7 @@ CONFIG_BASE_SMALL=0
58# CONFIG_M68360 is not set 81# CONFIG_M68360 is not set
59# CONFIG_M5206 is not set 82# CONFIG_M5206 is not set
60# CONFIG_M5206e is not set 83# CONFIG_M5206e is not set
84# CONFIG_M520x is not set
61# CONFIG_M523x is not set 85# CONFIG_M523x is not set
62# CONFIG_M5249 is not set 86# CONFIG_M5249 is not set
63# CONFIG_M5271 is not set 87# CONFIG_M5271 is not set
@@ -65,29 +89,12 @@ CONFIG_M5272=y
65# CONFIG_M5275 is not set 89# CONFIG_M5275 is not set
66# CONFIG_M528x is not set 90# CONFIG_M528x is not set
67# CONFIG_M5307 is not set 91# CONFIG_M5307 is not set
92# CONFIG_M532x is not set
68# CONFIG_M5407 is not set 93# CONFIG_M5407 is not set
69CONFIG_COLDFIRE=y 94CONFIG_COLDFIRE=y
70# CONFIG_CLOCK_AUTO is not set 95CONFIG_CLOCK_SET=y
71# CONFIG_CLOCK_11MHz is not set 96CONFIG_CLOCK_FREQ=66666666
72# CONFIG_CLOCK_16MHz is not set 97CONFIG_CLOCK_DIV=1
73# CONFIG_CLOCK_20MHz is not set
74# CONFIG_CLOCK_24MHz is not set
75# CONFIG_CLOCK_25MHz is not set
76# CONFIG_CLOCK_33MHz is not set
77# CONFIG_CLOCK_40MHz is not set
78# CONFIG_CLOCK_45MHz is not set
79# CONFIG_CLOCK_48MHz is not set
80# CONFIG_CLOCK_50MHz is not set
81# CONFIG_CLOCK_54MHz is not set
82# CONFIG_CLOCK_60MHz is not set
83# CONFIG_CLOCK_62_5MHz is not set
84# CONFIG_CLOCK_64MHz is not set
85CONFIG_CLOCK_66MHz=y
86# CONFIG_CLOCK_70MHz is not set
87# CONFIG_CLOCK_100MHz is not set
88# CONFIG_CLOCK_140MHz is not set
89# CONFIG_CLOCK_150MHz is not set
90# CONFIG_CLOCK_166MHz is not set
91 98
92# 99#
93# Platform 100# Platform
@@ -102,11 +109,14 @@ CONFIG_M5272C3=y
102CONFIG_FREESCALE=y 109CONFIG_FREESCALE=y
103# CONFIG_LARGE_ALLOCS is not set 110# CONFIG_LARGE_ALLOCS is not set
104CONFIG_4KSTACKS=y 111CONFIG_4KSTACKS=y
105CONFIG_RAMAUTO=y 112
106# CONFIG_RAM4MB is not set 113#
107# CONFIG_RAM8MB is not set 114# RAM configuration
108# CONFIG_RAM16MB is not set 115#
109# CONFIG_RAM32MB is not set 116CONFIG_RAMBASE=0x0
117CONFIG_RAMSIZE=0x800000
118CONFIG_VECTORBASE=0x0
119CONFIG_KERNELBASE=0x20000
110CONFIG_RAMAUTOBIT=y 120CONFIG_RAMAUTOBIT=y
111# CONFIG_RAM8BIT is not set 121# CONFIG_RAM8BIT is not set
112# CONFIG_RAM16BIT is not set 122# CONFIG_RAM16BIT is not set
@@ -119,6 +129,8 @@ CONFIG_FLATMEM_MANUAL=y
119# CONFIG_SPARSEMEM_MANUAL is not set 129# CONFIG_SPARSEMEM_MANUAL is not set
120CONFIG_FLATMEM=y 130CONFIG_FLATMEM=y
121CONFIG_FLAT_NODE_MEM_MAP=y 131CONFIG_FLAT_NODE_MEM_MAP=y
132# CONFIG_SPARSEMEM_STATIC is not set
133CONFIG_SPLIT_PTLOCK_CPUS=4
122 134
123# 135#
124# Bus options (PCI, PCMCIA, EISA, MCA, ISA) 136# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
@@ -140,6 +152,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y
140CONFIG_BINFMT_FLAT=y 152CONFIG_BINFMT_FLAT=y
141# CONFIG_BINFMT_ZFLAT is not set 153# CONFIG_BINFMT_ZFLAT is not set
142# CONFIG_BINFMT_SHARED_FLAT is not set 154# CONFIG_BINFMT_SHARED_FLAT is not set
155# CONFIG_BINFMT_AOUT is not set
143# CONFIG_BINFMT_MISC is not set 156# CONFIG_BINFMT_MISC is not set
144 157
145# 158#
@@ -155,6 +168,7 @@ CONFIG_NET=y
155# 168#
156# Networking options 169# Networking options
157# 170#
171# CONFIG_NETDEBUG is not set
158CONFIG_PACKET=y 172CONFIG_PACKET=y
159# CONFIG_PACKET_MMAP is not set 173# CONFIG_PACKET_MMAP is not set
160CONFIG_UNIX=y 174CONFIG_UNIX=y
@@ -171,18 +185,30 @@ CONFIG_IP_FIB_HASH=y
171# CONFIG_INET_AH is not set 185# CONFIG_INET_AH is not set
172# CONFIG_INET_ESP is not set 186# CONFIG_INET_ESP is not set
173# CONFIG_INET_IPCOMP is not set 187# CONFIG_INET_IPCOMP is not set
188# CONFIG_INET_XFRM_TUNNEL is not set
174# CONFIG_INET_TUNNEL is not set 189# CONFIG_INET_TUNNEL is not set
175# CONFIG_IP_TCPDIAG is not set 190# CONFIG_INET_DIAG is not set
176# CONFIG_IP_TCPDIAG_IPV6 is not set
177# CONFIG_TCP_CONG_ADVANCED is not set 191# CONFIG_TCP_CONG_ADVANCED is not set
178CONFIG_TCP_CONG_BIC=y 192CONFIG_TCP_CONG_BIC=y
179# CONFIG_IPV6 is not set 193# CONFIG_IPV6 is not set
194# CONFIG_INET6_XFRM_TUNNEL is not set
195# CONFIG_INET6_TUNNEL is not set
180# CONFIG_NETFILTER is not set 196# CONFIG_NETFILTER is not set
181 197
182# 198#
199# DCCP Configuration (EXPERIMENTAL)
200#
201# CONFIG_IP_DCCP is not set
202
203#
183# SCTP Configuration (EXPERIMENTAL) 204# SCTP Configuration (EXPERIMENTAL)
184# 205#
185# CONFIG_IP_SCTP is not set 206# CONFIG_IP_SCTP is not set
207
208#
209# TIPC Configuration (EXPERIMENTAL)
210#
211# CONFIG_TIPC is not set
186# CONFIG_ATM is not set 212# CONFIG_ATM is not set
187# CONFIG_BRIDGE is not set 213# CONFIG_BRIDGE is not set
188# CONFIG_VLAN_8021Q is not set 214# CONFIG_VLAN_8021Q is not set
@@ -195,8 +221,11 @@ CONFIG_TCP_CONG_BIC=y
195# CONFIG_NET_DIVERT is not set 221# CONFIG_NET_DIVERT is not set
196# CONFIG_ECONET is not set 222# CONFIG_ECONET is not set
197# CONFIG_WAN_ROUTER is not set 223# CONFIG_WAN_ROUTER is not set
224
225#
226# QoS and/or fair queueing
227#
198# CONFIG_NET_SCHED is not set 228# CONFIG_NET_SCHED is not set
199# CONFIG_NET_CLS_ROUTE is not set
200 229
201# 230#
202# Network testing 231# Network testing
@@ -205,6 +234,7 @@ CONFIG_TCP_CONG_BIC=y
205# CONFIG_HAMRADIO is not set 234# CONFIG_HAMRADIO is not set
206# CONFIG_IRDA is not set 235# CONFIG_IRDA is not set
207# CONFIG_BT is not set 236# CONFIG_BT is not set
237# CONFIG_IEEE80211 is not set
208 238
209# 239#
210# Device Drivers 240# Device Drivers
@@ -218,6 +248,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
218# CONFIG_FW_LOADER is not set 248# CONFIG_FW_LOADER is not set
219 249
220# 250#
251# Connector - unified userspace <-> kernelspace linker
252#
253# CONFIG_CONNECTOR is not set
254
255#
221# Memory Technology Devices (MTD) 256# Memory Technology Devices (MTD)
222# 257#
223CONFIG_MTD=y 258CONFIG_MTD=y
@@ -235,6 +270,7 @@ CONFIG_MTD_BLOCK=y
235# CONFIG_FTL is not set 270# CONFIG_FTL is not set
236# CONFIG_NFTL is not set 271# CONFIG_NFTL is not set
237# CONFIG_INFTL is not set 272# CONFIG_INFTL is not set
273# CONFIG_RFD_FTL is not set
238 274
239# 275#
240# RAM/ROM/Flash chip drivers 276# RAM/ROM/Flash chip drivers
@@ -254,13 +290,13 @@ CONFIG_MTD_CFI_I2=y
254CONFIG_MTD_RAM=y 290CONFIG_MTD_RAM=y
255# CONFIG_MTD_ROM is not set 291# CONFIG_MTD_ROM is not set
256# CONFIG_MTD_ABSENT is not set 292# CONFIG_MTD_ABSENT is not set
293# CONFIG_MTD_OBSOLETE_CHIPS is not set
257 294
258# 295#
259# Mapping drivers for chip access 296# Mapping drivers for chip access
260# 297#
261# CONFIG_MTD_COMPLEX_MAPPINGS is not set 298# CONFIG_MTD_COMPLEX_MAPPINGS is not set
262CONFIG_MTD_UCLINUX=y 299CONFIG_MTD_UCLINUX=y
263# CONFIG_MTD_SNAPGEARuC is not set
264# CONFIG_MTD_PLATRAM is not set 300# CONFIG_MTD_PLATRAM is not set
265 301
266# 302#
@@ -269,7 +305,6 @@ CONFIG_MTD_UCLINUX=y
269# CONFIG_MTD_SLRAM is not set 305# CONFIG_MTD_SLRAM is not set
270# CONFIG_MTD_PHRAM is not set 306# CONFIG_MTD_PHRAM is not set
271# CONFIG_MTD_MTDRAM is not set 307# CONFIG_MTD_MTDRAM is not set
272# CONFIG_MTD_BLKMTD is not set
273# CONFIG_MTD_BLOCK2MTD is not set 308# CONFIG_MTD_BLOCK2MTD is not set
274 309
275# 310#
@@ -285,6 +320,11 @@ CONFIG_MTD_UCLINUX=y
285# CONFIG_MTD_NAND is not set 320# CONFIG_MTD_NAND is not set
286 321
287# 322#
323# OneNAND Flash Device Drivers
324#
325# CONFIG_MTD_ONENAND is not set
326
327#
288# Parallel port support 328# Parallel port support
289# 329#
290# CONFIG_PARPORT is not set 330# CONFIG_PARPORT is not set
@@ -296,7 +336,6 @@ CONFIG_MTD_UCLINUX=y
296# 336#
297# Block devices 337# Block devices
298# 338#
299# CONFIG_BLK_DEV_FD is not set
300# CONFIG_BLK_DEV_COW_COMMON is not set 339# CONFIG_BLK_DEV_COW_COMMON is not set
301# CONFIG_BLK_DEV_LOOP is not set 340# CONFIG_BLK_DEV_LOOP is not set
302# CONFIG_BLK_DEV_NBD is not set 341# CONFIG_BLK_DEV_NBD is not set
@@ -304,16 +343,7 @@ CONFIG_BLK_DEV_RAM=y
304CONFIG_BLK_DEV_RAM_COUNT=16 343CONFIG_BLK_DEV_RAM_COUNT=16
305CONFIG_BLK_DEV_RAM_SIZE=4096 344CONFIG_BLK_DEV_RAM_SIZE=4096
306# CONFIG_BLK_DEV_INITRD is not set 345# CONFIG_BLK_DEV_INITRD is not set
307CONFIG_INITRAMFS_SOURCE=""
308# CONFIG_CDROM_PKTCDVD is not set 346# CONFIG_CDROM_PKTCDVD is not set
309
310#
311# IO Schedulers
312#
313CONFIG_IOSCHED_NOOP=y
314# CONFIG_IOSCHED_AS is not set
315# CONFIG_IOSCHED_DEADLINE is not set
316# CONFIG_IOSCHED_CFQ is not set
317# CONFIG_ATA_OVER_ETH is not set 347# CONFIG_ATA_OVER_ETH is not set
318 348
319# 349#
@@ -324,6 +354,7 @@ CONFIG_IOSCHED_NOOP=y
324# 354#
325# SCSI device support 355# SCSI device support
326# 356#
357# CONFIG_RAID_ATTRS is not set
327# CONFIG_SCSI is not set 358# CONFIG_SCSI is not set
328 359
329# 360#
@@ -354,13 +385,15 @@ CONFIG_NETDEVICES=y
354# CONFIG_TUN is not set 385# CONFIG_TUN is not set
355 386
356# 387#
388# PHY device support
389#
390# CONFIG_PHYLIB is not set
391
392#
357# Ethernet (10 or 100Mbit) 393# Ethernet (10 or 100Mbit)
358# 394#
359CONFIG_NET_ETHERNET=y 395CONFIG_NET_ETHERNET=y
360# CONFIG_MII is not set 396# CONFIG_MII is not set
361# CONFIG_NET_VENDOR_SMC is not set
362# CONFIG_NE2000 is not set
363# CONFIG_NET_PCI is not set
364CONFIG_FEC=y 397CONFIG_FEC=y
365# CONFIG_FEC2 is not set 398# CONFIG_FEC2 is not set
366 399
@@ -392,6 +425,7 @@ CONFIG_PPP=y
392# CONFIG_PPP_SYNC_TTY is not set 425# CONFIG_PPP_SYNC_TTY is not set
393# CONFIG_PPP_DEFLATE is not set 426# CONFIG_PPP_DEFLATE is not set
394# CONFIG_PPP_BSDCOMP is not set 427# CONFIG_PPP_BSDCOMP is not set
428# CONFIG_PPP_MPPE is not set
395# CONFIG_PPPOE is not set 429# CONFIG_PPPOE is not set
396# CONFIG_SLIP is not set 430# CONFIG_SLIP is not set
397# CONFIG_SHAPER is not set 431# CONFIG_SHAPER is not set
@@ -425,8 +459,6 @@ CONFIG_PPP=y
425# 459#
426# CONFIG_VT is not set 460# CONFIG_VT is not set
427# CONFIG_SERIAL_NONSTANDARD is not set 461# CONFIG_SERIAL_NONSTANDARD is not set
428# CONFIG_LEDMAN is not set
429# CONFIG_RESETSWITCH is not set
430 462
431# 463#
432# Serial drivers 464# Serial drivers
@@ -450,8 +482,6 @@ CONFIG_LEGACY_PTY_COUNT=256
450# Watchdog Cards 482# Watchdog Cards
451# 483#
452# CONFIG_WATCHDOG is not set 484# CONFIG_WATCHDOG is not set
453# CONFIG_MCFWATCHDOG is not set
454# CONFIG_RTC is not set
455# CONFIG_GEN_RTC is not set 485# CONFIG_GEN_RTC is not set
456# CONFIG_DTLK is not set 486# CONFIG_DTLK is not set
457# CONFIG_R3964 is not set 487# CONFIG_R3964 is not set
@@ -464,14 +494,19 @@ CONFIG_LEGACY_PTY_COUNT=256
464# 494#
465# TPM devices 495# TPM devices
466# 496#
467# CONFIG_MCF_QSPI is not set 497# CONFIG_TCG_TPM is not set
468# CONFIG_M41T11M6 is not set 498# CONFIG_TELCLOCK is not set
469 499
470# 500#
471# I2C support 501# I2C support
472# 502#
473# CONFIG_I2C is not set 503# CONFIG_I2C is not set
474# CONFIG_I2C_SENSOR is not set 504
505#
506# SPI support
507#
508# CONFIG_SPI is not set
509# CONFIG_SPI_MASTER is not set
475 510
476# 511#
477# Dallas's 1-wire bus 512# Dallas's 1-wire bus
@@ -482,6 +517,7 @@ CONFIG_LEGACY_PTY_COUNT=256
482# Hardware Monitoring support 517# Hardware Monitoring support
483# 518#
484# CONFIG_HWMON is not set 519# CONFIG_HWMON is not set
520# CONFIG_HWMON_VID is not set
485 521
486# 522#
487# Misc devices 523# Misc devices
@@ -491,6 +527,7 @@ CONFIG_LEGACY_PTY_COUNT=256
491# Multimedia devices 527# Multimedia devices
492# 528#
493# CONFIG_VIDEO_DEV is not set 529# CONFIG_VIDEO_DEV is not set
530CONFIG_VIDEO_V4L2=y
494 531
495# 532#
496# Digital Video Broadcasting Devices 533# Digital Video Broadcasting Devices
@@ -503,11 +540,6 @@ CONFIG_LEGACY_PTY_COUNT=256
503# CONFIG_FB is not set 540# CONFIG_FB is not set
504 541
505# 542#
506# SPI support
507#
508# CONFIG_SPI is not set
509
510#
511# Sound 543# Sound
512# 544#
513# CONFIG_SOUND is not set 545# CONFIG_SOUND is not set
@@ -517,6 +549,11 @@ CONFIG_LEGACY_PTY_COUNT=256
517# 549#
518# CONFIG_USB_ARCH_HAS_HCD is not set 550# CONFIG_USB_ARCH_HAS_HCD is not set
519# CONFIG_USB_ARCH_HAS_OHCI is not set 551# CONFIG_USB_ARCH_HAS_OHCI is not set
552# CONFIG_USB_ARCH_HAS_EHCI is not set
553
554#
555# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
556#
520 557
521# 558#
522# USB Gadget Support 559# USB Gadget Support
@@ -529,29 +566,43 @@ CONFIG_LEGACY_PTY_COUNT=256
529# CONFIG_MMC is not set 566# CONFIG_MMC is not set
530 567
531# 568#
569# LED devices
570#
571# CONFIG_NEW_LEDS is not set
572
573#
574# LED drivers
575#
576
577#
578# LED Triggers
579#
580
581#
532# InfiniBand support 582# InfiniBand support
533# 583#
534 584
535# 585#
536# SN Devices 586# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
537# 587#
538 588
539# 589#
590# Real Time Clock
591#
592# CONFIG_RTC_CLASS is not set
593
594#
540# File systems 595# File systems
541# 596#
542CONFIG_EXT2_FS=y 597CONFIG_EXT2_FS=y
543# CONFIG_EXT2_FS_XATTR is not set 598# CONFIG_EXT2_FS_XATTR is not set
544# CONFIG_EXT2_FS_XIP is not set 599# CONFIG_EXT2_FS_XIP is not set
545# CONFIG_EXT3_FS is not set 600# CONFIG_EXT3_FS is not set
546# CONFIG_JBD is not set
547# CONFIG_REISERFS_FS is not set 601# CONFIG_REISERFS_FS is not set
548# CONFIG_JFS_FS is not set 602# CONFIG_JFS_FS is not set
549# CONFIG_FS_POSIX_ACL is not set 603# CONFIG_FS_POSIX_ACL is not set
550
551#
552# XFS support
553#
554# CONFIG_XFS_FS is not set 604# CONFIG_XFS_FS is not set
605# CONFIG_OCFS2_FS is not set
555# CONFIG_MINIX_FS is not set 606# CONFIG_MINIX_FS is not set
556CONFIG_ROMFS_FS=y 607CONFIG_ROMFS_FS=y
557# CONFIG_INOTIFY is not set 608# CONFIG_INOTIFY is not set
@@ -559,6 +610,7 @@ CONFIG_ROMFS_FS=y
559# CONFIG_DNOTIFY is not set 610# CONFIG_DNOTIFY is not set
560# CONFIG_AUTOFS_FS is not set 611# CONFIG_AUTOFS_FS is not set
561# CONFIG_AUTOFS4_FS is not set 612# CONFIG_AUTOFS4_FS is not set
613# CONFIG_FUSE_FS is not set
562 614
563# 615#
564# CD-ROM/DVD Filesystems 616# CD-ROM/DVD Filesystems
@@ -581,6 +633,7 @@ CONFIG_SYSFS=y
581# CONFIG_TMPFS is not set 633# CONFIG_TMPFS is not set
582# CONFIG_HUGETLB_PAGE is not set 634# CONFIG_HUGETLB_PAGE is not set
583CONFIG_RAMFS=y 635CONFIG_RAMFS=y
636# CONFIG_CONFIGFS_FS is not set
584 637
585# 638#
586# Miscellaneous filesystems 639# Miscellaneous filesystems
@@ -611,6 +664,7 @@ CONFIG_RAMFS=y
611# CONFIG_NCP_FS is not set 664# CONFIG_NCP_FS is not set
612# CONFIG_CODA_FS is not set 665# CONFIG_CODA_FS is not set
613# CONFIG_AFS_FS is not set 666# CONFIG_AFS_FS is not set
667# CONFIG_9P_FS is not set
614 668
615# 669#
616# Partition Types 670# Partition Types
@@ -627,8 +681,12 @@ CONFIG_MSDOS_PARTITION=y
627# Kernel hacking 681# Kernel hacking
628# 682#
629# CONFIG_PRINTK_TIME is not set 683# CONFIG_PRINTK_TIME is not set
684# CONFIG_MAGIC_SYSRQ is not set
630# CONFIG_DEBUG_KERNEL is not set 685# CONFIG_DEBUG_KERNEL is not set
631CONFIG_LOG_BUF_SHIFT=14 686CONFIG_LOG_BUF_SHIFT=14
687# CONFIG_DEBUG_BUGVERBOSE is not set
688# CONFIG_DEBUG_FS is not set
689# CONFIG_UNWIND_INFO is not set
632# CONFIG_FULLDEBUG is not set 690# CONFIG_FULLDEBUG is not set
633# CONFIG_HIGHPROFILE is not set 691# CONFIG_HIGHPROFILE is not set
634# CONFIG_BOOTPARAM is not set 692# CONFIG_BOOTPARAM is not set
@@ -655,5 +713,6 @@ CONFIG_LOG_BUF_SHIFT=14
655# Library routines 713# Library routines
656# 714#
657# CONFIG_CRC_CCITT is not set 715# CONFIG_CRC_CCITT is not set
716# CONFIG_CRC16 is not set
658# CONFIG_CRC32 is not set 717# CONFIG_CRC32 is not set
659# CONFIG_LIBCRC32C is not set 718# CONFIG_LIBCRC32C is not set
diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68knommu/kernel/vmlinux.lds.S
index 6a2f0c69325..59ced831b79 100644
--- a/arch/m68knommu/kernel/vmlinux.lds.S
+++ b/arch/m68knommu/kernel/vmlinux.lds.S
@@ -3,63 +3,13 @@
3 * 3 *
4 * (C) Copyright 2002-2006, Greg Ungerer <gerg@snapgear.com> 4 * (C) Copyright 2002-2006, Greg Ungerer <gerg@snapgear.com>
5 * 5 *
6 * This ends up looking compilcated, because of the number of 6 * This linker script is equiped to build either ROM loaded or RAM
7 * address variations for ram and rom/flash layouts. The real 7 * run kernels.
8 * work of the linker script is all at the end, and reasonably
9 * strait forward.
10 */ 8 */
11 9
12#include <linux/config.h> 10#include <linux/config.h>
13#include <asm-generic/vmlinux.lds.h> 11#include <asm-generic/vmlinux.lds.h>
14 12
15/*
16 * Original Palm pilot (same for Xcopilot).
17 * There is really only a rom target for this.
18 */
19#ifdef CONFIG_PILOT3
20#define ROMVEC_START 0x10c00000
21#define ROMVEC_LENGTH 0x10400
22#define ROM_START 0x10c10400
23#define ROM_LENGTH 0xfec00
24#define ROM_END 0x10d00000
25#define DATA_ADDR CONFIG_KERNELBASE
26#endif
27
28/*
29 * Same setup on both the uCsimm and uCdimm.
30 */
31#if defined(CONFIG_UCSIMM) || defined(CONFIG_UCDIMM)
32#ifdef CONFIG_RAMKERNEL
33#define ROMVEC_START 0x10c10000
34#define ROMVEC_LENGTH 0x400
35#define ROM_START 0x10c10400
36#define ROM_LENGTH 0x1efc00
37#define ROM_END 0x10e00000
38#endif
39#ifdef CONFIG_ROMKERNEL
40#define ROMVEC_START 0x10c10000
41#define ROMVEC_LENGTH 0x400
42#define ROM_START 0x10c10400
43#define ROM_LENGTH 0x1efc00
44#define ROM_END 0x10e00000
45#endif
46#ifdef CONFIG_HIMEMKERNEL
47#define ROMVEC_START 0x00600000
48#define ROMVEC_LENGTH 0x400
49#define ROM_START 0x00600400
50#define ROM_LENGTH 0x1efc00
51#define ROM_END 0x007f0000
52#endif
53#endif
54
55#ifdef CONFIG_UCQUICC
56#define ROMVEC_START 0x00000000
57#define ROMVEC_LENGTH 0x404
58#define ROM_START 0x00000404
59#define ROM_LENGTH 0x1ff6fc
60#define ROM_END 0x00200000
61#endif
62
63#if defined(CONFIG_RAMKERNEL) 13#if defined(CONFIG_RAMKERNEL)
64#define RAM_START CONFIG_KERNELBASE 14#define RAM_START CONFIG_KERNELBASE
65#define RAM_LENGTH (CONFIG_RAMBASE + CONFIG_RAMSIZE - CONFIG_KERNELBASE) 15#define RAM_LENGTH (CONFIG_RAMBASE + CONFIG_RAMSIZE - CONFIG_KERNELBASE)
@@ -71,6 +21,10 @@
71#if defined(CONFIG_ROMKERNEL) || defined(CONFIG_HIMEMKERNEL) 21#if defined(CONFIG_ROMKERNEL) || defined(CONFIG_HIMEMKERNEL)
72#define RAM_START CONFIG_RAMBASE 22#define RAM_START CONFIG_RAMBASE
73#define RAM_LENGTH CONFIG_RAMSIZE 23#define RAM_LENGTH CONFIG_RAMSIZE
24#define ROMVEC_START CONFIG_ROMVEC
25#define ROMVEC_LENGTH CONFIG_ROMVECSIZE
26#define ROM_START CONFIG_ROMSTART
27#define ROM_LENGTH CONFIG_ROMSIZE
74#define TEXT rom 28#define TEXT rom
75#define DATA ram 29#define DATA ram
76#define INIT ram 30#define INIT ram
@@ -90,7 +44,6 @@ MEMORY {
90#ifdef ROM_START 44#ifdef ROM_START
91 romvec : ORIGIN = ROMVEC_START, LENGTH = ROMVEC_LENGTH 45 romvec : ORIGIN = ROMVEC_START, LENGTH = ROMVEC_LENGTH
92 rom : ORIGIN = ROM_START, LENGTH = ROM_LENGTH 46 rom : ORIGIN = ROM_START, LENGTH = ROM_LENGTH
93 erom : ORIGIN = ROM_END, LENGTH = 0
94#endif 47#endif
95} 48}
96 49
@@ -167,13 +120,6 @@ SECTIONS {
167 _etext = . ; 120 _etext = . ;
168 } > TEXT 121 } > TEXT
169 122
170#ifdef ROM_END
171 . = ROM_END ;
172 .erom : {
173 __rom_end = . ;
174 } > erom
175#endif
176
177 .data DATA_ADDR : { 123 .data DATA_ADDR : {
178 . = ALIGN(4); 124 . = ALIGN(4);
179 _sdata = . ; 125 _sdata = . ;
diff --git a/arch/m68knommu/platform/68328/Makefile b/arch/m68knommu/platform/68328/Makefile
index 1b3b719e447..5e5435552d5 100644
--- a/arch/m68knommu/platform/68328/Makefile
+++ b/arch/m68knommu/platform/68328/Makefile
@@ -8,6 +8,7 @@ head-$(CONFIG_DRAGEN2) = head-de2.o
8 8
9obj-y += entry.o ints.o timers.o 9obj-y += entry.o ints.o timers.o
10obj-$(CONFIG_M68328) += config.o 10obj-$(CONFIG_M68328) += config.o
11obj-$(CONFIG_ROM) += romvec.o
11 12
12extra-y := head.o 13extra-y := head.o
13extra-$(CONFIG_M68328) += bootlogo.rh head.o 14extra-$(CONFIG_M68328) += bootlogo.rh head.o
diff --git a/arch/m68knommu/platform/68328/head-rom.S b/arch/m68knommu/platform/68328/head-rom.S
index 2b448a29701..234430b9551 100644
--- a/arch/m68knommu/platform/68328/head-rom.S
+++ b/arch/m68knommu/platform/68328/head-rom.S
@@ -28,6 +28,8 @@ _ramstart:
28_ramend: 28_ramend:
29.long 0 29.long 0
30 30
31#define RAMEND (CONFIG_RAMBASE + CONFIG_RAMSIZE)
32
31#ifdef CONFIG_INIT_LCD 33#ifdef CONFIG_INIT_LCD
32splash_bits: 34splash_bits:
33#include "bootlogo.rh" 35#include "bootlogo.rh"
@@ -48,7 +50,7 @@ _stext: movew #0x2700,%sr
48 moveb #0x81, 0xfffffA27 /* LCKCON */ 50 moveb #0x81, 0xfffffA27 /* LCKCON */
49 movew #0xff00, 0xfffff412 /* LCD pins */ 51 movew #0xff00, 0xfffff412 /* LCD pins */
50#endif 52#endif
51 moveal #__ramend-CONFIG_MEMORY_RESERVE*0x100000 - 0x10, %sp 53 moveal #RAMEND-CONFIG_MEMORY_RESERVE*0x100000 - 0x10, %sp
52 movew #32767, %d0 /* PLL settle wait loop */ 54 movew #32767, %d0 /* PLL settle wait loop */
531: subq #1, %d0 551: subq #1, %d0
54 bne 1b 56 bne 1b
@@ -73,13 +75,13 @@ _stext: movew #0x2700,%sr
73 bhi 1b 75 bhi 1b
74 76
75 movel #_sdata, %d0 77 movel #_sdata, %d0
76 movel %d0, _rambase 78 movel %d0, _rambase
77 movel #_ebss, %d0 79 movel #_ebss, %d0
78 movel %d0, _ramstart 80 movel %d0, _ramstart
79 movel #__ramend-CONFIG_MEMORY_RESERVE*0x100000, %d0 81 movel #RAMEND-CONFIG_MEMORY_RESERVE*0x100000, %d0
80 movel %d0, _ramend 82 movel %d0, _ramend
81 movel #__ramvec, %d0 83 movel #CONFIG_VECTORBASE, %d0
82 movel %d0, _ramvec 84 movel %d0, _ramvec
83 85
84/* 86/*
85 * load the current task pointer and stack 87 * load the current task pointer and stack
diff --git a/arch/m68knommu/platform/68328/ints.c b/arch/m68knommu/platform/68328/ints.c
index 7437217813d..2dda7339aae 100644
--- a/arch/m68knommu/platform/68328/ints.c
+++ b/arch/m68knommu/platform/68328/ints.c
@@ -18,6 +18,7 @@
18 18
19#include <asm/system.h> 19#include <asm/system.h>
20#include <asm/irq.h> 20#include <asm/irq.h>
21#include <asm/irqnode.h>
21#include <asm/traps.h> 22#include <asm/traps.h>
22#include <asm/io.h> 23#include <asm/io.h>
23#include <asm/machdep.h> 24#include <asm/machdep.h>
@@ -82,25 +83,6 @@ unsigned int local_irq_count[NR_CPUS];
82/* irq node variables for the 32 (potential) on chip sources */ 83/* irq node variables for the 32 (potential) on chip sources */
83static irq_node_t int_irq_list[NR_IRQS]; 84static irq_node_t int_irq_list[NR_IRQS];
84 85
85#if !defined(CONFIG_DRAGEN2)
86asm (".global _start, __ramend/n/t"
87 ".section .romvec/n"
88 "e_vectors:\n\t"
89 ".long __ramend-4, _start, buserr, trap, trap, trap, trap, trap\n\t"
90 ".long trap, trap, trap, trap, trap, trap, trap, trap\n\t"
91 ".long trap, trap, trap, trap, trap, trap, trap, trap\n\t"
92 ".long trap, trap, trap, trap\n\t"
93 ".long trap, trap, trap, trap\n\t"
94 /*.long inthandler, inthandler, inthandler, inthandler
95 .long inthandler4, inthandler, inthandler, inthandler */
96 /* TRAP #0-15 */
97 ".long system_call, trap, trap, trap, trap, trap, trap, trap\n\t"
98 ".long trap, trap, trap, trap, trap, trap, trap, trap\n\t"
99 ".long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0\n\t"
100 ".text\n"
101 "ignore: rte");
102#endif
103
104/* 86/*
105 * This function should be called during kernel startup to initialize 87 * This function should be called during kernel startup to initialize
106 * the IRQ handling routines. 88 * the IRQ handling routines.
diff --git a/arch/m68knommu/platform/68328/romvec.S b/arch/m68knommu/platform/68328/romvec.S
new file mode 100644
index 00000000000..3e7fe1e1491
--- /dev/null
+++ b/arch/m68knommu/platform/68328/romvec.S
@@ -0,0 +1,37 @@
1/*
2 * linux/arch/m68knommu/platform/68328/romvec.S
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file COPYING in the main directory of this archive
6 * for more details.
7 *
8 * Copyright 1996 Roman Zippel
9 * Copyright 1999 D. Jeff Dionne <jeff@rt-control.com>
10 * Copyright 2006 Greg Ungerer <gerg@snapgear.com>
11 */
12
13#include <linux/config.h>
14
15.global _start
16.global _buserr
17.global trap
18.global system_call
19
20.section .romvec
21
22e_vectors:
23.long CONFIG_RAMBASE+CONFIG_RAMSIZE-4, _start, buserr, trap
24.long trap, trap, trap, trap
25.long trap, trap, trap, trap
26.long trap, trap, trap, trap
27.long trap, trap, trap, trap
28.long trap, trap, trap, trap
29.long trap, trap, trap, trap
30.long trap, trap, trap, trap
31/* TRAP #0-15 */
32.long system_call, trap, trap, trap
33.long trap, trap, trap, trap
34.long trap, trap, trap, trap
35.long trap, trap, trap, trap
36.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
37
diff --git a/arch/m68knommu/platform/68360/config.c b/arch/m68knommu/platform/68360/config.c
index 3db244625f0..69c670dfd62 100644
--- a/arch/m68knommu/platform/68360/config.c
+++ b/arch/m68knommu/platform/68360/config.c
@@ -141,13 +141,13 @@ int BSP_set_clock_mmss (unsigned long nowtime)
141void BSP_reset (void) 141void BSP_reset (void)
142{ 142{
143 local_irq_disable(); 143 local_irq_disable();
144 asm volatile (" 144 asm volatile (
145 moveal #_start, %a0; 145 "moveal #_start, %a0;\n"
146 moveb #0, 0xFFFFF300; 146 "moveb #0, 0xFFFFF300;\n"
147 moveal 0(%a0), %sp; 147 "moveal 0(%a0), %sp;\n"
148 moveal 4(%a0), %a0; 148 "moveal 4(%a0), %a0;\n"
149 jmp (%a0); 149 "jmp (%a0);\n"
150 "); 150 );
151} 151}
152 152
153unsigned char *scc1_hwaddr; 153unsigned char *scc1_hwaddr;
diff --git a/arch/m68knommu/platform/68360/head-ram.S b/arch/m68knommu/platform/68360/head-ram.S
index a5c639a51ee..f497713a4ec 100644
--- a/arch/m68knommu/platform/68360/head-ram.S
+++ b/arch/m68knommu/platform/68360/head-ram.S
@@ -18,7 +18,6 @@
18.global _start 18.global _start
19 19
20.global _rambase 20.global _rambase
21.global __ramvec
22.global _ramvec 21.global _ramvec
23.global _ramstart 22.global _ramstart
24.global _ramend 23.global _ramend
@@ -26,6 +25,8 @@
26.global _quicc_base 25.global _quicc_base
27.global _periph_base 26.global _periph_base
28 27
28#define RAMEND (CONFIG_RAMBASE + CONFIG_RAMSIZE)
29
29#define REGB 0x1000 30#define REGB 0x1000
30#define PEPAR (_dprbase + REGB + 0x0016) 31#define PEPAR (_dprbase + REGB + 0x0016)
31#define GMR (_dprbase + REGB + 0x0040) 32#define GMR (_dprbase + REGB + 0x0040)
@@ -103,7 +104,7 @@ _stext:
103 nop 104 nop
104 ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */ 105 ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */
105 /* We should not need to setup the boot stack the reset should do it. */ 106 /* We should not need to setup the boot stack the reset should do it. */
106 movea.l #__ramend, %sp /*set up stack at the end of DRAM:*/ 107 movea.l #RAMEND, %sp /*set up stack at the end of DRAM:*/
107 108
108set_mbar_register: 109set_mbar_register:
109 moveq.l #0x07, %d1 /* Setup MBAR */ 110 moveq.l #0x07, %d1 /* Setup MBAR */
@@ -163,7 +164,7 @@ configure_memory_controller:
163 move.l %d0, GMR 164 move.l %d0, GMR
164 165
165configure_chip_select_0: 166configure_chip_select_0:
166 move.l #__ramend, %d0 167 move.l #RAMEND, %d0
167 subi.l #__ramstart, %d0 168 subi.l #__ramstart, %d0
168 subq.l #0x01, %d0 169 subq.l #0x01, %d0
169 eori.l #SIM_OR_MASK, %d0 170 eori.l #SIM_OR_MASK, %d0
@@ -234,16 +235,10 @@ store_ram_size:
234 /* Set ram size information */ 235 /* Set ram size information */
235 move.l #_sdata, _rambase 236 move.l #_sdata, _rambase
236 move.l #_ebss, _ramstart 237 move.l #_ebss, _ramstart
237 move.l #__ramend, %d0 238 move.l #RAMEND, %d0
238 sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/ 239 sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
239 move.l %d0, _ramend /* Different from __ramend.*/ 240 move.l %d0, _ramend /* Different from RAMEND.*/
240 241
241store_flash_size:
242 /* Set rom size information */
243 move.l #__rom_end, %d0
244 sub.l #__rom_start, %d0
245 move.l %d0, rom_length
246
247 pea 0 242 pea 0
248 pea env 243 pea env
249 pea %sp@(4) 244 pea %sp@(4)
@@ -286,7 +281,7 @@ _dprbase:
286 */ 281 */
287 282
288.section ".data.initvect","awx" 283.section ".data.initvect","awx"
289 .long __ramend /* Reset: Initial Stack Pointer - 0. */ 284 .long RAMEND /* Reset: Initial Stack Pointer - 0. */
290 .long _start /* Reset: Initial Program Counter - 1. */ 285 .long _start /* Reset: Initial Program Counter - 1. */
291 .long buserr /* Bus Error - 2. */ 286 .long buserr /* Bus Error - 2. */
292 .long trap /* Address Error - 3. */ 287 .long trap /* Address Error - 3. */
diff --git a/arch/m68knommu/platform/68360/head-rom.S b/arch/m68knommu/platform/68360/head-rom.S
index 0da357a4cfe..2d28c3e19a8 100644
--- a/arch/m68knommu/platform/68360/head-rom.S
+++ b/arch/m68knommu/platform/68360/head-rom.S
@@ -18,7 +18,6 @@
18.global _start 18.global _start
19 19
20.global _rambase 20.global _rambase
21.global __ramvec
22.global _ramvec 21.global _ramvec
23.global _ramstart 22.global _ramstart
24.global _ramend 23.global _ramend
@@ -26,6 +25,8 @@
26.global _quicc_base 25.global _quicc_base
27.global _periph_base 26.global _periph_base
28 27
28#define RAMEND (CONFIG_RAMBASE + CONFIG_RAMSIZE)
29
29#define REGB 0x1000 30#define REGB 0x1000
30#define PEPAR (_dprbase + REGB + 0x0016) 31#define PEPAR (_dprbase + REGB + 0x0016)
31#define GMR (_dprbase + REGB + 0x0040) 32#define GMR (_dprbase + REGB + 0x0040)
@@ -115,7 +116,7 @@ _stext:
115 nop 116 nop
116 ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */ 117 ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */
117 /* We should not need to setup the boot stack the reset should do it. */ 118 /* We should not need to setup the boot stack the reset should do it. */
118 movea.l #__ramend, %sp /* set up stack at the end of DRAM:*/ 119 movea.l #RAMEND, %sp /* set up stack at the end of DRAM:*/
119 120
120 121
121set_mbar_register: 122set_mbar_register:
@@ -245,16 +246,10 @@ store_ram_size:
245 /* Set ram size information */ 246 /* Set ram size information */
246 move.l #_sdata, _rambase 247 move.l #_sdata, _rambase
247 move.l #_ebss, _ramstart 248 move.l #_ebss, _ramstart
248 move.l #__ramend, %d0 249 move.l #RAMEND, %d0
249 sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/ 250 sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
250 move.l %d0, _ramend /* Different from __ramend.*/ 251 move.l %d0, _ramend /* Different from RAMEND.*/
251 252
252store_flash_size:
253 /* Set rom size information */
254 move.l #__rom_end, %d0
255 sub.l #__rom_start, %d0
256 move.l %d0, rom_length
257
258 pea 0 253 pea 0
259 pea env 254 pea env
260 pea %sp@(4) 255 pea %sp@(4)
@@ -298,7 +293,7 @@ _dprbase:
298 */ 293 */
299 294
300.section ".data.initvect","awx" 295.section ".data.initvect","awx"
301 .long __ramend /* Reset: Initial Stack Pointer - 0. */ 296 .long RAMEND /* Reset: Initial Stack Pointer - 0. */
302 .long _start /* Reset: Initial Program Counter - 1. */ 297 .long _start /* Reset: Initial Program Counter - 1. */
303 .long buserr /* Bus Error - 2. */ 298 .long buserr /* Bus Error - 2. */
304 .long trap /* Address Error - 3. */ 299 .long trap /* Address Error - 3. */
diff --git a/arch/m68knommu/platform/68360/ints.c b/arch/m68knommu/platform/68360/ints.c
index ba184db1651..0245fc4a478 100644
--- a/arch/m68knommu/platform/68360/ints.c
+++ b/arch/m68knommu/platform/68360/ints.c
@@ -20,6 +20,7 @@
20 20
21#include <asm/system.h> 21#include <asm/system.h>
22#include <asm/irq.h> 22#include <asm/irq.h>
23#include <asm/irqnode.h>
23#include <asm/traps.h> 24#include <asm/traps.h>
24#include <asm/io.h> 25#include <asm/io.h>
25#include <asm/machdep.h> 26#include <asm/machdep.h>
diff --git a/arch/m68knommu/platform/68EZ328/config.c b/arch/m68knommu/platform/68EZ328/config.c
index d8d56e5de31..15a14a67c2b 100644
--- a/arch/m68knommu/platform/68EZ328/config.c
+++ b/arch/m68knommu/platform/68EZ328/config.c
@@ -42,13 +42,13 @@ void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int
42void m68ez328_reset(void) 42void m68ez328_reset(void)
43{ 43{
44 local_irq_disable(); 44 local_irq_disable();
45 asm volatile (" 45 asm volatile (
46 moveal #0x10c00000, %a0; 46 "moveal #0x10c00000, %a0;\n"
47 moveb #0, 0xFFFFF300; 47 "moveb #0, 0xFFFFF300;\n"
48 moveal 0(%a0), %sp; 48 "moveal 0(%a0), %sp;\n"
49 moveal 4(%a0), %a0; 49 "moveal 4(%a0), %a0;\n"
50 jmp (%a0); 50 "jmp (%a0);\n"
51 "); 51 );
52} 52}
53 53
54/***************************************************************************/ 54/***************************************************************************/
diff --git a/arch/m68knommu/platform/68VZ328/config.c b/arch/m68knommu/platform/68VZ328/config.c
index d926524cdf8..4058de5c8fa 100644
--- a/arch/m68knommu/platform/68VZ328/config.c
+++ b/arch/m68knommu/platform/68VZ328/config.c
@@ -141,13 +141,13 @@ static void init_hardware(char *command, int size)
141static void m68vz328_reset(void) 141static void m68vz328_reset(void)
142{ 142{
143 local_irq_disable(); 143 local_irq_disable();
144 asm volatile (" 144 asm volatile (
145 moveal #0x10c00000, %a0; 145 "moveal #0x10c00000, %a0;\n\t"
146 moveb #0, 0xFFFFF300; 146 "moveb #0, 0xFFFFF300;\n\t"
147 moveal 0(%a0), %sp; 147 "moveal 0(%a0), %sp;\n\t"
148 moveal 4(%a0), %a0; 148 "moveal 4(%a0), %a0;\n\t"
149 jmp (%a0); 149 "jmp (%a0);\n"
150 "); 150 );
151} 151}
152 152
153unsigned char *cs8900a_hwaddr; 153unsigned char *cs8900a_hwaddr;
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 35e038a974c..08c2ece4ae4 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1618,6 +1618,11 @@ config GENERIC_IRQ_PROBE
1618 bool 1618 bool
1619 default y 1619 default y
1620 1620
1621config IRQ_PER_CPU
1622 depends on SMP
1623 bool
1624 default y
1625
1621# 1626#
1622# - Highmem only makes sense for the 32-bit kernel. 1627# - Highmem only makes sense for the 32-bit kernel.
1623# - The current highmem code will only work properly on physically indexed 1628# - The current highmem code will only work properly on physically indexed
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c
index afe05ec12c2..da74ac21954 100644
--- a/arch/mips/au1000/common/irq.c
+++ b/arch/mips/au1000/common/irq.c
@@ -333,31 +333,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req)
333 au_writel(1<<(irq_nr-32), IC1_CFG2CLR); 333 au_writel(1<<(irq_nr-32), IC1_CFG2CLR);
334 au_writel(1<<(irq_nr-32), IC1_CFG1CLR); 334 au_writel(1<<(irq_nr-32), IC1_CFG1CLR);
335 au_writel(1<<(irq_nr-32), IC1_CFG0SET); 335 au_writel(1<<(irq_nr-32), IC1_CFG0SET);
336 irq_desc[irq_nr].handler = &rise_edge_irq_type; 336 irq_desc[irq_nr].chip = &rise_edge_irq_type;
337 break; 337 break;
338 case INTC_INT_FALL_EDGE: /* 0:1:0 */ 338 case INTC_INT_FALL_EDGE: /* 0:1:0 */
339 au_writel(1<<(irq_nr-32), IC1_CFG2CLR); 339 au_writel(1<<(irq_nr-32), IC1_CFG2CLR);
340 au_writel(1<<(irq_nr-32), IC1_CFG1SET); 340 au_writel(1<<(irq_nr-32), IC1_CFG1SET);
341 au_writel(1<<(irq_nr-32), IC1_CFG0CLR); 341 au_writel(1<<(irq_nr-32), IC1_CFG0CLR);
342 irq_desc[irq_nr].handler = &fall_edge_irq_type; 342 irq_desc[irq_nr].chip = &fall_edge_irq_type;
343 break; 343 break;
344 case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ 344 case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */
345 au_writel(1<<(irq_nr-32), IC1_CFG2CLR); 345 au_writel(1<<(irq_nr-32), IC1_CFG2CLR);
346 au_writel(1<<(irq_nr-32), IC1_CFG1SET); 346 au_writel(1<<(irq_nr-32), IC1_CFG1SET);
347 au_writel(1<<(irq_nr-32), IC1_CFG0SET); 347 au_writel(1<<(irq_nr-32), IC1_CFG0SET);
348 irq_desc[irq_nr].handler = &either_edge_irq_type; 348 irq_desc[irq_nr].chip = &either_edge_irq_type;
349 break; 349 break;
350 case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ 350 case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
351 au_writel(1<<(irq_nr-32), IC1_CFG2SET); 351 au_writel(1<<(irq_nr-32), IC1_CFG2SET);
352 au_writel(1<<(irq_nr-32), IC1_CFG1CLR); 352 au_writel(1<<(irq_nr-32), IC1_CFG1CLR);
353 au_writel(1<<(irq_nr-32), IC1_CFG0SET); 353 au_writel(1<<(irq_nr-32), IC1_CFG0SET);
354 irq_desc[irq_nr].handler = &level_irq_type; 354 irq_desc[irq_nr].chip = &level_irq_type;
355 break; 355 break;
356 case INTC_INT_LOW_LEVEL: /* 1:1:0 */ 356 case INTC_INT_LOW_LEVEL: /* 1:1:0 */
357 au_writel(1<<(irq_nr-32), IC1_CFG2SET); 357 au_writel(1<<(irq_nr-32), IC1_CFG2SET);
358 au_writel(1<<(irq_nr-32), IC1_CFG1SET); 358 au_writel(1<<(irq_nr-32), IC1_CFG1SET);
359 au_writel(1<<(irq_nr-32), IC1_CFG0CLR); 359 au_writel(1<<(irq_nr-32), IC1_CFG0CLR);
360 irq_desc[irq_nr].handler = &level_irq_type; 360 irq_desc[irq_nr].chip = &level_irq_type;
361 break; 361 break;
362 case INTC_INT_DISABLED: /* 0:0:0 */ 362 case INTC_INT_DISABLED: /* 0:0:0 */
363 au_writel(1<<(irq_nr-32), IC1_CFG0CLR); 363 au_writel(1<<(irq_nr-32), IC1_CFG0CLR);
@@ -385,31 +385,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req)
385 au_writel(1<<irq_nr, IC0_CFG2CLR); 385 au_writel(1<<irq_nr, IC0_CFG2CLR);
386 au_writel(1<<irq_nr, IC0_CFG1CLR); 386 au_writel(1<<irq_nr, IC0_CFG1CLR);
387 au_writel(1<<irq_nr, IC0_CFG0SET); 387 au_writel(1<<irq_nr, IC0_CFG0SET);
388 irq_desc[irq_nr].handler = &rise_edge_irq_type; 388 irq_desc[irq_nr].chip = &rise_edge_irq_type;
389 break; 389 break;
390 case INTC_INT_FALL_EDGE: /* 0:1:0 */ 390 case INTC_INT_FALL_EDGE: /* 0:1:0 */
391 au_writel(1<<irq_nr, IC0_CFG2CLR); 391 au_writel(1<<irq_nr, IC0_CFG2CLR);
392 au_writel(1<<irq_nr, IC0_CFG1SET); 392 au_writel(1<<irq_nr, IC0_CFG1SET);
393 au_writel(1<<irq_nr, IC0_CFG0CLR); 393 au_writel(1<<irq_nr, IC0_CFG0CLR);
394 irq_desc[irq_nr].handler = &fall_edge_irq_type; 394 irq_desc[irq_nr].chip = &fall_edge_irq_type;
395 break; 395 break;
396 case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */ 396 case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */
397 au_writel(1<<irq_nr, IC0_CFG2CLR); 397 au_writel(1<<irq_nr, IC0_CFG2CLR);
398 au_writel(1<<irq_nr, IC0_CFG1SET); 398 au_writel(1<<irq_nr, IC0_CFG1SET);
399 au_writel(1<<irq_nr, IC0_CFG0SET); 399 au_writel(1<<irq_nr, IC0_CFG0SET);
400 irq_desc[irq_nr].handler = &either_edge_irq_type; 400 irq_desc[irq_nr].chip = &either_edge_irq_type;
401 break; 401 break;
402 case INTC_INT_HIGH_LEVEL: /* 1:0:1 */ 402 case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
403 au_writel(1<<irq_nr, IC0_CFG2SET); 403 au_writel(1<<irq_nr, IC0_CFG2SET);
404 au_writel(1<<irq_nr, IC0_CFG1CLR); 404 au_writel(1<<irq_nr, IC0_CFG1CLR);
405 au_writel(1<<irq_nr, IC0_CFG0SET); 405 au_writel(1<<irq_nr, IC0_CFG0SET);
406 irq_desc[irq_nr].handler = &level_irq_type; 406 irq_desc[irq_nr].chip = &level_irq_type;
407 break; 407 break;
408 case INTC_INT_LOW_LEVEL: /* 1:1:0 */ 408 case INTC_INT_LOW_LEVEL: /* 1:1:0 */
409 au_writel(1<<irq_nr, IC0_CFG2SET); 409 au_writel(1<<irq_nr, IC0_CFG2SET);
410 au_writel(1<<irq_nr, IC0_CFG1SET); 410 au_writel(1<<irq_nr, IC0_CFG1SET);
411 au_writel(1<<irq_nr, IC0_CFG0CLR); 411 au_writel(1<<irq_nr, IC0_CFG0CLR);
412 irq_desc[irq_nr].handler = &level_irq_type; 412 irq_desc[irq_nr].chip = &level_irq_type;
413 break; 413 break;
414 case INTC_INT_DISABLED: /* 0:0:0 */ 414 case INTC_INT_DISABLED: /* 0:0:0 */
415 au_writel(1<<irq_nr, IC0_CFG0CLR); 415 au_writel(1<<irq_nr, IC0_CFG0CLR);
diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c
index bacc0c6bfe6..5dd164fc188 100644
--- a/arch/mips/au1000/pb1200/irqmap.c
+++ b/arch/mips/au1000/pb1200/irqmap.c
@@ -172,7 +172,7 @@ void _board_init_irq(void)
172 172
173 for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++) 173 for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
174 { 174 {
175 irq_desc[irq_nr].handler = &external_irq_type; 175 irq_desc[irq_nr].chip = &external_irq_type;
176 pb1200_disable_irq(irq_nr); 176 pb1200_disable_irq(irq_nr);
177 } 177 }
178 178
diff --git a/arch/mips/ddb5xxx/ddb5477/irq_5477.c b/arch/mips/ddb5xxx/ddb5477/irq_5477.c
index 5fcd5f070cd..63c3d6534b3 100644
--- a/arch/mips/ddb5xxx/ddb5477/irq_5477.c
+++ b/arch/mips/ddb5xxx/ddb5477/irq_5477.c
@@ -107,7 +107,7 @@ void __init vrc5477_irq_init(u32 irq_base)
107 irq_desc[i].status = IRQ_DISABLED; 107 irq_desc[i].status = IRQ_DISABLED;
108 irq_desc[i].action = NULL; 108 irq_desc[i].action = NULL;
109 irq_desc[i].depth = 1; 109 irq_desc[i].depth = 1;
110 irq_desc[i].handler = &vrc5477_irq_controller; 110 irq_desc[i].chip = &vrc5477_irq_controller;
111 } 111 }
112 112
113 vrc5477_irq_base = irq_base; 113 vrc5477_irq_base = irq_base;
diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c
index d5bca5d233b..da2dbb42f91 100644
--- a/arch/mips/dec/ioasic-irq.c
+++ b/arch/mips/dec/ioasic-irq.c
@@ -144,13 +144,13 @@ void __init init_ioasic_irqs(int base)
144 irq_desc[i].status = IRQ_DISABLED; 144 irq_desc[i].status = IRQ_DISABLED;
145 irq_desc[i].action = 0; 145 irq_desc[i].action = 0;
146 irq_desc[i].depth = 1; 146 irq_desc[i].depth = 1;
147 irq_desc[i].handler = &ioasic_irq_type; 147 irq_desc[i].chip = &ioasic_irq_type;
148 } 148 }
149 for (; i < base + IO_IRQ_LINES; i++) { 149 for (; i < base + IO_IRQ_LINES; i++) {
150 irq_desc[i].status = IRQ_DISABLED; 150 irq_desc[i].status = IRQ_DISABLED;
151 irq_desc[i].action = 0; 151 irq_desc[i].action = 0;
152 irq_desc[i].depth = 1; 152 irq_desc[i].depth = 1;
153 irq_desc[i].handler = &ioasic_dma_irq_type; 153 irq_desc[i].chip = &ioasic_dma_irq_type;
154 } 154 }
155 155
156 ioasic_irq_base = base; 156 ioasic_irq_base = base;
diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c
index 898bed502a3..d44c00d9e80 100644
--- a/arch/mips/dec/kn02-irq.c
+++ b/arch/mips/dec/kn02-irq.c
@@ -123,7 +123,7 @@ void __init init_kn02_irqs(int base)
123 irq_desc[i].status = IRQ_DISABLED; 123 irq_desc[i].status = IRQ_DISABLED;
124 irq_desc[i].action = 0; 124 irq_desc[i].action = 0;
125 irq_desc[i].depth = 1; 125 irq_desc[i].depth = 1;
126 irq_desc[i].handler = &kn02_irq_type; 126 irq_desc[i].chip = &kn02_irq_type;
127 } 127 }
128 128
129 kn02_irq_base = base; 129 kn02_irq_base = base;
diff --git a/arch/mips/gt64120/ev64120/irq.c b/arch/mips/gt64120/ev64120/irq.c
index 46c468b26b3..f489a8067a9 100644
--- a/arch/mips/gt64120/ev64120/irq.c
+++ b/arch/mips/gt64120/ev64120/irq.c
@@ -138,7 +138,7 @@ void __init arch_init_irq(void)
138 /* Let's initialize our IRQ descriptors */ 138 /* Let's initialize our IRQ descriptors */
139 for (i = 0; i < NR_IRQS; i++) { 139 for (i = 0; i < NR_IRQS; i++) {
140 irq_desc[i].status = 0; 140 irq_desc[i].status = 0;
141 irq_desc[i].handler = &no_irq_type; 141 irq_desc[i].chip = &no_irq_type;
142 irq_desc[i].action = NULL; 142 irq_desc[i].action = NULL;
143 irq_desc[i].depth = 0; 143 irq_desc[i].depth = 0;
144 spin_lock_init(&irq_desc[i].lock); 144 spin_lock_init(&irq_desc[i].lock);
diff --git a/arch/mips/ite-boards/generic/irq.c b/arch/mips/ite-boards/generic/irq.c
index 77be7216bdd..a6749c56fe3 100644
--- a/arch/mips/ite-boards/generic/irq.c
+++ b/arch/mips/ite-boards/generic/irq.c
@@ -208,10 +208,10 @@ void __init arch_init_irq(void)
208#endif 208#endif
209 209
210 for (i = 0; i <= IT8172_LAST_IRQ; i++) { 210 for (i = 0; i <= IT8172_LAST_IRQ; i++) {
211 irq_desc[i].handler = &it8172_irq_type; 211 irq_desc[i].chip = &it8172_irq_type;
212 spin_lock_init(&irq_desc[i].lock); 212 spin_lock_init(&irq_desc[i].lock);
213 } 213 }
214 irq_desc[MIPS_CPU_TIMER_IRQ].handler = &cp0_irq_type; 214 irq_desc[MIPS_CPU_TIMER_IRQ].chip = &cp0_irq_type;
215 set_c0_status(ALLINTS_NOTIMER); 215 set_c0_status(ALLINTS_NOTIMER);
216} 216}
217 217
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
index becc9accd49..478be9858a1 100644
--- a/arch/mips/jazz/irq.c
+++ b/arch/mips/jazz/irq.c
@@ -73,7 +73,7 @@ void __init init_r4030_ints(void)
73 irq_desc[i].status = IRQ_DISABLED; 73 irq_desc[i].status = IRQ_DISABLED;
74 irq_desc[i].action = 0; 74 irq_desc[i].action = 0;
75 irq_desc[i].depth = 1; 75 irq_desc[i].depth = 1;
76 irq_desc[i].handler = &r4030_irq_type; 76 irq_desc[i].chip = &r4030_irq_type;
77 } 77 }
78 78
79 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); 79 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0);
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c
index 11304d1354f..380046ea1db 100644
--- a/arch/mips/jmr3927/rbhma3100/irq.c
+++ b/arch/mips/jmr3927/rbhma3100/irq.c
@@ -435,7 +435,7 @@ void jmr3927_irq_init(u32 irq_base)
435 irq_desc[i].status = IRQ_DISABLED; 435 irq_desc[i].status = IRQ_DISABLED;
436 irq_desc[i].action = NULL; 436 irq_desc[i].action = NULL;
437 irq_desc[i].depth = 1; 437 irq_desc[i].depth = 1;
438 irq_desc[i].handler = &jmr3927_irq_controller; 438 irq_desc[i].chip = &jmr3927_irq_controller;
439 } 439 }
440 440
441 jmr3927_irq_base = irq_base; 441 jmr3927_irq_base = irq_base;
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 0cb8ed5662f..91ffb1233ca 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -120,7 +120,7 @@ int i8259A_irq_pending(unsigned int irq)
120void make_8259A_irq(unsigned int irq) 120void make_8259A_irq(unsigned int irq)
121{ 121{
122 disable_irq_nosync(irq); 122 disable_irq_nosync(irq);
123 irq_desc[irq].handler = &i8259A_irq_type; 123 irq_desc[irq].chip = &i8259A_irq_type;
124 enable_irq(irq); 124 enable_irq(irq);
125} 125}
126 126
@@ -327,7 +327,7 @@ void __init init_i8259_irqs (void)
327 irq_desc[i].status = IRQ_DISABLED; 327 irq_desc[i].status = IRQ_DISABLED;
328 irq_desc[i].action = NULL; 328 irq_desc[i].action = NULL;
329 irq_desc[i].depth = 1; 329 irq_desc[i].depth = 1;
330 irq_desc[i].handler = &i8259A_irq_type; 330 irq_desc[i].chip = &i8259A_irq_type;
331 } 331 }
332 332
333 setup_irq(2, &irq2); 333 setup_irq(2, &irq2);
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 97ebdc754b9..f8cd1ac64d8 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -174,14 +174,14 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq)
174 174
175 switch (imp->im_type) { 175 switch (imp->im_type) {
176 case MSC01_IRQ_EDGE: 176 case MSC01_IRQ_EDGE:
177 irq_desc[base+n].handler = &msc_edgeirq_type; 177 irq_desc[base+n].chip = &msc_edgeirq_type;
178 if (cpu_has_veic) 178 if (cpu_has_veic)
179 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); 179 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT);
180 else 180 else
181 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); 181 MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl);
182 break; 182 break;
183 case MSC01_IRQ_LEVEL: 183 case MSC01_IRQ_LEVEL:
184 irq_desc[base+n].handler = &msc_levelirq_type; 184 irq_desc[base+n].chip = &msc_levelirq_type;
185 if (cpu_has_veic) 185 if (cpu_has_veic)
186 MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); 186 MSCIC_WRITE(MSC01_IC_SUP+n*8, 0);
187 else 187 else
diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c
index 0613f1f36b1..f9c763a6554 100644
--- a/arch/mips/kernel/irq-mv6434x.c
+++ b/arch/mips/kernel/irq-mv6434x.c
@@ -155,7 +155,7 @@ void __init mv64340_irq_init(unsigned int base)
155 irq_desc[i].status = IRQ_DISABLED; 155 irq_desc[i].status = IRQ_DISABLED;
156 irq_desc[i].action = 0; 156 irq_desc[i].action = 0;
157 irq_desc[i].depth = 2; 157 irq_desc[i].depth = 2;
158 irq_desc[i].handler = &mv64340_irq_type; 158 irq_desc[i].chip = &mv64340_irq_type;
159 } 159 }
160 160
161 irq_base = base; 161 irq_base = base;
diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c
index 0b130c5ac5d..121da385a94 100644
--- a/arch/mips/kernel/irq-rm7000.c
+++ b/arch/mips/kernel/irq-rm7000.c
@@ -91,7 +91,7 @@ void __init rm7k_cpu_irq_init(int base)
91 irq_desc[i].status = IRQ_DISABLED; 91 irq_desc[i].status = IRQ_DISABLED;
92 irq_desc[i].action = NULL; 92 irq_desc[i].action = NULL;
93 irq_desc[i].depth = 1; 93 irq_desc[i].depth = 1;
94 irq_desc[i].handler = &rm7k_irq_controller; 94 irq_desc[i].chip = &rm7k_irq_controller;
95 } 95 }
96 96
97 irq_base = base; 97 irq_base = base;
diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c
index 9b5f20c32ac..25109c103e4 100644
--- a/arch/mips/kernel/irq-rm9000.c
+++ b/arch/mips/kernel/irq-rm9000.c
@@ -139,11 +139,11 @@ void __init rm9k_cpu_irq_init(int base)
139 irq_desc[i].status = IRQ_DISABLED; 139 irq_desc[i].status = IRQ_DISABLED;
140 irq_desc[i].action = NULL; 140 irq_desc[i].action = NULL;
141 irq_desc[i].depth = 1; 141 irq_desc[i].depth = 1;
142 irq_desc[i].handler = &rm9k_irq_controller; 142 irq_desc[i].chip = &rm9k_irq_controller;
143 } 143 }
144 144
145 rm9000_perfcount_irq = base + 1; 145 rm9000_perfcount_irq = base + 1;
146 irq_desc[rm9000_perfcount_irq].handler = &rm9k_perfcounter_irq; 146 irq_desc[rm9000_perfcount_irq].chip = &rm9k_perfcounter_irq;
147 147
148 irq_base = base; 148 irq_base = base;
149} 149}
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index 3dce742e716..5c9dcd5eed5 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -95,7 +95,7 @@ int show_interrupts(struct seq_file *p, void *v)
95 for_each_online_cpu(j) 95 for_each_online_cpu(j)
96 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 96 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
97#endif 97#endif
98 seq_printf(p, " %14s", irq_desc[i].handler->typename); 98 seq_printf(p, " %14s", irq_desc[i].chip->typename);
99 seq_printf(p, " %s", action->name); 99 seq_printf(p, " %s", action->name);
100 100
101 for (action=action->next; action; action = action->next) 101 for (action=action->next; action; action = action->next)
@@ -137,7 +137,7 @@ void __init init_IRQ(void)
137 irq_desc[i].status = IRQ_DISABLED; 137 irq_desc[i].status = IRQ_DISABLED;
138 irq_desc[i].action = NULL; 138 irq_desc[i].action = NULL;
139 irq_desc[i].depth = 1; 139 irq_desc[i].depth = 1;
140 irq_desc[i].handler = &no_irq_type; 140 irq_desc[i].chip = &no_irq_type;
141 spin_lock_init(&irq_desc[i].lock); 141 spin_lock_init(&irq_desc[i].lock);
142#ifdef CONFIG_MIPS_MT_SMTC 142#ifdef CONFIG_MIPS_MT_SMTC
143 irq_hwmask[i] = 0; 143 irq_hwmask[i] = 0;
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 5db67e31ec1..0e455a8ad86 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -167,14 +167,14 @@ void __init mips_cpu_irq_init(int irq_base)
167 irq_desc[i].status = IRQ_DISABLED; 167 irq_desc[i].status = IRQ_DISABLED;
168 irq_desc[i].action = NULL; 168 irq_desc[i].action = NULL;
169 irq_desc[i].depth = 1; 169 irq_desc[i].depth = 1;
170 irq_desc[i].handler = &mips_mt_cpu_irq_controller; 170 irq_desc[i].chip = &mips_mt_cpu_irq_controller;
171 } 171 }
172 172
173 for (i = irq_base + 2; i < irq_base + 8; i++) { 173 for (i = irq_base + 2; i < irq_base + 8; i++) {
174 irq_desc[i].status = IRQ_DISABLED; 174 irq_desc[i].status = IRQ_DISABLED;
175 irq_desc[i].action = NULL; 175 irq_desc[i].action = NULL;
176 irq_desc[i].depth = 1; 176 irq_desc[i].depth = 1;
177 irq_desc[i].handler = &mips_cpu_irq_controller; 177 irq_desc[i].chip = &mips_cpu_irq_controller;
178 } 178 }
179 179
180 mips_cpu_irq_base = irq_base; 180 mips_cpu_irq_base = irq_base;
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 298f82fe844..9096a5ea422 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -446,7 +446,7 @@ static int __init topology_init(void)
446 int ret; 446 int ret;
447 447
448 for_each_present_cpu(cpu) { 448 for_each_present_cpu(cpu) {
449 ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL); 449 ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu);
450 if (ret) 450 if (ret)
451 printk(KERN_WARNING "topology_init: register_cpu %d " 451 printk(KERN_WARNING "topology_init: register_cpu %d "
452 "failed (%d)\n", cpu, ret); 452 "failed (%d)\n", cpu, ret);
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 2e8e52c135e..70cf09afdf5 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -367,7 +367,7 @@ void mipsmt_prepare_cpus(void)
367 dvpe(); 367 dvpe();
368 dmt(); 368 dmt();
369 369
370 freeIPIq.lock = SPIN_LOCK_UNLOCKED; 370 spin_lock_init(&freeIPIq.lock);
371 371
372 /* 372 /*
373 * We probably don't have as many VPEs as we do SMP "CPUs", 373 * We probably don't have as many VPEs as we do SMP "CPUs",
@@ -375,7 +375,7 @@ void mipsmt_prepare_cpus(void)
375 */ 375 */
376 for (i=0; i<NR_CPUS; i++) { 376 for (i=0; i<NR_CPUS; i++) {
377 IPIQ[i].head = IPIQ[i].tail = NULL; 377 IPIQ[i].head = IPIQ[i].tail = NULL;
378 IPIQ[i].lock = SPIN_LOCK_UNLOCKED; 378 spin_lock_init(&IPIQ[i].lock);
379 IPIQ[i].depth = 0; 379 IPIQ[i].depth = 0;
380 ipi_timer_latch[i] = 0; 380 ipi_timer_latch[i] = 0;
381 } 381 }
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c
index 2d3472b21eb..9316a024a81 100644
--- a/arch/mips/lasat/interrupt.c
+++ b/arch/mips/lasat/interrupt.c
@@ -156,6 +156,6 @@ void __init arch_init_irq(void)
156 irq_desc[i].status = IRQ_DISABLED; 156 irq_desc[i].status = IRQ_DISABLED;
157 irq_desc[i].action = 0; 157 irq_desc[i].action = 0;
158 irq_desc[i].depth = 1; 158 irq_desc[i].depth = 1;
159 irq_desc[i].handler = &lasat_irq_type; 159 irq_desc[i].chip = &lasat_irq_type;
160 } 160 }
161} 161}
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c
index db53950b7cf..9dd6b892558 100644
--- a/arch/mips/mips-boards/atlas/atlas_int.c
+++ b/arch/mips/mips-boards/atlas/atlas_int.c
@@ -215,7 +215,7 @@ void __init arch_init_irq(void)
215 irq_desc[i].status = IRQ_DISABLED; 215 irq_desc[i].status = IRQ_DISABLED;
216 irq_desc[i].action = 0; 216 irq_desc[i].action = 0;
217 irq_desc[i].depth = 1; 217 irq_desc[i].depth = 1;
218 irq_desc[i].handler = &atlas_irq_type; 218 irq_desc[i].chip = &atlas_irq_type;
219 spin_lock_init(&irq_desc[i].lock); 219 spin_lock_init(&irq_desc[i].lock);
220 } 220 }
221} 221}
diff --git a/arch/mips/momentum/ocelot_c/cpci-irq.c b/arch/mips/momentum/ocelot_c/cpci-irq.c
index bd885785e2f..31d179c4673 100644
--- a/arch/mips/momentum/ocelot_c/cpci-irq.c
+++ b/arch/mips/momentum/ocelot_c/cpci-irq.c
@@ -147,6 +147,6 @@ void cpci_irq_init(void)
147 irq_desc[i].status = IRQ_DISABLED; 147 irq_desc[i].status = IRQ_DISABLED;
148 irq_desc[i].action = 0; 148 irq_desc[i].action = 0;
149 irq_desc[i].depth = 2; 149 irq_desc[i].depth = 2;
150 irq_desc[i].handler = &cpci_irq_type; 150 irq_desc[i].chip = &cpci_irq_type;
151 } 151 }
152} 152}
diff --git a/arch/mips/momentum/ocelot_c/uart-irq.c b/arch/mips/momentum/ocelot_c/uart-irq.c
index 755bde5146b..852265026fd 100644
--- a/arch/mips/momentum/ocelot_c/uart-irq.c
+++ b/arch/mips/momentum/ocelot_c/uart-irq.c
@@ -137,10 +137,10 @@ void uart_irq_init(void)
137 irq_desc[80].status = IRQ_DISABLED; 137 irq_desc[80].status = IRQ_DISABLED;
138 irq_desc[80].action = 0; 138 irq_desc[80].action = 0;
139 irq_desc[80].depth = 2; 139 irq_desc[80].depth = 2;
140 irq_desc[80].handler = &uart_irq_type; 140 irq_desc[80].chip = &uart_irq_type;
141 141
142 irq_desc[81].status = IRQ_DISABLED; 142 irq_desc[81].status = IRQ_DISABLED;
143 irq_desc[81].action = 0; 143 irq_desc[81].action = 0;
144 irq_desc[81].depth = 2; 144 irq_desc[81].depth = 2;
145 irq_desc[81].handler = &uart_irq_type; 145 irq_desc[81].chip = &uart_irq_type;
146} 146}
diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c
index 39ee6314f62..8f18764a235 100644
--- a/arch/mips/philips/pnx8550/common/int.c
+++ b/arch/mips/philips/pnx8550/common/int.c
@@ -236,7 +236,7 @@ void __init arch_init_irq(void)
236 int configPR; 236 int configPR;
237 237
238 for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) { 238 for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) {
239 irq_desc[i].handler = &level_irq_type; 239 irq_desc[i].chip = &level_irq_type;
240 pnx8550_ack(i); /* mask the irq just in case */ 240 pnx8550_ack(i); /* mask the irq just in case */
241 } 241 }
242 242
@@ -273,7 +273,7 @@ void __init arch_init_irq(void)
273 /* mask/priority is still 0 so we will not get any 273 /* mask/priority is still 0 so we will not get any
274 * interrupts until it is unmasked */ 274 * interrupts until it is unmasked */
275 275
276 irq_desc[i].handler = &level_irq_type; 276 irq_desc[i].chip = &level_irq_type;
277 } 277 }
278 278
279 /* Priority level 0 */ 279 /* Priority level 0 */
@@ -282,12 +282,12 @@ void __init arch_init_irq(void)
282 /* Set int vector table address */ 282 /* Set int vector table address */
283 PNX8550_GIC_VECTOR_0 = PNX8550_GIC_VECTOR_1 = 0; 283 PNX8550_GIC_VECTOR_0 = PNX8550_GIC_VECTOR_1 = 0;
284 284
285 irq_desc[MIPS_CPU_GIC_IRQ].handler = &level_irq_type; 285 irq_desc[MIPS_CPU_GIC_IRQ].chip = &level_irq_type;
286 setup_irq(MIPS_CPU_GIC_IRQ, &gic_action); 286 setup_irq(MIPS_CPU_GIC_IRQ, &gic_action);
287 287
288 /* init of Timer interrupts */ 288 /* init of Timer interrupts */
289 for (i = PNX8550_INT_TIMER_MIN; i <= PNX8550_INT_TIMER_MAX; i++) { 289 for (i = PNX8550_INT_TIMER_MIN; i <= PNX8550_INT_TIMER_MAX; i++) {
290 irq_desc[i].handler = &level_irq_type; 290 irq_desc[i].chip = &level_irq_type;
291 } 291 }
292 292
293 /* Stop Timer 1-3 */ 293 /* Stop Timer 1-3 */
@@ -295,7 +295,7 @@ void __init arch_init_irq(void)
295 configPR |= 0x00000038; 295 configPR |= 0x00000038;
296 write_c0_config7(configPR); 296 write_c0_config7(configPR);
297 297
298 irq_desc[MIPS_CPU_TIMER_IRQ].handler = &level_irq_type; 298 irq_desc[MIPS_CPU_TIMER_IRQ].chip = &level_irq_type;
299 setup_irq(MIPS_CPU_TIMER_IRQ, &timer_action); 299 setup_irq(MIPS_CPU_TIMER_IRQ, &timer_action);
300} 300}
301 301
diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c
index b19820110aa..989167b49ce 100644
--- a/arch/mips/sgi-ip22/ip22-eisa.c
+++ b/arch/mips/sgi-ip22/ip22-eisa.c
@@ -279,9 +279,9 @@ int __init ip22_eisa_init(void)
279 irq_desc[i].action = 0; 279 irq_desc[i].action = 0;
280 irq_desc[i].depth = 1; 280 irq_desc[i].depth = 1;
281 if (i < (SGINT_EISA + 8)) 281 if (i < (SGINT_EISA + 8))
282 irq_desc[i].handler = &ip22_eisa1_irq_type; 282 irq_desc[i].chip = &ip22_eisa1_irq_type;
283 else 283 else
284 irq_desc[i].handler = &ip22_eisa2_irq_type; 284 irq_desc[i].chip = &ip22_eisa2_irq_type;
285 } 285 }
286 286
287 /* Cannot use request_irq because of kmalloc not being ready at such 287 /* Cannot use request_irq because of kmalloc not being ready at such
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
index fc6a7e2b189..18906af6969 100644
--- a/arch/mips/sgi-ip22/ip22-int.c
+++ b/arch/mips/sgi-ip22/ip22-int.c
@@ -436,7 +436,7 @@ void __init arch_init_irq(void)
436 irq_desc[i].status = IRQ_DISABLED; 436 irq_desc[i].status = IRQ_DISABLED;
437 irq_desc[i].action = 0; 437 irq_desc[i].action = 0;
438 irq_desc[i].depth = 1; 438 irq_desc[i].depth = 1;
439 irq_desc[i].handler = handler; 439 irq_desc[i].chip = handler;
440 } 440 }
441 441
442 /* vector handler. this register the IRQ as non-sharable */ 442 /* vector handler. this register the IRQ as non-sharable */
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index 0b61a39ce2b..869566c360a 100644
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -386,7 +386,7 @@ void __devinit register_bridge_irq(unsigned int irq)
386 irq_desc[irq].status = IRQ_DISABLED; 386 irq_desc[irq].status = IRQ_DISABLED;
387 irq_desc[irq].action = 0; 387 irq_desc[irq].action = 0;
388 irq_desc[irq].depth = 1; 388 irq_desc[irq].depth = 1;
389 irq_desc[irq].handler = &bridge_irq_type; 389 irq_desc[irq].chip = &bridge_irq_type;
390} 390}
391 391
392int __devinit request_bridge_irq(struct bridge_controller *bc) 392int __devinit request_bridge_irq(struct bridge_controller *bc)
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
index 8ba08047d16..00b94aaf637 100644
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -591,7 +591,7 @@ void __init arch_init_irq(void)
591 irq_desc[irq].status = IRQ_DISABLED; 591 irq_desc[irq].status = IRQ_DISABLED;
592 irq_desc[irq].action = 0; 592 irq_desc[irq].action = 0;
593 irq_desc[irq].depth = 0; 593 irq_desc[irq].depth = 0;
594 irq_desc[irq].handler = controller; 594 irq_desc[irq].chip = controller;
595 } 595 }
596 setup_irq(CRIME_MEMERR_IRQ, &memerr_irq); 596 setup_irq(CRIME_MEMERR_IRQ, &memerr_irq);
597 setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq); 597 setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq);
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index e61760b14d9..610df40cb82 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -276,10 +276,10 @@ void __init init_bcm1480_irqs(void)
276 irq_desc[i].action = 0; 276 irq_desc[i].action = 0;
277 irq_desc[i].depth = 1; 277 irq_desc[i].depth = 1;
278 if (i < BCM1480_NR_IRQS) { 278 if (i < BCM1480_NR_IRQS) {
279 irq_desc[i].handler = &bcm1480_irq_type; 279 irq_desc[i].chip = &bcm1480_irq_type;
280 bcm1480_irq_owner[i] = 0; 280 bcm1480_irq_owner[i] = 0;
281 } else { 281 } else {
282 irq_desc[i].handler = &no_irq_type; 282 irq_desc[i].chip = &no_irq_type;
283 } 283 }
284 } 284 }
285} 285}
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index f853c32f60a..fcc61940f1f 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -246,10 +246,10 @@ void __init init_sb1250_irqs(void)
246 irq_desc[i].action = 0; 246 irq_desc[i].action = 0;
247 irq_desc[i].depth = 1; 247 irq_desc[i].depth = 1;
248 if (i < SB1250_NR_IRQS) { 248 if (i < SB1250_NR_IRQS) {
249 irq_desc[i].handler = &sb1250_irq_type; 249 irq_desc[i].chip = &sb1250_irq_type;
250 sb1250_irq_owner[i] = 0; 250 sb1250_irq_owner[i] = 0;
251 } else { 251 } else {
252 irq_desc[i].handler = &no_irq_type; 252 irq_desc[i].chip = &no_irq_type;
253 } 253 }
254 } 254 }
255} 255}
diff --git a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c
index 7365b4853dd..c19e158ec40 100644
--- a/arch/mips/sni/irq.c
+++ b/arch/mips/sni/irq.c
@@ -203,7 +203,7 @@ void __init arch_init_irq(void)
203 irq_desc[i].status = IRQ_DISABLED; 203 irq_desc[i].status = IRQ_DISABLED;
204 irq_desc[i].action = 0; 204 irq_desc[i].action = 0;
205 irq_desc[i].depth = 1; 205 irq_desc[i].depth = 1;
206 irq_desc[i].handler = &pciasic_irq_type; 206 irq_desc[i].chip = &pciasic_irq_type;
207 } 207 }
208 208
209 change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ2|IE_IRQ3|IE_IRQ4); 209 change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ2|IE_IRQ3|IE_IRQ4);
diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c
index 8ca68015cf4..a42be00483e 100644
--- a/arch/mips/tx4927/common/tx4927_irq.c
+++ b/arch/mips/tx4927/common/tx4927_irq.c
@@ -227,7 +227,7 @@ static void __init tx4927_irq_cp0_init(void)
227 irq_desc[i].status = IRQ_DISABLED; 227 irq_desc[i].status = IRQ_DISABLED;
228 irq_desc[i].action = 0; 228 irq_desc[i].action = 0;
229 irq_desc[i].depth = 1; 229 irq_desc[i].depth = 1;
230 irq_desc[i].handler = &tx4927_irq_cp0_type; 230 irq_desc[i].chip = &tx4927_irq_cp0_type;
231 } 231 }
232 232
233 return; 233 return;
@@ -435,7 +435,7 @@ static void __init tx4927_irq_pic_init(void)
435 irq_desc[i].status = IRQ_DISABLED; 435 irq_desc[i].status = IRQ_DISABLED;
436 irq_desc[i].action = 0; 436 irq_desc[i].action = 0;
437 irq_desc[i].depth = 2; 437 irq_desc[i].depth = 2;
438 irq_desc[i].handler = &tx4927_irq_pic_type; 438 irq_desc[i].chip = &tx4927_irq_pic_type;
439 } 439 }
440 440
441 setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action); 441 setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action);
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
index aee07ff2212..c67978b6dae 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
@@ -368,7 +368,7 @@ static void __init toshiba_rbtx4927_irq_ioc_init(void)
368 irq_desc[i].status = IRQ_DISABLED; 368 irq_desc[i].status = IRQ_DISABLED;
369 irq_desc[i].action = 0; 369 irq_desc[i].action = 0;
370 irq_desc[i].depth = 3; 370 irq_desc[i].depth = 3;
371 irq_desc[i].handler = &toshiba_rbtx4927_irq_ioc_type; 371 irq_desc[i].chip = &toshiba_rbtx4927_irq_ioc_type;
372 } 372 }
373 373
374 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC, 374 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC,
@@ -526,7 +526,7 @@ static void __init toshiba_rbtx4927_irq_isa_init(void)
526 irq_desc[i].action = 0; 526 irq_desc[i].action = 0;
527 irq_desc[i].depth = 527 irq_desc[i].depth =
528 ((i < TOSHIBA_RBTX4927_IRQ_ISA_MID) ? (4) : (5)); 528 ((i < TOSHIBA_RBTX4927_IRQ_ISA_MID) ? (4) : (5));
529 irq_desc[i].handler = &toshiba_rbtx4927_irq_isa_type; 529 irq_desc[i].chip = &toshiba_rbtx4927_irq_isa_type;
530 } 530 }
531 531
532 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC, 532 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC,
@@ -692,13 +692,13 @@ void toshiba_rbtx4927_irq_dump(char *key)
692 { 692 {
693 u32 i, j = 0; 693 u32 i, j = 0;
694 for (i = 0; i < NR_IRQS; i++) { 694 for (i = 0; i < NR_IRQS; i++) {
695 if (strcmp(irq_desc[i].handler->typename, "none") 695 if (strcmp(irq_desc[i].chip->typename, "none")
696 == 0) 696 == 0)
697 continue; 697 continue;
698 698
699 if ((i >= 1) 699 if ((i >= 1)
700 && (irq_desc[i - 1].handler->typename == 700 && (irq_desc[i - 1].chip->typename ==
701 irq_desc[i].handler->typename)) { 701 irq_desc[i].chip->typename)) {
702 j++; 702 j++;
703 } else { 703 } else {
704 j = 0; 704 j = 0;
@@ -707,12 +707,12 @@ void toshiba_rbtx4927_irq_dump(char *key)
707 (TOSHIBA_RBTX4927_IRQ_INFO, 707 (TOSHIBA_RBTX4927_IRQ_INFO,
708 "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n", 708 "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n",
709 key, i, i, irq_desc[i].status, 709 key, i, i, irq_desc[i].status,
710 (u32) irq_desc[i].handler, 710 (u32) irq_desc[i].chip,
711 (u32) irq_desc[i].action, 711 (u32) irq_desc[i].action,
712 (u32) (irq_desc[i].action ? irq_desc[i]. 712 (u32) (irq_desc[i].action ? irq_desc[i].
713 action->handler : 0), 713 action->handler : 0),
714 irq_desc[i].depth, 714 irq_desc[i].depth,
715 irq_desc[i].handler->typename, j); 715 irq_desc[i].chip->typename, j);
716 } 716 }
717 } 717 }
718#endif 718#endif
diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c
index 873805178d8..0b2f8c84921 100644
--- a/arch/mips/tx4938/common/irq.c
+++ b/arch/mips/tx4938/common/irq.c
@@ -102,7 +102,7 @@ tx4938_irq_cp0_init(void)
102 irq_desc[i].status = IRQ_DISABLED; 102 irq_desc[i].status = IRQ_DISABLED;
103 irq_desc[i].action = 0; 103 irq_desc[i].action = 0;
104 irq_desc[i].depth = 1; 104 irq_desc[i].depth = 1;
105 irq_desc[i].handler = &tx4938_irq_cp0_type; 105 irq_desc[i].chip = &tx4938_irq_cp0_type;
106 } 106 }
107 107
108 return; 108 return;
@@ -306,7 +306,7 @@ tx4938_irq_pic_init(void)
306 irq_desc[i].status = IRQ_DISABLED; 306 irq_desc[i].status = IRQ_DISABLED;
307 irq_desc[i].action = 0; 307 irq_desc[i].action = 0;
308 irq_desc[i].depth = 2; 308 irq_desc[i].depth = 2;
309 irq_desc[i].handler = &tx4938_irq_pic_type; 309 irq_desc[i].chip = &tx4938_irq_pic_type;
310 } 310 }
311 311
312 setup_irq(TX4938_IRQ_NEST_PIC_ON_CP0, &tx4938_irq_pic_action); 312 setup_irq(TX4938_IRQ_NEST_PIC_ON_CP0, &tx4938_irq_pic_action);
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/irq.c b/arch/mips/tx4938/toshiba_rbtx4938/irq.c
index 9cd9c0fe226..3b8245dc5bd 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/irq.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/irq.c
@@ -146,7 +146,7 @@ toshiba_rbtx4938_irq_ioc_init(void)
146 irq_desc[i].status = IRQ_DISABLED; 146 irq_desc[i].status = IRQ_DISABLED;
147 irq_desc[i].action = 0; 147 irq_desc[i].action = 0;
148 irq_desc[i].depth = 3; 148 irq_desc[i].depth = 3;
149 irq_desc[i].handler = &toshiba_rbtx4938_irq_ioc_type; 149 irq_desc[i].chip = &toshiba_rbtx4938_irq_ioc_type;
150 } 150 }
151 151
152 setup_irq(RBTX4938_IRQ_IOCINT, 152 setup_irq(RBTX4938_IRQ_IOCINT,
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c
index 07ae19cf0c2..b9323302cc4 100644
--- a/arch/mips/vr41xx/common/icu.c
+++ b/arch/mips/vr41xx/common/icu.c
@@ -722,10 +722,10 @@ static int __init vr41xx_icu_init(void)
722 icu2_write(MGIUINTHREG, 0xffff); 722 icu2_write(MGIUINTHREG, 0xffff);
723 723
724 for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) 724 for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++)
725 irq_desc[i].handler = &sysint1_irq_type; 725 irq_desc[i].chip = &sysint1_irq_type;
726 726
727 for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) 727 for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++)
728 irq_desc[i].handler = &sysint2_irq_type; 728 irq_desc[i].chip = &sysint2_irq_type;
729 729
730 cascade_irq(INT0_IRQ, icu_get_irq); 730 cascade_irq(INT0_IRQ, icu_get_irq);
731 cascade_irq(INT1_IRQ, icu_get_irq); 731 cascade_irq(INT1_IRQ, icu_get_irq);
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c
index 86796bb63c3..66aa50802de 100644
--- a/arch/mips/vr41xx/common/irq.c
+++ b/arch/mips/vr41xx/common/irq.c
@@ -73,13 +73,13 @@ static void irq_dispatch(unsigned int irq, struct pt_regs *regs)
73 if (cascade->get_irq != NULL) { 73 if (cascade->get_irq != NULL) {
74 unsigned int source_irq = irq; 74 unsigned int source_irq = irq;
75 desc = irq_desc + source_irq; 75 desc = irq_desc + source_irq;
76 desc->handler->ack(source_irq); 76 desc->chip->ack(source_irq);
77 irq = cascade->get_irq(irq, regs); 77 irq = cascade->get_irq(irq, regs);
78 if (irq < 0) 78 if (irq < 0)
79 atomic_inc(&irq_err_count); 79 atomic_inc(&irq_err_count);
80 else 80 else
81 irq_dispatch(irq, regs); 81 irq_dispatch(irq, regs);
82 desc->handler->end(source_irq); 82 desc->chip->end(source_irq);
83 } else 83 } else
84 do_IRQ(irq, regs); 84 do_IRQ(irq, regs);
85} 85}
diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c
index 3e31f8193d2..2d287b8893d 100644
--- a/arch/mips/vr41xx/common/vrc4173.c
+++ b/arch/mips/vr41xx/common/vrc4173.c
@@ -483,7 +483,7 @@ static inline int vrc4173_icu_init(int cascade_irq)
483 vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW); 483 vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW);
484 484
485 for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++) 485 for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++)
486 irq_desc[i].handler = &vrc4173_irq_type; 486 irq_desc[i].chip = &vrc4173_irq_type;
487 487
488 return 0; 488 return 0;
489} 489}
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/irq.c b/arch/mips/vr41xx/nec-cmbvr4133/irq.c
index 31db6b61a39..7b2511ca0a6 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/irq.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/irq.c
@@ -104,7 +104,7 @@ void __init rockhopper_init_irq(void)
104 } 104 }
105 105
106 for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++) 106 for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++)
107 irq_desc[i].handler = &i8259_irq_type; 107 irq_desc[i].chip = &i8259_irq_type;
108 108
109 setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade); 109 setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade);
110 110
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 910fb3afc0b..6dd0ea8f88e 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -51,6 +51,10 @@ config GENERIC_HARDIRQS
51config GENERIC_IRQ_PROBE 51config GENERIC_IRQ_PROBE
52 def_bool y 52 def_bool y
53 53
54config IRQ_PER_CPU
55 bool
56 default y
57
54# unless you want to implement ACPI on PA-RISC ... ;-) 58# unless you want to implement ACPI on PA-RISC ... ;-)
55config PM 59config PM
56 bool 60 bool
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
index 197936d9359..82fe6ba2972 100644
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -94,7 +94,7 @@ int cpu_check_affinity(unsigned int irq, cpumask_t *dest)
94 if (irq == TIMER_IRQ || irq == IPI_IRQ) { 94 if (irq == TIMER_IRQ || irq == IPI_IRQ) {
95 /* Bad linux design decision. The mask has already 95 /* Bad linux design decision. The mask has already
96 * been set; we must reset it */ 96 * been set; we must reset it */
97 irq_affinity[irq] = CPU_MASK_ALL; 97 irq_desc[irq].affinity = CPU_MASK_ALL;
98 return -EINVAL; 98 return -EINVAL;
99 } 99 }
100 100
@@ -110,7 +110,7 @@ static void cpu_set_affinity_irq(unsigned int irq, cpumask_t dest)
110 if (cpu_check_affinity(irq, &dest)) 110 if (cpu_check_affinity(irq, &dest))
111 return; 111 return;
112 112
113 irq_affinity[irq] = dest; 113 irq_desc[irq].affinity = dest;
114} 114}
115#endif 115#endif
116 116
@@ -125,6 +125,10 @@ static struct hw_interrupt_type cpu_interrupt_type = {
125#ifdef CONFIG_SMP 125#ifdef CONFIG_SMP
126 .set_affinity = cpu_set_affinity_irq, 126 .set_affinity = cpu_set_affinity_irq,
127#endif 127#endif
128 /* XXX: Needs to be written. We managed without it so far, but
129 * we really ought to write it.
130 */
131 .retrigger = NULL,
128}; 132};
129 133
130int show_interrupts(struct seq_file *p, void *v) 134int show_interrupts(struct seq_file *p, void *v)
@@ -158,7 +162,7 @@ int show_interrupts(struct seq_file *p, void *v)
158 seq_printf(p, "%10u ", kstat_irqs(i)); 162 seq_printf(p, "%10u ", kstat_irqs(i));
159#endif 163#endif
160 164
161 seq_printf(p, " %14s", irq_desc[i].handler->typename); 165 seq_printf(p, " %14s", irq_desc[i].chip->typename);
162#ifndef PARISC_IRQ_CR16_COUNTS 166#ifndef PARISC_IRQ_CR16_COUNTS
163 seq_printf(p, " %s", action->name); 167 seq_printf(p, " %s", action->name);
164 168
@@ -210,12 +214,12 @@ int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *type, void *data)
210{ 214{
211 if (irq_desc[irq].action) 215 if (irq_desc[irq].action)
212 return -EBUSY; 216 return -EBUSY;
213 if (irq_desc[irq].handler != &cpu_interrupt_type) 217 if (irq_desc[irq].chip != &cpu_interrupt_type)
214 return -EBUSY; 218 return -EBUSY;
215 219
216 if (type) { 220 if (type) {
217 irq_desc[irq].handler = type; 221 irq_desc[irq].chip = type;
218 irq_desc[irq].handler_data = data; 222 irq_desc[irq].chip_data = data;
219 cpu_interrupt_type.enable(irq); 223 cpu_interrupt_type.enable(irq);
220 } 224 }
221 return 0; 225 return 0;
@@ -265,7 +269,7 @@ int txn_alloc_irq(unsigned int bits_wide)
265unsigned long txn_affinity_addr(unsigned int irq, int cpu) 269unsigned long txn_affinity_addr(unsigned int irq, int cpu)
266{ 270{
267#ifdef CONFIG_SMP 271#ifdef CONFIG_SMP
268 irq_affinity[irq] = cpumask_of_cpu(cpu); 272 irq_desc[irq].affinity = cpumask_of_cpu(cpu);
269#endif 273#endif
270 274
271 return cpu_data[cpu].txn_addr; 275 return cpu_data[cpu].txn_addr;
@@ -326,7 +330,7 @@ void do_cpu_irq_mask(struct pt_regs *regs)
326 /* Work our way from MSb to LSb...same order we alloc EIRs */ 330 /* Work our way from MSb to LSb...same order we alloc EIRs */
327 for (irq = TIMER_IRQ; eirr_val && bit; bit>>=1, irq++) { 331 for (irq = TIMER_IRQ; eirr_val && bit; bit>>=1, irq++) {
328#ifdef CONFIG_SMP 332#ifdef CONFIG_SMP
329 cpumask_t dest = irq_affinity[irq]; 333 cpumask_t dest = irq_desc[irq].affinity;
330#endif 334#endif
331 if (!(bit & eirr_val)) 335 if (!(bit & eirr_val))
332 continue; 336 continue;
@@ -378,7 +382,7 @@ static void claim_cpu_irqs(void)
378{ 382{
379 int i; 383 int i;
380 for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) { 384 for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) {
381 irq_desc[i].handler = &cpu_interrupt_type; 385 irq_desc[i].chip = &cpu_interrupt_type;
382 } 386 }
383 387
384 irq_desc[TIMER_IRQ].action = &timer_action; 388 irq_desc[TIMER_IRQ].action = &timer_action;
@@ -404,13 +408,6 @@ void __init init_IRQ(void)
404 408
405} 409}
406 410
407void hw_resend_irq(struct hw_interrupt_type *type, unsigned int irq)
408{
409 /* XXX: Needs to be written. We managed without it so far, but
410 * we really ought to write it.
411 */
412}
413
414void ack_bad_irq(unsigned int irq) 411void ack_bad_irq(unsigned int irq)
415{ 412{
416 printk("unexpected IRQ %d\n", irq); 413 printk("unexpected IRQ %d\n", irq);
diff --git a/arch/parisc/kernel/topology.c b/arch/parisc/kernel/topology.c
index 3ba040050e4..068b20d822e 100644
--- a/arch/parisc/kernel/topology.c
+++ b/arch/parisc/kernel/topology.c
@@ -26,11 +26,10 @@ static struct cpu cpu_devices[NR_CPUS] __read_mostly;
26 26
27static int __init topology_init(void) 27static int __init topology_init(void)
28{ 28{
29 struct node *parent = NULL;
30 int num; 29 int num;
31 30
32 for_each_present_cpu(num) { 31 for_each_present_cpu(num) {
33 register_cpu(&cpu_devices[num], num, parent); 32 register_cpu(&cpu_devices[num], num);
34 } 33 }
35 return 0; 34 return 0;
36} 35}
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index e922a88b2ba..d43e4521abf 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -30,6 +30,10 @@ config GENERIC_HARDIRQS
30 bool 30 bool
31 default y 31 default y
32 32
33config IRQ_PER_CPU
34 bool
35 default y
36
33config RWSEM_GENERIC_SPINLOCK 37config RWSEM_GENERIC_SPINLOCK
34 bool 38 bool
35 39
@@ -618,6 +622,9 @@ config HOTPLUG_CPU
618 622
619 Say N if you are unsure. 623 Say N if you are unsure.
620 624
625config ARCH_ENABLE_MEMORY_HOTPLUG
626 def_bool y
627
621config KEXEC 628config KEXEC
622 bool "kexec system call (EXPERIMENTAL)" 629 bool "kexec system call (EXPERIMENTAL)"
623 depends on PPC_MULTIPLATFORM && EXPERIMENTAL 630 depends on PPC_MULTIPLATFORM && EXPERIMENTAL
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c
index e253a45dcf1..22ceba844bf 100644
--- a/arch/powerpc/kernel/crash.c
+++ b/arch/powerpc/kernel/crash.c
@@ -190,13 +190,13 @@ void default_machine_crash_shutdown(struct pt_regs *regs)
190 local_irq_disable(); 190 local_irq_disable();
191 191
192 for_each_irq(irq) { 192 for_each_irq(irq) {
193 struct irq_desc *desc = irq_descp(irq); 193 struct irq_desc *desc = irq_desc + irq;
194 194
195 if (desc->status & IRQ_INPROGRESS) 195 if (desc->status & IRQ_INPROGRESS)
196 desc->handler->end(irq); 196 desc->chip->end(irq);
197 197
198 if (!(desc->status & IRQ_DISABLED)) 198 if (!(desc->status & IRQ_DISABLED))
199 desc->handler->disable(irq); 199 desc->chip->disable(irq);
200 } 200 }
201 201
202 if (ppc_md.kexec_cpu_down) 202 if (ppc_md.kexec_cpu_down)
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 40d4c14fde8..24f6050aa4a 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -120,8 +120,8 @@ int show_interrupts(struct seq_file *p, void *v)
120#else 120#else
121 seq_printf(p, "%10u ", kstat_irqs(i)); 121 seq_printf(p, "%10u ", kstat_irqs(i));
122#endif /* CONFIG_SMP */ 122#endif /* CONFIG_SMP */
123 if (desc->handler) 123 if (desc->chip)
124 seq_printf(p, " %s ", desc->handler->typename); 124 seq_printf(p, " %s ", desc->chip->typename);
125 else 125 else
126 seq_puts(p, " None "); 126 seq_puts(p, " None ");
127 seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); 127 seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge ");
@@ -164,13 +164,13 @@ void fixup_irqs(cpumask_t map)
164 if (irq_desc[irq].status & IRQ_PER_CPU) 164 if (irq_desc[irq].status & IRQ_PER_CPU)
165 continue; 165 continue;
166 166
167 cpus_and(mask, irq_affinity[irq], map); 167 cpus_and(mask, irq_desc[irq].affinity, map);
168 if (any_online_cpu(mask) == NR_CPUS) { 168 if (any_online_cpu(mask) == NR_CPUS) {
169 printk("Breaking affinity for irq %i\n", irq); 169 printk("Breaking affinity for irq %i\n", irq);
170 mask = map; 170 mask = map;
171 } 171 }
172 if (irq_desc[irq].handler->set_affinity) 172 if (irq_desc[irq].chip->set_affinity)
173 irq_desc[irq].handler->set_affinity(irq, mask); 173 irq_desc[irq].chip->set_affinity(irq, mask);
174 else if (irq_desc[irq].action && !(warned++)) 174 else if (irq_desc[irq].action && !(warned++))
175 printk("Cannot set affinity for irq %i\n", irq); 175 printk("Cannot set affinity for irq %i\n", irq);
176 } 176 }
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index e5a44812441..0932a62a1c9 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -215,7 +215,7 @@ int __init ppc_init(void)
215 215
216 /* register CPU devices */ 216 /* register CPU devices */
217 for_each_possible_cpu(i) 217 for_each_possible_cpu(i)
218 register_cpu(&cpu_devices[i], i, NULL); 218 register_cpu(&cpu_devices[i], i);
219 219
220 /* call platform init */ 220 /* call platform init */
221 if (ppc_md.init != NULL) { 221 if (ppc_md.init != NULL) {
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index 5bc2585c803..4662b580efa 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -279,7 +279,7 @@ static void unregister_cpu_online(unsigned int cpu)
279} 279}
280#endif /* CONFIG_HOTPLUG_CPU */ 280#endif /* CONFIG_HOTPLUG_CPU */
281 281
282static int sysfs_cpu_notify(struct notifier_block *self, 282static int __devinit sysfs_cpu_notify(struct notifier_block *self,
283 unsigned long action, void *hcpu) 283 unsigned long action, void *hcpu)
284{ 284{
285 unsigned int cpu = (unsigned int)(long)hcpu; 285 unsigned int cpu = (unsigned int)(long)hcpu;
@@ -297,30 +297,19 @@ static int sysfs_cpu_notify(struct notifier_block *self,
297 return NOTIFY_OK; 297 return NOTIFY_OK;
298} 298}
299 299
300static struct notifier_block sysfs_cpu_nb = { 300static struct notifier_block __devinitdata sysfs_cpu_nb = {
301 .notifier_call = sysfs_cpu_notify, 301 .notifier_call = sysfs_cpu_notify,
302}; 302};
303 303
304/* NUMA stuff */ 304/* NUMA stuff */
305 305
306#ifdef CONFIG_NUMA 306#ifdef CONFIG_NUMA
307static struct node node_devices[MAX_NUMNODES];
308
309static void register_nodes(void) 307static void register_nodes(void)
310{ 308{
311 int i; 309 int i;
312 310
313 for (i = 0; i < MAX_NUMNODES; i++) { 311 for (i = 0; i < MAX_NUMNODES; i++)
314 if (node_online(i)) { 312 register_one_node(i);
315 int p_node = parent_node(i);
316 struct node *parent = NULL;
317
318 if (p_node != i)
319 parent = &node_devices[p_node];
320
321 register_node(&node_devices[i], i, parent);
322 }
323 }
324} 313}
325 314
326int sysfs_add_device_to_node(struct sys_device *dev, int nid) 315int sysfs_add_device_to_node(struct sys_device *dev, int nid)
@@ -359,23 +348,13 @@ static SYSDEV_ATTR(physical_id, 0444, show_physical_id, NULL);
359static int __init topology_init(void) 348static int __init topology_init(void)
360{ 349{
361 int cpu; 350 int cpu;
362 struct node *parent = NULL;
363 351
364 register_nodes(); 352 register_nodes();
365
366 register_cpu_notifier(&sysfs_cpu_nb); 353 register_cpu_notifier(&sysfs_cpu_nb);
367 354
368 for_each_possible_cpu(cpu) { 355 for_each_possible_cpu(cpu) {
369 struct cpu *c = &per_cpu(cpu_devices, cpu); 356 struct cpu *c = &per_cpu(cpu_devices, cpu);
370 357
371#ifdef CONFIG_NUMA
372 /* The node to which a cpu belongs can't be known
373 * until the cpu is made present.
374 */
375 parent = NULL;
376 if (cpu_present(cpu))
377 parent = &node_devices[cpu_to_node(cpu)];
378#endif
379 /* 358 /*
380 * For now, we just see if the system supports making 359 * For now, we just see if the system supports making
381 * the RTAS calls for CPU hotplug. But, there may be a 360 * the RTAS calls for CPU hotplug. But, there may be a
@@ -387,7 +366,7 @@ static int __init topology_init(void)
387 c->no_control = 1; 366 c->no_control = 1;
388 367
389 if (cpu_online(cpu) || (c->no_control == 0)) { 368 if (cpu_online(cpu) || (c->no_control == 0)) {
390 register_cpu(c, cpu, parent); 369 register_cpu(c, cpu);
391 370
392 sysdev_create_file(&c->sysdev, &attr_physical_id); 371 sysdev_create_file(&c->sysdev, &attr_physical_id);
393 } 372 }
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index 9e30f968c18..d454caada26 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -41,6 +41,7 @@
41#include <linux/idr.h> 41#include <linux/idr.h>
42#include <linux/nodemask.h> 42#include <linux/nodemask.h>
43#include <linux/module.h> 43#include <linux/module.h>
44#include <linux/poison.h>
44 45
45#include <asm/pgalloc.h> 46#include <asm/pgalloc.h>
46#include <asm/page.h> 47#include <asm/page.h>
@@ -90,7 +91,7 @@ void free_initmem(void)
90 91
91 addr = (unsigned long)__init_begin; 92 addr = (unsigned long)__init_begin;
92 for (; addr < (unsigned long)__init_end; addr += PAGE_SIZE) { 93 for (; addr < (unsigned long)__init_end; addr += PAGE_SIZE) {
93 memset((void *)addr, 0xcc, PAGE_SIZE); 94 memset((void *)addr, POISON_FREE_INITMEM, PAGE_SIZE);
94 ClearPageReserved(virt_to_page(addr)); 95 ClearPageReserved(virt_to_page(addr));
95 init_page_count(virt_to_page(addr)); 96 init_page_count(virt_to_page(addr));
96 free_page(addr); 97 free_page(addr);
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 69f3b9a20be..089d939a0b3 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -114,15 +114,20 @@ void online_page(struct page *page)
114 num_physpages++; 114 num_physpages++;
115} 115}
116 116
117int __devinit add_memory(u64 start, u64 size) 117#ifdef CONFIG_NUMA
118int memory_add_physaddr_to_nid(u64 start)
119{
120 return hot_add_scn_to_nid(start);
121}
122#endif
123
124int __devinit arch_add_memory(int nid, u64 start, u64 size)
118{ 125{
119 struct pglist_data *pgdata; 126 struct pglist_data *pgdata;
120 struct zone *zone; 127 struct zone *zone;
121 int nid;
122 unsigned long start_pfn = start >> PAGE_SHIFT; 128 unsigned long start_pfn = start >> PAGE_SHIFT;
123 unsigned long nr_pages = size >> PAGE_SHIFT; 129 unsigned long nr_pages = size >> PAGE_SHIFT;
124 130
125 nid = hot_add_scn_to_nid(start);
126 pgdata = NODE_DATA(nid); 131 pgdata = NODE_DATA(nid);
127 132
128 start = (unsigned long)__va(start); 133 start = (unsigned long)__va(start);
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index aa98cb3b59d..fbe23933f73 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -334,7 +334,7 @@ out:
334 return nid; 334 return nid;
335} 335}
336 336
337static int cpu_numa_callback(struct notifier_block *nfb, 337static int __cpuinit cpu_numa_callback(struct notifier_block *nfb,
338 unsigned long action, 338 unsigned long action,
339 void *hcpu) 339 void *hcpu)
340{ 340{
@@ -609,14 +609,15 @@ static void __init *careful_allocation(int nid, unsigned long size,
609 return (void *)ret; 609 return (void *)ret;
610} 610}
611 611
612static struct notifier_block __cpuinitdata ppc64_numa_nb = {
613 .notifier_call = cpu_numa_callback,
614 .priority = 1 /* Must run before sched domains notifier. */
615};
616
612void __init do_init_bootmem(void) 617void __init do_init_bootmem(void)
613{ 618{
614 int nid; 619 int nid;
615 unsigned int i; 620 unsigned int i;
616 static struct notifier_block ppc64_numa_nb = {
617 .notifier_call = cpu_numa_callback,
618 .priority = 1 /* Must run before sched domains notifier. */
619 };
620 621
621 min_low_pfn = 0; 622 min_low_pfn = 0;
622 max_low_pfn = lmb_end_of_DRAM() >> PAGE_SHIFT; 623 max_low_pfn = lmb_end_of_DRAM() >> PAGE_SHIFT;
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 1bbf822b4ef..7bff3cbc572 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -307,7 +307,7 @@ static void iic_request_ipi(int ipi, const char *name)
307 irq = iic_ipi_to_irq(ipi); 307 irq = iic_ipi_to_irq(ipi);
308 /* IPIs are marked SA_INTERRUPT as they must run with irqs 308 /* IPIs are marked SA_INTERRUPT as they must run with irqs
309 * disabled */ 309 * disabled */
310 get_irq_desc(irq)->handler = &iic_pic; 310 get_irq_desc(irq)->chip = &iic_pic;
311 get_irq_desc(irq)->status |= IRQ_PER_CPU; 311 get_irq_desc(irq)->status |= IRQ_PER_CPU;
312 request_irq(irq, iic_ipi_action, SA_INTERRUPT, name, NULL); 312 request_irq(irq, iic_ipi_action, SA_INTERRUPT, name, NULL);
313} 313}
@@ -330,7 +330,7 @@ static void iic_setup_spe_handlers(void)
330 for (be=0; be < num_present_cpus() / 2; be++) { 330 for (be=0; be < num_present_cpus() / 2; be++) {
331 for (isrc = 0; isrc < IIC_CLASS_STRIDE * 3; isrc++) { 331 for (isrc = 0; isrc < IIC_CLASS_STRIDE * 3; isrc++) {
332 int irq = IIC_NODE_STRIDE * be + IIC_SPE_OFFSET + isrc; 332 int irq = IIC_NODE_STRIDE * be + IIC_SPE_OFFSET + isrc;
333 get_irq_desc(irq)->handler = &iic_pic; 333 get_irq_desc(irq)->chip = &iic_pic;
334 } 334 }
335 } 335 }
336} 336}
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c
index 55cbdd77a62..7c3a0b6d34f 100644
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -162,7 +162,7 @@ void spider_init_IRQ_hardcoded(void)
162 spider_pics[node] = ioremap(spiderpic, 0x800); 162 spider_pics[node] = ioremap(spiderpic, 0x800);
163 for (n = 0; n < IIC_NUM_EXT; n++) { 163 for (n = 0; n < IIC_NUM_EXT; n++) {
164 int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; 164 int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE;
165 get_irq_desc(irq)->handler = &spider_pic; 165 get_irq_desc(irq)->chip = &spider_pic;
166 } 166 }
167 167
168 /* do not mask any interrupts because of level */ 168 /* do not mask any interrupts because of level */
@@ -217,7 +217,7 @@ void spider_init_IRQ(void)
217 217
218 for (n = 0; n < IIC_NUM_EXT; n++) { 218 for (n = 0; n < IIC_NUM_EXT; n++) {
219 int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE; 219 int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE;
220 get_irq_desc(irq)->handler = &spider_pic; 220 get_irq_desc(irq)->chip = &spider_pic;
221 } 221 }
222 222
223 /* do not mask any interrupts because of level */ 223 /* do not mask any interrupts because of level */
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
index 3068b429b03..a656d810a44 100644
--- a/arch/powerpc/platforms/cell/spufs/switch.c
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -2203,7 +2203,7 @@ void spu_init_csa(struct spu_state *csa)
2203 2203
2204 memset(lscsa, 0, sizeof(struct spu_lscsa)); 2204 memset(lscsa, 0, sizeof(struct spu_lscsa));
2205 csa->lscsa = lscsa; 2205 csa->lscsa = lscsa;
2206 csa->register_lock = SPIN_LOCK_UNLOCKED; 2206 spin_lock_init(&csa->register_lock);
2207 2207
2208 /* Set LS pages reserved to allow for user-space mapping. */ 2208 /* Set LS pages reserved to allow for user-space mapping. */
2209 for (p = lscsa->ls; p < lscsa->ls + LS_SIZE; p += PAGE_SIZE) 2209 for (p = lscsa->ls; p < lscsa->ls + LS_SIZE; p += PAGE_SIZE)
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c
index 62bbbcf5ded..33bb4aa0e1e 100644
--- a/arch/powerpc/platforms/iseries/irq.c
+++ b/arch/powerpc/platforms/iseries/irq.c
@@ -242,9 +242,9 @@ void __init iSeries_activate_IRQs()
242 for_each_irq (irq) { 242 for_each_irq (irq) {
243 irq_desc_t *desc = get_irq_desc(irq); 243 irq_desc_t *desc = get_irq_desc(irq);
244 244
245 if (desc && desc->handler && desc->handler->startup) { 245 if (desc && desc->chip && desc->chip->startup) {
246 spin_lock_irqsave(&desc->lock, flags); 246 spin_lock_irqsave(&desc->lock, flags);
247 desc->handler->startup(irq); 247 desc->chip->startup(irq);
248 spin_unlock_irqrestore(&desc->lock, flags); 248 spin_unlock_irqrestore(&desc->lock, flags);
249 } 249 }
250 } 250 }
@@ -324,7 +324,7 @@ int __init iSeries_allocate_IRQ(HvBusNumber bus,
324 + function; 324 + function;
325 virtirq = virt_irq_create_mapping(realirq); 325 virtirq = virt_irq_create_mapping(realirq);
326 326
327 irq_desc[virtirq].handler = &iSeries_IRQ_handler; 327 irq_desc[virtirq].chip = &iSeries_IRQ_handler;
328 return virtirq; 328 return virtirq;
329} 329}
330 330
diff --git a/arch/powerpc/platforms/powermac/backlight.c b/arch/powerpc/platforms/powermac/backlight.c
index 498b042e183..c7a27eddca6 100644
--- a/arch/powerpc/platforms/powermac/backlight.c
+++ b/arch/powerpc/platforms/powermac/backlight.c
@@ -119,7 +119,14 @@ int pmac_backlight_set_legacy_brightness(int brightness)
119 down(&pmac_backlight->sem); 119 down(&pmac_backlight->sem);
120 props = pmac_backlight->props; 120 props = pmac_backlight->props;
121 props->brightness = brightness * 121 props->brightness = brightness *
122 props->max_brightness / OLD_BACKLIGHT_MAX; 122 (props->max_brightness + 1) /
123 (OLD_BACKLIGHT_MAX + 1);
124
125 if (props->brightness > props->max_brightness)
126 props->brightness = props->max_brightness;
127 else if (props->brightness < 0)
128 props->brightness = 0;
129
123 props->update_status(pmac_backlight); 130 props->update_status(pmac_backlight);
124 up(&pmac_backlight->sem); 131 up(&pmac_backlight->sem);
125 132
@@ -140,8 +147,11 @@ int pmac_backlight_get_legacy_brightness()
140 147
141 down(&pmac_backlight->sem); 148 down(&pmac_backlight->sem);
142 props = pmac_backlight->props; 149 props = pmac_backlight->props;
150
143 result = props->brightness * 151 result = props->brightness *
144 OLD_BACKLIGHT_MAX / props->max_brightness; 152 (OLD_BACKLIGHT_MAX + 1) /
153 (props->max_brightness + 1);
154
145 up(&pmac_backlight->sem); 155 up(&pmac_backlight->sem);
146 } 156 }
147 mutex_unlock(&pmac_backlight_mutex); 157 mutex_unlock(&pmac_backlight_mutex);
diff --git a/arch/powerpc/platforms/powermac/pfunc_core.c b/arch/powerpc/platforms/powermac/pfunc_core.c
index 047f954a89e..93e7505debc 100644
--- a/arch/powerpc/platforms/powermac/pfunc_core.c
+++ b/arch/powerpc/platforms/powermac/pfunc_core.c
@@ -546,7 +546,7 @@ struct pmf_device {
546}; 546};
547 547
548static LIST_HEAD(pmf_devices); 548static LIST_HEAD(pmf_devices);
549static spinlock_t pmf_lock = SPIN_LOCK_UNLOCKED; 549static DEFINE_SPINLOCK(pmf_lock);
550static DEFINE_MUTEX(pmf_irq_mutex); 550static DEFINE_MUTEX(pmf_irq_mutex);
551 551
552static void pmf_release_device(struct kref *kref) 552static void pmf_release_device(struct kref *kref)
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 18bf3011d1e..9f6189af6dd 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -446,7 +446,7 @@ static void __init pmac_pic_probe_oldstyle(void)
446 446
447 /* Set the handler for the main PIC */ 447 /* Set the handler for the main PIC */
448 for ( i = 0; i < max_real_irqs ; i++ ) 448 for ( i = 0; i < max_real_irqs ; i++ )
449 irq_desc[i].handler = &pmac_pic; 449 irq_desc[i].chip = &pmac_pic;
450 450
451 /* Get addresses of first controller if we have a node for it */ 451 /* Get addresses of first controller if we have a node for it */
452 BUG_ON(of_address_to_resource(master, 0, &r)); 452 BUG_ON(of_address_to_resource(master, 0, &r));
@@ -493,7 +493,7 @@ static void __init pmac_pic_probe_oldstyle(void)
493 /* Setup handlers for secondary controller and hook cascade irq*/ 493 /* Setup handlers for secondary controller and hook cascade irq*/
494 if (slave) { 494 if (slave) {
495 for ( i = max_real_irqs ; i < max_irqs ; i++ ) 495 for ( i = max_real_irqs ; i < max_irqs ; i++ )
496 irq_desc[i].handler = &gatwick_pic; 496 irq_desc[i].chip = &gatwick_pic;
497 setup_irq(irq_cascade, &gatwick_cascade_action); 497 setup_irq(irq_cascade, &gatwick_cascade_action);
498 } 498 }
499 printk(KERN_INFO "irq: System has %d possible interrupts\n", max_irqs); 499 printk(KERN_INFO "irq: System has %d possible interrupts\n", max_irqs);
diff --git a/arch/powerpc/platforms/pseries/eeh_event.c b/arch/powerpc/platforms/pseries/eeh_event.c
index 8f2d12935b9..45ccc687e57 100644
--- a/arch/powerpc/platforms/pseries/eeh_event.c
+++ b/arch/powerpc/platforms/pseries/eeh_event.c
@@ -35,7 +35,7 @@
35 */ 35 */
36 36
37/* EEH event workqueue setup. */ 37/* EEH event workqueue setup. */
38static spinlock_t eeh_eventlist_lock = SPIN_LOCK_UNLOCKED; 38static DEFINE_SPINLOCK(eeh_eventlist_lock);
39LIST_HEAD(eeh_eventlist); 39LIST_HEAD(eeh_eventlist);
40static void eeh_thread_launcher(void *); 40static void eeh_thread_launcher(void *);
41DECLARE_WORK(eeh_event_wq, eeh_thread_launcher, NULL); 41DECLARE_WORK(eeh_event_wq, eeh_thread_launcher, NULL);
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index b14f9b5c114..19c03dd4300 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -238,7 +238,7 @@ static int get_irq_server(unsigned int irq)
238{ 238{
239 unsigned int server; 239 unsigned int server;
240 /* For the moment only implement delivery to all cpus or one cpu */ 240 /* For the moment only implement delivery to all cpus or one cpu */
241 cpumask_t cpumask = irq_affinity[irq]; 241 cpumask_t cpumask = irq_desc[irq].affinity;
242 cpumask_t tmp = CPU_MASK_NONE; 242 cpumask_t tmp = CPU_MASK_NONE;
243 243
244 if (!distribute_irqs) 244 if (!distribute_irqs)
@@ -558,7 +558,7 @@ nextnode:
558 } 558 }
559 559
560 for (i = irq_offset_value(); i < NR_IRQS; ++i) 560 for (i = irq_offset_value(); i < NR_IRQS; ++i)
561 get_irq_desc(i)->handler = &xics_pic; 561 get_irq_desc(i)->chip = &xics_pic;
562 562
563 xics_setup_cpu(); 563 xics_setup_cpu();
564 564
@@ -701,9 +701,9 @@ void xics_migrate_irqs_away(void)
701 continue; 701 continue;
702 702
703 /* We only need to migrate enabled IRQS */ 703 /* We only need to migrate enabled IRQS */
704 if (desc == NULL || desc->handler == NULL 704 if (desc == NULL || desc->chip == NULL
705 || desc->action == NULL 705 || desc->action == NULL
706 || desc->handler->set_affinity == NULL) 706 || desc->chip->set_affinity == NULL)
707 continue; 707 continue;
708 708
709 spin_lock_irqsave(&desc->lock, flags); 709 spin_lock_irqsave(&desc->lock, flags);
@@ -728,8 +728,8 @@ void xics_migrate_irqs_away(void)
728 virq, cpu); 728 virq, cpu);
729 729
730 /* Reset affinity to all cpus */ 730 /* Reset affinity to all cpus */
731 desc->handler->set_affinity(virq, CPU_MASK_ALL); 731 desc->chip->set_affinity(virq, CPU_MASK_ALL);
732 irq_affinity[virq] = CPU_MASK_ALL; 732 irq_desc[irq].affinity = CPU_MASK_ALL;
733unlock: 733unlock:
734 spin_unlock_irqrestore(&desc->lock, flags); 734 spin_unlock_irqrestore(&desc->lock, flags);
735 } 735 }
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c
index b7ac32fdd77..2bff30f6d63 100644
--- a/arch/powerpc/sysdev/i8259.c
+++ b/arch/powerpc/sysdev/i8259.c
@@ -208,7 +208,7 @@ void __init i8259_init(unsigned long intack_addr, int offset)
208 spin_unlock_irqrestore(&i8259_lock, flags); 208 spin_unlock_irqrestore(&i8259_lock, flags);
209 209
210 for (i = 0; i < NUM_ISA_INTERRUPTS; ++i) 210 for (i = 0; i < NUM_ISA_INTERRUPTS; ++i)
211 irq_desc[offset + i].handler = &i8259_pic; 211 irq_desc[offset + i].chip = &i8259_pic;
212 212
213 /* reserve our resources */ 213 /* reserve our resources */
214 setup_irq(offset + 2, &i8259_irqaction); 214 setup_irq(offset + 2, &i8259_irqaction);
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 8f01e0f1d84..46801f5ec03 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -472,7 +472,7 @@ void __init ipic_init(phys_addr_t phys_addr,
472 ipic_write(primary_ipic->regs, IPIC_SEMSR, temp); 472 ipic_write(primary_ipic->regs, IPIC_SEMSR, temp);
473 473
474 for (i = 0 ; i < NR_IPIC_INTS ; i++) { 474 for (i = 0 ; i < NR_IPIC_INTS ; i++) {
475 irq_desc[i+irq_offset].handler = &ipic; 475 irq_desc[i+irq_offset].chip = &ipic;
476 irq_desc[i+irq_offset].status = IRQ_LEVEL; 476 irq_desc[i+irq_offset].status = IRQ_LEVEL;
477 } 477 }
478 478
diff --git a/arch/powerpc/sysdev/mmio_nvram.c b/arch/powerpc/sysdev/mmio_nvram.c
index 74e0d31a355..615350d46b5 100644
--- a/arch/powerpc/sysdev/mmio_nvram.c
+++ b/arch/powerpc/sysdev/mmio_nvram.c
@@ -32,7 +32,7 @@
32 32
33static void __iomem *mmio_nvram_start; 33static void __iomem *mmio_nvram_start;
34static long mmio_nvram_len; 34static long mmio_nvram_len;
35static spinlock_t mmio_nvram_lock = SPIN_LOCK_UNLOCKED; 35static DEFINE_SPINLOCK(mmio_nvram_lock);
36 36
37static ssize_t mmio_nvram_read(char *buf, size_t count, loff_t *index) 37static ssize_t mmio_nvram_read(char *buf, size_t count, loff_t *index)
38{ 38{
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index bffe50d02c9..28df9c827ca 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -379,14 +379,14 @@ static inline u32 mpic_physmask(u32 cpumask)
379/* Get the mpic structure from the IPI number */ 379/* Get the mpic structure from the IPI number */
380static inline struct mpic * mpic_from_ipi(unsigned int ipi) 380static inline struct mpic * mpic_from_ipi(unsigned int ipi)
381{ 381{
382 return container_of(irq_desc[ipi].handler, struct mpic, hc_ipi); 382 return container_of(irq_desc[ipi].chip, struct mpic, hc_ipi);
383} 383}
384#endif 384#endif
385 385
386/* Get the mpic structure from the irq number */ 386/* Get the mpic structure from the irq number */
387static inline struct mpic * mpic_from_irq(unsigned int irq) 387static inline struct mpic * mpic_from_irq(unsigned int irq)
388{ 388{
389 return container_of(irq_desc[irq].handler, struct mpic, hc_irq); 389 return container_of(irq_desc[irq].chip, struct mpic, hc_irq);
390} 390}
391 391
392/* Send an EOI */ 392/* Send an EOI */
@@ -752,7 +752,7 @@ void __init mpic_init(struct mpic *mpic)
752 if (!(mpic->flags & MPIC_PRIMARY)) 752 if (!(mpic->flags & MPIC_PRIMARY))
753 continue; 753 continue;
754 irq_desc[mpic->ipi_offset+i].status |= IRQ_PER_CPU; 754 irq_desc[mpic->ipi_offset+i].status |= IRQ_PER_CPU;
755 irq_desc[mpic->ipi_offset+i].handler = &mpic->hc_ipi; 755 irq_desc[mpic->ipi_offset+i].chip = &mpic->hc_ipi;
756#endif /* CONFIG_SMP */ 756#endif /* CONFIG_SMP */
757 } 757 }
758 758
@@ -813,7 +813,7 @@ void __init mpic_init(struct mpic *mpic)
813 /* init linux descriptors */ 813 /* init linux descriptors */
814 if (i < mpic->irq_count) { 814 if (i < mpic->irq_count) {
815 irq_desc[mpic->irq_offset+i].status = level ? IRQ_LEVEL : 0; 815 irq_desc[mpic->irq_offset+i].status = level ? IRQ_LEVEL : 0;
816 irq_desc[mpic->irq_offset+i].handler = &mpic->hc_irq; 816 irq_desc[mpic->irq_offset+i].chip = &mpic->hc_irq;
817 } 817 }
818 } 818 }
819 819
@@ -906,7 +906,7 @@ void mpic_setup_this_cpu(void)
906 /* let the mpic know we want intrs. default affinity is 0xffffffff 906 /* let the mpic know we want intrs. default affinity is 0xffffffff
907 * until changed via /proc. That's how it's done on x86. If we want 907 * until changed via /proc. That's how it's done on x86. If we want
908 * it differently, then we should make sure we also change the default 908 * it differently, then we should make sure we also change the default
909 * values of irq_affinity in irq.c. 909 * values of irq_desc[].affinity in irq.c.
910 */ 910 */
911 if (distribute_irqs) { 911 if (distribute_irqs) {
912 for (i = 0; i < mpic->num_sources ; i++) 912 for (i = 0; i < mpic->num_sources ; i++)
diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c
index 12b84ca5132..9b3ace26280 100644
--- a/arch/ppc/8xx_io/commproc.c
+++ b/arch/ppc/8xx_io/commproc.c
@@ -187,7 +187,7 @@ cpm_interrupt_init(void)
187 * interrupt vectors 187 * interrupt vectors
188 */ 188 */
189 for ( i = CPM_IRQ_OFFSET ; i < CPM_IRQ_OFFSET + NR_CPM_INTS ; i++ ) 189 for ( i = CPM_IRQ_OFFSET ; i < CPM_IRQ_OFFSET + NR_CPM_INTS ; i++ )
190 irq_desc[i].handler = &cpm_pic; 190 irq_desc[i].chip = &cpm_pic;
191 191
192 /* Set our interrupt handler with the core CPU. */ 192 /* Set our interrupt handler with the core CPU. */
193 if (setup_irq(CPM_INTERRUPT, &cpm_interrupt_irqaction)) 193 if (setup_irq(CPM_INTERRUPT, &cpm_interrupt_irqaction))
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index 1f79e84ab46..4b4607d89bf 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -475,7 +475,7 @@ int __init ppc_init(void)
475 475
476 /* register CPU devices */ 476 /* register CPU devices */
477 for_each_possible_cpu(i) 477 for_each_possible_cpu(i)
478 register_cpu(&cpu_devices[i], i, NULL); 478 register_cpu(&cpu_devices[i], i);
479 479
480 /* call platform init */ 480 /* call platform init */
481 if (ppc_md.init != NULL) { 481 if (ppc_md.init != NULL) {
diff --git a/arch/ppc/platforms/apus_setup.c b/arch/ppc/platforms/apus_setup.c
index fe0cdc04d43..5c4118a459f 100644
--- a/arch/ppc/platforms/apus_setup.c
+++ b/arch/ppc/platforms/apus_setup.c
@@ -734,9 +734,9 @@ void apus_init_IRQ(void)
734 for ( i = 0 ; i < AMI_IRQS; i++ ) { 734 for ( i = 0 ; i < AMI_IRQS; i++ ) {
735 irq_desc[i].status = IRQ_LEVEL; 735 irq_desc[i].status = IRQ_LEVEL;
736 if (i < IRQ_AMIGA_AUTO) { 736 if (i < IRQ_AMIGA_AUTO) {
737 irq_desc[i].handler = &amiga_irqctrl; 737 irq_desc[i].chip = &amiga_irqctrl;
738 } else { 738 } else {
739 irq_desc[i].handler = &amiga_sys_irqctrl; 739 irq_desc[i].chip = &amiga_sys_irqctrl;
740 action = &amiga_sys_irqaction[i-IRQ_AMIGA_AUTO]; 740 action = &amiga_sys_irqaction[i-IRQ_AMIGA_AUTO];
741 if (action->name) 741 if (action->name)
742 setup_irq(i, action); 742 setup_irq(i, action);
diff --git a/arch/ppc/platforms/sbc82xx.c b/arch/ppc/platforms/sbc82xx.c
index 866807b4ad0..41006d2b4b3 100644
--- a/arch/ppc/platforms/sbc82xx.c
+++ b/arch/ppc/platforms/sbc82xx.c
@@ -172,7 +172,7 @@ void __init sbc82xx_init_IRQ(void)
172 172
173 /* Set up the interrupt handlers for the i8259 IRQs */ 173 /* Set up the interrupt handlers for the i8259 IRQs */
174 for (i = NR_SIU_INTS; i < NR_SIU_INTS + 8; i++) { 174 for (i = NR_SIU_INTS; i < NR_SIU_INTS + 8; i++) {
175 irq_desc[i].handler = &sbc82xx_i8259_ic; 175 irq_desc[i].chip = &sbc82xx_i8259_ic;
176 irq_desc[i].status |= IRQ_LEVEL; 176 irq_desc[i].status |= IRQ_LEVEL;
177 } 177 }
178 178
diff --git a/arch/ppc/syslib/cpc700_pic.c b/arch/ppc/syslib/cpc700_pic.c
index 5add0a919ef..172aa215fdb 100644
--- a/arch/ppc/syslib/cpc700_pic.c
+++ b/arch/ppc/syslib/cpc700_pic.c
@@ -140,12 +140,12 @@ cpc700_init_IRQ(void)
140 /* IRQ 0 is highest */ 140 /* IRQ 0 is highest */
141 141
142 for (i = 0; i < 17; i++) { 142 for (i = 0; i < 17; i++) {
143 irq_desc[i].handler = &cpc700_pic; 143 irq_desc[i].chip = &cpc700_pic;
144 cpc700_pic_init_irq(i); 144 cpc700_pic_init_irq(i);
145 } 145 }
146 146
147 for (i = 20; i < 32; i++) { 147 for (i = 20; i < 32; i++) {
148 irq_desc[i].handler = &cpc700_pic; 148 irq_desc[i].chip = &cpc700_pic;
149 cpc700_pic_init_irq(i); 149 cpc700_pic_init_irq(i);
150 } 150 }
151 151
diff --git a/arch/ppc/syslib/cpm2_pic.c b/arch/ppc/syslib/cpm2_pic.c
index 29d95d415ce..c0fee0beb81 100644
--- a/arch/ppc/syslib/cpm2_pic.c
+++ b/arch/ppc/syslib/cpm2_pic.c
@@ -171,7 +171,7 @@ void cpm2_init_IRQ(void)
171 /* Enable chaining to OpenPIC, and make everything level 171 /* Enable chaining to OpenPIC, and make everything level
172 */ 172 */
173 for (i = 0; i < NR_CPM_INTS; i++) { 173 for (i = 0; i < NR_CPM_INTS; i++) {
174 irq_desc[i+CPM_IRQ_OFFSET].handler = &cpm2_pic; 174 irq_desc[i+CPM_IRQ_OFFSET].chip = &cpm2_pic;
175 irq_desc[i+CPM_IRQ_OFFSET].status |= IRQ_LEVEL; 175 irq_desc[i+CPM_IRQ_OFFSET].status |= IRQ_LEVEL;
176 } 176 }
177} 177}
diff --git a/arch/ppc/syslib/gt64260_pic.c b/arch/ppc/syslib/gt64260_pic.c
index dc3bd9ecbbf..91096b38ae7 100644
--- a/arch/ppc/syslib/gt64260_pic.c
+++ b/arch/ppc/syslib/gt64260_pic.c
@@ -98,7 +98,7 @@ gt64260_init_irq(void)
98 98
99 /* use the gt64260 for all (possible) interrupt sources */ 99 /* use the gt64260 for all (possible) interrupt sources */
100 for (i = gt64260_irq_base; i < (gt64260_irq_base + 96); i++) 100 for (i = gt64260_irq_base; i < (gt64260_irq_base + 96); i++)
101 irq_desc[i].handler = &gt64260_pic; 101 irq_desc[i].chip = &gt64260_pic;
102 102
103 if (ppc_md.progress) 103 if (ppc_md.progress)
104 ppc_md.progress("gt64260_init_irq: exit", 0x0); 104 ppc_md.progress("gt64260_init_irq: exit", 0x0);
diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c
index 1941a8c7ca9..63fa5b31339 100644
--- a/arch/ppc/syslib/m82xx_pci.c
+++ b/arch/ppc/syslib/m82xx_pci.c
@@ -159,7 +159,7 @@ pq2pci_init_irq(void)
159 immap->im_memctl.memc_or8 = 0xffff8010; 159 immap->im_memctl.memc_or8 = 0xffff8010;
160#endif 160#endif
161 for (irq = NR_CPM_INTS; irq < NR_CPM_INTS + 4; irq++) 161 for (irq = NR_CPM_INTS; irq < NR_CPM_INTS + 4; irq++)
162 irq_desc[irq].handler = &pq2pci_ic; 162 irq_desc[irq].chip = &pq2pci_ic;
163 163
164 /* make PCI IRQ level sensitive */ 164 /* make PCI IRQ level sensitive */
165 immap->im_intctl.ic_siexr &= 165 immap->im_intctl.ic_siexr &=
diff --git a/arch/ppc/syslib/m8xx_setup.c b/arch/ppc/syslib/m8xx_setup.c
index dae9af78bde..0c4c0de7c59 100644
--- a/arch/ppc/syslib/m8xx_setup.c
+++ b/arch/ppc/syslib/m8xx_setup.c
@@ -347,13 +347,13 @@ m8xx_init_IRQ(void)
347 int i; 347 int i;
348 348
349 for (i = SIU_IRQ_OFFSET ; i < SIU_IRQ_OFFSET + NR_SIU_INTS ; i++) 349 for (i = SIU_IRQ_OFFSET ; i < SIU_IRQ_OFFSET + NR_SIU_INTS ; i++)
350 irq_desc[i].handler = &ppc8xx_pic; 350 irq_desc[i].chip = &ppc8xx_pic;
351 351
352 cpm_interrupt_init(); 352 cpm_interrupt_init();
353 353
354#if defined(CONFIG_PCI) 354#if defined(CONFIG_PCI)
355 for (i = I8259_IRQ_OFFSET ; i < I8259_IRQ_OFFSET + NR_8259_INTS ; i++) 355 for (i = I8259_IRQ_OFFSET ; i < I8259_IRQ_OFFSET + NR_8259_INTS ; i++)
356 irq_desc[i].handler = &i8259_pic; 356 irq_desc[i].chip = &i8259_pic;
357 357
358 i8259_pic_irq_offset = I8259_IRQ_OFFSET; 358 i8259_pic_irq_offset = I8259_IRQ_OFFSET;
359 i8259_init(0); 359 i8259_init(0);
diff --git a/arch/ppc/syslib/mpc52xx_pic.c b/arch/ppc/syslib/mpc52xx_pic.c
index c4406f9dc6a..6425b5cee7d 100644
--- a/arch/ppc/syslib/mpc52xx_pic.c
+++ b/arch/ppc/syslib/mpc52xx_pic.c
@@ -204,9 +204,9 @@ mpc52xx_init_irq(void)
204 out_be32(&intr->main_pri1, 0); 204 out_be32(&intr->main_pri1, 0);
205 out_be32(&intr->main_pri2, 0); 205 out_be32(&intr->main_pri2, 0);
206 206
207 /* Initialize irq_desc[i].handler's with mpc52xx_ic. */ 207 /* Initialize irq_desc[i].chip's with mpc52xx_ic. */
208 for (i = 0; i < NR_IRQS; i++) { 208 for (i = 0; i < NR_IRQS; i++) {
209 irq_desc[i].handler = &mpc52xx_ic; 209 irq_desc[i].chip = &mpc52xx_ic;
210 irq_desc[i].status = IRQ_LEVEL; 210 irq_desc[i].status = IRQ_LEVEL;
211 } 211 }
212 212
diff --git a/arch/ppc/syslib/mv64360_pic.c b/arch/ppc/syslib/mv64360_pic.c
index 5a19697060f..a4244d46838 100644
--- a/arch/ppc/syslib/mv64360_pic.c
+++ b/arch/ppc/syslib/mv64360_pic.c
@@ -119,7 +119,7 @@ mv64360_init_irq(void)
119 /* All interrupts are level interrupts */ 119 /* All interrupts are level interrupts */
120 for (i = mv64360_irq_base; i < (mv64360_irq_base + 96); i++) { 120 for (i = mv64360_irq_base; i < (mv64360_irq_base + 96); i++) {
121 irq_desc[i].status |= IRQ_LEVEL; 121 irq_desc[i].status |= IRQ_LEVEL;
122 irq_desc[i].handler = &mv64360_pic; 122 irq_desc[i].chip = &mv64360_pic;
123 } 123 }
124 124
125 if (ppc_md.progress) 125 if (ppc_md.progress)
diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c
index 70456c8f998..767a0bc9581 100644
--- a/arch/ppc/syslib/open_pic.c
+++ b/arch/ppc/syslib/open_pic.c
@@ -373,7 +373,7 @@ void __init openpic_init(int offset)
373 OPENPIC_VEC_IPI+i+offset); 373 OPENPIC_VEC_IPI+i+offset);
374 /* IPIs are per-CPU */ 374 /* IPIs are per-CPU */
375 irq_desc[OPENPIC_VEC_IPI+i+offset].status |= IRQ_PER_CPU; 375 irq_desc[OPENPIC_VEC_IPI+i+offset].status |= IRQ_PER_CPU;
376 irq_desc[OPENPIC_VEC_IPI+i+offset].handler = &open_pic_ipi; 376 irq_desc[OPENPIC_VEC_IPI+i+offset].chip = &open_pic_ipi;
377 } 377 }
378#endif 378#endif
379 379
@@ -408,7 +408,7 @@ void __init openpic_init(int offset)
408 408
409 /* Init descriptors */ 409 /* Init descriptors */
410 for (i = offset; i < NumSources + offset; i++) 410 for (i = offset; i < NumSources + offset; i++)
411 irq_desc[i].handler = &open_pic; 411 irq_desc[i].chip = &open_pic;
412 412
413 /* Initialize the spurious interrupt */ 413 /* Initialize the spurious interrupt */
414 if (ppc_md.progress) ppc_md.progress("openpic: spurious",0x3bd); 414 if (ppc_md.progress) ppc_md.progress("openpic: spurious",0x3bd);
@@ -615,8 +615,8 @@ void __devinit do_openpic_setup_cpu(void)
615 /* let the openpic know we want intrs. default affinity 615 /* let the openpic know we want intrs. default affinity
616 * is 0xffffffff until changed via /proc 616 * is 0xffffffff until changed via /proc
617 * That's how it's done on x86. If we want it differently, then 617 * That's how it's done on x86. If we want it differently, then
618 * we should make sure we also change the default values of irq_affinity 618 * we should make sure we also change the default values of
619 * in irq.c. 619 * irq_desc[].affinity in irq.c.
620 */ 620 */
621 for (i = 0; i < NumSources; i++) 621 for (i = 0; i < NumSources; i++)
622 openpic_mapirq(i, msk, CPU_MASK_ALL); 622 openpic_mapirq(i, msk, CPU_MASK_ALL);
diff --git a/arch/ppc/syslib/open_pic2.c b/arch/ppc/syslib/open_pic2.c
index bcbe40de26f..b8154efff6e 100644
--- a/arch/ppc/syslib/open_pic2.c
+++ b/arch/ppc/syslib/open_pic2.c
@@ -290,7 +290,7 @@ void __init openpic2_init(int offset)
290 290
291 /* Init descriptors */ 291 /* Init descriptors */
292 for (i = offset; i < NumSources + offset; i++) 292 for (i = offset; i < NumSources + offset; i++)
293 irq_desc[i].handler = &open_pic2; 293 irq_desc[i].chip = &open_pic2;
294 294
295 /* Initialize the spurious interrupt */ 295 /* Initialize the spurious interrupt */
296 if (ppc_md.progress) ppc_md.progress("openpic2: spurious",0x3bd); 296 if (ppc_md.progress) ppc_md.progress("openpic2: spurious",0x3bd);
diff --git a/arch/ppc/syslib/ppc403_pic.c b/arch/ppc/syslib/ppc403_pic.c
index c46043c4722..1584c8b1229 100644
--- a/arch/ppc/syslib/ppc403_pic.c
+++ b/arch/ppc/syslib/ppc403_pic.c
@@ -121,5 +121,5 @@ ppc4xx_pic_init(void)
121 ppc_md.get_irq = ppc403_pic_get_irq; 121 ppc_md.get_irq = ppc403_pic_get_irq;
122 122
123 for (i = 0; i < NR_IRQS; i++) 123 for (i = 0; i < NR_IRQS; i++)
124 irq_desc[i].handler = &ppc403_aic; 124 irq_desc[i].chip = &ppc403_aic;
125} 125}
diff --git a/arch/ppc/syslib/ppc4xx_pic.c b/arch/ppc/syslib/ppc4xx_pic.c
index fd9af0fc0e9..e669c1335d4 100644
--- a/arch/ppc/syslib/ppc4xx_pic.c
+++ b/arch/ppc/syslib/ppc4xx_pic.c
@@ -276,7 +276,7 @@ void __init ppc4xx_pic_init(void)
276 276
277 /* Attach low-level handlers */ 277 /* Attach low-level handlers */
278 for (i = 0; i < (NR_UICS << 5); ++i) { 278 for (i = 0; i < (NR_UICS << 5); ++i) {
279 irq_desc[i].handler = &__uic[i >> 5].decl; 279 irq_desc[i].chip = &__uic[i >> 5].decl;
280 if (is_level_sensitive(i)) 280 if (is_level_sensitive(i))
281 irq_desc[i].status |= IRQ_LEVEL; 281 irq_desc[i].status |= IRQ_LEVEL;
282 } 282 }
diff --git a/arch/ppc/syslib/xilinx_pic.c b/arch/ppc/syslib/xilinx_pic.c
index e672b600f31..39a93dc6375 100644
--- a/arch/ppc/syslib/xilinx_pic.c
+++ b/arch/ppc/syslib/xilinx_pic.c
@@ -143,7 +143,7 @@ ppc4xx_pic_init(void)
143 ppc_md.get_irq = xilinx_pic_get_irq; 143 ppc_md.get_irq = xilinx_pic_get_irq;
144 144
145 for (i = 0; i < NR_IRQS; ++i) { 145 for (i = 0; i < NR_IRQS; ++i) {
146 irq_desc[i].handler = &xilinx_intc; 146 irq_desc[i].chip = &xilinx_intc;
147 147
148 if (XPAR_INTC_0_KIND_OF_INTR & (0x00000001 << i)) 148 if (XPAR_INTC_0_KIND_OF_INTR & (0x00000001 << i))
149 irq_desc[i].status &= ~IRQ_LEVEL; 149 irq_desc[i].status &= ~IRQ_LEVEL;
diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c
index 9a22434a580..54d35c13090 100644
--- a/arch/s390/appldata/appldata_base.c
+++ b/arch/s390/appldata/appldata_base.c
@@ -652,7 +652,7 @@ appldata_cpu_notify(struct notifier_block *self,
652 return NOTIFY_OK; 652 return NOTIFY_OK;
653} 653}
654 654
655static struct notifier_block appldata_nb = { 655static struct notifier_block __devinitdata appldata_nb = {
656 .notifier_call = appldata_cpu_notify, 656 .notifier_call = appldata_cpu_notify,
657}; 657};
658 658
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 343120c9223..8e03219eea7 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -869,7 +869,7 @@ static int __init topology_init(void)
869 int ret; 869 int ret;
870 870
871 for_each_possible_cpu(cpu) { 871 for_each_possible_cpu(cpu) {
872 ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL); 872 ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu);
873 if (ret) 873 if (ret)
874 printk(KERN_WARNING "topology_init: register_cpu %d " 874 printk(KERN_WARNING "topology_init: register_cpu %d "
875 "failed (%d)\n", cpu, ret); 875 "failed (%d)\n", cpu, ret);
diff --git a/arch/sh/boards/adx/irq_maskreg.c b/arch/sh/boards/adx/irq_maskreg.c
index c0973f8d57b..357fab1bac2 100644
--- a/arch/sh/boards/adx/irq_maskreg.c
+++ b/arch/sh/boards/adx/irq_maskreg.c
@@ -102,6 +102,6 @@ static void end_maskreg_irq(unsigned int irq)
102void make_maskreg_irq(unsigned int irq) 102void make_maskreg_irq(unsigned int irq)
103{ 103{
104 disable_irq_nosync(irq); 104 disable_irq_nosync(irq);
105 irq_desc[irq].handler = &maskreg_irq_type; 105 irq_desc[irq].chip = &maskreg_irq_type;
106 disable_maskreg_irq(irq); 106 disable_maskreg_irq(irq);
107} 107}
diff --git a/arch/sh/boards/bigsur/irq.c b/arch/sh/boards/bigsur/irq.c
index 6ddbcc77244..1d32425782c 100644
--- a/arch/sh/boards/bigsur/irq.c
+++ b/arch/sh/boards/bigsur/irq.c
@@ -253,7 +253,7 @@ static void make_bigsur_l1isr(unsigned int irq) {
253 /* sanity check first */ 253 /* sanity check first */
254 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { 254 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
255 /* save the handler in the main description table */ 255 /* save the handler in the main description table */
256 irq_desc[irq].handler = &bigsur_l1irq_type; 256 irq_desc[irq].chip = &bigsur_l1irq_type;
257 irq_desc[irq].status = IRQ_DISABLED; 257 irq_desc[irq].status = IRQ_DISABLED;
258 irq_desc[irq].action = 0; 258 irq_desc[irq].action = 0;
259 irq_desc[irq].depth = 1; 259 irq_desc[irq].depth = 1;
@@ -270,7 +270,7 @@ static void make_bigsur_l2isr(unsigned int irq) {
270 /* sanity check first */ 270 /* sanity check first */
271 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { 271 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
272 /* save the handler in the main description table */ 272 /* save the handler in the main description table */
273 irq_desc[irq].handler = &bigsur_l2irq_type; 273 irq_desc[irq].chip = &bigsur_l2irq_type;
274 irq_desc[irq].status = IRQ_DISABLED; 274 irq_desc[irq].status = IRQ_DISABLED;
275 irq_desc[irq].action = 0; 275 irq_desc[irq].action = 0;
276 irq_desc[irq].depth = 1; 276 irq_desc[irq].depth = 1;
diff --git a/arch/sh/boards/cqreek/irq.c b/arch/sh/boards/cqreek/irq.c
index d1da0d84456..2955adc5231 100644
--- a/arch/sh/boards/cqreek/irq.c
+++ b/arch/sh/boards/cqreek/irq.c
@@ -103,7 +103,7 @@ void __init init_cqreek_IRQ(void)
103 cqreek_irq_data[14].stat_port = BRIDGE_IDE_INTR_STAT; 103 cqreek_irq_data[14].stat_port = BRIDGE_IDE_INTR_STAT;
104 cqreek_irq_data[14].bit = 1; 104 cqreek_irq_data[14].bit = 1;
105 105
106 irq_desc[14].handler = &cqreek_irq_type; 106 irq_desc[14].chip = &cqreek_irq_type;
107 irq_desc[14].status = IRQ_DISABLED; 107 irq_desc[14].status = IRQ_DISABLED;
108 irq_desc[14].action = 0; 108 irq_desc[14].action = 0;
109 irq_desc[14].depth = 1; 109 irq_desc[14].depth = 1;
@@ -117,7 +117,7 @@ void __init init_cqreek_IRQ(void)
117 cqreek_irq_data[10].bit = (1 << 10); 117 cqreek_irq_data[10].bit = (1 << 10);
118 118
119 /* XXX: Err... we may need demultiplexer for ISA irq... */ 119 /* XXX: Err... we may need demultiplexer for ISA irq... */
120 irq_desc[10].handler = &cqreek_irq_type; 120 irq_desc[10].chip = &cqreek_irq_type;
121 irq_desc[10].status = IRQ_DISABLED; 121 irq_desc[10].status = IRQ_DISABLED;
122 irq_desc[10].action = 0; 122 irq_desc[10].action = 0;
123 irq_desc[10].depth = 1; 123 irq_desc[10].depth = 1;
diff --git a/arch/sh/boards/dreamcast/setup.c b/arch/sh/boards/dreamcast/setup.c
index 55dece35cde..0027b80a234 100644
--- a/arch/sh/boards/dreamcast/setup.c
+++ b/arch/sh/boards/dreamcast/setup.c
@@ -70,7 +70,7 @@ int __init platform_setup(void)
70 70
71 /* Assign all virtual IRQs to the System ASIC int. handler */ 71 /* Assign all virtual IRQs to the System ASIC int. handler */
72 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) 72 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
73 irq_desc[i].handler = &systemasic_int; 73 irq_desc[i].chip = &systemasic_int;
74 74
75 board_time_init = aica_time_init; 75 board_time_init = aica_time_init;
76 76
diff --git a/arch/sh/boards/ec3104/setup.c b/arch/sh/boards/ec3104/setup.c
index 5130ba2b6ff..4b3ef16a0e9 100644
--- a/arch/sh/boards/ec3104/setup.c
+++ b/arch/sh/boards/ec3104/setup.c
@@ -63,7 +63,7 @@ int __init platform_setup(void)
63 str[i] = ctrl_readb(EC3104_BASE + i); 63 str[i] = ctrl_readb(EC3104_BASE + i);
64 64
65 for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++) 65 for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++)
66 irq_desc[i].handler = &ec3104_int; 66 irq_desc[i].chip = &ec3104_int;
67 67
68 printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n", 68 printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n",
69 str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE); 69 str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE);
diff --git a/arch/sh/boards/harp/irq.c b/arch/sh/boards/harp/irq.c
index 52d0ba39031..701fa55d529 100644
--- a/arch/sh/boards/harp/irq.c
+++ b/arch/sh/boards/harp/irq.c
@@ -114,7 +114,7 @@ static void enable_harp_irq(unsigned int irq)
114static void __init make_harp_irq(unsigned int irq) 114static void __init make_harp_irq(unsigned int irq)
115{ 115{
116 disable_irq_nosync(irq); 116 disable_irq_nosync(irq);
117 irq_desc[irq].handler = &harp_irq_type; 117 irq_desc[irq].chip = &harp_irq_type;
118 disable_harp_irq(irq); 118 disable_harp_irq(irq);
119} 119}
120 120
diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c
index 2bb581b9168..b72f009c52c 100644
--- a/arch/sh/boards/mpc1211/setup.c
+++ b/arch/sh/boards/mpc1211/setup.c
@@ -194,7 +194,7 @@ static struct hw_interrupt_type mpc1211_irq_type = {
194 194
195static void make_mpc1211_irq(unsigned int irq) 195static void make_mpc1211_irq(unsigned int irq)
196{ 196{
197 irq_desc[irq].handler = &mpc1211_irq_type; 197 irq_desc[irq].chip = &mpc1211_irq_type;
198 irq_desc[irq].status = IRQ_DISABLED; 198 irq_desc[irq].status = IRQ_DISABLED;
199 irq_desc[irq].action = 0; 199 irq_desc[irq].action = 0;
200 irq_desc[irq].depth = 1; 200 irq_desc[irq].depth = 1;
diff --git a/arch/sh/boards/overdrive/irq.c b/arch/sh/boards/overdrive/irq.c
index 715e8feb3a6..2c13a7de6b2 100644
--- a/arch/sh/boards/overdrive/irq.c
+++ b/arch/sh/boards/overdrive/irq.c
@@ -150,7 +150,7 @@ static void enable_od_irq(unsigned int irq)
150static void __init make_od_irq(unsigned int irq) 150static void __init make_od_irq(unsigned int irq)
151{ 151{
152 disable_irq_nosync(irq); 152 disable_irq_nosync(irq);
153 irq_desc[irq].handler = &od_irq_type; 153 irq_desc[irq].chip = &od_irq_type;
154 disable_od_irq(irq); 154 disable_od_irq(irq);
155} 155}
156 156
diff --git a/arch/sh/boards/renesas/hs7751rvoip/irq.c b/arch/sh/boards/renesas/hs7751rvoip/irq.c
index ed4c5b50ea4..52a98b524e1 100644
--- a/arch/sh/boards/renesas/hs7751rvoip/irq.c
+++ b/arch/sh/boards/renesas/hs7751rvoip/irq.c
@@ -86,7 +86,7 @@ static struct hw_interrupt_type hs7751rvoip_irq_type = {
86static void make_hs7751rvoip_irq(unsigned int irq) 86static void make_hs7751rvoip_irq(unsigned int irq)
87{ 87{
88 disable_irq_nosync(irq); 88 disable_irq_nosync(irq);
89 irq_desc[irq].handler = &hs7751rvoip_irq_type; 89 irq_desc[irq].chip = &hs7751rvoip_irq_type;
90 disable_hs7751rvoip_irq(irq); 90 disable_hs7751rvoip_irq(irq);
91} 91}
92 92
diff --git a/arch/sh/boards/renesas/rts7751r2d/irq.c b/arch/sh/boards/renesas/rts7751r2d/irq.c
index d36c9374aed..e16915d9cda 100644
--- a/arch/sh/boards/renesas/rts7751r2d/irq.c
+++ b/arch/sh/boards/renesas/rts7751r2d/irq.c
@@ -100,7 +100,7 @@ static struct hw_interrupt_type rts7751r2d_irq_type = {
100static void make_rts7751r2d_irq(unsigned int irq) 100static void make_rts7751r2d_irq(unsigned int irq)
101{ 101{
102 disable_irq_nosync(irq); 102 disable_irq_nosync(irq);
103 irq_desc[irq].handler = &rts7751r2d_irq_type; 103 irq_desc[irq].chip = &rts7751r2d_irq_type;
104 disable_rts7751r2d_irq(irq); 104 disable_rts7751r2d_irq(irq);
105} 105}
106 106
diff --git a/arch/sh/boards/renesas/systemh/irq.c b/arch/sh/boards/renesas/systemh/irq.c
index 7a2eb10edb5..84597918105 100644
--- a/arch/sh/boards/renesas/systemh/irq.c
+++ b/arch/sh/boards/renesas/systemh/irq.c
@@ -105,7 +105,7 @@ static void end_systemh_irq(unsigned int irq)
105void make_systemh_irq(unsigned int irq) 105void make_systemh_irq(unsigned int irq)
106{ 106{
107 disable_irq_nosync(irq); 107 disable_irq_nosync(irq);
108 irq_desc[irq].handler = &systemh_irq_type; 108 irq_desc[irq].chip = &systemh_irq_type;
109 disable_systemh_irq(irq); 109 disable_systemh_irq(irq);
110} 110}
111 111
diff --git a/arch/sh/boards/se/73180/irq.c b/arch/sh/boards/se/73180/irq.c
index 70f04caad9a..402735c7c89 100644
--- a/arch/sh/boards/se/73180/irq.c
+++ b/arch/sh/boards/se/73180/irq.c
@@ -85,7 +85,7 @@ void
85make_intreq_irq(unsigned int irq) 85make_intreq_irq(unsigned int irq)
86{ 86{
87 disable_irq_nosync(irq); 87 disable_irq_nosync(irq);
88 irq_desc[irq].handler = &intreq_irq_type; 88 irq_desc[irq].chip = &intreq_irq_type;
89 disable_intreq_irq(irq); 89 disable_intreq_irq(irq);
90} 90}
91 91
diff --git a/arch/sh/boards/superh/microdev/irq.c b/arch/sh/boards/superh/microdev/irq.c
index efcbd86b7cd..cb5999425d1 100644
--- a/arch/sh/boards/superh/microdev/irq.c
+++ b/arch/sh/boards/superh/microdev/irq.c
@@ -147,7 +147,7 @@ static void enable_microdev_irq(unsigned int irq)
147static void __init make_microdev_irq(unsigned int irq) 147static void __init make_microdev_irq(unsigned int irq)
148{ 148{
149 disable_irq_nosync(irq); 149 disable_irq_nosync(irq);
150 irq_desc[irq].handler = &microdev_irq_type; 150 irq_desc[irq].chip = &microdev_irq_type;
151 disable_microdev_irq(irq); 151 disable_microdev_irq(irq);
152} 152}
153 153
diff --git a/arch/sh/cchips/hd6446x/hd64461/setup.c b/arch/sh/cchips/hd6446x/hd64461/setup.c
index f014b9bf692..724db04cb39 100644
--- a/arch/sh/cchips/hd6446x/hd64461/setup.c
+++ b/arch/sh/cchips/hd6446x/hd64461/setup.c
@@ -154,7 +154,7 @@ int __init setup_hd64461(void)
154 outw(0xffff, HD64461_NIMR); 154 outw(0xffff, HD64461_NIMR);
155 155
156 for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) { 156 for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) {
157 irq_desc[i].handler = &hd64461_irq_type; 157 irq_desc[i].chip = &hd64461_irq_type;
158 } 158 }
159 159
160 setup_irq(CONFIG_HD64461_IRQ, &irq0); 160 setup_irq(CONFIG_HD64461_IRQ, &irq0);
diff --git a/arch/sh/cchips/hd6446x/hd64465/setup.c b/arch/sh/cchips/hd6446x/hd64465/setup.c
index 68e4c4e4283..cf9142c620b 100644
--- a/arch/sh/cchips/hd6446x/hd64465/setup.c
+++ b/arch/sh/cchips/hd6446x/hd64465/setup.c
@@ -182,7 +182,7 @@ static int __init setup_hd64465(void)
182 outw(0xffff, HD64465_REG_NIMR); /* mask all interrupts */ 182 outw(0xffff, HD64465_REG_NIMR); /* mask all interrupts */
183 183
184 for (i = 0; i < HD64465_IRQ_NUM ; i++) { 184 for (i = 0; i < HD64465_IRQ_NUM ; i++) {
185 irq_desc[HD64465_IRQ_BASE + i].handler = &hd64465_irq_type; 185 irq_desc[HD64465_IRQ_BASE + i].chip = &hd64465_irq_type;
186 } 186 }
187 187
188 setup_irq(CONFIG_HD64465_IRQ, &irq0); 188 setup_irq(CONFIG_HD64465_IRQ, &irq0);
diff --git a/arch/sh/cchips/voyagergx/irq.c b/arch/sh/cchips/voyagergx/irq.c
index 2ee330b3c38..892214bade1 100644
--- a/arch/sh/cchips/voyagergx/irq.c
+++ b/arch/sh/cchips/voyagergx/irq.c
@@ -191,7 +191,7 @@ void __init setup_voyagergx_irq(void)
191 flag = 1; 191 flag = 1;
192 } 192 }
193 if (flag == 1) 193 if (flag == 1)
194 irq_desc[VOYAGER_IRQ_BASE + i].handler = &voyagergx_irq_type; 194 irq_desc[VOYAGER_IRQ_BASE + i].chip = &voyagergx_irq_type;
195 } 195 }
196 196
197 setup_irq(IRQ_VOYAGER, &irq0); 197 setup_irq(IRQ_VOYAGER, &irq0);
diff --git a/arch/sh/kernel/cpu/irq/imask.c b/arch/sh/kernel/cpu/irq/imask.c
index baed9a550d3..a33ae3e0a5a 100644
--- a/arch/sh/kernel/cpu/irq/imask.c
+++ b/arch/sh/kernel/cpu/irq/imask.c
@@ -105,6 +105,6 @@ static void shutdown_imask_irq(unsigned int irq)
105void make_imask_irq(unsigned int irq) 105void make_imask_irq(unsigned int irq)
106{ 106{
107 disable_irq_nosync(irq); 107 disable_irq_nosync(irq);
108 irq_desc[irq].handler = &imask_irq_type; 108 irq_desc[irq].chip = &imask_irq_type;
109 enable_irq(irq); 109 enable_irq(irq);
110} 110}
diff --git a/arch/sh/kernel/cpu/irq/intc2.c b/arch/sh/kernel/cpu/irq/intc2.c
index 06e8afab32e..30064bf6e15 100644
--- a/arch/sh/kernel/cpu/irq/intc2.c
+++ b/arch/sh/kernel/cpu/irq/intc2.c
@@ -137,7 +137,7 @@ void make_intc2_irq(unsigned int irq,
137 137
138 local_irq_restore(flags); 138 local_irq_restore(flags);
139 139
140 irq_desc[irq].handler = &intc2_irq_type; 140 irq_desc[irq].chip = &intc2_irq_type;
141 141
142 disable_intc2_irq(irq); 142 disable_intc2_irq(irq);
143} 143}
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index e55150ed085..0373b65c77f 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -115,7 +115,7 @@ void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority)
115 ipr_data[irq].shift = pos*4; /* POSition (0-3) x 4 means shift */ 115 ipr_data[irq].shift = pos*4; /* POSition (0-3) x 4 means shift */
116 ipr_data[irq].priority = priority; 116 ipr_data[irq].priority = priority;
117 117
118 irq_desc[irq].handler = &ipr_irq_type; 118 irq_desc[irq].chip = &ipr_irq_type;
119 disable_ipr_irq(irq); 119 disable_ipr_irq(irq);
120} 120}
121 121
diff --git a/arch/sh/kernel/cpu/irq/pint.c b/arch/sh/kernel/cpu/irq/pint.c
index 95d6024fe1a..714963a25bb 100644
--- a/arch/sh/kernel/cpu/irq/pint.c
+++ b/arch/sh/kernel/cpu/irq/pint.c
@@ -85,7 +85,7 @@ static void end_pint_irq(unsigned int irq)
85void make_pint_irq(unsigned int irq) 85void make_pint_irq(unsigned int irq)
86{ 86{
87 disable_irq_nosync(irq); 87 disable_irq_nosync(irq);
88 irq_desc[irq].handler = &pint_irq_type; 88 irq_desc[irq].chip = &pint_irq_type;
89 disable_pint_irq(irq); 89 disable_pint_irq(irq);
90} 90}
91 91
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index b56e79632f2..c2e07f7f349 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -47,7 +47,7 @@ int show_interrupts(struct seq_file *p, void *v)
47 goto unlock; 47 goto unlock;
48 seq_printf(p, "%3d: ",i); 48 seq_printf(p, "%3d: ",i);
49 seq_printf(p, "%10u ", kstat_irqs(i)); 49 seq_printf(p, "%10u ", kstat_irqs(i));
50 seq_printf(p, " %14s", irq_desc[i].handler->typename); 50 seq_printf(p, " %14s", irq_desc[i].chip->typename);
51 seq_printf(p, " %s", action->name); 51 seq_printf(p, " %s", action->name);
52 52
53 for (action=action->next; action; action = action->next) 53 for (action=action->next; action; action = action->next)
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index bb229ef030f..9af22116c9a 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -402,7 +402,7 @@ static int __init topology_init(void)
402 int cpu_id; 402 int cpu_id;
403 403
404 for_each_possible_cpu(cpu_id) 404 for_each_possible_cpu(cpu_id)
405 register_cpu(&cpu[cpu_id], cpu_id, NULL); 405 register_cpu(&cpu[cpu_id], cpu_id);
406 406
407 return 0; 407 return 0;
408} 408}
diff --git a/arch/sh64/kernel/irq.c b/arch/sh64/kernel/irq.c
index d69879c0e06..675776a5477 100644
--- a/arch/sh64/kernel/irq.c
+++ b/arch/sh64/kernel/irq.c
@@ -65,7 +65,7 @@ int show_interrupts(struct seq_file *p, void *v)
65 goto unlock; 65 goto unlock;
66 seq_printf(p, "%3d: ",i); 66 seq_printf(p, "%3d: ",i);
67 seq_printf(p, "%10u ", kstat_irqs(i)); 67 seq_printf(p, "%10u ", kstat_irqs(i));
68 seq_printf(p, " %14s", irq_desc[i].handler->typename); 68 seq_printf(p, " %14s", irq_desc[i].chip->typename);
69 seq_printf(p, " %s", action->name); 69 seq_printf(p, " %s", action->name);
70 70
71 for (action=action->next; action; action = action->next) 71 for (action=action->next; action; action = action->next)
diff --git a/arch/sh64/kernel/irq_intc.c b/arch/sh64/kernel/irq_intc.c
index fc99bf4e362..fa730f5fe2e 100644
--- a/arch/sh64/kernel/irq_intc.c
+++ b/arch/sh64/kernel/irq_intc.c
@@ -178,7 +178,7 @@ static void end_intc_irq(unsigned int irq)
178void make_intc_irq(unsigned int irq) 178void make_intc_irq(unsigned int irq)
179{ 179{
180 disable_irq_nosync(irq); 180 disable_irq_nosync(irq);
181 irq_desc[irq].handler = &intc_irq_type; 181 irq_desc[irq].chip = &intc_irq_type;
182 disable_intc_irq(irq); 182 disable_intc_irq(irq);
183} 183}
184 184
@@ -208,7 +208,7 @@ void __init init_IRQ(void)
208 /* Set default: per-line enable/disable, priority driven ack/eoi */ 208 /* Set default: per-line enable/disable, priority driven ack/eoi */
209 for (i = 0; i < NR_INTC_IRQS; i++) { 209 for (i = 0; i < NR_INTC_IRQS; i++) {
210 if (platform_int_priority[i] != NO_PRIORITY) { 210 if (platform_int_priority[i] != NO_PRIORITY) {
211 irq_desc[i].handler = &intc_irq_type; 211 irq_desc[i].chip = &intc_irq_type;
212 } 212 }
213 } 213 }
214 214
diff --git a/arch/sh64/kernel/setup.c b/arch/sh64/kernel/setup.c
index d2711c9c9d1..da98d8dbcf9 100644
--- a/arch/sh64/kernel/setup.c
+++ b/arch/sh64/kernel/setup.c
@@ -309,7 +309,7 @@ static struct cpu cpu[1];
309 309
310static int __init topology_init(void) 310static int __init topology_init(void)
311{ 311{
312 return register_cpu(cpu, 0, NULL); 312 return register_cpu(cpu, 0);
313} 313}
314 314
315subsys_initcall(topology_init); 315subsys_initcall(topology_init);
diff --git a/arch/sh64/mach-cayman/irq.c b/arch/sh64/mach-cayman/irq.c
index f797c84bfdd..05eb7cdc26f 100644
--- a/arch/sh64/mach-cayman/irq.c
+++ b/arch/sh64/mach-cayman/irq.c
@@ -187,7 +187,7 @@ void init_cayman_irq(void)
187 } 187 }
188 188
189 for (i=0; i<NR_EXT_IRQS; i++) { 189 for (i=0; i<NR_EXT_IRQS; i++) {
190 irq_desc[START_EXT_IRQS + i].handler = &cayman_irq_type; 190 irq_desc[START_EXT_IRQS + i].chip = &cayman_irq_type;
191 } 191 }
192 192
193 /* Setup the SMSC interrupt */ 193 /* Setup the SMSC interrupt */
diff --git a/arch/sparc/kernel/setup.c b/arch/sparc/kernel/setup.c
index a893a9cc953..2e5d08ce217 100644
--- a/arch/sparc/kernel/setup.c
+++ b/arch/sparc/kernel/setup.c
@@ -496,7 +496,7 @@ static int __init topology_init(void)
496 if (!p) 496 if (!p)
497 err = -ENOMEM; 497 err = -ENOMEM;
498 else 498 else
499 register_cpu(p, i, NULL); 499 register_cpu(p, i);
500 } 500 }
501 501
502 return err; 502 return err;
diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c
index cc89b06d017..ab9e640df22 100644
--- a/arch/sparc64/kernel/irq.c
+++ b/arch/sparc64/kernel/irq.c
@@ -151,7 +151,7 @@ int show_interrupts(struct seq_file *p, void *v)
151 for_each_online_cpu(j) 151 for_each_online_cpu(j)
152 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 152 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
153#endif 153#endif
154 seq_printf(p, " %9s", irq_desc[i].handler->typename); 154 seq_printf(p, " %9s", irq_desc[i].chip->typename);
155 seq_printf(p, " %s", action->name); 155 seq_printf(p, " %s", action->name);
156 156
157 for (action=action->next; action; action = action->next) 157 for (action=action->next; action; action = action->next)
@@ -224,7 +224,7 @@ static inline struct ino_bucket *virt_irq_to_bucket(unsigned int virt_irq)
224#ifdef CONFIG_SMP 224#ifdef CONFIG_SMP
225static int irq_choose_cpu(unsigned int virt_irq) 225static int irq_choose_cpu(unsigned int virt_irq)
226{ 226{
227 cpumask_t mask = irq_affinity[virt_irq]; 227 cpumask_t mask = irq_desc[virt_irq].affinity;
228 int cpuid; 228 int cpuid;
229 229
230 if (cpus_equal(mask, CPU_MASK_ALL)) { 230 if (cpus_equal(mask, CPU_MASK_ALL)) {
@@ -414,8 +414,8 @@ void irq_install_pre_handler(int virt_irq,
414 data->pre_handler_arg1 = arg1; 414 data->pre_handler_arg1 = arg1;
415 data->pre_handler_arg2 = arg2; 415 data->pre_handler_arg2 = arg2;
416 416
417 desc->handler = (desc->handler == &sun4u_irq ? 417 desc->chip = (desc->chip == &sun4u_irq ?
418 &sun4u_irq_ack : &sun4v_irq_ack); 418 &sun4u_irq_ack : &sun4v_irq_ack);
419} 419}
420 420
421unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap) 421unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
@@ -431,7 +431,7 @@ unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
431 bucket = &ivector_table[ino]; 431 bucket = &ivector_table[ino];
432 if (!bucket->virt_irq) { 432 if (!bucket->virt_irq) {
433 bucket->virt_irq = virt_irq_alloc(__irq(bucket)); 433 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
434 irq_desc[bucket->virt_irq].handler = &sun4u_irq; 434 irq_desc[bucket->virt_irq].chip = &sun4u_irq;
435 } 435 }
436 436
437 desc = irq_desc + bucket->virt_irq; 437 desc = irq_desc + bucket->virt_irq;
@@ -465,7 +465,7 @@ unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
465 bucket = &ivector_table[sysino]; 465 bucket = &ivector_table[sysino];
466 if (!bucket->virt_irq) { 466 if (!bucket->virt_irq) {
467 bucket->virt_irq = virt_irq_alloc(__irq(bucket)); 467 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
468 irq_desc[bucket->virt_irq].handler = &sun4v_irq; 468 irq_desc[bucket->virt_irq].chip = &sun4v_irq;
469 } 469 }
470 470
471 desc = irq_desc + bucket->virt_irq; 471 desc = irq_desc + bucket->virt_irq;
diff --git a/arch/sparc64/kernel/setup.c b/arch/sparc64/kernel/setup.c
index a6a7d816834..116d9632002 100644
--- a/arch/sparc64/kernel/setup.c
+++ b/arch/sparc64/kernel/setup.c
@@ -537,7 +537,7 @@ static int __init topology_init(void)
537 for_each_possible_cpu(i) { 537 for_each_possible_cpu(i) {
538 struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL); 538 struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL);
539 if (p) { 539 if (p) {
540 register_cpu(p, i, NULL); 540 register_cpu(p, i);
541 err = 0; 541 err = 0;
542 } 542 }
543 } 543 }
diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c
index 5c2bcf354ce..cb75a27adb5 100644
--- a/arch/sparc64/mm/init.c
+++ b/arch/sparc64/mm/init.c
@@ -18,6 +18,7 @@
18#include <linux/initrd.h> 18#include <linux/initrd.h>
19#include <linux/swap.h> 19#include <linux/swap.h>
20#include <linux/pagemap.h> 20#include <linux/pagemap.h>
21#include <linux/poison.h>
21#include <linux/fs.h> 22#include <linux/fs.h>
22#include <linux/seq_file.h> 23#include <linux/seq_file.h>
23#include <linux/kprobes.h> 24#include <linux/kprobes.h>
@@ -1520,7 +1521,7 @@ void free_initmem(void)
1520 page = (addr + 1521 page = (addr +
1521 ((unsigned long) __va(kern_base)) - 1522 ((unsigned long) __va(kern_base)) -
1522 ((unsigned long) KERNBASE)); 1523 ((unsigned long) KERNBASE));
1523 memset((void *)addr, 0xcc, PAGE_SIZE); 1524 memset((void *)addr, POISON_FREE_INITMEM, PAGE_SIZE);
1524 p = virt_to_page(page); 1525 p = virt_to_page(page);
1525 1526
1526 ClearPageReserved(p); 1527 ClearPageReserved(p);
diff --git a/arch/um/kernel/irq.c b/arch/um/kernel/irq.c
index 2ffda012385..fae43a3054a 100644
--- a/arch/um/kernel/irq.c
+++ b/arch/um/kernel/irq.c
@@ -63,7 +63,7 @@ int show_interrupts(struct seq_file *p, void *v)
63 for_each_online_cpu(j) 63 for_each_online_cpu(j)
64 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 64 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
65#endif 65#endif
66 seq_printf(p, " %14s", irq_desc[i].handler->typename); 66 seq_printf(p, " %14s", irq_desc[i].chip->typename);
67 seq_printf(p, " %s", action->name); 67 seq_printf(p, " %s", action->name);
68 68
69 for (action=action->next; action; action = action->next) 69 for (action=action->next; action; action = action->next)
@@ -451,13 +451,13 @@ void __init init_IRQ(void)
451 irq_desc[TIMER_IRQ].status = IRQ_DISABLED; 451 irq_desc[TIMER_IRQ].status = IRQ_DISABLED;
452 irq_desc[TIMER_IRQ].action = NULL; 452 irq_desc[TIMER_IRQ].action = NULL;
453 irq_desc[TIMER_IRQ].depth = 1; 453 irq_desc[TIMER_IRQ].depth = 1;
454 irq_desc[TIMER_IRQ].handler = &SIGVTALRM_irq_type; 454 irq_desc[TIMER_IRQ].chip = &SIGVTALRM_irq_type;
455 enable_irq(TIMER_IRQ); 455 enable_irq(TIMER_IRQ);
456 for (i = 1; i < NR_IRQS; i++) { 456 for (i = 1; i < NR_IRQS; i++) {
457 irq_desc[i].status = IRQ_DISABLED; 457 irq_desc[i].status = IRQ_DISABLED;
458 irq_desc[i].action = NULL; 458 irq_desc[i].action = NULL;
459 irq_desc[i].depth = 1; 459 irq_desc[i].depth = 1;
460 irq_desc[i].handler = &normal_irq_type; 460 irq_desc[i].chip = &normal_irq_type;
461 enable_irq(i); 461 enable_irq(i);
462 } 462 }
463} 463}
diff --git a/arch/v850/kernel/irq.c b/arch/v850/kernel/irq.c
index 7a151c26f82..858c45819aa 100644
--- a/arch/v850/kernel/irq.c
+++ b/arch/v850/kernel/irq.c
@@ -65,10 +65,10 @@ int show_interrupts(struct seq_file *p, void *v)
65 int j; 65 int j;
66 int count = 0; 66 int count = 0;
67 int num = -1; 67 int num = -1;
68 const char *type_name = irq_desc[irq].handler->typename; 68 const char *type_name = irq_desc[irq].chip->typename;
69 69
70 for (j = 0; j < NR_IRQS; j++) 70 for (j = 0; j < NR_IRQS; j++)
71 if (irq_desc[j].handler->typename == type_name){ 71 if (irq_desc[j].chip->typename == type_name){
72 if (irq == j) 72 if (irq == j)
73 num = count; 73 num = count;
74 count++; 74 count++;
@@ -117,7 +117,7 @@ init_irq_handlers (int base_irq, int num, int interval,
117 irq_desc[base_irq].status = IRQ_DISABLED; 117 irq_desc[base_irq].status = IRQ_DISABLED;
118 irq_desc[base_irq].action = NULL; 118 irq_desc[base_irq].action = NULL;
119 irq_desc[base_irq].depth = 1; 119 irq_desc[base_irq].depth = 1;
120 irq_desc[base_irq].handler = irq_type; 120 irq_desc[base_irq].chip = irq_type;
121 base_irq += interval; 121 base_irq += interval;
122 } 122 }
123} 123}
diff --git a/arch/x86_64/Kconfig b/arch/x86_64/Kconfig
index ccc4a7fb97a..91039844820 100644
--- a/arch/x86_64/Kconfig
+++ b/arch/x86_64/Kconfig
@@ -370,6 +370,8 @@ config HOTPLUG_CPU
370 can be controlled through /sys/devices/system/cpu/cpu#. 370 can be controlled through /sys/devices/system/cpu/cpu#.
371 Say N if you want to disable CPU hotplug. 371 Say N if you want to disable CPU hotplug.
372 372
373config ARCH_ENABLE_MEMORY_HOTPLUG
374 def_bool y
373 375
374config HPET_TIMER 376config HPET_TIMER
375 bool 377 bool
diff --git a/arch/x86_64/kernel/entry.S b/arch/x86_64/kernel/entry.S
index 7290e72b9a3..22cac4487b5 100644
--- a/arch/x86_64/kernel/entry.S
+++ b/arch/x86_64/kernel/entry.S
@@ -588,7 +588,7 @@ END(common_interrupt)
588 */ 588 */
589 .macro apicinterrupt num,func 589 .macro apicinterrupt num,func
590 INTR_FRAME 590 INTR_FRAME
591 pushq $\num-256 591 pushq $~(\num)
592 CFI_ADJUST_CFA_OFFSET 8 592 CFI_ADJUST_CFA_OFFSET 8
593 interrupt \func 593 interrupt \func
594 jmp ret_from_intr 594 jmp ret_from_intr
diff --git a/arch/x86_64/kernel/i8259.c b/arch/x86_64/kernel/i8259.c
index 86b2c1e197a..3dd1659427d 100644
--- a/arch/x86_64/kernel/i8259.c
+++ b/arch/x86_64/kernel/i8259.c
@@ -235,7 +235,7 @@ void make_8259A_irq(unsigned int irq)
235{ 235{
236 disable_irq_nosync(irq); 236 disable_irq_nosync(irq);
237 io_apic_irqs &= ~(1<<irq); 237 io_apic_irqs &= ~(1<<irq);
238 irq_desc[irq].handler = &i8259A_irq_type; 238 irq_desc[irq].chip = &i8259A_irq_type;
239 enable_irq(irq); 239 enable_irq(irq);
240} 240}
241 241
@@ -468,12 +468,12 @@ void __init init_ISA_irqs (void)
468 /* 468 /*
469 * 16 old-style INTA-cycle interrupts: 469 * 16 old-style INTA-cycle interrupts:
470 */ 470 */
471 irq_desc[i].handler = &i8259A_irq_type; 471 irq_desc[i].chip = &i8259A_irq_type;
472 } else { 472 } else {
473 /* 473 /*
474 * 'high' PCI IRQs filled in on demand 474 * 'high' PCI IRQs filled in on demand
475 */ 475 */
476 irq_desc[i].handler = &no_irq_type; 476 irq_desc[i].chip = &no_irq_type;
477 } 477 }
478 } 478 }
479} 479}
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c
index c768d8a036d..401b687fef2 100644
--- a/arch/x86_64/kernel/io_apic.c
+++ b/arch/x86_64/kernel/io_apic.c
@@ -876,15 +876,17 @@ static struct hw_interrupt_type ioapic_edge_type;
876#define IOAPIC_EDGE 0 876#define IOAPIC_EDGE 0
877#define IOAPIC_LEVEL 1 877#define IOAPIC_LEVEL 1
878 878
879static inline void ioapic_register_intr(int irq, int vector, unsigned long trigger) 879static void ioapic_register_intr(int irq, int vector, unsigned long trigger)
880{ 880{
881 unsigned idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq; 881 unsigned idx;
882
883 idx = use_pci_vector() && !platform_legacy_irq(irq) ? vector : irq;
882 884
883 if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || 885 if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
884 trigger == IOAPIC_LEVEL) 886 trigger == IOAPIC_LEVEL)
885 irq_desc[idx].handler = &ioapic_level_type; 887 irq_desc[idx].chip = &ioapic_level_type;
886 else 888 else
887 irq_desc[idx].handler = &ioapic_edge_type; 889 irq_desc[idx].chip = &ioapic_edge_type;
888 set_intr_gate(vector, interrupt[idx]); 890 set_intr_gate(vector, interrupt[idx]);
889} 891}
890 892
@@ -986,7 +988,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in
986 * The timer IRQ doesn't have to know that behind the 988 * The timer IRQ doesn't have to know that behind the
987 * scene we have a 8259A-master in AEOI mode ... 989 * scene we have a 8259A-master in AEOI mode ...
988 */ 990 */
989 irq_desc[0].handler = &ioapic_edge_type; 991 irq_desc[0].chip = &ioapic_edge_type;
990 992
991 /* 993 /*
992 * Add it to the IO-APIC irq-routing table: 994 * Add it to the IO-APIC irq-routing table:
@@ -1616,6 +1618,13 @@ static void set_ioapic_affinity_vector (unsigned int vector,
1616#endif // CONFIG_SMP 1618#endif // CONFIG_SMP
1617#endif // CONFIG_PCI_MSI 1619#endif // CONFIG_PCI_MSI
1618 1620
1621static int ioapic_retrigger(unsigned int irq)
1622{
1623 send_IPI_self(IO_APIC_VECTOR(irq));
1624
1625 return 1;
1626}
1627
1619/* 1628/*
1620 * Level and edge triggered IO-APIC interrupts need different handling, 1629 * Level and edge triggered IO-APIC interrupts need different handling,
1621 * so we use two separate IRQ descriptors. Edge triggered IRQs can be 1630 * so we use two separate IRQ descriptors. Edge triggered IRQs can be
@@ -1636,6 +1645,7 @@ static struct hw_interrupt_type ioapic_edge_type __read_mostly = {
1636#ifdef CONFIG_SMP 1645#ifdef CONFIG_SMP
1637 .set_affinity = set_ioapic_affinity, 1646 .set_affinity = set_ioapic_affinity,
1638#endif 1647#endif
1648 .retrigger = ioapic_retrigger,
1639}; 1649};
1640 1650
1641static struct hw_interrupt_type ioapic_level_type __read_mostly = { 1651static struct hw_interrupt_type ioapic_level_type __read_mostly = {
@@ -1649,6 +1659,7 @@ static struct hw_interrupt_type ioapic_level_type __read_mostly = {
1649#ifdef CONFIG_SMP 1659#ifdef CONFIG_SMP
1650 .set_affinity = set_ioapic_affinity, 1660 .set_affinity = set_ioapic_affinity,
1651#endif 1661#endif
1662 .retrigger = ioapic_retrigger,
1652}; 1663};
1653 1664
1654static inline void init_IO_APIC_traps(void) 1665static inline void init_IO_APIC_traps(void)
@@ -1683,7 +1694,7 @@ static inline void init_IO_APIC_traps(void)
1683 make_8259A_irq(irq); 1694 make_8259A_irq(irq);
1684 else 1695 else
1685 /* Strange. Oh, well.. */ 1696 /* Strange. Oh, well.. */
1686 irq_desc[irq].handler = &no_irq_type; 1697 irq_desc[irq].chip = &no_irq_type;
1687 } 1698 }
1688 } 1699 }
1689} 1700}
@@ -1900,7 +1911,7 @@ static inline void check_timer(void)
1900 apic_printk(APIC_VERBOSE, KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); 1911 apic_printk(APIC_VERBOSE, KERN_INFO "...trying to set up timer as Virtual Wire IRQ...");
1901 1912
1902 disable_8259A_irq(0); 1913 disable_8259A_irq(0);
1903 irq_desc[0].handler = &lapic_irq_type; 1914 irq_desc[0].chip = &lapic_irq_type;
1904 apic_write(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ 1915 apic_write(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */
1905 enable_8259A_irq(0); 1916 enable_8259A_irq(0);
1906 1917
diff --git a/arch/x86_64/kernel/irq.c b/arch/x86_64/kernel/irq.c
index 59518d4d435..a1f1df5f7bf 100644
--- a/arch/x86_64/kernel/irq.c
+++ b/arch/x86_64/kernel/irq.c
@@ -79,7 +79,7 @@ int show_interrupts(struct seq_file *p, void *v)
79 for_each_online_cpu(j) 79 for_each_online_cpu(j)
80 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 80 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
81#endif 81#endif
82 seq_printf(p, " %14s", irq_desc[i].handler->typename); 82 seq_printf(p, " %14s", irq_desc[i].chip->typename);
83 83
84 seq_printf(p, " %s", action->name); 84 seq_printf(p, " %s", action->name);
85 for (action=action->next; action; action = action->next) 85 for (action=action->next; action; action = action->next)
@@ -115,8 +115,14 @@ skip:
115 */ 115 */
116asmlinkage unsigned int do_IRQ(struct pt_regs *regs) 116asmlinkage unsigned int do_IRQ(struct pt_regs *regs)
117{ 117{
118 /* high bits used in ret_from_ code */ 118 /* high bit used in ret_from_ code */
119 unsigned irq = regs->orig_rax & 0xff; 119 unsigned irq = ~regs->orig_rax;
120
121 if (unlikely(irq >= NR_IRQS)) {
122 printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
123 __FUNCTION__, irq);
124 BUG();
125 }
120 126
121 exit_idle(); 127 exit_idle();
122 irq_enter(); 128 irq_enter();
@@ -140,13 +146,13 @@ void fixup_irqs(cpumask_t map)
140 if (irq == 2) 146 if (irq == 2)
141 continue; 147 continue;
142 148
143 cpus_and(mask, irq_affinity[irq], map); 149 cpus_and(mask, irq_desc[irq].affinity, map);
144 if (any_online_cpu(mask) == NR_CPUS) { 150 if (any_online_cpu(mask) == NR_CPUS) {
145 printk("Breaking affinity for irq %i\n", irq); 151 printk("Breaking affinity for irq %i\n", irq);
146 mask = map; 152 mask = map;
147 } 153 }
148 if (irq_desc[irq].handler->set_affinity) 154 if (irq_desc[irq].chip->set_affinity)
149 irq_desc[irq].handler->set_affinity(irq, mask); 155 irq_desc[irq].chip->set_affinity(irq, mask);
150 else if (irq_desc[irq].action && !(warned++)) 156 else if (irq_desc[irq].action && !(warned++))
151 printk("Cannot set affinity for irq %i\n", irq); 157 printk("Cannot set affinity for irq %i\n", irq);
152 } 158 }
diff --git a/arch/x86_64/kernel/mce.c b/arch/x86_64/kernel/mce.c
index acd5816b1a6..88845674c66 100644
--- a/arch/x86_64/kernel/mce.c
+++ b/arch/x86_64/kernel/mce.c
@@ -629,7 +629,7 @@ static __cpuinit void mce_remove_device(unsigned int cpu)
629#endif 629#endif
630 630
631/* Get notified when a cpu comes on/off. Be hotplug friendly. */ 631/* Get notified when a cpu comes on/off. Be hotplug friendly. */
632static int 632static __cpuinit int
633mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) 633mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
634{ 634{
635 unsigned int cpu = (unsigned long)hcpu; 635 unsigned int cpu = (unsigned long)hcpu;
@@ -647,7 +647,7 @@ mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
647 return NOTIFY_OK; 647 return NOTIFY_OK;
648} 648}
649 649
650static struct notifier_block mce_cpu_notifier = { 650static struct notifier_block __cpuinitdata mce_cpu_notifier = {
651 .notifier_call = mce_cpu_callback, 651 .notifier_call = mce_cpu_callback,
652}; 652};
653 653
diff --git a/arch/x86_64/kernel/nmi.c b/arch/x86_64/kernel/nmi.c
index 399489c9313..0ef9cf2bc45 100644
--- a/arch/x86_64/kernel/nmi.c
+++ b/arch/x86_64/kernel/nmi.c
@@ -607,11 +607,13 @@ void set_nmi_callback(nmi_callback_t callback)
607 vmalloc_sync_all(); 607 vmalloc_sync_all();
608 rcu_assign_pointer(nmi_callback, callback); 608 rcu_assign_pointer(nmi_callback, callback);
609} 609}
610EXPORT_SYMBOL_GPL(set_nmi_callback);
610 611
611void unset_nmi_callback(void) 612void unset_nmi_callback(void)
612{ 613{
613 nmi_callback = dummy_nmi_callback; 614 nmi_callback = dummy_nmi_callback;
614} 615}
616EXPORT_SYMBOL_GPL(unset_nmi_callback);
615 617
616#ifdef CONFIG_SYSCTL 618#ifdef CONFIG_SYSCTL
617 619
diff --git a/arch/x86_64/kernel/smp.c b/arch/x86_64/kernel/smp.c
index acee4bc3f6f..5a1c0a3bf87 100644
--- a/arch/x86_64/kernel/smp.c
+++ b/arch/x86_64/kernel/smp.c
@@ -135,10 +135,10 @@ asmlinkage void smp_invalidate_interrupt(struct pt_regs *regs)
135 135
136 cpu = smp_processor_id(); 136 cpu = smp_processor_id();
137 /* 137 /*
138 * orig_rax contains the interrupt vector - 256. 138 * orig_rax contains the negated interrupt vector.
139 * Use that to determine where the sender put the data. 139 * Use that to determine where the sender put the data.
140 */ 140 */
141 sender = regs->orig_rax + 256 - INVALIDATE_TLB_VECTOR_START; 141 sender = ~regs->orig_rax - INVALIDATE_TLB_VECTOR_START;
142 f = &per_cpu(flush_state, sender); 142 f = &per_cpu(flush_state, sender);
143 143
144 if (!cpu_isset(cpu, f->flush_cpumask)) 144 if (!cpu_isset(cpu, f->flush_cpumask))
diff --git a/arch/x86_64/kernel/smpboot.c b/arch/x86_64/kernel/smpboot.c
index 4e9755179ec..540c0ccbccc 100644
--- a/arch/x86_64/kernel/smpboot.c
+++ b/arch/x86_64/kernel/smpboot.c
@@ -455,10 +455,12 @@ cpumask_t cpu_coregroup_map(int cpu)
455 struct cpuinfo_x86 *c = cpu_data + cpu; 455 struct cpuinfo_x86 *c = cpu_data + cpu;
456 /* 456 /*
457 * For perf, we return last level cache shared map. 457 * For perf, we return last level cache shared map.
458 * TBD: when power saving sched policy is added, we will return 458 * And for power savings, we return cpu_core_map
459 * cpu_core_map when power saving policy is enabled
460 */ 459 */
461 return c->llc_shared_map; 460 if (sched_mc_power_savings || sched_smt_power_savings)
461 return cpu_core_map[cpu];
462 else
463 return c->llc_shared_map;
462} 464}
463 465
464/* representing cpus for which sibling maps can be computed */ 466/* representing cpus for which sibling maps can be computed */
diff --git a/arch/x86_64/mm/init.c b/arch/x86_64/mm/init.c
index 02add1d1dfa..95bd232ff0c 100644
--- a/arch/x86_64/mm/init.c
+++ b/arch/x86_64/mm/init.c
@@ -23,6 +23,7 @@
23#include <linux/bootmem.h> 23#include <linux/bootmem.h>
24#include <linux/proc_fs.h> 24#include <linux/proc_fs.h>
25#include <linux/pci.h> 25#include <linux/pci.h>
26#include <linux/poison.h>
26#include <linux/dma-mapping.h> 27#include <linux/dma-mapping.h>
27#include <linux/module.h> 28#include <linux/module.h>
28#include <linux/memory_hotplug.h> 29#include <linux/memory_hotplug.h>
@@ -506,8 +507,6 @@ void __init clear_kernel_mapping(unsigned long address, unsigned long size)
506/* 507/*
507 * Memory hotplug specific functions 508 * Memory hotplug specific functions
508 */ 509 */
509#if defined(CONFIG_ACPI_HOTPLUG_MEMORY) || defined(CONFIG_ACPI_HOTPLUG_MEMORY_MODULE)
510
511void online_page(struct page *page) 510void online_page(struct page *page)
512{ 511{
513 ClearPageReserved(page); 512 ClearPageReserved(page);
@@ -517,31 +516,17 @@ void online_page(struct page *page)
517 num_physpages++; 516 num_physpages++;
518} 517}
519 518
520#ifndef CONFIG_MEMORY_HOTPLUG 519#ifdef CONFIG_MEMORY_HOTPLUG
521/* 520/*
522 * Memory Hotadd without sparsemem. The mem_maps have been allocated in advance, 521 * XXX: memory_add_physaddr_to_nid() is to find node id from physical address
523 * just online the pages. 522 * via probe interface of sysfs. If acpi notifies hot-add event, then it
523 * can tell node id by searching dsdt. But, probe interface doesn't have
524 * node id. So, return 0 as node id at this time.
524 */ 525 */
525int __add_pages(struct zone *z, unsigned long start_pfn, unsigned long nr_pages) 526#ifdef CONFIG_NUMA
527int memory_add_physaddr_to_nid(u64 start)
526{ 528{
527 int err = -EIO; 529 return 0;
528 unsigned long pfn;
529 unsigned long total = 0, mem = 0;
530 for (pfn = start_pfn; pfn < start_pfn + nr_pages; pfn++) {
531 if (pfn_valid(pfn)) {
532 online_page(pfn_to_page(pfn));
533 err = 0;
534 mem++;
535 }
536 total++;
537 }
538 if (!err) {
539 z->spanned_pages += total;
540 z->present_pages += mem;
541 z->zone_pgdat->node_spanned_pages += total;
542 z->zone_pgdat->node_present_pages += mem;
543 }
544 return err;
545} 530}
546#endif 531#endif
547 532
@@ -549,9 +534,9 @@ int __add_pages(struct zone *z, unsigned long start_pfn, unsigned long nr_pages)
549 * Memory is added always to NORMAL zone. This means you will never get 534 * Memory is added always to NORMAL zone. This means you will never get
550 * additional DMA/DMA32 memory. 535 * additional DMA/DMA32 memory.
551 */ 536 */
552int add_memory(u64 start, u64 size) 537int arch_add_memory(int nid, u64 start, u64 size)
553{ 538{
554 struct pglist_data *pgdat = NODE_DATA(0); 539 struct pglist_data *pgdat = NODE_DATA(nid);
555 struct zone *zone = pgdat->node_zones + MAX_NR_ZONES-2; 540 struct zone *zone = pgdat->node_zones + MAX_NR_ZONES-2;
556 unsigned long start_pfn = start >> PAGE_SHIFT; 541 unsigned long start_pfn = start >> PAGE_SHIFT;
557 unsigned long nr_pages = size >> PAGE_SHIFT; 542 unsigned long nr_pages = size >> PAGE_SHIFT;
@@ -568,7 +553,7 @@ error:
568 printk("%s: Problem encountered in __add_pages!\n", __func__); 553 printk("%s: Problem encountered in __add_pages!\n", __func__);
569 return ret; 554 return ret;
570} 555}
571EXPORT_SYMBOL_GPL(add_memory); 556EXPORT_SYMBOL_GPL(arch_add_memory);
572 557
573int remove_memory(u64 start, u64 size) 558int remove_memory(u64 start, u64 size)
574{ 559{
@@ -576,7 +561,33 @@ int remove_memory(u64 start, u64 size)
576} 561}
577EXPORT_SYMBOL_GPL(remove_memory); 562EXPORT_SYMBOL_GPL(remove_memory);
578 563
579#endif 564#else /* CONFIG_MEMORY_HOTPLUG */
565/*
566 * Memory Hotadd without sparsemem. The mem_maps have been allocated in advance,
567 * just online the pages.
568 */
569int __add_pages(struct zone *z, unsigned long start_pfn, unsigned long nr_pages)
570{
571 int err = -EIO;
572 unsigned long pfn;
573 unsigned long total = 0, mem = 0;
574 for (pfn = start_pfn; pfn < start_pfn + nr_pages; pfn++) {
575 if (pfn_valid(pfn)) {
576 online_page(pfn_to_page(pfn));
577 err = 0;
578 mem++;
579 }
580 total++;
581 }
582 if (!err) {
583 z->spanned_pages += total;
584 z->present_pages += mem;
585 z->zone_pgdat->node_spanned_pages += total;
586 z->zone_pgdat->node_present_pages += mem;
587 }
588 return err;
589}
590#endif /* CONFIG_MEMORY_HOTPLUG */
580 591
581static struct kcore_list kcore_mem, kcore_vmalloc, kcore_kernel, kcore_modules, 592static struct kcore_list kcore_mem, kcore_vmalloc, kcore_kernel, kcore_modules,
582 kcore_vsyscall; 593 kcore_vsyscall;
@@ -650,7 +661,8 @@ void free_init_pages(char *what, unsigned long begin, unsigned long end)
650 for (addr = begin; addr < end; addr += PAGE_SIZE) { 661 for (addr = begin; addr < end; addr += PAGE_SIZE) {
651 ClearPageReserved(virt_to_page(addr)); 662 ClearPageReserved(virt_to_page(addr));
652 init_page_count(virt_to_page(addr)); 663 init_page_count(virt_to_page(addr));
653 memset((void *)(addr & ~(PAGE_SIZE-1)), 0xcc, PAGE_SIZE); 664 memset((void *)(addr & ~(PAGE_SIZE-1)),
665 POISON_FREE_INITMEM, PAGE_SIZE);
654 free_page(addr); 666 free_page(addr);
655 totalram_pages++; 667 totalram_pages++;
656 } 668 }
@@ -658,7 +670,8 @@ void free_init_pages(char *what, unsigned long begin, unsigned long end)
658 670
659void free_initmem(void) 671void free_initmem(void)
660{ 672{
661 memset(__initdata_begin, 0xba, __initdata_end - __initdata_begin); 673 memset(__initdata_begin, POISON_FREE_INITDATA,
674 __initdata_end - __initdata_begin);
662 free_init_pages("unused kernel memory", 675 free_init_pages("unused kernel memory",
663 (unsigned long)(&__init_begin), 676 (unsigned long)(&__init_begin),
664 (unsigned long)(&__init_end)); 677 (unsigned long)(&__init_end));
diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c
index 51f9bed455f..1cf744ee095 100644
--- a/arch/xtensa/kernel/irq.c
+++ b/arch/xtensa/kernel/irq.c
@@ -100,7 +100,7 @@ int show_interrupts(struct seq_file *p, void *v)
100 for_each_online_cpu(j) 100 for_each_online_cpu(j)
101 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 101 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
102#endif 102#endif
103 seq_printf(p, " %14s", irq_desc[i].handler->typename); 103 seq_printf(p, " %14s", irq_desc[i].chip->typename);
104 seq_printf(p, " %s", action->name); 104 seq_printf(p, " %s", action->name);
105 105
106 for (action=action->next; action; action = action->next) 106 for (action=action->next; action; action = action->next)
@@ -181,7 +181,7 @@ void __init init_IRQ(void)
181 int i; 181 int i;
182 182
183 for (i=0; i < XTENSA_NR_IRQS; i++) 183 for (i=0; i < XTENSA_NR_IRQS; i++)
184 irq_desc[i].handler = &xtensa_irq_type; 184 irq_desc[i].chip = &xtensa_irq_type;
185 185
186 cached_irq_mask = 0; 186 cached_irq_mask = 0;
187 187
diff --git a/arch/xtensa/kernel/time.c b/arch/xtensa/kernel/time.c
index 937d81f62f4..fe14909f45e 100644
--- a/arch/xtensa/kernel/time.c
+++ b/arch/xtensa/kernel/time.c
@@ -29,7 +29,7 @@
29 29
30extern volatile unsigned long wall_jiffies; 30extern volatile unsigned long wall_jiffies;
31 31
32spinlock_t rtc_lock = SPIN_LOCK_UNLOCKED; 32DEFINE_SPINLOCK(rtc_lock);
33EXPORT_SYMBOL(rtc_lock); 33EXPORT_SYMBOL(rtc_lock);
34 34
35 35
diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c
index 225d64d73f0..27e409089a7 100644
--- a/arch/xtensa/kernel/traps.c
+++ b/arch/xtensa/kernel/traps.c
@@ -461,7 +461,7 @@ void show_code(unsigned int *pc)
461 } 461 }
462} 462}
463 463
464spinlock_t die_lock = SPIN_LOCK_UNLOCKED; 464DEFINE_SPINLOCK(die_lock);
465 465
466void die(const char * str, struct pt_regs * regs, long err) 466void die(const char * str, struct pt_regs * regs, long err)
467{ 467{