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-rw-r--r--arch/x86/oprofile/op_model_ppro.c27
1 files changed, 2 insertions, 25 deletions
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c
index 94b745045e4..d90528ea541 100644
--- a/arch/x86/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
@@ -28,7 +28,7 @@ static int counter_width = 32;
28 28
29#define MSR_PPRO_EVENTSEL_RESERVED ((0xFFFFFFFFULL<<32)|(1ULL<<21)) 29#define MSR_PPRO_EVENTSEL_RESERVED ((0xFFFFFFFFULL<<32)|(1ULL<<21))
30 30
31static u64 *reset_value; 31static u64 reset_value[OP_MAX_COUNTER];
32 32
33static void ppro_shutdown(struct op_msrs const * const msrs) 33static void ppro_shutdown(struct op_msrs const * const msrs)
34{ 34{
@@ -40,10 +40,6 @@ static void ppro_shutdown(struct op_msrs const * const msrs)
40 release_perfctr_nmi(MSR_P6_PERFCTR0 + i); 40 release_perfctr_nmi(MSR_P6_PERFCTR0 + i);
41 release_evntsel_nmi(MSR_P6_EVNTSEL0 + i); 41 release_evntsel_nmi(MSR_P6_EVNTSEL0 + i);
42 } 42 }
43 if (reset_value) {
44 kfree(reset_value);
45 reset_value = NULL;
46 }
47} 43}
48 44
49static int ppro_fill_in_addresses(struct op_msrs * const msrs) 45static int ppro_fill_in_addresses(struct op_msrs * const msrs)
@@ -79,13 +75,6 @@ static void ppro_setup_ctrs(struct op_x86_model_spec const *model,
79 u64 val; 75 u64 val;
80 int i; 76 int i;
81 77
82 if (!reset_value) {
83 reset_value = kzalloc(sizeof(reset_value[0]) * num_counters,
84 GFP_ATOMIC);
85 if (!reset_value)
86 return;
87 }
88
89 if (cpu_has_arch_perfmon) { 78 if (cpu_has_arch_perfmon) {
90 union cpuid10_eax eax; 79 union cpuid10_eax eax;
91 eax.full = cpuid_eax(0xa); 80 eax.full = cpuid_eax(0xa);
@@ -141,13 +130,6 @@ static int ppro_check_ctrs(struct pt_regs * const regs,
141 u64 val; 130 u64 val;
142 int i; 131 int i;
143 132
144 /*
145 * This can happen if perf counters are in use when
146 * we steal the die notifier NMI.
147 */
148 if (unlikely(!reset_value))
149 goto out;
150
151 for (i = 0; i < num_counters; ++i) { 133 for (i = 0; i < num_counters; ++i) {
152 if (!reset_value[i]) 134 if (!reset_value[i])
153 continue; 135 continue;
@@ -158,7 +140,6 @@ static int ppro_check_ctrs(struct pt_regs * const regs,
158 wrmsrl(msrs->counters[i].addr, -reset_value[i]); 140 wrmsrl(msrs->counters[i].addr, -reset_value[i]);
159 } 141 }
160 142
161out:
162 /* Only P6 based Pentium M need to re-unmask the apic vector but it 143 /* Only P6 based Pentium M need to re-unmask the apic vector but it
163 * doesn't hurt other P6 variant */ 144 * doesn't hurt other P6 variant */
164 apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED); 145 apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED);
@@ -179,8 +160,6 @@ static void ppro_start(struct op_msrs const * const msrs)
179 u64 val; 160 u64 val;
180 int i; 161 int i;
181 162
182 if (!reset_value)
183 return;
184 for (i = 0; i < num_counters; ++i) { 163 for (i = 0; i < num_counters; ++i) {
185 if (reset_value[i]) { 164 if (reset_value[i]) {
186 rdmsrl(msrs->controls[i].addr, val); 165 rdmsrl(msrs->controls[i].addr, val);
@@ -196,8 +175,6 @@ static void ppro_stop(struct op_msrs const * const msrs)
196 u64 val; 175 u64 val;
197 int i; 176 int i;
198 177
199 if (!reset_value)
200 return;
201 for (i = 0; i < num_counters; ++i) { 178 for (i = 0; i < num_counters; ++i) {
202 if (!reset_value[i]) 179 if (!reset_value[i])
203 continue; 180 continue;
@@ -242,7 +219,7 @@ static void arch_perfmon_setup_counters(void)
242 eax.split.bit_width = 40; 219 eax.split.bit_width = 40;
243 } 220 }
244 221
245 num_counters = eax.split.num_counters; 222 num_counters = min((int)eax.split.num_counters, OP_MAX_COUNTER);
246 223
247 op_arch_perfmon_spec.num_counters = num_counters; 224 op_arch_perfmon_spec.num_counters = num_counters;
248 op_arch_perfmon_spec.num_controls = num_counters; 225 op_arch_perfmon_spec.num_controls = num_counters;