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Diffstat (limited to 'arch/x86/kernel/cpu/perf_event.c')
-rw-r--r--arch/x86/kernel/cpu/perf_event.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index f369c53315a..61e78f65106 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -238,6 +238,7 @@ struct x86_pmu {
238 * Intel DebugStore bits 238 * Intel DebugStore bits
239 */ 239 */
240 int bts, pebs; 240 int bts, pebs;
241 int bts_active, pebs_active;
241 int pebs_record_size; 242 int pebs_record_size;
242 void (*drain_pebs)(struct pt_regs *regs); 243 void (*drain_pebs)(struct pt_regs *regs);
243 struct event_constraint *pebs_constraints; 244 struct event_constraint *pebs_constraints;
@@ -478,7 +479,7 @@ static int x86_setup_perfctr(struct perf_event *event)
478 if ((attr->config == PERF_COUNT_HW_BRANCH_INSTRUCTIONS) && 479 if ((attr->config == PERF_COUNT_HW_BRANCH_INSTRUCTIONS) &&
479 (hwc->sample_period == 1)) { 480 (hwc->sample_period == 1)) {
480 /* BTS is not supported by this architecture. */ 481 /* BTS is not supported by this architecture. */
481 if (!x86_pmu.bts) 482 if (!x86_pmu.bts_active)
482 return -EOPNOTSUPP; 483 return -EOPNOTSUPP;
483 484
484 /* BTS is currently only allowed for user-mode. */ 485 /* BTS is currently only allowed for user-mode. */
@@ -497,7 +498,7 @@ static int x86_pmu_hw_config(struct perf_event *event)
497 int precise = 0; 498 int precise = 0;
498 499
499 /* Support for constant skid */ 500 /* Support for constant skid */
500 if (x86_pmu.pebs) { 501 if (x86_pmu.pebs_active) {
501 precise++; 502 precise++;
502 503
503 /* Support for IP fixup */ 504 /* Support for IP fixup */