1 files changed, 326 insertions, 253 deletions

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 83492b1f93b..e2962cc1e27 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1,118 +1,129 @@
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/string.h>
 #include <linux/bootmem.h>
+#include <linux/linkage.h>
 #include <linux/bitops.h>
+#include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/kgdb.h>
-#include <linux/topology.h>
+#include <linux/percpu.h>
+#include <linux/string.h>
 #include <linux/delay.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/kgdb.h>
 #include <linux/smp.h>
-#include <linux/percpu.h>
-#include <asm/i387.h>
-#include <asm/msr.h>
-#include <asm/io.h>
-#include <asm/linkage.h>
+#include <linux/io.h>
+
+#include <asm/stackprotector.h>
 #include <asm/mmu_context.h>
+#include <asm/hypervisor.h>
+#include <asm/processor.h>
+#include <asm/sections.h>
+#include <asm/topology.h>
+#include <asm/cpumask.h>
+#include <asm/pgtable.h>
+#include <asm/atomic.h>
+#include <asm/proto.h>
+#include <asm/setup.h>
+#include <asm/apic.h>
+#include <asm/desc.h>
+#include <asm/i387.h>
 #include <asm/mtrr.h>
+#include <asm/numa.h>
+#include <asm/asm.h>
+#include <asm/cpu.h>
 #include <asm/mce.h>
+#include <asm/msr.h>
 #include <asm/pat.h>
-#include <asm/asm.h>
-#include <asm/numa.h>
 #include <asm/smp.h>
+
 #ifdef CONFIG_X86_LOCAL_APIC
-#include <asm/mpspec.h>
-#include <asm/apic.h>
-#include <mach_apic.h>
-#include <asm/genapic.h>
+#include <asm/uv/uv.h>
 #endif
 
-#include <asm/pda.h>
-#include <asm/pgtable.h>
-#include <asm/processor.h>
-#include <asm/desc.h>
-#include <asm/atomic.h>
-#include <asm/proto.h>
-#include <asm/sections.h>
-#include <asm/setup.h>
-#include <asm/hypervisor.h>
-
 #include "cpu.h"
 
 #ifdef CONFIG_X86_64
 
 /* all of these masks are initialized in setup_cpu_local_masks() */
-cpumask_var_t cpu_callin_mask;
-cpumask_var_t cpu_callout_mask;
 cpumask_var_t cpu_initialized_mask;
+cpumask_var_t cpu_callout_mask;
+cpumask_var_t cpu_callin_mask;
 
 /* representing cpus for which sibling maps can be computed */
 cpumask_var_t cpu_sibling_setup_mask;
 
+/* correctly size the local cpu masks */
+void __init setup_cpu_local_masks(void)
+{
+        alloc_bootmem_cpumask_var(&cpu_initialized_mask);
+        alloc_bootmem_cpumask_var(&cpu_callin_mask);
+        alloc_bootmem_cpumask_var(&cpu_callout_mask);
+        alloc_bootmem_cpumask_var(&cpu_sibling_setup_mask);
+}
+
 #else /* CONFIG_X86_32 */
 
-cpumask_t cpu_callin_map;
+cpumask_t cpu_sibling_setup_map;
 cpumask_t cpu_callout_map;
 cpumask_t cpu_initialized;
-cpumask_t cpu_sibling_setup_map;
+cpumask_t cpu_callin_map;
 
 #endif /* CONFIG_X86_32 */
 
 
-static struct cpu_dev *this_cpu __cpuinitdata;
+static const struct cpu_dev *this_cpu __cpuinitdata;
 
+DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = {
 #ifdef CONFIG_X86_64
-/* We need valid kernel segments for data and code in long mode too
- * IRET will check the segment types  kkeil 2000/10/28
- * Also sysret mandates a special GDT layout
- */
-/* The TLS descriptors are currently at a different place compared to i386.
-   Hopefully nobody expects them at a fixed place (Wine?) */
-DEFINE_PER_CPU(struct gdt_page, gdt_page) = { .gdt = {
-        [GDT_ENTRY_KERNEL32_CS] = { { { 0x0000ffff, 0x00cf9b00 } } },
-        [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00af9b00 } } },
-        [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9300 } } },
-        [GDT_ENTRY_DEFAULT_USER32_CS] = { { { 0x0000ffff, 0x00cffb00 } } },
-        [GDT_ENTRY_DEFAULT_USER_DS] = { { { 0x0000ffff, 0x00cff300 } } },
-        [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00affb00 } } },
-} };
+        /*
+         * We need valid kernel segments for data and code in long mode too
+         * IRET will check the segment types  kkeil 2000/10/28
+         * Also sysret mandates a special GDT layout
+         *
+         * TLS descriptors are currently at a different place compared to i386.
+         * Hopefully nobody expects them at a fixed place (Wine?)
+         */
+        [GDT_ENTRY_KERNEL32_CS]         = { { { 0x0000ffff, 0x00cf9b00 } } },
+        [GDT_ENTRY_KERNEL_CS]           = { { { 0x0000ffff, 0x00af9b00 } } },
+        [GDT_ENTRY_KERNEL_DS]           = { { { 0x0000ffff, 0x00cf9300 } } },
+        [GDT_ENTRY_DEFAULT_USER32_CS]   = { { { 0x0000ffff, 0x00cffb00 } } },
+        [GDT_ENTRY_DEFAULT_USER_DS]     = { { { 0x0000ffff, 0x00cff300 } } },
+        [GDT_ENTRY_DEFAULT_USER_CS]     = { { { 0x0000ffff, 0x00affb00 } } },
 #else
-DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = {
-        [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00cf9a00 } } },
-        [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9200 } } },
-        [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00cffa00 } } },
-        [GDT_ENTRY_DEFAULT_USER_DS] = { { { 0x0000ffff, 0x00cff200 } } },
+        [GDT_ENTRY_KERNEL_CS]           = { { { 0x0000ffff, 0x00cf9a00 } } },
+        [GDT_ENTRY_KERNEL_DS]           = { { { 0x0000ffff, 0x00cf9200 } } },
+        [GDT_ENTRY_DEFAULT_USER_CS]     = { { { 0x0000ffff, 0x00cffa00 } } },
+        [GDT_ENTRY_DEFAULT_USER_DS]     = { { { 0x0000ffff, 0x00cff200 } } },
         /*
          * Segments used for calling PnP BIOS have byte granularity.
          * They code segments and data segments have fixed 64k limits,
          * the transfer segment sizes are set at run time.
          */
         /* 32-bit code */
-        [GDT_ENTRY_PNPBIOS_CS32] = { { { 0x0000ffff, 0x00409a00 } } },
+        [GDT_ENTRY_PNPBIOS_CS32]        = { { { 0x0000ffff, 0x00409a00 } } },
         /* 16-bit code */
-        [GDT_ENTRY_PNPBIOS_CS16] = { { { 0x0000ffff, 0x00009a00 } } },
+        [GDT_ENTRY_PNPBIOS_CS16]        = { { { 0x0000ffff, 0x00009a00 } } },
         /* 16-bit data */
-        [GDT_ENTRY_PNPBIOS_DS] = { { { 0x0000ffff, 0x00009200 } } },
+        [GDT_ENTRY_PNPBIOS_DS]          = { { { 0x0000ffff, 0x00009200 } } },
         /* 16-bit data */
-        [GDT_ENTRY_PNPBIOS_TS1] = { { { 0x00000000, 0x00009200 } } },
+        [GDT_ENTRY_PNPBIOS_TS1]         = { { { 0x00000000, 0x00009200 } } },
         /* 16-bit data */
-        [GDT_ENTRY_PNPBIOS_TS2] = { { { 0x00000000, 0x00009200 } } },
+        [GDT_ENTRY_PNPBIOS_TS2]         = { { { 0x00000000, 0x00009200 } } },
         /*
          * The APM segments have byte granularity and their bases
          * are set at run time.  All have 64k limits.
          */
         /* 32-bit code */
-        [GDT_ENTRY_APMBIOS_BASE] = { { { 0x0000ffff, 0x00409a00 } } },
+        [GDT_ENTRY_APMBIOS_BASE]        = { { { 0x0000ffff, 0x00409a00 } } },
         /* 16-bit code */
-        [GDT_ENTRY_APMBIOS_BASE+1] = { { { 0x0000ffff, 0x00009a00 } } },
+        [GDT_ENTRY_APMBIOS_BASE+1]      = { { { 0x0000ffff, 0x00009a00 } } },
         /* data */
-        [GDT_ENTRY_APMBIOS_BASE+2] = { { { 0x0000ffff, 0x00409200 } } },
+        [GDT_ENTRY_APMBIOS_BASE+2]      = { { { 0x0000ffff, 0x00409200 } } },
 
-        [GDT_ENTRY_ESPFIX_SS] = { { { 0x00000000, 0x00c09200 } } },
-        [GDT_ENTRY_PERCPU] = { { { 0x00000000, 0x00000000 } } },
-} };
+        [GDT_ENTRY_ESPFIX_SS]           = { { { 0x00000000, 0x00c09200 } } },
+        [GDT_ENTRY_PERCPU]              = { { { 0x0000ffff, 0x00cf9200 } } },
+        GDT_STACK_CANARY_INIT
 #endif
+} };
 EXPORT_PER_CPU_SYMBOL_GPL(gdt_page);
 
 #ifdef CONFIG_X86_32
@@ -153,16 +164,17 @@ static inline int flag_is_changeable_p(u32 flag)
          * the CPUID. Add "volatile" to not allow gcc to
          * optimize the subsequent calls to this function.
          */
-        asm volatile ("pushfl\n\t"
-                      "pushfl\n\t"
-                      "popl %0\n\t"
-                      "movl %0,%1\n\t"
-                      "xorl %2,%0\n\t"
-                      "pushl %0\n\t"
-                      "popfl\n\t"
-                      "pushfl\n\t"
-                      "popl %0\n\t"
-                      "popfl\n\t"
+        asm volatile ("pushfl           \n\t"
+                      "pushfl           \n\t"
+                      "popl %0          \n\t"
+                      "movl %0, %1      \n\t"
+                      "xorl %2, %0      \n\t"
+                      "pushl %0         \n\t"
+                      "popfl            \n\t"
+                      "pushfl           \n\t"
+                      "popl %0          \n\t"
+                      "popfl            \n\t"
+
                       : "=&r" (f1), "=&r" (f2)
                       : "ir" (flag));
 
@@ -177,18 +189,22 @@ static int __cpuinit have_cpuid_p(void)
 
 static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
 {
-        if (cpu_has(c, X86_FEATURE_PN) && disable_x86_serial_nr) {
-                /* Disable processor serial number */
-                unsigned long lo, hi;
-                rdmsr(MSR_IA32_BBL_CR_CTL, lo, hi);
-                lo |= 0x200000;
-                wrmsr(MSR_IA32_BBL_CR_CTL, lo, hi);
-                printk(KERN_NOTICE "CPU serial number disabled.\n");
-                clear_cpu_cap(c, X86_FEATURE_PN);
-
-                /* Disabling the serial number may affect the cpuid level */
-                c->cpuid_level = cpuid_eax(0);
-        }
+        unsigned long lo, hi;
+
+        if (!cpu_has(c, X86_FEATURE_PN) || !disable_x86_serial_nr)
+                return;
+
+        /* Disable processor serial number: */
+
+        rdmsr(MSR_IA32_BBL_CR_CTL, lo, hi);
+        lo |= 0x200000;
+        wrmsr(MSR_IA32_BBL_CR_CTL, lo, hi);
+
+        printk(KERN_NOTICE "CPU serial number disabled.\n");
+        clear_cpu_cap(c, X86_FEATURE_PN);
+
+        /* Disabling the serial number may affect the cpuid level */
+        c->cpuid_level = cpuid_eax(0);
 }
 
 static int __init x86_serial_nr_setup(char *s)
@@ -213,16 +229,64 @@ static inline void squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
 #endif
 
 /*
+ * Some CPU features depend on higher CPUID levels, which may not always
+ * be available due to CPUID level capping or broken virtualization
+ * software.  Add those features to this table to auto-disable them.
+ */
+struct cpuid_dependent_feature {
+        u32 feature;
+        u32 level;
+};
+
+static const struct cpuid_dependent_feature __cpuinitconst
+cpuid_dependent_features[] = {
+        { X86_FEATURE_MWAIT,            0x00000005 },
+        { X86_FEATURE_DCA,              0x00000009 },
+        { X86_FEATURE_XSAVE,            0x0000000d },
+        { 0, 0 }
+};
+
+static void __cpuinit filter_cpuid_features(struct cpuinfo_x86 *c, bool warn)
+{
+        const struct cpuid_dependent_feature *df;
+
+        for (df = cpuid_dependent_features; df->feature; df++) {
+
+                if (!cpu_has(c, df->feature))
+                        continue;
+                /*
+                 * Note: cpuid_level is set to -1 if unavailable, but
+                 * extended_extended_level is set to 0 if unavailable
+                 * and the legitimate extended levels are all negative
+                 * when signed; hence the weird messing around with
+                 * signs here...
+                 */
+                if (!((s32)df->level < 0 ?
+                     (u32)df->level > (u32)c->extended_cpuid_level :
+                     (s32)df->level > (s32)c->cpuid_level))
+                        continue;
+
+                clear_cpu_cap(c, df->feature);
+                if (!warn)
+                        continue;
+
+                printk(KERN_WARNING
+                       "CPU: CPU feature %s disabled, no CPUID level 0x%x\n",
+                                x86_cap_flags[df->feature], df->level);
+        }
+}
+
+/*
  * Naming convention should be: <Name> [(<Codename>)]
  * This table only is used unless init_<vendor>() below doesn't set it;
- * in particular, if CPUID levels 0x80000002..4 are supported, this isn't used
- *
+ * in particular, if CPUID levels 0x80000002..4 are supported, this
+ * isn't used
  */
 
 /* Look up CPU names by table lookup. */
-static char __cpuinit *table_lookup_model(struct cpuinfo_x86 *c)
+static const char *__cpuinit table_lookup_model(struct cpuinfo_x86 *c)
 {
-        struct cpu_model_info *info;
+        const struct cpu_model_info *info;
 
         if (c->x86_model >= 16)
                 return NULL;    /* Range check */
@@ -242,21 +306,34 @@ static char __cpuinit *table_lookup_model(struct cpuinfo_x86 *c)
 
 __u32 cleared_cpu_caps[NCAPINTS] __cpuinitdata;
 
-/* Current gdt points %fs at the "master" per-cpu area: after this,
- * it's on the real one. */
-void switch_to_new_gdt(void)
+void load_percpu_segment(int cpu)
+{
+#ifdef CONFIG_X86_32
+        loadsegment(fs, __KERNEL_PERCPU);
+#else
+        loadsegment(gs, 0);
+        wrmsrl(MSR_GS_BASE, (unsigned long)per_cpu(irq_stack_union.gs_base, cpu));
+#endif
+        load_stack_canary_segment();
+}
+
+/*
+ * Current gdt points %fs at the "master" per-cpu area: after this,
+ * it's on the real one.
+ */
+void switch_to_new_gdt(int cpu)
 {
         struct desc_ptr gdt_descr;
 
-        gdt_descr.address = (long)get_cpu_gdt_table(smp_processor_id());
+        gdt_descr.address = (long)get_cpu_gdt_table(cpu);
         gdt_descr.size = GDT_SIZE - 1;
         load_gdt(&gdt_descr);
-#ifdef CONFIG_X86_32
-        asm("mov %0, %%fs" : : "r" (__KERNEL_PERCPU) : "memory");
-#endif
+        /* Reload the per-cpu base */
+
+        load_percpu_segment(cpu);
 }
 
-static struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {};
+static const struct cpu_dev *__cpuinitdata cpu_devs[X86_VENDOR_NUM] = {};
 
 static void __cpuinit default_init(struct cpuinfo_x86 *c)
 {
@@ -275,7 +352,7 @@ static void __cpuinit default_init(struct cpuinfo_x86 *c)
 #endif
 }
 
-static struct cpu_dev __cpuinitdata default_cpu = {
+static const struct cpu_dev __cpuinitconst default_cpu = {
         .c_init = default_init,
         .c_vendor = "Unknown",
         .c_x86_vendor = X86_VENDOR_UNKNOWN,
@@ -289,22 +366,24 @@ static void __cpuinit get_model_name(struct cpuinfo_x86 *c)
         if (c->extended_cpuid_level < 0x80000004)
                 return;
 
-        v = (unsigned int *) c->x86_model_id;
+        v = (unsigned int *)c->x86_model_id;
         cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
         cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
         cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
         c->x86_model_id[48] = 0;
 
-        /* Intel chips right-justify this string for some dumb reason;
-           undo that brain damage */
+        /*
+         * Intel chips right-justify this string for some dumb reason;
+         * undo that brain damage:
+         */
         p = q = &c->x86_model_id[0];
         while (*p == ' ')
-             p++;
+                p++;
         if (p != q) {
-             while (*p)
-                  *q++ = *p++;
-             while (q <= &c->x86_model_id[48])
-                  *q++ = '\0';  /* Zero-pad the rest */
+                while (*p)
+                        *q++ = *p++;
+                while (q <= &c->x86_model_id[48])
+                        *q++ = '\0';    /* Zero-pad the rest */
         }
 }
 
@@ -373,36 +452,30 @@ void __cpuinit detect_ht(struct cpuinfo_x86 *c)
 
         if (smp_num_siblings == 1) {
                 printk(KERN_INFO  "CPU: Hyper-Threading is disabled\n");
-        } else if (smp_num_siblings > 1) {
+                goto out;
+        }
 
-                if (smp_num_siblings > nr_cpu_ids) {
-                        printk(KERN_WARNING "CPU: Unsupported number of siblings %d",
-                                        smp_num_siblings);
-                        smp_num_siblings = 1;
-                        return;
-                }
+        if (smp_num_siblings <= 1)
+                goto out;
 
-                index_msb = get_count_order(smp_num_siblings);
-#ifdef CONFIG_X86_64
-                c->phys_proc_id = phys_pkg_id(index_msb);
-#else
-                c->phys_proc_id = phys_pkg_id(c->initial_apicid, index_msb);
-#endif
+        if (smp_num_siblings > nr_cpu_ids) {
+                pr_warning("CPU: Unsupported number of siblings %d",
+                           smp_num_siblings);
+                smp_num_siblings = 1;
+                return;
+        }
 
-                smp_num_siblings = smp_num_siblings / c->x86_max_cores;
+        index_msb = get_count_order(smp_num_siblings);
+        c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, index_msb);
 
-                index_msb = get_count_order(smp_num_siblings);
+        smp_num_siblings = smp_num_siblings / c->x86_max_cores;
 
-                core_bits = get_count_order(c->x86_max_cores);
+        index_msb = get_count_order(smp_num_siblings);
 
-#ifdef CONFIG_X86_64
-                c->cpu_core_id = phys_pkg_id(index_msb) &
-                                               ((1 << core_bits) - 1);
-#else
-                c->cpu_core_id = phys_pkg_id(c->initial_apicid, index_msb) &
-                                               ((1 << core_bits) - 1);
-#endif
-        }
+        core_bits = get_count_order(c->x86_max_cores);
+
+        c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, index_msb) &
+                                       ((1 << core_bits) - 1);
 
 out:
         if ((c->x86_max_cores * smp_num_siblings) > 1) {
@@ -417,8 +490,8 @@ out:
 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
 {
         char *v = c->x86_vendor_id;
-        int i;
         static int printed;
+        int i;
 
         for (i = 0; i < X86_VENDOR_NUM; i++) {
                 if (!cpu_devs[i])
@@ -427,6 +500,7 @@ static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
                 if (!strcmp(v, cpu_devs[i]->c_ident[0]) ||
                     (cpu_devs[i]->c_ident[1] &&
                      !strcmp(v, cpu_devs[i]->c_ident[1]))) {
+
                         this_cpu = cpu_devs[i];
                         c->x86_vendor = this_cpu->c_x86_vendor;
                         return;
@@ -435,7 +509,9 @@ static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
 
         if (!printed) {
                 printed++;
-                printk(KERN_ERR "CPU: vendor_id '%s' unknown, using generic init.\n", v);
+                printk(KERN_ERR
+                    "CPU: vendor_id '%s' unknown, using generic init.\n", v);
+
                 printk(KERN_ERR "CPU: Your system may be unstable.\n");
         }
 
@@ -455,14 +531,17 @@ void __cpuinit cpu_detect(struct cpuinfo_x86 *c)
         /* Intel-defined flags: level 0x00000001 */
         if (c->cpuid_level >= 0x00000001) {
                 u32 junk, tfms, cap0, misc;
+
                 cpuid(0x00000001, &tfms, &misc, &junk, &cap0);
                 c->x86 = (tfms >> 8) & 0xf;
                 c->x86_model = (tfms >> 4) & 0xf;
                 c->x86_mask = tfms & 0xf;
+
                 if (c->x86 == 0xf)
                         c->x86 += (tfms >> 20) & 0xff;
                 if (c->x86 >= 0x6)
                         c->x86_model += ((tfms >> 16) & 0xf) << 4;
+
                 if (cap0 & (1<<19)) {
                         c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
                         c->x86_cache_alignment = c->x86_clflush_size;
@@ -478,6 +557,7 @@ static void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c)
         /* Intel-defined flags: level 0x00000001 */
         if (c->cpuid_level >= 0x00000001) {
                 u32 capability, excap;
+
                 cpuid(0x00000001, &tfms, &ebx, &excap, &capability);
                 c->x86_capability[0] = capability;
                 c->x86_capability[4] = excap;
@@ -486,6 +566,7 @@ static void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c)
         /* AMD-defined flags: level 0x80000001 */
         xlvl = cpuid_eax(0x80000000);
         c->extended_cpuid_level = xlvl;
+
         if ((xlvl & 0xffff0000) == 0x80000000) {
                 if (xlvl >= 0x80000001) {
                         c->x86_capability[1] = cpuid_edx(0x80000001);
@@ -493,13 +574,15 @@ static void __cpuinit get_cpu_cap(struct cpuinfo_x86 *c)
                 }
         }
 
-#ifdef CONFIG_X86_64
         if (c->extended_cpuid_level >= 0x80000008) {
                 u32 eax = cpuid_eax(0x80000008);
 
                 c->x86_virt_bits = (eax >> 8) & 0xff;
                 c->x86_phys_bits = eax & 0xff;
         }
+#ifdef CONFIG_X86_32
+        else if (cpu_has(c, X86_FEATURE_PAE) || cpu_has(c, X86_FEATURE_PSE36))
+                c->x86_phys_bits = 36;
 #endif
 
         if (c->extended_cpuid_level >= 0x80000007)
@@ -546,8 +629,12 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_X86_64
         c->x86_clflush_size = 64;
+        c->x86_phys_bits = 36;
+        c->x86_virt_bits = 48;
 #else
         c->x86_clflush_size = 32;
+        c->x86_phys_bits = 32;
+        c->x86_virt_bits = 32;
 #endif
         c->x86_cache_alignment = c->x86_clflush_size;
 
@@ -570,21 +657,20 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
         if (this_cpu->c_early_init)
                 this_cpu->c_early_init(c);
 
-        validate_pat_support(c);
-
 #ifdef CONFIG_SMP
         c->cpu_index = boot_cpu_id;
 #endif
+        filter_cpuid_features(c, false);
 }
 
 void __init early_cpu_init(void)
 {
-        struct cpu_dev **cdev;
+        const struct cpu_dev *const *cdev;
         int count = 0;
 
-        printk("KERNEL supported cpus:\n");
+        printk(KERN_INFO "KERNEL supported cpus:\n");
         for (cdev = __x86_cpu_dev_start; cdev < __x86_cpu_dev_end; cdev++) {
-                struct cpu_dev *cpudev = *cdev;
+                const struct cpu_dev *cpudev = *cdev;
                 unsigned int j;
 
                 if (count >= X86_VENDOR_NUM)
@@ -595,7 +681,7 @@ void __init early_cpu_init(void)
                 for (j = 0; j < 2; j++) {
                         if (!cpudev->c_ident[j])
                                 continue;
-                        printk("  %s %s\n", cpudev->c_vendor,
+                        printk(KERN_INFO "  %s %s\n", cpudev->c_vendor,
                                 cpudev->c_ident[j]);
                 }
         }
@@ -637,7 +723,7 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
                 c->initial_apicid = (cpuid_ebx(1) >> 24) & 0xFF;
 #ifdef CONFIG_X86_32
 # ifdef CONFIG_X86_HT
-                c->apicid = phys_pkg_id(c->initial_apicid, 0);
+                c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
 # else
                 c->apicid = c->initial_apicid;
 # endif
@@ -671,9 +757,13 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
         c->x86_coreid_bits = 0;
 #ifdef CONFIG_X86_64
         c->x86_clflush_size = 64;
+        c->x86_phys_bits = 36;
+        c->x86_virt_bits = 48;
 #else
         c->cpuid_level = -1;    /* CPUID not detected */
         c->x86_clflush_size = 32;
+        c->x86_phys_bits = 32;
+        c->x86_virt_bits = 32;
 #endif
         c->x86_cache_alignment = c->x86_clflush_size;
         memset(&c->x86_capability, 0, sizeof c->x86_capability);
@@ -684,7 +774,7 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
                 this_cpu->c_identify(c);
 
 #ifdef CONFIG_X86_64
-        c->apicid = phys_pkg_id(0);
+        c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
 #endif
 
         /*
@@ -704,13 +794,16 @@ static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
         squash_the_stupid_serial_number(c);
 
         /*
-         * The vendor-specific functions might have changed features.  Now
-         * we do "generic changes."
+         * The vendor-specific functions might have changed features.
+         * Now we do "generic changes."
          */
 
+        /* Filter out anything that depends on CPUID levels we don't have */
+        filter_cpuid_features(c, true);
+
         /* If the model name is still unset, do table lookup. */
         if (!c->x86_model_id[0]) {
-                char *p;
+                const char *p;
                 p = table_lookup_model(c);
                 if (p)
                         strcpy(c->x86_model_id, p);
@@ -785,11 +878,11 @@ void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c)
 }
 
 struct msr_range {
-        unsigned min;
-        unsigned max;
+        unsigned        min;
+        unsigned        max;
 };
 
-static struct msr_range msr_range_array[] __cpuinitdata = {
+static const struct msr_range msr_range_array[] __cpuinitconst = {
         { 0x00000000, 0x00000418},
         { 0xc0000000, 0xc000040b},
         { 0xc0010000, 0xc0010142},
@@ -798,14 +891,15 @@ static struct msr_range msr_range_array[] __cpuinitdata = {
 
 static void __cpuinit print_cpu_msr(void)
 {
+        unsigned index_min, index_max;
         unsigned index;
         u64 val;
         int i;
-        unsigned index_min, index_max;
 
         for (i = 0; i < ARRAY_SIZE(msr_range_array); i++) {
                 index_min = msr_range_array[i].min;
                 index_max = msr_range_array[i].max;
+
                 for (index = index_min; index < index_max; index++) {
                         if (rdmsrl_amd_safe(index, &val))
                                 continue;
@@ -815,6 +909,7 @@ static void __cpuinit print_cpu_msr(void)
 }
 
 static int show_msr __cpuinitdata;
+
 static __init int setup_show_msr(char *arg)
 {
         int num;
@@ -836,12 +931,14 @@ __setup("noclflush", setup_noclflush);
 
 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
 {
-        char *vendor = NULL;
+        const char *vendor = NULL;
 
-        if (c->x86_vendor < X86_VENDOR_NUM)
+        if (c->x86_vendor < X86_VENDOR_NUM) {
                 vendor = this_cpu->c_vendor;
-        else if (c->cpuid_level >= 0)
-                vendor = c->x86_vendor_id;
+        } else {
+                if (c->cpuid_level >= 0)
+                        vendor = c->x86_vendor_id;
+        }
 
         if (vendor && !strstr(c->x86_model_id, vendor))
                 printk(KERN_CONT "%s ", vendor);
@@ -868,65 +965,45 @@ void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
 static __init int setup_disablecpuid(char *arg)
 {
         int bit;
+
         if (get_option(&arg, &bit) && bit < NCAPINTS*32)
                 setup_clear_cpu_cap(bit);
         else
                 return 0;
+
         return 1;
 }
 __setup("clearcpuid=", setup_disablecpuid);
 
 #ifdef CONFIG_X86_64
-struct x8664_pda **_cpu_pda __read_mostly;
-EXPORT_SYMBOL(_cpu_pda);
-
 struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
 
-static char boot_cpu_stack[IRQSTACKSIZE] __page_aligned_bss;
+DEFINE_PER_CPU_FIRST(union irq_stack_union,
+                     irq_stack_union) __aligned(PAGE_SIZE);
 
-void __cpuinit pda_init(int cpu)
-{
-        struct x8664_pda *pda = cpu_pda(cpu);
+DEFINE_PER_CPU(char *, irq_stack_ptr) =
+        init_per_cpu_var(irq_stack_union.irq_stack) + IRQ_STACK_SIZE - 64;
 
-        /* Setup up data that may be needed in __get_free_pages early */
-        loadsegment(fs, 0);
-        loadsegment(gs, 0);
-        /* Memory clobbers used to order PDA accessed */
-        mb();
-        wrmsrl(MSR_GS_BASE, pda);
-        mb();
-
-        pda->cpunumber = cpu;
-        pda->irqcount = -1;
-        pda->kernelstack = (unsigned long)stack_thread_info() -
-                                 PDA_STACKOFFSET + THREAD_SIZE;
-        pda->active_mm = &init_mm;
-        pda->mmu_state = 0;
-
-        if (cpu == 0) {
-                /* others are initialized in smpboot.c */
-                pda->pcurrent = &init_task;
-                pda->irqstackptr = boot_cpu_stack;
-                pda->irqstackptr += IRQSTACKSIZE - 64;
-        } else {
-                if (!pda->irqstackptr) {
-                        pda->irqstackptr = (char *)
-                                __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
-                        if (!pda->irqstackptr)
-                                panic("cannot allocate irqstack for cpu %d",
-                                      cpu);
-                        pda->irqstackptr += IRQSTACKSIZE - 64;
-                }
+DEFINE_PER_CPU(unsigned long, kernel_stack) =
+        (unsigned long)&init_thread_union - KERNEL_STACK_OFFSET + THREAD_SIZE;
+EXPORT_PER_CPU_SYMBOL(kernel_stack);
 
-                if (pda->nodenumber == 0 && cpu_to_node(cpu) != NUMA_NO_NODE)
-                        pda->nodenumber = cpu_to_node(cpu);
-        }
-}
+DEFINE_PER_CPU(unsigned int, irq_count) = -1;
 
-static char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ +
-                                  DEBUG_STKSZ] __page_aligned_bss;
+/*
+ * Special IST stacks which the CPU switches to when it calls
+ * an IST-marked descriptor entry. Up to 7 stacks (hardware
+ * limit), all of them are 4K, except the debug stack which
+ * is 8K.
+ */
+static const unsigned int exception_stack_sizes[N_EXCEPTION_STACKS] = {
+          [0 ... N_EXCEPTION_STACKS - 1]        = EXCEPTION_STKSZ,
+          [DEBUG_STACK - 1]                     = DEBUG_STKSZ
+};
 
-extern asmlinkage void ignore_sysret(void);
+static DEFINE_PER_CPU_PAGE_ALIGNED(char, exception_stacks
+        [(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ])
+        __aligned(PAGE_SIZE);
 
 /* May not be marked __init: used by software suspend */
 void syscall_init(void)
@@ -957,16 +1034,38 @@ unsigned long kernel_eflags;
  */
 DEFINE_PER_CPU(struct orig_ist, orig_ist);
 
-#else
+#else   /* CONFIG_X86_64 */
+
+#ifdef CONFIG_CC_STACKPROTECTOR
+DEFINE_PER_CPU(unsigned long, stack_canary);
+#endif
 
-/* Make sure %fs is initialized properly in idle threads */
+/* Make sure %fs and %gs are initialized properly in idle threads */
 struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs)
 {
         memset(regs, 0, sizeof(struct pt_regs));
         regs->fs = __KERNEL_PERCPU;
+        regs->gs = __KERNEL_STACK_CANARY;
+
         return regs;
 }
-#endif
+#endif  /* CONFIG_X86_64 */
+
+/*
+ * Clear all 6 debug registers:
+ */
+static void clear_all_debug_regs(void)
+{
+        int i;
+
+        for (i = 0; i < 8; i++) {
+                /* Ignore db4, db5 */
+                if ((i == 4) || (i == 5))
+                        continue;
+
+                set_debugreg(0, i);
+        }
+}
 
 /*
  * cpu_init() initializes state that is per-CPU. Some data is already
@@ -976,21 +1075,25 @@ struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs)
  * A lot of state is already set up in PDA init for 64 bit
  */
 #ifdef CONFIG_X86_64
+
 void __cpuinit cpu_init(void)
 {
-        int cpu = stack_smp_processor_id();
-        struct tss_struct *t = &per_cpu(init_tss, cpu);
-        struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
-        unsigned long v;
-        char *estacks = NULL;
+        struct orig_ist *orig_ist;
         struct task_struct *me;
+        struct tss_struct *t;
+        unsigned long v;
+        int cpu;
         int i;
 
-        /* CPU 0 is initialised in head64.c */
-        if (cpu != 0)
-                pda_init(cpu);
-        else
-                estacks = boot_exception_stacks;
+        cpu = stack_smp_processor_id();
+        t = &per_cpu(init_tss, cpu);
+        orig_ist = &per_cpu(orig_ist, cpu);
+
+#ifdef CONFIG_NUMA
+        if (cpu != 0 && percpu_read(node_number) == 0 &&
+            cpu_to_node(cpu) != NUMA_NO_NODE)
+                percpu_write(node_number, cpu_to_node(cpu));
+#endif
 
         me = current;
 
@@ -1006,7 +1109,9 @@ void __cpuinit cpu_init(void)
          * and set up the GDT descriptor:
          */
 
-        switch_to_new_gdt();
+        switch_to_new_gdt(cpu);
+        loadsegment(fs, 0);
+
         load_idt((const struct desc_ptr *)&idt_descr);
 
         memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
@@ -1017,31 +1122,24 @@ void __cpuinit cpu_init(void)
         barrier();
 
         check_efer();
-        if (cpu != 0 && x2apic)
+        if (cpu != 0)
                 enable_x2apic();
 
         /*
          * set up and load the per-CPU TSS
          */
         if (!orig_ist->ist[0]) {
-                static const unsigned int order[N_EXCEPTION_STACKS] = {
-                  [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
-                  [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
-                };
+                char *estacks = per_cpu(exception_stacks, cpu);
+
                 for (v = 0; v < N_EXCEPTION_STACKS; v++) {
-                        if (cpu) {
-                                estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
-                                if (!estacks)
-                                        panic("Cannot allocate exception "
-                                              "stack %ld %d\n", v, cpu);
-                        }
-                        estacks += PAGE_SIZE << order[v];
+                        estacks += exception_stack_sizes[v];
                         orig_ist->ist[v] = t->x86_tss.ist[v] =
                                         (unsigned long)estacks;
                 }
         }
 
         t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
+
         /*
          * <= is required because the CPU will access up to
          * 8 bits beyond the end of the IO permission bitmap.
@@ -1051,8 +1149,7 @@ void __cpuinit cpu_init(void)
 
         atomic_inc(&init_mm.mm_count);
         me->active_mm = &init_mm;
-        if (me->mm)
-                BUG();
+        BUG_ON(me->mm);
         enter_lazy_tlb(&init_mm, me);
 
         load_sp0(t, &current->thread);
@@ -1069,22 +1166,9 @@ void __cpuinit cpu_init(void)
          */
         if (kgdb_connected && arch_kgdb_ops.correct_hw_break)
                 arch_kgdb_ops.correct_hw_break();
-        else {
-#endif
-        /*
-         * Clear all 6 debug registers:
-         */
-
-        set_debugreg(0UL, 0);
-        set_debugreg(0UL, 1);
-        set_debugreg(0UL, 2);
-        set_debugreg(0UL, 3);
-        set_debugreg(0UL, 6);
-        set_debugreg(0UL, 7);
-#ifdef CONFIG_KGDB
-        /* If the kgdb is connected no debug regs should be altered. */
-        }
+        else
 #endif
+                clear_all_debug_regs();
 
         fpu_init();
 
@@ -1105,7 +1189,8 @@ void __cpuinit cpu_init(void)
 
         if (cpumask_test_and_set_cpu(cpu, cpu_initialized_mask)) {
                 printk(KERN_WARNING "CPU#%d already initialized!\n", cpu);
-                for (;;) local_irq_enable();
+                for (;;)
+                        local_irq_enable();
         }
 
         printk(KERN_INFO "Initializing CPU#%d\n", cpu);
@@ -1114,15 +1199,14 @@ void __cpuinit cpu_init(void)
                 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
 
         load_idt(&idt_descr);
-        switch_to_new_gdt();
+        switch_to_new_gdt(cpu);
 
         /*
          * Set up and load the per-CPU TSS and LDT
          */
         atomic_inc(&init_mm.mm_count);
         curr->active_mm = &init_mm;
-        if (curr->mm)
-                BUG();
+        BUG_ON(curr->mm);
         enter_lazy_tlb(&init_mm, curr);
 
         load_sp0(t, thread);
@@ -1135,16 +1219,7 @@ void __cpuinit cpu_init(void)
         __set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss);
 #endif
 
-        /* Clear %gs. */
-        asm volatile ("mov %0, %%gs" : : "r" (0));
-
-        /* Clear all 6 debug registers: */
-        set_debugreg(0, 0);
-        set_debugreg(0, 1);
-        set_debugreg(0, 2);
-        set_debugreg(0, 3);
-        set_debugreg(0, 6);
-        set_debugreg(0, 7);
+        clear_all_debug_regs();
 
         /*
          * Force FPU initialization:
@@ -1164,6 +1239,4 @@ void __cpuinit cpu_init(void)
 
         xsave_init();
 }
-
-
 #endif