4 files changed, 34 insertions, 27 deletions

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index a34601f5298..a58ef98be15 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -62,7 +62,7 @@ unsigned int boot_cpu_physical_apicid = -1U;
 /*
  * The highest APIC ID seen during enumeration.
  *
- * This determines the messaging protocol we can use: if all APIC IDs
+ * On AMD, this determines the messaging protocol we can use: if all APIC IDs
  * are in the 0 ... 7 range, then we can use logical addressing which
  * has some performance advantages (better broadcasting).
  *
@@ -979,7 +979,7 @@ void lapic_shutdown(void)
 {
         unsigned long flags;
 
-        if (!cpu_has_apic)
+        if (!cpu_has_apic && !apic_from_smp_config())
                 return;
 
         local_irq_save(flags);
@@ -1197,8 +1197,7 @@ void __cpuinit setup_local_APIC(void)
          * Double-check whether this APIC is really registered.
          * This is meaningless in clustered apic mode, so we skip it.
          */
-        if (!apic->apic_id_registered())
-                BUG();
+        BUG_ON(!apic->apic_id_registered());
 
         /*
          * Intel recommends to set DFR, LDR and TPR before enabling
@@ -1917,24 +1916,14 @@ void __cpuinit generic_processor_info(int apicid, int version)
                 max_physical_apicid = apicid;
 
 #ifdef CONFIG_X86_32
-        /*
-         * Would be preferable to switch to bigsmp when CONFIG_HOTPLUG_CPU=y
-         * but we need to work other dependencies like SMP_SUSPEND etc
-         * before this can be done without some confusion.
-         * if (CPU_HOTPLUG_ENABLED || num_processors > 8)
-         *       - Ashok Raj <ashok.raj@intel.com>
-         */
-        if (max_physical_apicid >= 8) {
-                switch (boot_cpu_data.x86_vendor) {
-                case X86_VENDOR_INTEL:
-                        if (!APIC_XAPIC(version)) {
-                                def_to_bigsmp = 0;
-                                break;
-                        }
-                        /* If P4 and above fall through */
-                case X86_VENDOR_AMD:
+        switch (boot_cpu_data.x86_vendor) {
+        case X86_VENDOR_INTEL:
+                if (num_processors > 8)
+                        def_to_bigsmp = 1;
+                break;
+        case X86_VENDOR_AMD:
+                if (max_physical_apicid >= 8)
                         def_to_bigsmp = 1;
-                }
         }
 #endif
 
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 809e1cf86d6..64970b9885f 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1874,7 +1874,7 @@ __apicdebuginit(int) print_all_ICs(void)
         print_PIC();
 
         /* don't print out if apic is not there */
-        if (!cpu_has_apic || disable_apic)
+        if (!cpu_has_apic && !apic_from_smp_config())
                 return 0;
 
         print_all_local_APICs();
@@ -1999,7 +1999,7 @@ void disable_IO_APIC(void)
         /*
          * Use virtual wire A mode when interrupt remapping is enabled.
          */
-        if (cpu_has_apic)
+        if (cpu_has_apic || apic_from_smp_config())
                 disconnect_bsp_APIC(!intr_remapping_enabled &&
                                 ioapic_i8259.pin != -1);
 }
diff --git a/arch/x86/kernel/apic/probe_64.c b/arch/x86/kernel/apic/probe_64.c
index 65edc180fc8..c4cbd3080c1 100644
--- a/arch/x86/kernel/apic/probe_64.c
+++ b/arch/x86/kernel/apic/probe_64.c
@@ -64,16 +64,23 @@ void __init default_setup_apic_routing(void)
                         apic = &apic_x2apic_phys;
                 else
                         apic = &apic_x2apic_cluster;
-                printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
         }
 #endif
 
         if (apic == &apic_flat) {
-                if (max_physical_apicid >= 8)
-                        apic = &apic_physflat;
-                printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
+                switch (boot_cpu_data.x86_vendor) {
+                case X86_VENDOR_INTEL:
+                        if (num_processors > 8)
+                                apic = &apic_physflat;
+                        break;
+                case X86_VENDOR_AMD:
+                        if (max_physical_apicid >= 8)
+                                apic = &apic_physflat;
+                }
         }
 
+        printk(KERN_INFO "Setting APIC routing to %s\n", apic->name);
+
         if (is_vsmp_box()) {
                 /* need to update phys_pkg_id */
                 apic->phys_pkg_id = apicid_phys_pkg_id;
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 601159374e8..f5f5886a6b5 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -389,6 +389,16 @@ static __init void map_gru_high(int max_pnode)
                 map_high("GRU", gru.s.base, shift, max_pnode, map_wb);
 }
 
+static __init void map_mmr_high(int max_pnode)
+{
+        union uvh_rh_gam_mmr_overlay_config_mmr_u mmr;
+        int shift = UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_BASE_SHFT;
+
+        mmr.v = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR);
+        if (mmr.s.enable)
+                map_high("MMR", mmr.s.base, shift, max_pnode, map_uc);
+}
+
 static __init void map_mmioh_high(int max_pnode)
 {
         union uvh_rh_gam_mmioh_overlay_config_mmr_u mmioh;
@@ -643,6 +653,7 @@ void __init uv_system_init(void)
         }
 
         map_gru_high(max_pnode);
+        map_mmr_high(max_pnode);
         map_mmioh_high(max_pnode);
 
         uv_cpu_init();