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-rw-r--r--arch/tile/include/arch/chip_tile64.h3
-rw-r--r--arch/tile/include/arch/chip_tilepro.h3
-rw-r--r--arch/tile/include/asm/irq.h62
-rw-r--r--arch/tile/include/asm/smp.h27
-rw-r--r--arch/tile/include/hv/hypervisor.h117
-rw-r--r--arch/tile/include/hv/pagesize.h32
6 files changed, 181 insertions, 63 deletions
diff --git a/arch/tile/include/arch/chip_tile64.h b/arch/tile/include/arch/chip_tile64.h
index 18b5bc8e563..1246573be59 100644
--- a/arch/tile/include/arch/chip_tile64.h
+++ b/arch/tile/include/arch/chip_tile64.h
@@ -248,5 +248,8 @@
248/** Does the chip support rev1 DMA packets? */ 248/** Does the chip support rev1 DMA packets? */
249#define CHIP_HAS_REV1_DMA_PACKETS() 0 249#define CHIP_HAS_REV1_DMA_PACKETS() 0
250 250
251/** Does the chip have an IPI shim? */
252#define CHIP_HAS_IPI() 0
253
251#endif /* !__OPEN_SOURCE__ */ 254#endif /* !__OPEN_SOURCE__ */
252#endif /* __ARCH_CHIP_H__ */ 255#endif /* __ARCH_CHIP_H__ */
diff --git a/arch/tile/include/arch/chip_tilepro.h b/arch/tile/include/arch/chip_tilepro.h
index 9852af16386..e864c47fc89 100644
--- a/arch/tile/include/arch/chip_tilepro.h
+++ b/arch/tile/include/arch/chip_tilepro.h
@@ -248,5 +248,8 @@
248/** Does the chip support rev1 DMA packets? */ 248/** Does the chip support rev1 DMA packets? */
249#define CHIP_HAS_REV1_DMA_PACKETS() 1 249#define CHIP_HAS_REV1_DMA_PACKETS() 1
250 250
251/** Does the chip have an IPI shim? */
252#define CHIP_HAS_IPI() 0
253
251#endif /* !__OPEN_SOURCE__ */ 254#endif /* !__OPEN_SOURCE__ */
252#endif /* __ARCH_CHIP_H__ */ 255#endif /* __ARCH_CHIP_H__ */
diff --git a/arch/tile/include/asm/irq.h b/arch/tile/include/asm/irq.h
index 9be1f849fac..572fd3ef1d7 100644
--- a/arch/tile/include/asm/irq.h
+++ b/arch/tile/include/asm/irq.h
@@ -23,15 +23,65 @@
23/* IRQ numbers used for linux IPIs. */ 23/* IRQ numbers used for linux IPIs. */
24#define IRQ_RESCHEDULE 1 24#define IRQ_RESCHEDULE 1
25 25
26/* The HV interrupt state object. */
27DECLARE_PER_CPU(HV_IntrState, dev_intr_state);
28
29void ack_bad_irq(unsigned int irq); 26void ack_bad_irq(unsigned int irq);
30 27
31/* 28/*
32 * Paravirtualized drivers should call this when their init calls 29 * Different ways of handling interrupts. Tile interrupts are always
33 * discover a valid HV IRQ. 30 * per-cpu; there is no global interrupt controller to implement
31 * enable/disable. Most onboard devices can send their interrupts to
32 * many tiles at the same time, and Tile-specific drivers know how to
33 * deal with this.
34 *
35 * However, generic devices (usually PCIE based, sometimes GPIO)
36 * expect that interrupts will fire on a single core at a time and
37 * that the irq can be enabled or disabled from any core at any time.
38 * We implement this by directing such interrupts to a single core.
39 *
40 * One added wrinkle is that PCI interrupts can be either
41 * hardware-cleared (legacy interrupts) or software cleared (MSI).
42 * Other generic device systems (GPIO) are always software-cleared.
43 *
44 * The enums below are used by drivers for onboard devices, including
45 * the internals of PCI root complex and GPIO. They allow the driver
46 * to tell the generic irq code what kind of interrupt is mapped to a
47 * particular IRQ number.
48 */
49enum {
50 /* per-cpu interrupt; use enable/disable_percpu_irq() to mask */
51 TILE_IRQ_PERCPU,
52 /* global interrupt, hardware responsible for clearing. */
53 TILE_IRQ_HW_CLEAR,
54 /* global interrupt, software responsible for clearing. */
55 TILE_IRQ_SW_CLEAR,
56};
57
58
59/*
60 * Paravirtualized drivers should call this when they dynamically
61 * allocate a new IRQ or discover an IRQ that was pre-allocated by the
62 * hypervisor for use with their particular device. This gives the
63 * IRQ subsystem an opportunity to do interrupt-type-specific
64 * initialization.
65 *
66 * ISSUE: We should modify this API so that registering anything
67 * except percpu interrupts also requires providing callback methods
68 * for enabling and disabling the interrupt. This would allow the
69 * generic IRQ code to proxy enable/disable_irq() calls back into the
70 * PCI subsystem, which in turn could enable or disable the interrupt
71 * at the PCI shim.
34 */ 72 */
35void tile_irq_activate(unsigned int irq); 73void tile_irq_activate(unsigned int irq, int tile_irq_type);
74
75/*
76 * For onboard, non-PCI (e.g. TILE_IRQ_PERCPU) devices, drivers know
77 * how to use enable/disable_percpu_irq() to manage interrupts on each
78 * core. We can't use the generic enable/disable_irq() because they
79 * use a single reference count per irq, rather than per cpu per irq.
80 */
81void enable_percpu_irq(unsigned int irq);
82void disable_percpu_irq(unsigned int irq);
83
84
85void setup_irq_regs(void);
36 86
37#endif /* _ASM_TILE_IRQ_H */ 87#endif /* _ASM_TILE_IRQ_H */
diff --git a/arch/tile/include/asm/smp.h b/arch/tile/include/asm/smp.h
index da24858a739..532124ae4b1 100644
--- a/arch/tile/include/asm/smp.h
+++ b/arch/tile/include/asm/smp.h
@@ -20,6 +20,7 @@
20#include <asm/processor.h> 20#include <asm/processor.h>
21#include <linux/cpumask.h> 21#include <linux/cpumask.h>
22#include <linux/irqreturn.h> 22#include <linux/irqreturn.h>
23#include <hv/hypervisor.h>
23 24
24/* Set up this tile to support receiving hypervisor messages */ 25/* Set up this tile to support receiving hypervisor messages */
25void init_messaging(void); 26void init_messaging(void);
@@ -39,9 +40,6 @@ void send_IPI_single(int dest, int tag);
39/* Process an IPI message */ 40/* Process an IPI message */
40void evaluate_message(int tag); 41void evaluate_message(int tag);
41 42
42/* Process an IRQ_RESCHEDULE IPI. */
43irqreturn_t handle_reschedule_ipi(int irq, void *token);
44
45/* Boot a secondary cpu */ 43/* Boot a secondary cpu */
46void online_secondary(void); 44void online_secondary(void);
47 45
@@ -56,6 +54,20 @@ extern HV_Topology smp_topology;
56#define smp_height (smp_topology.height) 54#define smp_height (smp_topology.height)
57#define smp_width (smp_topology.width) 55#define smp_width (smp_topology.width)
58 56
57/* Convenience functions for converting cpu <-> coords. */
58static inline int cpu_x(int cpu)
59{
60 return cpu % smp_width;
61}
62static inline int cpu_y(int cpu)
63{
64 return cpu / smp_width;
65}
66static inline int xy_to_cpu(int x, int y)
67{
68 return y * smp_width + x;
69}
70
59/* Hypervisor message tags sent via the tile send_IPI*() routines. */ 71/* Hypervisor message tags sent via the tile send_IPI*() routines. */
60#define MSG_TAG_START_CPU 1 72#define MSG_TAG_START_CPU 1
61#define MSG_TAG_STOP_CPU 2 73#define MSG_TAG_STOP_CPU 2
@@ -85,6 +97,9 @@ void print_disabled_cpus(void);
85#define smp_master_cpu 0 97#define smp_master_cpu 0
86#define smp_height 1 98#define smp_height 1
87#define smp_width 1 99#define smp_width 1
100#define cpu_x(cpu) 0
101#define cpu_y(cpu) 0
102#define xy_to_cpu(x, y) 0
88 103
89#endif /* !CONFIG_SMP */ 104#endif /* !CONFIG_SMP */
90 105
@@ -123,4 +138,10 @@ static inline int __cpulist_parse_crop(const char *buf, struct cpumask *dstp,
123 return bitmap_parselist_crop(buf, cpumask_bits(dstp), nbits); 138 return bitmap_parselist_crop(buf, cpumask_bits(dstp), nbits);
124} 139}
125 140
141/* Initialize the IPI subsystem. */
142void ipi_init(void);
143
144/* Function for start-cpu message to cause us to jump to. */
145extern unsigned long start_cpu_function_addr;
146
126#endif /* _ASM_TILE_SMP_H */ 147#endif /* _ASM_TILE_SMP_H */
diff --git a/arch/tile/include/hv/hypervisor.h b/arch/tile/include/hv/hypervisor.h
index 84b31551080..a90d2989587 100644
--- a/arch/tile/include/hv/hypervisor.h
+++ b/arch/tile/include/hv/hypervisor.h
@@ -20,12 +20,9 @@
20#ifndef _TILE_HV_H 20#ifndef _TILE_HV_H
21#define _TILE_HV_H 21#define _TILE_HV_H
22 22
23#ifdef __tile__
24#include <arch/chip.h> 23#include <arch/chip.h>
25#else 24
26/* HACK: Allow use by "tools/cpack/". */ 25#include <hv/pagesize.h>
27#include "install/include/arch/chip.h"
28#endif
29 26
30/* Linux builds want unsigned long constants, but assembler wants numbers */ 27/* Linux builds want unsigned long constants, but assembler wants numbers */
31#ifdef __ASSEMBLER__ 28#ifdef __ASSEMBLER__
@@ -39,7 +36,6 @@
39#define __HV_SIZE_ONE 1UL 36#define __HV_SIZE_ONE 1UL
40#endif 37#endif
41 38
42
43/** The log2 of the span of a level-1 page table, in bytes. 39/** The log2 of the span of a level-1 page table, in bytes.
44 */ 40 */
45#define HV_LOG2_L1_SPAN 32 41#define HV_LOG2_L1_SPAN 32
@@ -48,21 +44,11 @@
48 */ 44 */
49#define HV_L1_SPAN (__HV_SIZE_ONE << HV_LOG2_L1_SPAN) 45#define HV_L1_SPAN (__HV_SIZE_ONE << HV_LOG2_L1_SPAN)
50 46
51/** The log2 of the size of small pages, in bytes. This value should
52 * be verified at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL).
53 */
54#define HV_LOG2_PAGE_SIZE_SMALL 16
55
56/** The size of small pages, in bytes. This value should be verified 47/** The size of small pages, in bytes. This value should be verified
57 * at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL). 48 * at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL).
58 */ 49 */
59#define HV_PAGE_SIZE_SMALL (__HV_SIZE_ONE << HV_LOG2_PAGE_SIZE_SMALL) 50#define HV_PAGE_SIZE_SMALL (__HV_SIZE_ONE << HV_LOG2_PAGE_SIZE_SMALL)
60 51
61/** The log2 of the size of large pages, in bytes. This value should be
62 * verified at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE).
63 */
64#define HV_LOG2_PAGE_SIZE_LARGE 24
65
66/** The size of large pages, in bytes. This value should be verified 52/** The size of large pages, in bytes. This value should be verified
67 * at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE). 53 * at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE).
68 */ 54 */
@@ -93,7 +79,7 @@
93#define HV_DISPATCH_ENTRY_SIZE 32 79#define HV_DISPATCH_ENTRY_SIZE 32
94 80
95/** Version of the hypervisor interface defined by this file */ 81/** Version of the hypervisor interface defined by this file */
96#define _HV_VERSION 10 82#define _HV_VERSION 11
97 83
98/* Index into hypervisor interface dispatch code blocks. 84/* Index into hypervisor interface dispatch code blocks.
99 * 85 *
@@ -253,8 +239,10 @@
253/** hv_set_command_line */ 239/** hv_set_command_line */
254#define HV_DISPATCH_SET_COMMAND_LINE 47 240#define HV_DISPATCH_SET_COMMAND_LINE 47
255 241
256/** hv_dev_register_intr_state */ 242#if !CHIP_HAS_IPI()
257#define HV_DISPATCH_DEV_REGISTER_INTR_STATE 48 243
244/** hv_clear_intr */
245#define HV_DISPATCH_CLEAR_INTR 48
258 246
259/** hv_enable_intr */ 247/** hv_enable_intr */
260#define HV_DISPATCH_ENABLE_INTR 49 248#define HV_DISPATCH_ENABLE_INTR 49
@@ -262,20 +250,30 @@
262/** hv_disable_intr */ 250/** hv_disable_intr */
263#define HV_DISPATCH_DISABLE_INTR 50 251#define HV_DISPATCH_DISABLE_INTR 50
264 252
253/** hv_raise_intr */
254#define HV_DISPATCH_RAISE_INTR 51
255
265/** hv_trigger_ipi */ 256/** hv_trigger_ipi */
266#define HV_DISPATCH_TRIGGER_IPI 51 257#define HV_DISPATCH_TRIGGER_IPI 52
258
259#endif /* !CHIP_HAS_IPI() */
267 260
268/** hv_store_mapping */ 261/** hv_store_mapping */
269#define HV_DISPATCH_STORE_MAPPING 52 262#define HV_DISPATCH_STORE_MAPPING 53
270 263
271/** hv_inquire_realpa */ 264/** hv_inquire_realpa */
272#define HV_DISPATCH_INQUIRE_REALPA 53 265#define HV_DISPATCH_INQUIRE_REALPA 54
273 266
274/** hv_flush_all */ 267/** hv_flush_all */
275#define HV_DISPATCH_FLUSH_ALL 54 268#define HV_DISPATCH_FLUSH_ALL 55
269
270#if CHIP_HAS_IPI()
271/** hv_get_ipi_pte */
272#define HV_DISPATCH_GET_IPI_PTE 56
273#endif
276 274
277/** One more than the largest dispatch value */ 275/** One more than the largest dispatch value */
278#define _HV_DISPATCH_END 55 276#define _HV_DISPATCH_END 57
279 277
280 278
281#ifndef __ASSEMBLER__ 279#ifndef __ASSEMBLER__
@@ -484,21 +482,6 @@ typedef enum {
484 */ 482 */
485int hv_confstr(HV_ConfstrQuery query, HV_VirtAddr buf, int len); 483int hv_confstr(HV_ConfstrQuery query, HV_VirtAddr buf, int len);
486 484
487/** State object used to enable and disable one-shot and level-sensitive
488 * interrupts. */
489typedef struct
490{
491#if CHIP_VA_WIDTH() > 32
492 __hv64 opaque[2]; /**< No user-serviceable parts inside */
493#else
494 __hv32 opaque[2]; /**< No user-serviceable parts inside */
495#endif
496}
497HV_IntrState;
498
499/** A set of interrupts. */
500typedef __hv32 HV_IntrMask;
501
502/** Tile coordinate */ 485/** Tile coordinate */
503typedef struct 486typedef struct
504{ 487{
@@ -509,34 +492,51 @@ typedef struct
509 int y; 492 int y;
510} HV_Coord; 493} HV_Coord;
511 494
495
496#if CHIP_HAS_IPI()
497
498/** Get the PTE for sending an IPI to a particular tile.
499 *
500 * @param tile Tile which will receive the IPI.
501 * @param pl Indicates which IPI registers: 0 = IPI_0, 1 = IPI_1.
502 * @param pte Filled with resulting PTE.
503 * @result Zero if no error, non-zero for invalid parameters.
504 */
505int hv_get_ipi_pte(HV_Coord tile, int pl, HV_PTE* pte);
506
507#else /* !CHIP_HAS_IPI() */
508
509/** A set of interrupts. */
510typedef __hv32 HV_IntrMask;
511
512/** The low interrupt numbers are reserved for use by the client in 512/** The low interrupt numbers are reserved for use by the client in
513 * delivering IPIs. Any interrupt numbers higher than this value are 513 * delivering IPIs. Any interrupt numbers higher than this value are
514 * reserved for use by HV device drivers. */ 514 * reserved for use by HV device drivers. */
515#define HV_MAX_IPI_INTERRUPT 7 515#define HV_MAX_IPI_INTERRUPT 7
516 516
517/** Register an interrupt state object. This object is used to enable and 517/** Enable a set of device interrupts.
518 * disable one-shot and level-sensitive interrupts. Once the state is
519 * registered, the client must not read or write the state object; doing
520 * so will cause undefined results.
521 * 518 *
522 * @param intr_state Pointer to interrupt state object. 519 * @param enab_mask Bitmap of interrupts to enable.
523 * @return HV_OK on success, or a hypervisor error code.
524 */ 520 */
525HV_Errno hv_dev_register_intr_state(HV_IntrState* intr_state); 521void hv_enable_intr(HV_IntrMask enab_mask);
526 522
527/** Enable a set of one-shot and level-sensitive interrupts. 523/** Disable a set of device interrupts.
528 * 524 *
529 * @param intr_state Pointer to interrupt state object. 525 * @param disab_mask Bitmap of interrupts to disable.
530 * @param enab_mask Bitmap of interrupts to enable.
531 */ 526 */
532void hv_enable_intr(HV_IntrState* intr_state, HV_IntrMask enab_mask); 527void hv_disable_intr(HV_IntrMask disab_mask);
533 528
534/** Disable a set of one-shot and level-sensitive interrupts. 529/** Clear a set of device interrupts.
535 * 530 *
536 * @param intr_state Pointer to interrupt state object. 531 * @param clear_mask Bitmap of interrupts to clear.
537 * @param disab_mask Bitmap of interrupts to disable.
538 */ 532 */
539void hv_disable_intr(HV_IntrState* intr_state, HV_IntrMask disab_mask); 533void hv_clear_intr(HV_IntrMask clear_mask);
534
535/** Assert a set of device interrupts.
536 *
537 * @param assert_mask Bitmap of interrupts to clear.
538 */
539void hv_assert_intr(HV_IntrMask assert_mask);
540 540
541/** Trigger a one-shot interrupt on some tile 541/** Trigger a one-shot interrupt on some tile
542 * 542 *
@@ -547,6 +547,8 @@ void hv_disable_intr(HV_IntrState* intr_state, HV_IntrMask disab_mask);
547 */ 547 */
548HV_Errno hv_trigger_ipi(HV_Coord tile, int interrupt); 548HV_Errno hv_trigger_ipi(HV_Coord tile, int interrupt);
549 549
550#endif // !CHIP_HAS_IPI()
551
550/** Store memory mapping in debug memory so that external debugger can read it. 552/** Store memory mapping in debug memory so that external debugger can read it.
551 * A maximum of 16 entries can be stored. 553 * A maximum of 16 entries can be stored.
552 * 554 *
@@ -1010,6 +1012,13 @@ int hv_console_write(HV_VirtAddr bytes, int len);
1010 * it will return to the code which was interrupted by the INTCTRL_1 1012 * it will return to the code which was interrupted by the INTCTRL_1
1011 * interrupt. 1013 * interrupt.
1012 * 1014 *
1015 * Under some circumstances, the firing of INTCTRL_1 can race with
1016 * the lowering of a device interrupt. In such a case, the
1017 * hv_downcall_dispatch service may issue an iret instruction instead
1018 * of entering one of the client's actual downcall-handling interrupt
1019 * vectors. This will return execution to the location that was
1020 * interrupted by INTCTRL_1.
1021 *
1013 * Any saving of registers should be done by the actual handling 1022 * Any saving of registers should be done by the actual handling
1014 * vectors; no registers should be changed by the INTCTRL_1 handler. 1023 * vectors; no registers should be changed by the INTCTRL_1 handler.
1015 * In particular, the client should not use a jal instruction to invoke 1024 * In particular, the client should not use a jal instruction to invoke
diff --git a/arch/tile/include/hv/pagesize.h b/arch/tile/include/hv/pagesize.h
new file mode 100644
index 00000000000..58bed114fed
--- /dev/null
+++ b/arch/tile/include/hv/pagesize.h
@@ -0,0 +1,32 @@
1/*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
13 */
14
15/**
16 * @file pagesize.h
17 */
18
19#ifndef _HV_PAGESIZE_H
20#define _HV_PAGESIZE_H
21
22/** The log2 of the size of small pages, in bytes. This value should
23 * be verified at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL).
24 */
25#define HV_LOG2_PAGE_SIZE_SMALL 16
26
27/** The log2 of the size of large pages, in bytes. This value should be
28 * verified at runtime by calling hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE).
29 */
30#define HV_LOG2_PAGE_SIZE_LARGE 24
31
32#endif /* _HV_PAGESIZE_H */