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-rw-r--r--arch/sparc/include/asm/asi.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/sparc/include/asm/asi.h b/arch/sparc/include/asm/asi.h
index 61ebe7411ce..cc0006dc5d4 100644
--- a/arch/sparc/include/asm/asi.h
+++ b/arch/sparc/include/asm/asi.h
@@ -141,7 +141,8 @@
141/* SpitFire and later extended ASIs. The "(III)" marker designates 141/* SpitFire and later extended ASIs. The "(III)" marker designates
142 * UltraSparc-III and later specific ASIs. The "(CMT)" marker designates 142 * UltraSparc-III and later specific ASIs. The "(CMT)" marker designates
143 * Chip Multi Threading specific ASIs. "(NG)" designates Niagara specific 143 * Chip Multi Threading specific ASIs. "(NG)" designates Niagara specific
144 * ASIs, "(4V)" designates SUN4V specific ASIs. 144 * ASIs, "(4V)" designates SUN4V specific ASIs. "(NG4)" designates SPARC-T4
145 * and later ASIs.
145 */ 146 */
146#define ASI_PHYS_USE_EC 0x14 /* PADDR, E-cachable */ 147#define ASI_PHYS_USE_EC 0x14 /* PADDR, E-cachable */
147#define ASI_PHYS_BYPASS_EC_E 0x15 /* PADDR, E-bit */ 148#define ASI_PHYS_BYPASS_EC_E 0x15 /* PADDR, E-bit */
@@ -243,6 +244,7 @@
243#define ASI_UDBL_CONTROL_R 0x7f /* External UDB control regs rd low*/ 244#define ASI_UDBL_CONTROL_R 0x7f /* External UDB control regs rd low*/
244#define ASI_INTR_R 0x7f /* IRQ vector dispatch read */ 245#define ASI_INTR_R 0x7f /* IRQ vector dispatch read */
245#define ASI_INTR_DATAN_R 0x7f /* (III) In irq vector data reg N */ 246#define ASI_INTR_DATAN_R 0x7f /* (III) In irq vector data reg N */
247#define ASI_PIC 0xb0 /* (NG4) PIC registers */
246#define ASI_PST8_P 0xc0 /* Primary, 8 8-bit, partial */ 248#define ASI_PST8_P 0xc0 /* Primary, 8 8-bit, partial */
247#define ASI_PST8_S 0xc1 /* Secondary, 8 8-bit, partial */ 249#define ASI_PST8_S 0xc1 /* Secondary, 8 8-bit, partial */
248#define ASI_PST16_P 0xc2 /* Primary, 4 16-bit, partial */ 250#define ASI_PST16_P 0xc2 /* Primary, 4 16-bit, partial */