diff options
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7343.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7343.c | 33 |
1 files changed, 22 insertions, 11 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c index 3681cafdb4a..1b8848317e9 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c | |||
@@ -19,6 +19,8 @@ | |||
19 | static struct plat_sci_port scif0_platform_data = { | 19 | static struct plat_sci_port scif0_platform_data = { |
20 | .mapbase = 0xffe00000, | 20 | .mapbase = 0xffe00000, |
21 | .flags = UPF_BOOT_AUTOCONF, | 21 | .flags = UPF_BOOT_AUTOCONF, |
22 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | ||
23 | .scbrr_algo_id = SCBRR_ALGO_2, | ||
22 | .type = PORT_SCIF, | 24 | .type = PORT_SCIF, |
23 | .irqs = { 80, 80, 80, 80 }, | 25 | .irqs = { 80, 80, 80, 80 }, |
24 | }; | 26 | }; |
@@ -34,6 +36,8 @@ static struct platform_device scif0_device = { | |||
34 | static struct plat_sci_port scif1_platform_data = { | 36 | static struct plat_sci_port scif1_platform_data = { |
35 | .mapbase = 0xffe10000, | 37 | .mapbase = 0xffe10000, |
36 | .flags = UPF_BOOT_AUTOCONF, | 38 | .flags = UPF_BOOT_AUTOCONF, |
39 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | ||
40 | .scbrr_algo_id = SCBRR_ALGO_2, | ||
37 | .type = PORT_SCIF, | 41 | .type = PORT_SCIF, |
38 | .irqs = { 81, 81, 81, 81 }, | 42 | .irqs = { 81, 81, 81, 81 }, |
39 | }; | 43 | }; |
@@ -49,6 +53,8 @@ static struct platform_device scif1_device = { | |||
49 | static struct plat_sci_port scif2_platform_data = { | 53 | static struct plat_sci_port scif2_platform_data = { |
50 | .mapbase = 0xffe20000, | 54 | .mapbase = 0xffe20000, |
51 | .flags = UPF_BOOT_AUTOCONF, | 55 | .flags = UPF_BOOT_AUTOCONF, |
56 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | ||
57 | .scbrr_algo_id = SCBRR_ALGO_2, | ||
52 | .type = PORT_SCIF, | 58 | .type = PORT_SCIF, |
53 | .irqs = { 82, 82, 82, 82 }, | 59 | .irqs = { 82, 82, 82, 82 }, |
54 | }; | 60 | }; |
@@ -64,6 +70,8 @@ static struct platform_device scif2_device = { | |||
64 | static struct plat_sci_port scif3_platform_data = { | 70 | static struct plat_sci_port scif3_platform_data = { |
65 | .mapbase = 0xffe30000, | 71 | .mapbase = 0xffe30000, |
66 | .flags = UPF_BOOT_AUTOCONF, | 72 | .flags = UPF_BOOT_AUTOCONF, |
73 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | ||
74 | .scbrr_algo_id = SCBRR_ALGO_2, | ||
67 | .type = PORT_SCIF, | 75 | .type = PORT_SCIF, |
68 | .irqs = { 83, 83, 83, 83 }, | 76 | .irqs = { 83, 83, 83, 83 }, |
69 | }; | 77 | }; |
@@ -360,6 +368,8 @@ void __init plat_early_device_setup(void) | |||
360 | 368 | ||
361 | enum { | 369 | enum { |
362 | UNUSED = 0, | 370 | UNUSED = 0, |
371 | ENABLED, | ||
372 | DISABLED, | ||
363 | 373 | ||
364 | /* interrupt sources */ | 374 | /* interrupt sources */ |
365 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, | 375 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, |
@@ -375,15 +385,13 @@ enum { | |||
375 | I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI, | 385 | I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI, |
376 | I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI, | 386 | I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI, |
377 | SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI, | 387 | SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI, |
378 | IRDA, | 388 | IRDA, SDHI, CMT, TSIF, SIU, |
379 | SDHI0, SDHI1, SDHI2, SDHI3, | ||
380 | CMT, TSIF, SIU, | ||
381 | TMU0, TMU1, TMU2, | 389 | TMU0, TMU1, TMU2, |
382 | JPU, LCDC, | 390 | JPU, LCDC, |
383 | 391 | ||
384 | /* interrupt groups */ | 392 | /* interrupt groups */ |
385 | 393 | ||
386 | DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C0, I2C1, SIM, SDHI, USB, | 394 | DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C0, I2C1, SIM, USB, |
387 | }; | 395 | }; |
388 | 396 | ||
389 | static struct intc_vect vectors[] __initdata = { | 397 | static struct intc_vect vectors[] __initdata = { |
@@ -412,8 +420,8 @@ static struct intc_vect vectors[] __initdata = { | |||
412 | INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), | 420 | INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), |
413 | INTC_VECT(I2C0_ALI, 0xe00), INTC_VECT(I2C0_TACKI, 0xe20), | 421 | INTC_VECT(I2C0_ALI, 0xe00), INTC_VECT(I2C0_TACKI, 0xe20), |
414 | INTC_VECT(I2C0_WAITI, 0xe40), INTC_VECT(I2C0_DTEI, 0xe60), | 422 | INTC_VECT(I2C0_WAITI, 0xe40), INTC_VECT(I2C0_DTEI, 0xe60), |
415 | INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0), | 423 | INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0), |
416 | INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0), | 424 | INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0), |
417 | INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), | 425 | INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), |
418 | INTC_VECT(SIU, 0xf80), | 426 | INTC_VECT(SIU, 0xf80), |
419 | INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), | 427 | INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), |
@@ -431,7 +439,6 @@ static struct intc_group groups[] __initdata = { | |||
431 | INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI), | 439 | INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI), |
432 | INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI), | 440 | INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI), |
433 | INTC_GROUP(SIM, SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI), | 441 | INTC_GROUP(SIM, SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI), |
434 | INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), | ||
435 | INTC_GROUP(USB, USBI0, USBI1), | 442 | INTC_GROUP(USB, USBI0, USBI1), |
436 | }; | 443 | }; |
437 | 444 | ||
@@ -452,7 +459,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { | |||
452 | { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI, | 459 | { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI, |
453 | FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, | 460 | FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, |
454 | { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ | 461 | { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ |
455 | { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, 0, SIU } }, | 462 | { DISABLED, ENABLED, ENABLED, ENABLED, 0, 0, 0, SIU } }, |
456 | { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ | 463 | { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ |
457 | { 0, 0, 0, CMT, 0, USBI1, USBI0 } }, | 464 | { 0, 0, 0, CMT, 0, USBI1, USBI0 } }, |
458 | { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ | 465 | { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ |
@@ -488,9 +495,13 @@ static struct intc_mask_reg ack_registers[] __initdata = { | |||
488 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, | 495 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, |
489 | }; | 496 | }; |
490 | 497 | ||
491 | static DECLARE_INTC_DESC_ACK(intc_desc, "sh7343", vectors, groups, | 498 | static struct intc_desc intc_desc __initdata = { |
492 | mask_registers, prio_registers, sense_registers, | 499 | .name = "sh7343", |
493 | ack_registers); | 500 | .force_enable = ENABLED, |
501 | .force_disable = DISABLED, | ||
502 | .hw = INTC_HW_DESC(vectors, groups, mask_registers, | ||
503 | prio_registers, sense_registers, ack_registers), | ||
504 | }; | ||
494 | 505 | ||
495 | void __init plat_irq_setup(void) | 506 | void __init plat_irq_setup(void) |
496 | { | 507 | { |