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-rw-r--r--arch/sh/include/asm/bitops-llsc.h144
-rw-r--r--arch/sh/include/asm/bitops.h2
-rw-r--r--arch/sh/include/asm/clock.h1
-rw-r--r--arch/sh/include/asm/cmpxchg-llsc.h71
-rw-r--r--arch/sh/include/asm/edosk7705.h30
-rw-r--r--arch/sh/include/asm/elf.h14
-rw-r--r--arch/sh/include/asm/fpu.h19
-rw-r--r--arch/sh/include/asm/ftrace.h8
-rw-r--r--arch/sh/include/asm/gpio.h92
-rw-r--r--arch/sh/include/asm/hp6xx.h58
-rw-r--r--arch/sh/include/asm/hw_irq.h92
-rw-r--r--arch/sh/include/asm/io.h300
-rw-r--r--arch/sh/include/asm/io_generic.h7
-rw-r--r--arch/sh/include/asm/irq.h3
-rw-r--r--arch/sh/include/asm/kprobes.h58
-rw-r--r--arch/sh/include/asm/lboxre2.h27
-rw-r--r--arch/sh/include/asm/machvec.h7
-rw-r--r--arch/sh/include/asm/magicpanelr2.h67
-rw-r--r--arch/sh/include/asm/microdev.h80
-rw-r--r--arch/sh/include/asm/migor.h62
-rw-r--r--arch/sh/include/asm/mmzone.h2
-rw-r--r--arch/sh/include/asm/page.h2
-rw-r--r--arch/sh/include/asm/pgtable.h1
-rw-r--r--arch/sh/include/asm/processor.h44
-rw-r--r--arch/sh/include/asm/processor_32.h22
-rw-r--r--arch/sh/include/asm/processor_64.h45
-rw-r--r--arch/sh/include/asm/ptrace.h11
-rw-r--r--arch/sh/include/asm/r7780rp.h198
-rw-r--r--arch/sh/include/asm/rtc.h1
-rw-r--r--arch/sh/include/asm/rts7751r2d.h70
-rw-r--r--arch/sh/include/asm/sdk7780.h81
-rw-r--r--arch/sh/include/asm/setup.h1
-rw-r--r--arch/sh/include/asm/sh7763rdp.h54
-rw-r--r--arch/sh/include/asm/sh7785lcr.h55
-rw-r--r--arch/sh/include/asm/sh_mobile_lcdc.h72
-rw-r--r--arch/sh/include/asm/shmin.h9
-rw-r--r--arch/sh/include/asm/sizes.h61
-rw-r--r--arch/sh/include/asm/smp.h26
-rw-r--r--arch/sh/include/asm/snapgear.h71
-rw-r--r--arch/sh/include/asm/syscall.h10
-rw-r--r--arch/sh/include/asm/syscall_32.h110
-rw-r--r--arch/sh/include/asm/syscall_64.h6
-rw-r--r--arch/sh/include/asm/syscalls.h25
-rw-r--r--arch/sh/include/asm/syscalls_32.h56
-rw-r--r--arch/sh/include/asm/syscalls_64.h34
-rw-r--r--arch/sh/include/asm/system.h8
-rw-r--r--arch/sh/include/asm/system_32.h44
-rw-r--r--arch/sh/include/asm/systemh7751.h71
-rw-r--r--arch/sh/include/asm/thread_info.h32
-rw-r--r--arch/sh/include/asm/titan.h17
-rw-r--r--arch/sh/include/asm/uaccess_64.h26
51 files changed, 985 insertions, 1422 deletions
diff --git a/arch/sh/include/asm/bitops-llsc.h b/arch/sh/include/asm/bitops-llsc.h
new file mode 100644
index 00000000000..43b8e1a8239
--- /dev/null
+++ b/arch/sh/include/asm/bitops-llsc.h
@@ -0,0 +1,144 @@
1#ifndef __ASM_SH_BITOPS_LLSC_H
2#define __ASM_SH_BITOPS_LLSC_H
3
4static inline void set_bit(int nr, volatile void * addr)
5{
6 int mask;
7 volatile unsigned int *a = addr;
8 unsigned long tmp;
9
10 a += nr >> 5;
11 mask = 1 << (nr & 0x1f);
12
13 __asm__ __volatile__ (
14 "1: \n\t"
15 "movli.l @%1, %0 ! set_bit \n\t"
16 "or %3, %0 \n\t"
17 "movco.l %0, @%1 \n\t"
18 "bf 1b \n\t"
19 : "=&z" (tmp), "=r" (a)
20 : "1" (a), "r" (mask)
21 : "t", "memory"
22 );
23}
24
25static inline void clear_bit(int nr, volatile void * addr)
26{
27 int mask;
28 volatile unsigned int *a = addr;
29 unsigned long tmp;
30
31 a += nr >> 5;
32 mask = 1 << (nr & 0x1f);
33
34 __asm__ __volatile__ (
35 "1: \n\t"
36 "movli.l @%1, %0 ! clear_bit \n\t"
37 "and %3, %0 \n\t"
38 "movco.l %0, @%1 \n\t"
39 "bf 1b \n\t"
40 : "=&z" (tmp), "=r" (a)
41 : "1" (a), "r" (~mask)
42 : "t", "memory"
43 );
44}
45
46static inline void change_bit(int nr, volatile void * addr)
47{
48 int mask;
49 volatile unsigned int *a = addr;
50 unsigned long tmp;
51
52 a += nr >> 5;
53 mask = 1 << (nr & 0x1f);
54
55 __asm__ __volatile__ (
56 "1: \n\t"
57 "movli.l @%1, %0 ! change_bit \n\t"
58 "xor %3, %0 \n\t"
59 "movco.l %0, @%1 \n\t"
60 "bf 1b \n\t"
61 : "=&z" (tmp), "=r" (a)
62 : "1" (a), "r" (mask)
63 : "t", "memory"
64 );
65}
66
67static inline int test_and_set_bit(int nr, volatile void * addr)
68{
69 int mask, retval;
70 volatile unsigned int *a = addr;
71 unsigned long tmp;
72
73 a += nr >> 5;
74 mask = 1 << (nr & 0x1f);
75
76 __asm__ __volatile__ (
77 "1: \n\t"
78 "movli.l @%1, %0 ! test_and_set_bit \n\t"
79 "mov %0, %2 \n\t"
80 "or %4, %0 \n\t"
81 "movco.l %0, @%1 \n\t"
82 "bf 1b \n\t"
83 "and %4, %2 \n\t"
84 : "=&z" (tmp), "=r" (a), "=&r" (retval)
85 : "1" (a), "r" (mask)
86 : "t", "memory"
87 );
88
89 return retval != 0;
90}
91
92static inline int test_and_clear_bit(int nr, volatile void * addr)
93{
94 int mask, retval;
95 volatile unsigned int *a = addr;
96 unsigned long tmp;
97
98 a += nr >> 5;
99 mask = 1 << (nr & 0x1f);
100
101 __asm__ __volatile__ (
102 "1: \n\t"
103 "movli.l @%1, %0 ! test_and_clear_bit \n\t"
104 "mov %0, %2 \n\t"
105 "and %5, %0 \n\t"
106 "movco.l %0, @%1 \n\t"
107 "bf 1b \n\t"
108 "and %4, %2 \n\t"
109 "synco \n\t"
110 : "=&z" (tmp), "=r" (a), "=&r" (retval)
111 : "1" (a), "r" (mask), "r" (~mask)
112 : "t", "memory"
113 );
114
115 return retval != 0;
116}
117
118static inline int test_and_change_bit(int nr, volatile void * addr)
119{
120 int mask, retval;
121 volatile unsigned int *a = addr;
122 unsigned long tmp;
123
124 a += nr >> 5;
125 mask = 1 << (nr & 0x1f);
126
127 __asm__ __volatile__ (
128 "1: \n\t"
129 "movli.l @%1, %0 ! test_and_change_bit \n\t"
130 "mov %0, %2 \n\t"
131 "xor %4, %0 \n\t"
132 "movco.l %0, @%1 \n\t"
133 "bf 1b \n\t"
134 "and %4, %2 \n\t"
135 "synco \n\t"
136 : "=&z" (tmp), "=r" (a), "=&r" (retval)
137 : "1" (a), "r" (mask)
138 : "t", "memory"
139 );
140
141 return retval != 0;
142}
143
144#endif /* __ASM_SH_BITOPS_LLSC_H */
diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h
index d7d382f63ee..367930d8e5a 100644
--- a/arch/sh/include/asm/bitops.h
+++ b/arch/sh/include/asm/bitops.h
@@ -13,6 +13,8 @@
13 13
14#ifdef CONFIG_GUSA_RB 14#ifdef CONFIG_GUSA_RB
15#include <asm/bitops-grb.h> 15#include <asm/bitops-grb.h>
16#elif defined(CONFIG_CPU_SH4A)
17#include <asm/bitops-llsc.h>
16#else 18#else
17#include <asm/bitops-irq.h> 19#include <asm/bitops-irq.h>
18#endif 20#endif
diff --git a/arch/sh/include/asm/clock.h b/arch/sh/include/asm/clock.h
index 720dfab7b15..f9c88583d90 100644
--- a/arch/sh/include/asm/clock.h
+++ b/arch/sh/include/asm/clock.h
@@ -39,6 +39,7 @@ struct clk {
39 39
40/* Should be defined by processor-specific code */ 40/* Should be defined by processor-specific code */
41void arch_init_clk_ops(struct clk_ops **, int type); 41void arch_init_clk_ops(struct clk_ops **, int type);
42int __init arch_clk_init(void);
42 43
43/* arch/sh/kernel/cpu/clock.c */ 44/* arch/sh/kernel/cpu/clock.c */
44int clk_init(void); 45int clk_init(void);
diff --git a/arch/sh/include/asm/cmpxchg-llsc.h b/arch/sh/include/asm/cmpxchg-llsc.h
new file mode 100644
index 00000000000..aee3bf28658
--- /dev/null
+++ b/arch/sh/include/asm/cmpxchg-llsc.h
@@ -0,0 +1,71 @@
1#ifndef __ASM_SH_CMPXCHG_LLSC_H
2#define __ASM_SH_CMPXCHG_LLSC_H
3
4static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val)
5{
6 unsigned long retval;
7 unsigned long tmp;
8
9 __asm__ __volatile__ (
10 "1: \n\t"
11 "movli.l @%1, %0 ! xchg_u32 \n\t"
12 "mov %0, %2 \n\t"
13 "mov %4, %0 \n\t"
14 "movco.l %0, @%1 \n\t"
15 "bf 1b \n\t"
16 "synco \n\t"
17 : "=&z"(tmp), "=r" (m), "=&r" (retval)
18 : "1" (m), "r" (val)
19 : "t", "memory"
20 );
21
22 return retval;
23}
24
25static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val)
26{
27 unsigned long retval;
28 unsigned long tmp;
29
30 __asm__ __volatile__ (
31 "1: \n\t"
32 "movli.l @%1, %0 ! xchg_u8 \n\t"
33 "mov %0, %2 \n\t"
34 "mov %4, %0 \n\t"
35 "movco.l %0, @%1 \n\t"
36 "bf 1b \n\t"
37 "synco \n\t"
38 : "=&z"(tmp), "=r" (m), "=&r" (retval)
39 : "1" (m), "r" (val & 0xff)
40 : "t", "memory"
41 );
42
43 return retval;
44}
45
46static inline unsigned long
47__cmpxchg_u32(volatile int *m, unsigned long old, unsigned long new)
48{
49 unsigned long retval;
50 unsigned long tmp;
51
52 __asm__ __volatile__ (
53 "1: \n\t"
54 "movli.l @%1, %0 ! __cmpxchg_u32 \n\t"
55 "mov %0, %2 \n\t"
56 "cmp/eq %2, %4 \n\t"
57 "bf 2f \n\t"
58 "mov %5, %0 \n\t"
59 "2: \n\t"
60 "movco.l %0, @%1 \n\t"
61 "bf 1b \n\t"
62 "synco \n\t"
63 : "=&z" (tmp), "=r" (m), "=&r" (retval)
64 : "1" (m), "r" (old), "r" (new)
65 : "t", "memory"
66 );
67
68 return retval;
69}
70
71#endif /* __ASM_SH_CMPXCHG_LLSC_H */
diff --git a/arch/sh/include/asm/edosk7705.h b/arch/sh/include/asm/edosk7705.h
deleted file mode 100644
index 5bdc9d9be3d..00000000000
--- a/arch/sh/include/asm/edosk7705.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/*
2 * include/asm-sh/edosk7705.h
3 *
4 * Modified version of io_se.h for the EDOSK7705 specific functions.
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * IO functions for an Hitachi EDOSK7705 development board
10 */
11
12#ifndef __ASM_SH_EDOSK7705_IO_H
13#define __ASM_SH_EDOSK7705_IO_H
14
15#include <asm/io_generic.h>
16
17extern unsigned char sh_edosk7705_inb(unsigned long port);
18extern unsigned int sh_edosk7705_inl(unsigned long port);
19
20extern void sh_edosk7705_outb(unsigned char value, unsigned long port);
21extern void sh_edosk7705_outl(unsigned int value, unsigned long port);
22
23extern void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count);
24extern void sh_edosk7705_insl(unsigned long port, void *addr, unsigned long count);
25extern void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count);
26extern void sh_edosk7705_outsl(unsigned long port, const void *addr, unsigned long count);
27
28extern unsigned long sh_edosk7705_isa_port2addr(unsigned long offset);
29
30#endif /* __ASM_SH_EDOSK7705_IO_H */
diff --git a/arch/sh/include/asm/elf.h b/arch/sh/include/asm/elf.h
index ee02db110f0..9eb9036a1bd 100644
--- a/arch/sh/include/asm/elf.h
+++ b/arch/sh/include/asm/elf.h
@@ -108,6 +108,14 @@ typedef struct user_fpu_struct elf_fpregset_t;
108#define elf_check_fdpic(x) ((x)->e_flags & EF_SH_FDPIC) 108#define elf_check_fdpic(x) ((x)->e_flags & EF_SH_FDPIC)
109#define elf_check_const_displacement(x) ((x)->e_flags & EF_SH_PIC) 109#define elf_check_const_displacement(x) ((x)->e_flags & EF_SH_PIC)
110 110
111#ifdef CONFIG_SUPERH32
112/*
113 * Enable dump using regset.
114 * This covers all of general/DSP/FPU regs.
115 */
116#define CORE_DUMP_USE_REGSET
117#endif
118
111#define USE_ELF_CORE_DUMP 119#define USE_ELF_CORE_DUMP
112#define ELF_FDPIC_CORE_EFLAGS EF_SH_FDPIC 120#define ELF_FDPIC_CORE_EFLAGS EF_SH_FDPIC
113#define ELF_EXEC_PAGESIZE PAGE_SIZE 121#define ELF_EXEC_PAGESIZE PAGE_SIZE
@@ -190,12 +198,6 @@ do { \
190#endif 198#endif
191 199
192#define SET_PERSONALITY(ex) set_personality(PER_LINUX_32BIT) 200#define SET_PERSONALITY(ex) set_personality(PER_LINUX_32BIT)
193struct task_struct;
194extern int dump_task_regs (struct task_struct *, elf_gregset_t *);
195extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *);
196
197#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
198#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
199 201
200#ifdef CONFIG_VSYSCALL 202#ifdef CONFIG_VSYSCALL
201/* vDSO has arch_setup_additional_pages */ 203/* vDSO has arch_setup_additional_pages */
diff --git a/arch/sh/include/asm/fpu.h b/arch/sh/include/asm/fpu.h
index 91462fea150..1d3aee04b5c 100644
--- a/arch/sh/include/asm/fpu.h
+++ b/arch/sh/include/asm/fpu.h
@@ -30,8 +30,15 @@ static inline void save_fpu(struct task_struct *tsk, struct pt_regs *regs)
30} 30}
31#endif 31#endif
32 32
33struct user_regset;
34
33extern int do_fpu_inst(unsigned short, struct pt_regs *); 35extern int do_fpu_inst(unsigned short, struct pt_regs *);
34 36
37extern int fpregs_get(struct task_struct *target,
38 const struct user_regset *regset,
39 unsigned int pos, unsigned int count,
40 void *kbuf, void __user *ubuf);
41
35static inline void unlazy_fpu(struct task_struct *tsk, struct pt_regs *regs) 42static inline void unlazy_fpu(struct task_struct *tsk, struct pt_regs *regs)
36{ 43{
37 preempt_disable(); 44 preempt_disable();
@@ -50,6 +57,18 @@ static inline void clear_fpu(struct task_struct *tsk, struct pt_regs *regs)
50 preempt_enable(); 57 preempt_enable();
51} 58}
52 59
60static inline int init_fpu(struct task_struct *tsk)
61{
62 if (tsk_used_math(tsk)) {
63 if ((boot_cpu_data.flags & CPU_HAS_FPU) && tsk == current)
64 unlazy_fpu(tsk, task_pt_regs(tsk));
65 return 0;
66 }
67
68 set_stopped_child_used_math(tsk);
69 return 0;
70}
71
53#endif /* __ASSEMBLY__ */ 72#endif /* __ASSEMBLY__ */
54 73
55#endif /* __ASM_SH_FPU_H */ 74#endif /* __ASM_SH_FPU_H */
diff --git a/arch/sh/include/asm/ftrace.h b/arch/sh/include/asm/ftrace.h
new file mode 100644
index 00000000000..3aed362c946
--- /dev/null
+++ b/arch/sh/include/asm/ftrace.h
@@ -0,0 +1,8 @@
1#ifndef __ASM_SH_FTRACE_H
2#define __ASM_SH_FTRACE_H
3
4#ifndef __ASSEMBLY__
5extern void mcount(void);
6#endif
7
8#endif /* __ASM_SH_FTRACE_H */
diff --git a/arch/sh/include/asm/gpio.h b/arch/sh/include/asm/gpio.h
index cf32bd2df88..9650e7c9c39 100644
--- a/arch/sh/include/asm/gpio.h
+++ b/arch/sh/include/asm/gpio.h
@@ -1,9 +1,9 @@
1/* 1/*
2 * include/asm-sh/gpio.h 2 * include/asm-sh/gpio.h
3 * 3 *
4 * Copyright (C) 2007 Markus Brunner, Mark Jonas 4 * Generic GPIO API and pinmux table support for SuperH.
5 * 5 *
6 * Addresses for the Pin Function Controller 6 * Copyright (c) 2008 Magnus Damm
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -16,4 +16,92 @@
16#include <cpu/gpio.h> 16#include <cpu/gpio.h>
17#endif 17#endif
18 18
19typedef unsigned short pinmux_enum_t;
20typedef unsigned char pinmux_flag_t;
21
22#define PINMUX_TYPE_NONE 0
23#define PINMUX_TYPE_FUNCTION 1
24#define PINMUX_TYPE_GPIO 2
25#define PINMUX_TYPE_OUTPUT 3
26#define PINMUX_TYPE_INPUT 4
27#define PINMUX_TYPE_INPUT_PULLUP 5
28#define PINMUX_TYPE_INPUT_PULLDOWN 6
29
30#define PINMUX_FLAG_TYPE (0x7)
31#define PINMUX_FLAG_WANT_PULLUP (1 << 3)
32#define PINMUX_FLAG_WANT_PULLDOWN (1 << 4)
33
34struct pinmux_gpio {
35 pinmux_enum_t enum_id;
36 pinmux_flag_t flags;
37};
38
39#define PINMUX_GPIO(gpio, data_or_mark) [gpio] = { data_or_mark }
40#define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
41
42struct pinmux_cfg_reg {
43 unsigned long reg, reg_width, field_width;
44 unsigned long *cnt;
45 pinmux_enum_t *enum_ids;
46};
47
48#define PINMUX_CFG_REG(name, r, r_width, f_width) \
49 .reg = r, .reg_width = r_width, .field_width = f_width, \
50 .cnt = (unsigned long [r_width / f_width]) {}, \
51 .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) \
52
53struct pinmux_data_reg {
54 unsigned long reg, reg_width;
55 pinmux_enum_t *enum_ids;
56};
57
58#define PINMUX_DATA_REG(name, r, r_width) \
59 .reg = r, .reg_width = r_width, \
60 .enum_ids = (pinmux_enum_t [r_width]) \
61
62struct pinmux_range {
63 pinmux_enum_t begin;
64 pinmux_enum_t end;
65};
66
67struct pinmux_info {
68 char *name;
69 pinmux_enum_t reserved_id;
70 struct pinmux_range data;
71 struct pinmux_range input;
72 struct pinmux_range input_pd;
73 struct pinmux_range input_pu;
74 struct pinmux_range output;
75 struct pinmux_range mark;
76 struct pinmux_range function;
77
78 unsigned first_gpio, last_gpio;
79
80 struct pinmux_gpio *gpios;
81 struct pinmux_cfg_reg *cfg_regs;
82 struct pinmux_data_reg *data_regs;
83
84 pinmux_enum_t *gpio_data;
85 unsigned int gpio_data_size;
86
87 unsigned long *gpio_in_use;
88};
89
90int register_pinmux(struct pinmux_info *pip);
91
92int __gpio_request(unsigned gpio);
93static inline int gpio_request(unsigned gpio, const char *label)
94{
95 return __gpio_request(gpio);
96}
97void gpio_free(unsigned gpio);
98int gpio_direction_input(unsigned gpio);
99int gpio_direction_output(unsigned gpio, int value);
100int gpio_get_value(unsigned gpio);
101void gpio_set_value(unsigned gpio, int value);
102static inline int gpio_export(unsigned gpio, bool direction_may_change)
103{
104 return 0;
105}
106
19#endif /* __ASM_SH_GPIO_H */ 107#endif /* __ASM_SH_GPIO_H */
diff --git a/arch/sh/include/asm/hp6xx.h b/arch/sh/include/asm/hp6xx.h
deleted file mode 100644
index 0d4165a32dc..00000000000
--- a/arch/sh/include/asm/hp6xx.h
+++ /dev/null
@@ -1,58 +0,0 @@
1#ifndef __ASM_SH_HP6XX_H
2#define __ASM_SH_HP6XX_H
3
4/*
5 * Copyright (C) 2003, 2004, 2005 Andriy Skulysh
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 *
11 */
12
13#define HP680_BTN_IRQ 32 /* IRQ0_IRQ */
14#define HP680_TS_IRQ 35 /* IRQ3_IRQ */
15#define HP680_HD64461_IRQ 36 /* IRQ4_IRQ */
16
17#define DAC_LCD_BRIGHTNESS 0
18#define DAC_SPEAKER_VOLUME 1
19
20#define PGDR_OPENED 0x01
21#define PGDR_MAIN_BATTERY_OUT 0x04
22#define PGDR_PLAY_BUTTON 0x08
23#define PGDR_REWIND_BUTTON 0x10
24#define PGDR_RECORD_BUTTON 0x20
25
26#define PHDR_TS_PEN_DOWN 0x08
27
28#define PJDR_LED_BLINK 0x02
29
30#define PKDR_LED_GREEN 0x10
31
32#define SCPDR_TS_SCAN_ENABLE 0x20
33#define SCPDR_TS_SCAN_Y 0x02
34#define SCPDR_TS_SCAN_X 0x01
35
36#define SCPCR_TS_ENABLE 0x405
37#define SCPCR_TS_MASK 0xc0f
38
39#define ADC_CHANNEL_TS_Y 1
40#define ADC_CHANNEL_TS_X 2
41#define ADC_CHANNEL_BATTERY 3
42#define ADC_CHANNEL_BACKUP 4
43#define ADC_CHANNEL_CHARGE 5
44
45#define HD64461_GPADR_SPEAKER 0x01
46#define HD64461_GPADR_PCMCIA0 (0x02|0x08)
47
48#define HD64461_GPBDR_LCDOFF 0x01
49#define HD64461_GPBDR_LCD_CONTRAST_MASK 0x78
50#define HD64461_GPBDR_LED_RED 0x80
51
52#include <asm/hd64461.h>
53#include <asm/io.h>
54
55#define PJDR 0xa4000130
56#define PKDR 0xa4000132
57
58#endif /* __ASM_SH_HP6XX_H */
diff --git a/arch/sh/include/asm/hw_irq.h b/arch/sh/include/asm/hw_irq.h
index d557b00111b..603cdde813d 100644
--- a/arch/sh/include/asm/hw_irq.h
+++ b/arch/sh/include/asm/hw_irq.h
@@ -2,6 +2,7 @@
2#define __ASM_SH_HW_IRQ_H 2#define __ASM_SH_HW_IRQ_H
3 3
4#include <linux/init.h> 4#include <linux/init.h>
5#include <linux/sh_intc.h>
5#include <asm/atomic.h> 6#include <asm/atomic.h>
6 7
7extern atomic_t irq_err_count; 8extern atomic_t irq_err_count;
@@ -23,101 +24,12 @@ struct ipr_desc {
23 24
24void register_ipr_controller(struct ipr_desc *); 25void register_ipr_controller(struct ipr_desc *);
25 26
26typedef unsigned char intc_enum;
27
28struct intc_vect {
29 intc_enum enum_id;
30 unsigned short vect;
31};
32
33#define INTC_VECT(enum_id, vect) { enum_id, vect }
34#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
35
36struct intc_group {
37 intc_enum enum_id;
38 intc_enum enum_ids[32];
39};
40
41#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
42
43struct intc_mask_reg {
44 unsigned long set_reg, clr_reg, reg_width;
45 intc_enum enum_ids[32];
46#ifdef CONFIG_SMP
47 unsigned long smp;
48#endif
49};
50
51struct intc_prio_reg {
52 unsigned long set_reg, clr_reg, reg_width, field_width;
53 intc_enum enum_ids[16];
54#ifdef CONFIG_SMP
55 unsigned long smp;
56#endif
57};
58
59struct intc_sense_reg {
60 unsigned long reg, reg_width, field_width;
61 intc_enum enum_ids[16];
62};
63
64#ifdef CONFIG_SMP
65#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
66#else
67#define INTC_SMP(stride, nr)
68#endif
69
70struct intc_desc {
71 struct intc_vect *vectors;
72 unsigned int nr_vectors;
73 struct intc_group *groups;
74 unsigned int nr_groups;
75 struct intc_mask_reg *mask_regs;
76 unsigned int nr_mask_regs;
77 struct intc_prio_reg *prio_regs;
78 unsigned int nr_prio_regs;
79 struct intc_sense_reg *sense_regs;
80 unsigned int nr_sense_regs;
81 char *name;
82#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
83 struct intc_mask_reg *ack_regs;
84 unsigned int nr_ack_regs;
85#endif
86};
87
88#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
89#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
90 mask_regs, prio_regs, sense_regs) \
91struct intc_desc symbol __initdata = { \
92 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
93 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
94 _INTC_ARRAY(sense_regs), \
95 chipname, \
96}
97
98#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
99#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
100 mask_regs, prio_regs, sense_regs, ack_regs) \
101struct intc_desc symbol __initdata = { \
102 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
103 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
104 _INTC_ARRAY(sense_regs), \
105 chipname, \
106 _INTC_ARRAY(ack_regs), \
107}
108#endif
109
110void __init register_intc_controller(struct intc_desc *desc);
111int intc_set_priority(unsigned int irq, unsigned int prio);
112
113void __init plat_irq_setup(void); 27void __init plat_irq_setup(void);
114#ifdef CONFIG_CPU_SH3
115void __init plat_irq_setup_sh3(void); 28void __init plat_irq_setup_sh3(void);
116#endif 29void __init plat_irq_setup_pins(int mode);
117 30
118enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210, 31enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,
119 IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK, 32 IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK,
120 IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 }; 33 IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };
121void __init plat_irq_setup_pins(int mode);
122 34
123#endif /* __ASM_SH_HW_IRQ_H */ 35#endif /* __ASM_SH_HW_IRQ_H */
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index a4fbf0c84fb..436c2853957 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -1,27 +1,26 @@
1#ifndef __ASM_SH_IO_H 1#ifndef __ASM_SH_IO_H
2#define __ASM_SH_IO_H 2#define __ASM_SH_IO_H
3
4/* 3/*
5 * Convention: 4 * Convention:
6 * read{b,w,l}/write{b,w,l} are for PCI, 5 * read{b,w,l,q}/write{b,w,l,q} are for PCI,
7 * while in{b,w,l}/out{b,w,l} are for ISA 6 * while in{b,w,l}/out{b,w,l} are for ISA
8 * These may (will) be platform specific function. 7 *
9 * In addition we have 'pausing' versions: in{b,w,l}_p/out{b,w,l}_p 8 * In addition we have 'pausing' versions: in{b,w,l}_p/out{b,w,l}_p
10 * and 'string' versions: ins{b,w,l}/outs{b,w,l} 9 * and 'string' versions: ins{b,w,l}/outs{b,w,l}
11 * For read{b,w,l} and write{b,w,l} there are also __raw versions, which
12 * do not have a memory barrier after them.
13 * 10 *
14 * In addition, we have 11 * While read{b,w,l,q} and write{b,w,l,q} contain memory barriers
15 * ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O. 12 * automatically, there are also __raw versions, which do not.
16 * which are processor specific. 13 *
17 */ 14 * Historically, we have also had ctrl_in{b,w,l,q}/ctrl_out{b,w,l,q} for
18 15 * SuperH specific I/O (raw I/O to on-chip CPU peripherals). In practice
19/* 16 * these have the same semantics as the __raw variants, and as such, all
20 * We follow the Alpha convention here: 17 * new code should be using the __raw versions.
21 * __inb expands to an inline function call (which calls via the mv) 18 *
22 * _inb is a real function call (note ___raw fns are _ version of __raw) 19 * All ISA I/O routines are wrapped through the machine vector. If a
23 * inb by default expands to _inb, but the machine specific code may 20 * board does not provide overrides, a generic set that are copied in
24 * define it to __inb if it chooses. 21 * from the default machine vector are used instead. These are largely
22 * for old compat code for I/O offseting to SuperIOs, all of which are
23 * better handled through the machvec ioport mapping routines these days.
25 */ 24 */
26#include <asm/cache.h> 25#include <asm/cache.h>
27#include <asm/system.h> 26#include <asm/system.h>
@@ -31,7 +30,6 @@
31#include <asm-generic/iomap.h> 30#include <asm-generic/iomap.h>
32 31
33#ifdef __KERNEL__ 32#ifdef __KERNEL__
34
35/* 33/*
36 * Depending on which platform we are running on, we need different 34 * Depending on which platform we are running on, we need different
37 * I/O functions. 35 * I/O functions.
@@ -40,105 +38,68 @@
40#include <asm/io_generic.h> 38#include <asm/io_generic.h>
41#include <asm/io_trapped.h> 39#include <asm/io_trapped.h>
42 40
43#define maybebadio(port) \ 41#define inb(p) sh_mv.mv_inb((p))
44 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \ 42#define inw(p) sh_mv.mv_inw((p))
45 __FUNCTION__, __LINE__, (port), (u32)__builtin_return_address(0)) 43#define inl(p) sh_mv.mv_inl((p))
46 44#define outb(x,p) sh_mv.mv_outb((x),(p))
47/* 45#define outw(x,p) sh_mv.mv_outw((x),(p))
48 * Since boards are able to define their own set of I/O routines through 46#define outl(x,p) sh_mv.mv_outl((x),(p))
49 * their respective machine vector, we always wrap through the mv. 47
50 * 48#define inb_p(p) sh_mv.mv_inb_p((p))
51 * Also, in the event that a board hasn't provided its own definition for 49#define inw_p(p) sh_mv.mv_inw_p((p))
52 * a given routine, it will be wrapped to generic code at run-time. 50#define inl_p(p) sh_mv.mv_inl_p((p))
53 */ 51#define outb_p(x,p) sh_mv.mv_outb_p((x),(p))
52#define outw_p(x,p) sh_mv.mv_outw_p((x),(p))
53#define outl_p(x,p) sh_mv.mv_outl_p((x),(p))
54
55#define insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
56#define insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
57#define insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
58#define outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
59#define outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
60#define outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
61
62#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v))
63#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v))
64#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile u32 __force *)(a) = (v))
65#define __raw_writeq(v,a) (__chk_io_ptr(a), *(volatile u64 __force *)(a) = (v))
66
67#define __raw_readb(a) (__chk_io_ptr(a), *(volatile u8 __force *)(a))
68#define __raw_readw(a) (__chk_io_ptr(a), *(volatile u16 __force *)(a))
69#define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a))
70#define __raw_readq(a) (__chk_io_ptr(a), *(volatile u64 __force *)(a))
71
72#define readb(a) ({ u8 r_ = __raw_readb(a); mb(); r_; })
73#define readw(a) ({ u16 r_ = __raw_readw(a); mb(); r_; })
74#define readl(a) ({ u32 r_ = __raw_readl(a); mb(); r_; })
75#define readq(a) ({ u64 r_ = __raw_readq(a); mb(); r_; })
76
77#define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); })
78#define writew(v,a) ({ __raw_writew((v),(a)); mb(); })
79#define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
80#define writeq(v,a) ({ __raw_writeq((v),(a)); mb(); })
54 81
55#define __inb(p) sh_mv.mv_inb((p)) 82/* SuperH on-chip I/O functions */
56#define __inw(p) sh_mv.mv_inw((p)) 83#define ctrl_inb __raw_readb
57#define __inl(p) sh_mv.mv_inl((p)) 84#define ctrl_inw __raw_readw
58#define __outb(x,p) sh_mv.mv_outb((x),(p)) 85#define ctrl_inl __raw_readl
59#define __outw(x,p) sh_mv.mv_outw((x),(p)) 86#define ctrl_inq __raw_readq
60#define __outl(x,p) sh_mv.mv_outl((x),(p))
61
62#define __inb_p(p) sh_mv.mv_inb_p((p))
63#define __inw_p(p) sh_mv.mv_inw_p((p))
64#define __inl_p(p) sh_mv.mv_inl_p((p))
65#define __outb_p(x,p) sh_mv.mv_outb_p((x),(p))
66#define __outw_p(x,p) sh_mv.mv_outw_p((x),(p))
67#define __outl_p(x,p) sh_mv.mv_outl_p((x),(p))
68
69#define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
70#define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
71#define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
72#define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
73#define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
74#define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
75
76#define __readb(a) sh_mv.mv_readb((a))
77#define __readw(a) sh_mv.mv_readw((a))
78#define __readl(a) sh_mv.mv_readl((a))
79#define __writeb(v,a) sh_mv.mv_writeb((v),(a))
80#define __writew(v,a) sh_mv.mv_writew((v),(a))
81#define __writel(v,a) sh_mv.mv_writel((v),(a))
82
83#define inb __inb
84#define inw __inw
85#define inl __inl
86#define outb __outb
87#define outw __outw
88#define outl __outl
89
90#define inb_p __inb_p
91#define inw_p __inw_p
92#define inl_p __inl_p
93#define outb_p __outb_p
94#define outw_p __outw_p
95#define outl_p __outl_p
96
97#define insb __insb
98#define insw __insw
99#define insl __insl
100#define outsb __outsb
101#define outsw __outsw
102#define outsl __outsl
103
104#define __raw_readb(a) __readb((void __iomem *)(a))
105#define __raw_readw(a) __readw((void __iomem *)(a))
106#define __raw_readl(a) __readl((void __iomem *)(a))
107#define __raw_writeb(v, a) __writeb(v, (void __iomem *)(a))
108#define __raw_writew(v, a) __writew(v, (void __iomem *)(a))
109#define __raw_writel(v, a) __writel(v, (void __iomem *)(a))
110
111void __raw_writesl(unsigned long addr, const void *data, int longlen);
112void __raw_readsl(unsigned long addr, void *data, int longlen);
113 87
114/* 88#define ctrl_outb __raw_writeb
115 * The platform header files may define some of these macros to use 89#define ctrl_outw __raw_writew
116 * the inlined versions where appropriate. These macros may also be 90#define ctrl_outl __raw_writel
117 * redefined by userlevel programs. 91#define ctrl_outq __raw_writeq
118 */
119#ifdef __readb
120# define readb(a) ({ unsigned int r_ = __raw_readb(a); mb(); r_; })
121#endif
122#ifdef __raw_readw
123# define readw(a) ({ unsigned int r_ = __raw_readw(a); mb(); r_; })
124#endif
125#ifdef __raw_readl
126# define readl(a) ({ unsigned int r_ = __raw_readl(a); mb(); r_; })
127#endif
128 92
129#ifdef __raw_writeb 93static inline void ctrl_delay(void)
130# define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); }) 94{
131#endif 95#ifdef P2SEG
132#ifdef __raw_writew 96 __raw_readw(P2SEG);
133# define writew(v,a) ({ __raw_writew((v),(a)); mb(); })
134#endif
135#ifdef __raw_writel
136# define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
137#endif 97#endif
98}
138 99
139#define __BUILD_MEMORY_STRING(bwlq, type) \ 100#define __BUILD_MEMORY_STRING(bwlq, type) \
140 \ 101 \
141static inline void writes##bwlq(volatile void __iomem *mem, \ 102static inline void __raw_writes##bwlq(volatile void __iomem *mem, \
142 const void *addr, unsigned int count) \ 103 const void *addr, unsigned int count) \
143{ \ 104{ \
144 const volatile type *__addr = addr; \ 105 const volatile type *__addr = addr; \
@@ -149,8 +110,8 @@ static inline void writes##bwlq(volatile void __iomem *mem, \
149 } \ 110 } \
150} \ 111} \
151 \ 112 \
152static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \ 113static inline void __raw_reads##bwlq(volatile void __iomem *mem, \
153 unsigned int count) \ 114 void *addr, unsigned int count) \
154{ \ 115{ \
155 volatile type *__addr = addr; \ 116 volatile type *__addr = addr; \
156 \ 117 \
@@ -162,106 +123,71 @@ static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \
162 123
163__BUILD_MEMORY_STRING(b, u8) 124__BUILD_MEMORY_STRING(b, u8)
164__BUILD_MEMORY_STRING(w, u16) 125__BUILD_MEMORY_STRING(w, u16)
165#define writesl __raw_writesl 126__BUILD_MEMORY_STRING(q, u64)
166#define readsl __raw_readsl 127
128void __raw_writesl(void __iomem *addr, const void *data, int longlen);
129void __raw_readsl(const void __iomem *addr, void *data, int longlen);
130
131#define writesb __raw_writesb
132#define writesw __raw_writesw
133#define writesl __raw_writesl
134
135#define readsb __raw_readsb
136#define readsw __raw_readsw
137#define readsl __raw_readsl
167 138
168#define readb_relaxed(a) readb(a) 139#define readb_relaxed(a) readb(a)
169#define readw_relaxed(a) readw(a) 140#define readw_relaxed(a) readw(a)
170#define readl_relaxed(a) readl(a) 141#define readl_relaxed(a) readl(a)
142#define readq_relaxed(a) readq(a)
171 143
172/* Simple MMIO */ 144/* Simple MMIO */
173#define ioread8(a) readb(a) 145#define ioread8(a) __raw_readb(a)
174#define ioread16(a) readw(a) 146#define ioread16(a) __raw_readw(a)
175#define ioread16be(a) be16_to_cpu(__raw_readw((a))) 147#define ioread16be(a) be16_to_cpu(__raw_readw((a)))
176#define ioread32(a) readl(a) 148#define ioread32(a) __raw_readl(a)
177#define ioread32be(a) be32_to_cpu(__raw_readl((a))) 149#define ioread32be(a) be32_to_cpu(__raw_readl((a)))
178 150
179#define iowrite8(v,a) writeb((v),(a)) 151#define iowrite8(v,a) __raw_writeb((v),(a))
180#define iowrite16(v,a) writew((v),(a)) 152#define iowrite16(v,a) __raw_writew((v),(a))
181#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a)) 153#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a))
182#define iowrite32(v,a) writel((v),(a)) 154#define iowrite32(v,a) __raw_writel((v),(a))
183#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a)) 155#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a))
184 156
185#define ioread8_rep(a, d, c) readsb((a), (d), (c)) 157#define ioread8_rep(a, d, c) __raw_readsb((a), (d), (c))
186#define ioread16_rep(a, d, c) readsw((a), (d), (c)) 158#define ioread16_rep(a, d, c) __raw_readsw((a), (d), (c))
187#define ioread32_rep(a, d, c) readsl((a), (d), (c)) 159#define ioread32_rep(a, d, c) __raw_readsl((a), (d), (c))
188 160
189#define iowrite8_rep(a, s, c) writesb((a), (s), (c)) 161#define iowrite8_rep(a, s, c) __raw_writesb((a), (s), (c))
190#define iowrite16_rep(a, s, c) writesw((a), (s), (c)) 162#define iowrite16_rep(a, s, c) __raw_writesw((a), (s), (c))
191#define iowrite32_rep(a, s, c) writesl((a), (s), (c)) 163#define iowrite32_rep(a, s, c) __raw_writesl((a), (s), (c))
192 164
193#define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */ 165/* synco on SH-4A, otherwise a nop */
166#define mmiowb() wmb()
194 167
195#define IO_SPACE_LIMIT 0xffffffff 168#define IO_SPACE_LIMIT 0xffffffff
196 169
170extern unsigned long generic_io_base;
171
197/* 172/*
198 * This function provides a method for the generic case where a board-specific 173 * This function provides a method for the generic case where a
199 * ioport_map simply needs to return the port + some arbitrary port base. 174 * board-specific ioport_map simply needs to return the port + some
175 * arbitrary port base.
200 * 176 *
201 * We use this at board setup time to implicitly set the port base, and 177 * We use this at board setup time to implicitly set the port base, and
202 * as a result, we can use the generic ioport_map. 178 * as a result, we can use the generic ioport_map.
203 */ 179 */
204static inline void __set_io_port_base(unsigned long pbase) 180static inline void __set_io_port_base(unsigned long pbase)
205{ 181{
206 extern unsigned long generic_io_base;
207
208 generic_io_base = pbase; 182 generic_io_base = pbase;
209} 183}
210 184
211#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n)) 185#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n))
212 186
213/* We really want to try and get these to memcpy etc */ 187/* We really want to try and get these to memcpy etc */
214extern void memcpy_fromio(void *, volatile void __iomem *, unsigned long); 188void memcpy_fromio(void *, const volatile void __iomem *, unsigned long);
215extern void memcpy_toio(volatile void __iomem *, const void *, unsigned long); 189void memcpy_toio(volatile void __iomem *, const void *, unsigned long);
216extern void memset_io(volatile void __iomem *, int, unsigned long); 190void memset_io(volatile void __iomem *, int, unsigned long);
217
218/* SuperH on-chip I/O functions */
219static inline unsigned char ctrl_inb(unsigned long addr)
220{
221 return *(volatile unsigned char*)addr;
222}
223
224static inline unsigned short ctrl_inw(unsigned long addr)
225{
226 return *(volatile unsigned short*)addr;
227}
228
229static inline unsigned int ctrl_inl(unsigned long addr)
230{
231 return *(volatile unsigned long*)addr;
232}
233
234static inline unsigned long long ctrl_inq(unsigned long addr)
235{
236 return *(volatile unsigned long long*)addr;
237}
238
239static inline void ctrl_outb(unsigned char b, unsigned long addr)
240{
241 *(volatile unsigned char*)addr = b;
242}
243
244static inline void ctrl_outw(unsigned short b, unsigned long addr)
245{
246 *(volatile unsigned short*)addr = b;
247}
248
249static inline void ctrl_outl(unsigned int b, unsigned long addr)
250{
251 *(volatile unsigned long*)addr = b;
252}
253
254static inline void ctrl_outq(unsigned long long b, unsigned long addr)
255{
256 *(volatile unsigned long long*)addr = b;
257}
258
259static inline void ctrl_delay(void)
260{
261#ifdef P2SEG
262 ctrl_inw(P2SEG);
263#endif
264}
265 191
266/* Quad-word real-mode I/O, don't ask.. */ 192/* Quad-word real-mode I/O, don't ask.. */
267unsigned long long peek_real_address_q(unsigned long long addr); 193unsigned long long peek_real_address_q(unsigned long long addr);
@@ -347,9 +273,15 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
347 __ioremap_mode((offset), (size), _PAGE_CACHABLE) 273 __ioremap_mode((offset), (size), _PAGE_CACHABLE)
348#define p3_ioremap(offset, size, flags) \ 274#define p3_ioremap(offset, size, flags) \
349 __ioremap((offset), (size), (flags)) 275 __ioremap((offset), (size), (flags))
276#define ioremap_prot(offset, size, flags) \
277 __ioremap_mode((offset), (size), (flags))
350#define iounmap(addr) \ 278#define iounmap(addr) \
351 __iounmap((addr)) 279 __iounmap((addr))
352 280
281#define maybebadio(port) \
282 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \
283 __func__, __LINE__, (port), (u32)__builtin_return_address(0))
284
353/* 285/*
354 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 286 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
355 * access 287 * access
diff --git a/arch/sh/include/asm/io_generic.h b/arch/sh/include/asm/io_generic.h
index 92fc6070d7b..1e5d375f55d 100644
--- a/arch/sh/include/asm/io_generic.h
+++ b/arch/sh/include/asm/io_generic.h
@@ -33,13 +33,6 @@ void IO_CONCAT(__IO_PREFIX,outsb)(unsigned long, const void *src, unsigned long
33void IO_CONCAT(__IO_PREFIX,outsw)(unsigned long, const void *src, unsigned long count); 33void IO_CONCAT(__IO_PREFIX,outsw)(unsigned long, const void *src, unsigned long count);
34void IO_CONCAT(__IO_PREFIX,outsl)(unsigned long, const void *src, unsigned long count); 34void IO_CONCAT(__IO_PREFIX,outsl)(unsigned long, const void *src, unsigned long count);
35 35
36u8 IO_CONCAT(__IO_PREFIX,readb)(void __iomem *);
37u16 IO_CONCAT(__IO_PREFIX,readw)(void __iomem *);
38u32 IO_CONCAT(__IO_PREFIX,readl)(void __iomem *);
39void IO_CONCAT(__IO_PREFIX,writeb)(u8, void __iomem *);
40void IO_CONCAT(__IO_PREFIX,writew)(u16, void __iomem *);
41void IO_CONCAT(__IO_PREFIX,writel)(u32, void __iomem *);
42
43void *IO_CONCAT(__IO_PREFIX,ioremap)(unsigned long offset, unsigned long size); 36void *IO_CONCAT(__IO_PREFIX,ioremap)(unsigned long offset, unsigned long size);
44void IO_CONCAT(__IO_PREFIX,iounmap)(void *addr); 37void IO_CONCAT(__IO_PREFIX,iounmap)(void *addr);
45 38
diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h
index 6195a531c1b..d319baaf4fb 100644
--- a/arch/sh/include/asm/irq.h
+++ b/arch/sh/include/asm/irq.h
@@ -41,6 +41,9 @@ static inline int generic_irq_demux(int irq)
41#define irq_canonicalize(irq) (irq) 41#define irq_canonicalize(irq) (irq)
42#define irq_demux(irq) sh_mv.mv_irq_demux(irq) 42#define irq_demux(irq) sh_mv.mv_irq_demux(irq)
43 43
44void init_IRQ(void);
45asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs);
46
44#ifdef CONFIG_IRQSTACKS 47#ifdef CONFIG_IRQSTACKS
45extern void irq_ctx_init(int cpu); 48extern void irq_ctx_init(int cpu);
46extern void irq_ctx_exit(int cpu); 49extern void irq_ctx_exit(int cpu);
diff --git a/arch/sh/include/asm/kprobes.h b/arch/sh/include/asm/kprobes.h
new file mode 100644
index 00000000000..6078d8e551d
--- /dev/null
+++ b/arch/sh/include/asm/kprobes.h
@@ -0,0 +1,58 @@
1#ifndef __ASM_SH_KPROBES_H
2#define __ASM_SH_KPROBES_H
3
4#ifdef CONFIG_KPROBES
5
6#include <linux/types.h>
7#include <linux/ptrace.h>
8
9typedef u16 kprobe_opcode_t;
10#define BREAKPOINT_INSTRUCTION 0xc33a
11
12#define MAX_INSN_SIZE 16
13#define MAX_STACK_SIZE 64
14#define MIN_STACK_SIZE(ADDR) (((MAX_STACK_SIZE) < \
15 (((unsigned long)current_thread_info()) + THREAD_SIZE - (ADDR))) \
16 ? (MAX_STACK_SIZE) \
17 : (((unsigned long)current_thread_info()) + THREAD_SIZE - (ADDR)))
18
19#define regs_return_value(regs) ((regs)->regs[0])
20#define flush_insn_slot(p) do { } while (0)
21#define kretprobe_blacklist_size 0
22
23struct kprobe;
24
25void arch_remove_kprobe(struct kprobe *);
26void kretprobe_trampoline(void);
27void jprobe_return_end(void);
28
29/* Architecture specific copy of original instruction*/
30struct arch_specific_insn {
31 /* copy of the original instruction */
32 kprobe_opcode_t insn[MAX_INSN_SIZE];
33};
34
35struct prev_kprobe {
36 struct kprobe *kp;
37 unsigned long status;
38};
39
40/* per-cpu kprobe control block */
41struct kprobe_ctlblk {
42 unsigned long kprobe_status;
43 unsigned long jprobe_saved_r15;
44 struct pt_regs jprobe_saved_regs;
45 kprobe_opcode_t jprobes_stack[MAX_STACK_SIZE];
46 struct prev_kprobe prev_kprobe;
47};
48
49extern int kprobe_fault_handler(struct pt_regs *regs, int trapnr);
50extern int kprobe_exceptions_notify(struct notifier_block *self,
51 unsigned long val, void *data);
52extern int kprobe_handle_illslot(unsigned long pc);
53#else
54
55#define kprobe_handle_illslot(pc) (-1)
56
57#endif /* CONFIG_KPROBES */
58#endif /* __ASM_SH_KPROBES_H */
diff --git a/arch/sh/include/asm/lboxre2.h b/arch/sh/include/asm/lboxre2.h
deleted file mode 100644
index e6d16050492..00000000000
--- a/arch/sh/include/asm/lboxre2.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef __ASM_SH_LBOXRE2_H
2#define __ASM_SH_LBOXRE2_H
3
4/*
5 * Copyright (C) 2007 Nobuhiro Iwamatsu
6 *
7 * NTT COMWARE L-BOX RE2 support
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 *
13 */
14
15#define IRQ_CF1 9 /* CF1 */
16#define IRQ_CF0 10 /* CF0 */
17#define IRQ_INTD 11 /* INTD */
18#define IRQ_ETH1 12 /* Ether1 */
19#define IRQ_ETH0 13 /* Ether0 */
20#define IRQ_INTA 14 /* INTA */
21
22void init_lboxre2_IRQ(void);
23
24#define __IO_PREFIX lboxre2
25#include <asm/io_generic.h>
26
27#endif /* __ASM_SH_LBOXRE2_H */
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h
index b2e4124070a..f1bae02ef7b 100644
--- a/arch/sh/include/asm/machvec.h
+++ b/arch/sh/include/asm/machvec.h
@@ -42,13 +42,6 @@ struct sh_machine_vector {
42 void (*mv_outsw)(unsigned long, const void *src, unsigned long count); 42 void (*mv_outsw)(unsigned long, const void *src, unsigned long count);
43 void (*mv_outsl)(unsigned long, const void *src, unsigned long count); 43 void (*mv_outsl)(unsigned long, const void *src, unsigned long count);
44 44
45 u8 (*mv_readb)(void __iomem *);
46 u16 (*mv_readw)(void __iomem *);
47 u32 (*mv_readl)(void __iomem *);
48 void (*mv_writeb)(u8, void __iomem *);
49 void (*mv_writew)(u16, void __iomem *);
50 void (*mv_writel)(u32, void __iomem *);
51
52 int (*mv_irq_demux)(int irq); 45 int (*mv_irq_demux)(int irq);
53 46
54 void (*mv_init_irq)(void); 47 void (*mv_init_irq)(void);
diff --git a/arch/sh/include/asm/magicpanelr2.h b/arch/sh/include/asm/magicpanelr2.h
deleted file mode 100644
index c644a77ee35..00000000000
--- a/arch/sh/include/asm/magicpanelr2.h
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * include/asm-sh/magicpanelr2.h
3 *
4 * Copyright (C) 2007 Markus Brunner, Mark Jonas
5 *
6 * I/O addresses and bitmasks for Magic Panel Release 2 board
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#ifndef __ASM_SH_MAGICPANELR2_H
14#define __ASM_SH_MAGICPANELR2_H
15
16#include <asm/gpio.h>
17
18#define __IO_PREFIX mpr2
19#include <asm/io_generic.h>
20
21
22#define SETBITS_OUTB(mask, reg) ctrl_outb(ctrl_inb(reg) | mask, reg)
23#define SETBITS_OUTW(mask, reg) ctrl_outw(ctrl_inw(reg) | mask, reg)
24#define SETBITS_OUTL(mask, reg) ctrl_outl(ctrl_inl(reg) | mask, reg)
25#define CLRBITS_OUTB(mask, reg) ctrl_outb(ctrl_inb(reg) & ~mask, reg)
26#define CLRBITS_OUTW(mask, reg) ctrl_outw(ctrl_inw(reg) & ~mask, reg)
27#define CLRBITS_OUTL(mask, reg) ctrl_outl(ctrl_inl(reg) & ~mask, reg)
28
29
30#define PA_LED PORT_PADR /* LED */
31
32
33/* BSC */
34#define CMNCR 0xA4FD0000UL
35#define CS0BCR 0xA4FD0004UL
36#define CS2BCR 0xA4FD0008UL
37#define CS3BCR 0xA4FD000CUL
38#define CS4BCR 0xA4FD0010UL
39#define CS5ABCR 0xA4FD0014UL
40#define CS5BBCR 0xA4FD0018UL
41#define CS6ABCR 0xA4FD001CUL
42#define CS6BBCR 0xA4FD0020UL
43#define CS0WCR 0xA4FD0024UL
44#define CS2WCR 0xA4FD0028UL
45#define CS3WCR 0xA4FD002CUL
46#define CS4WCR 0xA4FD0030UL
47#define CS5AWCR 0xA4FD0034UL
48#define CS5BWCR 0xA4FD0038UL
49#define CS6AWCR 0xA4FD003CUL
50#define CS6BWCR 0xA4FD0040UL
51
52
53/* usb */
54
55#define PORT_UTRCTL 0xA405012CUL
56#define PORT_UCLKCR_W 0xA40A0008UL
57
58#define INTC_ICR0 0xA414FEE0UL
59#define INTC_ICR1 0xA4140010UL
60#define INTC_ICR2 0xA4140012UL
61
62/* MTD */
63
64#define MPR2_MTD_BOOTLOADER_SIZE 0x00060000UL
65#define MPR2_MTD_KERNEL_SIZE 0x00200000UL
66
67#endif /* __ASM_SH_MAGICPANELR2_H */
diff --git a/arch/sh/include/asm/microdev.h b/arch/sh/include/asm/microdev.h
deleted file mode 100644
index 1aed15856e1..00000000000
--- a/arch/sh/include/asm/microdev.h
+++ /dev/null
@@ -1,80 +0,0 @@
1/*
2 * linux/include/asm-sh/microdev.h
3 *
4 * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
5 *
6 * Definitions for the SuperH SH4-202 MicroDev board.
7 *
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
10 */
11#ifndef __ASM_SH_MICRODEV_H
12#define __ASM_SH_MICRODEV_H
13
14extern void init_microdev_irq(void);
15extern void microdev_print_fpga_intc_status(void);
16
17/*
18 * The following are useful macros for manipulating the interrupt
19 * controller (INTC) on the CPU-board FPGA. should be noted that there
20 * is an INTC on the FPGA, and a separate INTC on the SH4-202 core -
21 * these are two different things, both of which need to be prorammed to
22 * correctly route - unfortunately, they have the same name and
23 * abbreviations!
24 */
25#define MICRODEV_FPGA_INTC_BASE 0xa6110000ul /* INTC base address on CPU-board FPGA */
26#define MICRODEV_FPGA_INTENB_REG (MICRODEV_FPGA_INTC_BASE+0ul) /* Interrupt Enable Register on INTC on CPU-board FPGA */
27#define MICRODEV_FPGA_INTDSB_REG (MICRODEV_FPGA_INTC_BASE+8ul) /* Interrupt Disable Register on INTC on CPU-board FPGA */
28#define MICRODEV_FPGA_INTC_MASK(n) (1ul<<(n)) /* Interrupt mask to enable/disable INTC in CPU-board FPGA */
29#define MICRODEV_FPGA_INTPRI_REG(n) (MICRODEV_FPGA_INTC_BASE+0x10+((n)/8)*8)/* Interrupt Priority Register on INTC on CPU-board FPGA */
30#define MICRODEV_FPGA_INTPRI_LEVEL(n,x) ((x)<<(((n)%8)*4)) /* MICRODEV_FPGA_INTPRI_LEVEL(int_number, int_level) */
31#define MICRODEV_FPGA_INTPRI_MASK(n) (MICRODEV_FPGA_INTPRI_LEVEL((n),0xful)) /* Interrupt Priority Mask on INTC on CPU-board FPGA */
32#define MICRODEV_FPGA_INTSRC_REG (MICRODEV_FPGA_INTC_BASE+0x30ul) /* Interrupt Source Register on INTC on CPU-board FPGA */
33#define MICRODEV_FPGA_INTREQ_REG (MICRODEV_FPGA_INTC_BASE+0x38ul) /* Interrupt Request Register on INTC on CPU-board FPGA */
34
35
36/*
37 * The following are the IRQ numbers for the Linux Kernel for external
38 * interrupts. i.e. the numbers seen by 'cat /proc/interrupt'.
39 */
40#define MICRODEV_LINUX_IRQ_KEYBOARD 1 /* SuperIO Keyboard */
41#define MICRODEV_LINUX_IRQ_SERIAL1 2 /* SuperIO Serial #1 */
42#define MICRODEV_LINUX_IRQ_ETHERNET 3 /* on-board Ethnernet */
43#define MICRODEV_LINUX_IRQ_SERIAL2 4 /* SuperIO Serial #2 */
44#define MICRODEV_LINUX_IRQ_USB_HC 7 /* on-board USB HC */
45#define MICRODEV_LINUX_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */
46#define MICRODEV_LINUX_IRQ_IDE2 13 /* SuperIO IDE #2 */
47#define MICRODEV_LINUX_IRQ_IDE1 14 /* SuperIO IDE #1 */
48
49/*
50 * The following are the IRQ numbers for the INTC on the FPGA for
51 * external interrupts. i.e. the bits in the INTC registers in the
52 * FPGA.
53 */
54#define MICRODEV_FPGA_IRQ_KEYBOARD 1 /* SuperIO Keyboard */
55#define MICRODEV_FPGA_IRQ_SERIAL1 3 /* SuperIO Serial #1 */
56#define MICRODEV_FPGA_IRQ_SERIAL2 4 /* SuperIO Serial #2 */
57#define MICRODEV_FPGA_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */
58#define MICRODEV_FPGA_IRQ_IDE1 14 /* SuperIO IDE #1 */
59#define MICRODEV_FPGA_IRQ_IDE2 15 /* SuperIO IDE #2 */
60#define MICRODEV_FPGA_IRQ_USB_HC 16 /* on-board USB HC */
61#define MICRODEV_FPGA_IRQ_ETHERNET 18 /* on-board Ethnernet */
62
63#define MICRODEV_IRQ_PCI_INTA 8
64#define MICRODEV_IRQ_PCI_INTB 9
65#define MICRODEV_IRQ_PCI_INTC 10
66#define MICRODEV_IRQ_PCI_INTD 11
67
68#define __IO_PREFIX microdev
69#include <asm/io_generic.h>
70
71#if defined(CONFIG_PCI)
72unsigned char microdev_pci_inb(unsigned long port);
73unsigned short microdev_pci_inw(unsigned long port);
74unsigned long microdev_pci_inl(unsigned long port);
75void microdev_pci_outb(unsigned char data, unsigned long port);
76void microdev_pci_outw(unsigned short data, unsigned long port);
77void microdev_pci_outl(unsigned long data, unsigned long port);
78#endif
79
80#endif /* __ASM_SH_MICRODEV_H */
diff --git a/arch/sh/include/asm/migor.h b/arch/sh/include/asm/migor.h
deleted file mode 100644
index c12b632c540..00000000000
--- a/arch/sh/include/asm/migor.h
+++ /dev/null
@@ -1,62 +0,0 @@
1#ifndef __ASM_SH_MIGOR_H
2#define __ASM_SH_MIGOR_H
3
4/*
5 * linux/include/asm-sh/migor.h
6 *
7 * Copyright (C) 2008 Renesas Solutions
8 *
9 * Portions Copyright (C) 2007 Nobuhiro Iwamatsu
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 *
15 */
16#include <asm/addrspace.h>
17
18/* GPIO */
19#define PORT_PACR 0xa4050100
20#define PORT_PDCR 0xa4050106
21#define PORT_PECR 0xa4050108
22#define PORT_PHCR 0xa405010e
23#define PORT_PJCR 0xa4050110
24#define PORT_PKCR 0xa4050112
25#define PORT_PLCR 0xa4050114
26#define PORT_PMCR 0xa4050116
27#define PORT_PRCR 0xa405011c
28#define PORT_PTCR 0xa4050140
29#define PORT_PUCR 0xa4050142
30#define PORT_PVCR 0xa4050144
31#define PORT_PWCR 0xa4050146
32#define PORT_PXCR 0xa4050148
33#define PORT_PYCR 0xa405014a
34#define PORT_PZCR 0xa405014c
35#define PORT_PADR 0xa4050120
36#define PORT_PHDR 0xa405012e
37#define PORT_PTDR 0xa4050160
38#define PORT_PWDR 0xa4050166
39
40#define PORT_HIZCRA 0xa4050158
41#define PORT_HIZCRC 0xa405015c
42
43#define PORT_MSELCRB 0xa4050182
44
45#define PORT_PSELA 0xa405014e
46#define PORT_PSELB 0xa4050150
47#define PORT_PSELC 0xa4050152
48#define PORT_PSELD 0xa4050154
49#define PORT_PSELE 0xa4050156
50
51#define PORT_HIZCRA 0xa4050158
52#define PORT_HIZCRB 0xa405015a
53#define PORT_HIZCRC 0xa405015c
54
55#define BSC_CS6ABCR 0xfec1001c
56
57#include <asm/sh_mobile_lcdc.h>
58
59int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle,
60 struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
61
62#endif /* __ASM_SH_MIGOR_H */
diff --git a/arch/sh/include/asm/mmzone.h b/arch/sh/include/asm/mmzone.h
index 2969253c404..7f5363b29ba 100644
--- a/arch/sh/include/asm/mmzone.h
+++ b/arch/sh/include/asm/mmzone.h
@@ -4,6 +4,8 @@
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5 5
6#ifdef CONFIG_NEED_MULTIPLE_NODES 6#ifdef CONFIG_NEED_MULTIPLE_NODES
7#include <linux/numa.h>
8
7extern struct pglist_data *node_data[]; 9extern struct pglist_data *node_data[];
8#define NODE_DATA(nid) (node_data[nid]) 10#define NODE_DATA(nid) (node_data[nid])
9 11
diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h
index 77fb8bf02e4..5871d78e47e 100644
--- a/arch/sh/include/asm/page.h
+++ b/arch/sh/include/asm/page.h
@@ -104,6 +104,8 @@ typedef struct { unsigned long pgd; } pgd_t;
104 104
105typedef struct page *pgtable_t; 105typedef struct page *pgtable_t;
106 106
107#define pte_pgprot(x) __pgprot(pte_val(x) & PTE_FLAGS_MASK)
108
107#endif /* !__ASSEMBLY__ */ 109#endif /* !__ASSEMBLY__ */
108 110
109/* 111/*
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h
index a4a8f8b9346..52220d70a09 100644
--- a/arch/sh/include/asm/pgtable.h
+++ b/arch/sh/include/asm/pgtable.h
@@ -76,6 +76,7 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
76#endif 76#endif
77 77
78#define PTE_PHYS_MASK (PHYS_ADDR_MASK & PAGE_MASK) 78#define PTE_PHYS_MASK (PHYS_ADDR_MASK & PAGE_MASK)
79#define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT)
79 80
80#ifdef CONFIG_SUPERH32 81#ifdef CONFIG_SUPERH32
81#define VMALLOC_START (P3SEG) 82#define VMALLOC_START (P3SEG)
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index 15d9f92ca38..693364a20ad 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -3,6 +3,7 @@
3 3
4#include <asm/cpu-features.h> 4#include <asm/cpu-features.h>
5#include <asm/segment.h> 5#include <asm/segment.h>
6#include <asm/cache.h>
6 7
7#ifndef __ASSEMBLY__ 8#ifndef __ASSEMBLY__
8/* 9/*
@@ -43,11 +44,52 @@ enum cpu_type {
43 CPU_SH_NONE 44 CPU_SH_NONE
44}; 45};
45 46
47/*
48 * TLB information structure
49 *
50 * Defined for both I and D tlb, per-processor.
51 */
52struct tlb_info {
53 unsigned long long next;
54 unsigned long long first;
55 unsigned long long last;
56
57 unsigned int entries;
58 unsigned int step;
59
60 unsigned long flags;
61};
62
63struct sh_cpuinfo {
64 unsigned int type;
65 int cut_major, cut_minor;
66 unsigned long loops_per_jiffy;
67 unsigned long asid_cache;
68
69 struct cache_info icache; /* Primary I-cache */
70 struct cache_info dcache; /* Primary D-cache */
71 struct cache_info scache; /* Secondary cache */
72
73 /* TLB info */
74 struct tlb_info itlb;
75 struct tlb_info dtlb;
76
77 unsigned long flags;
78} __attribute__ ((aligned(L1_CACHE_BYTES)));
79
80extern struct sh_cpuinfo cpu_data[];
81#define boot_cpu_data cpu_data[0]
82#define current_cpu_data cpu_data[smp_processor_id()]
83#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
84
46/* Forward decl */ 85/* Forward decl */
47struct sh_cpuinfo; 86struct seq_operations;
87
88extern struct pt_regs fake_swapper_regs;
48 89
49/* arch/sh/kernel/setup.c */ 90/* arch/sh/kernel/setup.c */
50const char *get_cpu_subtype(struct sh_cpuinfo *c); 91const char *get_cpu_subtype(struct sh_cpuinfo *c);
92extern const struct seq_operations cpuinfo_op;
51 93
52#ifdef CONFIG_VSYSCALL 94#ifdef CONFIG_VSYSCALL
53int vsyscall_init(void); 95int vsyscall_init(void);
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index 0dadd75bd93..a46a0207e97 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -10,9 +10,9 @@
10#ifdef __KERNEL__ 10#ifdef __KERNEL__
11 11
12#include <linux/compiler.h> 12#include <linux/compiler.h>
13#include <linux/linkage.h>
13#include <asm/page.h> 14#include <asm/page.h>
14#include <asm/types.h> 15#include <asm/types.h>
15#include <asm/cache.h>
16#include <asm/ptrace.h> 16#include <asm/ptrace.h>
17 17
18/* 18/*
@@ -26,23 +26,7 @@
26#define CCN_CVR 0xff000040 26#define CCN_CVR 0xff000040
27#define CCN_PRR 0xff000044 27#define CCN_PRR 0xff000044
28 28
29struct sh_cpuinfo { 29asmlinkage void __init sh_cpu_init(void);
30 unsigned int type;
31 int cut_major, cut_minor;
32 unsigned long loops_per_jiffy;
33 unsigned long asid_cache;
34
35 struct cache_info icache; /* Primary I-cache */
36 struct cache_info dcache; /* Primary D-cache */
37 struct cache_info scache; /* Secondary cache */
38
39 unsigned long flags;
40} __attribute__ ((aligned(L1_CACHE_BYTES)));
41
42extern struct sh_cpuinfo cpu_data[];
43#define boot_cpu_data cpu_data[0]
44#define current_cpu_data cpu_data[smp_processor_id()]
45#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
46 30
47/* 31/*
48 * User space process size: 2GB. 32 * User space process size: 2GB.
@@ -196,6 +180,8 @@ extern unsigned long get_wchan(struct task_struct *p);
196#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) 180#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
197#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) 181#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
198 182
183#define user_stack_pointer(regs) ((regs)->regs[15])
184
199#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") 185#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
200#define cpu_relax() barrier() 186#define cpu_relax() barrier()
201 187
diff --git a/arch/sh/include/asm/processor_64.h b/arch/sh/include/asm/processor_64.h
index 770d5169983..b0b4824dfc4 100644
--- a/arch/sh/include/asm/processor_64.h
+++ b/arch/sh/include/asm/processor_64.h
@@ -17,7 +17,6 @@
17#include <linux/compiler.h> 17#include <linux/compiler.h>
18#include <asm/page.h> 18#include <asm/page.h>
19#include <asm/types.h> 19#include <asm/types.h>
20#include <asm/cache.h>
21#include <asm/ptrace.h> 20#include <asm/ptrace.h>
22#include <cpu/registers.h> 21#include <cpu/registers.h>
23 22
@@ -36,46 +35,6 @@ __asm__("gettr tr0, %1\n\t" \
36 : "1" (__dummy)); \ 35 : "1" (__dummy)); \
37pc; }) 36pc; })
38 37
39/*
40 * TLB information structure
41 *
42 * Defined for both I and D tlb, per-processor.
43 */
44struct tlb_info {
45 unsigned long long next;
46 unsigned long long first;
47 unsigned long long last;
48
49 unsigned int entries;
50 unsigned int step;
51
52 unsigned long flags;
53};
54
55struct sh_cpuinfo {
56 enum cpu_type type;
57 unsigned long loops_per_jiffy;
58 unsigned long asid_cache;
59
60 unsigned int cpu_clock, master_clock, bus_clock, module_clock;
61
62 /* Cache info */
63 struct cache_info icache;
64 struct cache_info dcache;
65 struct cache_info scache;
66
67 /* TLB info */
68 struct tlb_info itlb;
69 struct tlb_info dtlb;
70
71 unsigned long flags;
72};
73
74extern struct sh_cpuinfo cpu_data[];
75#define boot_cpu_data cpu_data[0]
76#define current_cpu_data cpu_data[smp_processor_id()]
77#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
78
79#endif 38#endif
80 39
81/* 40/*
@@ -169,8 +128,6 @@ struct thread_struct {
169#define INIT_MMAP \ 128#define INIT_MMAP \
170{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL } 129{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
171 130
172extern struct pt_regs fake_swapper_regs;
173
174#define INIT_THREAD { \ 131#define INIT_THREAD { \
175 .sp = sizeof(init_stack) + \ 132 .sp = sizeof(init_stack) + \
176 (long) &init_stack, \ 133 (long) &init_stack, \
@@ -269,6 +226,8 @@ extern unsigned long get_wchan(struct task_struct *p);
269#define KSTK_EIP(tsk) ((tsk)->thread.pc) 226#define KSTK_EIP(tsk) ((tsk)->thread.pc)
270#define KSTK_ESP(tsk) ((tsk)->thread.sp) 227#define KSTK_ESP(tsk) ((tsk)->thread.sp)
271 228
229#define user_stack_pointer(regs) ((regs)->sp)
230
272#define cpu_relax() barrier() 231#define cpu_relax() barrier()
273 232
274#endif /* __ASSEMBLY__ */ 233#endif /* __ASSEMBLY__ */
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index b86aeabba61..3ad18e91bca 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -87,12 +87,18 @@ struct pt_dspregs {
87 unsigned long mod; 87 unsigned long mod;
88}; 88};
89 89
90#define PTRACE_GETREGS 12 /* General registers */
91#define PTRACE_SETREGS 13
92
93#define PTRACE_GETFPREGS 14 /* FPU registers */
94#define PTRACE_SETFPREGS 15
95
90#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */ 96#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */
91 97
92#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */ 98#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */
93#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */ 99#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */
94 100
95#define PTRACE_GETDSPREGS 55 101#define PTRACE_GETDSPREGS 55 /* DSP registers */
96#define PTRACE_SETDSPREGS 56 102#define PTRACE_SETDSPREGS 56
97#endif 103#endif
98 104
@@ -117,6 +123,9 @@ extern void user_disable_single_step(struct task_struct *);
117#define task_pt_regs(task) \ 123#define task_pt_regs(task) \
118 ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \ 124 ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \
119 - sizeof(struct pt_dspregs) - sizeof(unsigned long)) - 1) 125 - sizeof(struct pt_dspregs) - sizeof(unsigned long)) - 1)
126#define task_pt_dspregs(task) \
127 ((struct pt_dspregs *) (task_stack_page(task) + THREAD_SIZE \
128 - sizeof(unsigned long)) - 1)
120#else 129#else
121#define task_pt_regs(task) \ 130#define task_pt_regs(task) \
122 ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \ 131 ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \
diff --git a/arch/sh/include/asm/r7780rp.h b/arch/sh/include/asm/r7780rp.h
deleted file mode 100644
index 306f7359f7d..00000000000
--- a/arch/sh/include/asm/r7780rp.h
+++ /dev/null
@@ -1,198 +0,0 @@
1#ifndef __ASM_SH_RENESAS_R7780RP_H
2#define __ASM_SH_RENESAS_R7780RP_H
3
4/* Box specific addresses. */
5#if defined(CONFIG_SH_R7780MP)
6#define PA_BCR 0xa4000000 /* FPGA */
7#define PA_SDPOW (-1)
8
9#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */
10#define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */
11#define PA_IRLPRI1 (PA_BCR+0x0004) /* Interrupt Priorty 1 */
12#define PA_IRLPRI2 (PA_BCR+0x0006) /* Interrupt Priorty 2 */
13#define PA_IRLPRI3 (PA_BCR+0x0008) /* Interrupt Priorty 3 */
14#define PA_IRLPRI4 (PA_BCR+0x000a) /* Interrupt Priorty 4 */
15#define PA_RSTCTL (PA_BCR+0x000c) /* Reset Control */
16#define PA_PCIBD (PA_BCR+0x000e) /* PCI Board detect control */
17#define PA_PCICD (PA_BCR+0x0010) /* PCI Conector detect control */
18#define PA_EXTGIO (PA_BCR+0x0016) /* Extension GPIO Control */
19#define PA_IVDRMON (PA_BCR+0x0018) /* iVDR Moniter control */
20#define PA_IVDRCTL (PA_BCR+0x001a) /* iVDR control */
21#define PA_OBLED (PA_BCR+0x001c) /* On Board LED control */
22#define PA_OBSW (PA_BCR+0x001e) /* On Board Switch control */
23#define PA_AUDIOSEL (PA_BCR+0x0020) /* Sound Interface Select control */
24#define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */
25#define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */
26#define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */
27#define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */
28#define PA_TPXPOS (PA_BCR+0x0106) /* Touch Panel X position control */
29#define PA_TPYPOS (PA_BCR+0x0108) /* Touch Panel Y position control */
30#define PA_DBSW (PA_BCR+0x0200) /* Debug Board Switch control */
31#define PA_CFCTL (PA_BCR+0x0300) /* CF Timing control */
32#define PA_CFPOW (PA_BCR+0x0302) /* CF Power control */
33#define PA_CFCDINTCLR (PA_BCR+0x0304) /* CF Insert Interrupt clear */
34#define PA_SCSMR0 (PA_BCR+0x0400) /* SCIF0 Serial mode control */
35#define PA_SCBRR0 (PA_BCR+0x0404) /* SCIF0 Bit rate control */
36#define PA_SCSCR0 (PA_BCR+0x0408) /* SCIF0 Serial control */
37#define PA_SCFTDR0 (PA_BCR+0x040c) /* SCIF0 Send FIFO control */
38#define PA_SCFSR0 (PA_BCR+0x0410) /* SCIF0 Serial status control */
39#define PA_SCFRDR0 (PA_BCR+0x0414) /* SCIF0 Receive FIFO control */
40#define PA_SCFCR0 (PA_BCR+0x0418) /* SCIF0 FIFO control */
41#define PA_SCTFDR0 (PA_BCR+0x041c) /* SCIF0 Send FIFO data control */
42#define PA_SCRFDR0 (PA_BCR+0x0420) /* SCIF0 Receive FIFO data control */
43#define PA_SCSPTR0 (PA_BCR+0x0424) /* SCIF0 Serial Port control */
44#define PA_SCLSR0 (PA_BCR+0x0428) /* SCIF0 Line Status control */
45#define PA_SCRER0 (PA_BCR+0x042c) /* SCIF0 Serial Error control */
46#define PA_SCSMR1 (PA_BCR+0x0500) /* SCIF1 Serial mode control */
47#define PA_SCBRR1 (PA_BCR+0x0504) /* SCIF1 Bit rate control */
48#define PA_SCSCR1 (PA_BCR+0x0508) /* SCIF1 Serial control */
49#define PA_SCFTDR1 (PA_BCR+0x050c) /* SCIF1 Send FIFO control */
50#define PA_SCFSR1 (PA_BCR+0x0510) /* SCIF1 Serial status control */
51#define PA_SCFRDR1 (PA_BCR+0x0514) /* SCIF1 Receive FIFO control */
52#define PA_SCFCR1 (PA_BCR+0x0518) /* SCIF1 FIFO control */
53#define PA_SCTFDR1 (PA_BCR+0x051c) /* SCIF1 Send FIFO data control */
54#define PA_SCRFDR1 (PA_BCR+0x0520) /* SCIF1 Receive FIFO data control */
55#define PA_SCSPTR1 (PA_BCR+0x0524) /* SCIF1 Serial Port control */
56#define PA_SCLSR1 (PA_BCR+0x0528) /* SCIF1 Line Status control */
57#define PA_SCRER1 (PA_BCR+0x052c) /* SCIF1 Serial Error control */
58#define PA_SMCR (PA_BCR+0x0600) /* 2-wire Serial control */
59#define PA_SMSMADR (PA_BCR+0x0602) /* 2-wire Serial Slave control */
60#define PA_SMMR (PA_BCR+0x0604) /* 2-wire Serial Mode control */
61#define PA_SMSADR1 (PA_BCR+0x0606) /* 2-wire Serial Address1 control */
62#define PA_SMTRDR1 (PA_BCR+0x0646) /* 2-wire Serial Data1 control */
63#define PA_VERREG (PA_BCR+0x0700) /* FPGA Version Register */
64#define PA_POFF (PA_BCR+0x0800) /* System Power Off control */
65#define PA_PMR (PA_BCR+0x0900) /* */
66
67#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
68#define IVDR_CK_ON 8 /* iVDR Clock ON */
69
70#elif defined(CONFIG_SH_R7780RP)
71#define PA_POFF (-1)
72
73#define PA_BCR 0xa5000000 /* FPGA */
74#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */
75#define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */
76#define PA_SDPOW (PA_BCR+0x0004) /* SD Power control */
77#define PA_RSTCTL (PA_BCR+0x0006) /* Device Reset control */
78#define PA_PCIBD (PA_BCR+0x0008) /* PCI Board detect control */
79#define PA_PCICD (PA_BCR+0x000a) /* PCI Conector detect control */
80#define PA_ZIGIO1 (PA_BCR+0x000c) /* Zigbee IO control 1 */
81#define PA_ZIGIO2 (PA_BCR+0x000e) /* Zigbee IO control 2 */
82#define PA_ZIGIO3 (PA_BCR+0x0010) /* Zigbee IO control 3 */
83#define PA_ZIGIO4 (PA_BCR+0x0012) /* Zigbee IO control 4 */
84#define PA_IVDRMON (PA_BCR+0x0014) /* iVDR Moniter control */
85#define PA_IVDRCTL (PA_BCR+0x0016) /* iVDR control */
86#define PA_OBLED (PA_BCR+0x0018) /* On Board LED control */
87#define PA_OBSW (PA_BCR+0x001a) /* On Board Switch control */
88#define PA_AUDIOSEL (PA_BCR+0x001c) /* Sound Interface Select control */
89#define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */
90#define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */
91#define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */
92#define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */
93#define PA_TPXPOS (PA_BCR+0x0106) /* Touch Panel X position control */
94#define PA_TPYPOS (PA_BCR+0x0108) /* Touch Panel Y position control */
95#define PA_DBDET (PA_BCR+0x0200) /* Debug Board detect control */
96#define PA_DBDISPCTL (PA_BCR+0x0202) /* Debug Board Dot timing control */
97#define PA_DBSW (PA_BCR+0x0204) /* Debug Board Switch control */
98#define PA_CFCTL (PA_BCR+0x0300) /* CF Timing control */
99#define PA_CFPOW (PA_BCR+0x0302) /* CF Power control */
100#define PA_CFCDINTCLR (PA_BCR+0x0304) /* CF Insert Interrupt clear */
101#define PA_SCSMR (PA_BCR+0x0400) /* SCIF Serial mode control */
102#define PA_SCBRR (PA_BCR+0x0402) /* SCIF Bit rate control */
103#define PA_SCSCR (PA_BCR+0x0404) /* SCIF Serial control */
104#define PA_SCFDTR (PA_BCR+0x0406) /* SCIF Send FIFO control */
105#define PA_SCFSR (PA_BCR+0x0408) /* SCIF Serial status control */
106#define PA_SCFRDR (PA_BCR+0x040a) /* SCIF Receive FIFO control */
107#define PA_SCFCR (PA_BCR+0x040c) /* SCIF FIFO control */
108#define PA_SCFDR (PA_BCR+0x040e) /* SCIF FIFO data control */
109#define PA_SCLSR (PA_BCR+0x0412) /* SCIF Line Status control */
110#define PA_SMCR (PA_BCR+0x0500) /* 2-wire Serial control */
111#define PA_SMSMADR (PA_BCR+0x0502) /* 2-wire Serial Slave control */
112#define PA_SMMR (PA_BCR+0x0504) /* 2-wire Serial Mode control */
113#define PA_SMSADR1 (PA_BCR+0x0506) /* 2-wire Serial Address1 control */
114#define PA_SMTRDR1 (PA_BCR+0x0546) /* 2-wire Serial Data1 control */
115#define PA_VERREG (PA_BCR+0x0600) /* FPGA Version Register */
116
117#define PA_AX88796L 0xa5800400 /* AX88796L Area */
118#define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */
119#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
120#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */
121
122#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
123
124#define IVDR_CK_ON 8 /* iVDR Clock ON */
125
126#elif defined(CONFIG_SH_R7785RP)
127#define PA_BCR 0xa4000000 /* FPGA */
128#define PA_SDPOW (-1)
129
130#define PA_PCISCR (PA_BCR+0x0000)
131#define PA_IRLPRA (PA_BCR+0x0002)
132#define PA_IRLPRB (PA_BCR+0x0004)
133#define PA_IRLPRC (PA_BCR+0x0006)
134#define PA_IRLPRD (PA_BCR+0x0008)
135#define IRLCNTR1 (PA_BCR+0x0010)
136#define PA_IRLPRE (PA_BCR+0x000a)
137#define PA_IRLPRF (PA_BCR+0x000c)
138#define PA_EXIRLCR (PA_BCR+0x000e)
139#define PA_IRLMCR1 (PA_BCR+0x0010)
140#define PA_IRLMCR2 (PA_BCR+0x0012)
141#define PA_IRLSSR1 (PA_BCR+0x0014)
142#define PA_IRLSSR2 (PA_BCR+0x0016)
143#define PA_CFTCR (PA_BCR+0x0100)
144#define PA_CFPCR (PA_BCR+0x0102)
145#define PA_PCICR (PA_BCR+0x0110)
146#define PA_IVDRCTL (PA_BCR+0x0112)
147#define PA_IVDRSR (PA_BCR+0x0114)
148#define PA_PDRSTCR (PA_BCR+0x0116)
149#define PA_POFF (PA_BCR+0x0120)
150#define PA_LCDCR (PA_BCR+0x0130)
151#define PA_TPCR (PA_BCR+0x0140)
152#define PA_TPCKCR (PA_BCR+0x0142)
153#define PA_TPRSTR (PA_BCR+0x0144)
154#define PA_TPXPDR (PA_BCR+0x0146)
155#define PA_TPYPDR (PA_BCR+0x0148)
156#define PA_GPIOPFR (PA_BCR+0x0150)
157#define PA_GPIODR (PA_BCR+0x0152)
158#define PA_OBLED (PA_BCR+0x0154)
159#define PA_SWSR (PA_BCR+0x0156)
160#define PA_VERREG (PA_BCR+0x0158)
161#define PA_SMCR (PA_BCR+0x0200)
162#define PA_SMSMADR (PA_BCR+0x0202)
163#define PA_SMMR (PA_BCR+0x0204)
164#define PA_SMSADR1 (PA_BCR+0x0206)
165#define PA_SMSADR32 (PA_BCR+0x0244)
166#define PA_SMTRDR1 (PA_BCR+0x0246)
167#define PA_SMTRDR16 (PA_BCR+0x0264)
168#define PA_CU3MDR (PA_BCR+0x0300)
169#define PA_CU5MDR (PA_BCR+0x0302)
170#define PA_MMSR (PA_BCR+0x0400)
171
172#define IVDR_CK_ON 4 /* iVDR Clock ON */
173#endif
174
175#define HL_FPGA_IRQ_BASE 200
176#define HL_NR_IRL 15
177
178#define IRQ_AX88796 (HL_FPGA_IRQ_BASE + 0)
179#define IRQ_CF (HL_FPGA_IRQ_BASE + 1)
180#define IRQ_PSW (HL_FPGA_IRQ_BASE + 2)
181#define IRQ_EXT0 (HL_FPGA_IRQ_BASE + 3)
182#define IRQ_EXT1 (HL_FPGA_IRQ_BASE + 4)
183#define IRQ_EXT2 (HL_FPGA_IRQ_BASE + 5)
184#define IRQ_EXT3 (HL_FPGA_IRQ_BASE + 6)
185#define IRQ_EXT4 (HL_FPGA_IRQ_BASE + 7)
186#define IRQ_EXT5 (HL_FPGA_IRQ_BASE + 8)
187#define IRQ_EXT6 (HL_FPGA_IRQ_BASE + 9)
188#define IRQ_EXT7 (HL_FPGA_IRQ_BASE + 10)
189#define IRQ_SMBUS (HL_FPGA_IRQ_BASE + 11)
190#define IRQ_TP (HL_FPGA_IRQ_BASE + 12)
191#define IRQ_RTC (HL_FPGA_IRQ_BASE + 13)
192#define IRQ_TH_ALERT (HL_FPGA_IRQ_BASE + 14)
193#define IRQ_SCIF0 (HL_FPGA_IRQ_BASE + 15)
194#define IRQ_SCIF1 (HL_FPGA_IRQ_BASE + 16)
195
196unsigned char *highlander_plat_irq_setup(void);
197
198#endif /* __ASM_SH_RENESAS_R7780RP */
diff --git a/arch/sh/include/asm/rtc.h b/arch/sh/include/asm/rtc.h
index 1813f4202a2..f7b010d48af 100644
--- a/arch/sh/include/asm/rtc.h
+++ b/arch/sh/include/asm/rtc.h
@@ -1,6 +1,7 @@
1#ifndef _ASM_RTC_H 1#ifndef _ASM_RTC_H
2#define _ASM_RTC_H 2#define _ASM_RTC_H
3 3
4void time_init(void);
4extern void (*board_time_init)(void); 5extern void (*board_time_init)(void);
5extern void (*rtc_sh_get_time)(struct timespec *); 6extern void (*rtc_sh_get_time)(struct timespec *);
6extern int (*rtc_sh_set_time)(const time_t); 7extern int (*rtc_sh_set_time)(const time_t);
diff --git a/arch/sh/include/asm/rts7751r2d.h b/arch/sh/include/asm/rts7751r2d.h
deleted file mode 100644
index 0a800157b82..00000000000
--- a/arch/sh/include/asm/rts7751r2d.h
+++ /dev/null
@@ -1,70 +0,0 @@
1#ifndef __ASM_SH_RENESAS_RTS7751R2D_H
2#define __ASM_SH_RENESAS_RTS7751R2D_H
3
4/*
5 * linux/include/asm-sh/renesas_rts7751r2d.h
6 *
7 * Copyright (C) 2000 Atom Create Engineering Co., Ltd.
8 *
9 * Renesas Technology Sales RTS7751R2D support
10 */
11
12/* Board specific addresses. */
13
14#define PA_BCR 0xa4000000 /* FPGA */
15#define PA_IRLMON 0xa4000002 /* Interrupt Status control */
16#define PA_CFCTL 0xa4000004 /* CF Timing control */
17#define PA_CFPOW 0xa4000006 /* CF Power control */
18#define PA_DISPCTL 0xa4000008 /* Display Timing control */
19#define PA_SDMPOW 0xa400000a /* SD Power control */
20#define PA_RTCCE 0xa400000c /* RTC(9701) Enable control */
21#define PA_PCICD 0xa400000e /* PCI Extention detect control */
22#define PA_VOYAGERRTS 0xa4000020 /* VOYAGER Reset control */
23
24#define PA_R2D1_AXRST 0xa4000022 /* AX_LAN Reset control */
25#define PA_R2D1_CFRST 0xa4000024 /* CF Reset control */
26#define PA_R2D1_ADMRTS 0xa4000026 /* SD Reset control */
27#define PA_R2D1_EXTRST 0xa4000028 /* Extention Reset control */
28#define PA_R2D1_CFCDINTCLR 0xa400002a /* CF Insert Interrupt clear */
29
30#define PA_R2DPLUS_CFRST 0xa4000022 /* CF Reset control */
31#define PA_R2DPLUS_ADMRTS 0xa4000024 /* SD Reset control */
32#define PA_R2DPLUS_EXTRST 0xa4000026 /* Extention Reset control */
33#define PA_R2DPLUS_CFCDINTCLR 0xa4000028 /* CF Insert Interrupt clear */
34#define PA_R2DPLUS_KEYCTLCLR 0xa400002a /* Key Interrupt clear */
35
36#define PA_POWOFF 0xa4000030 /* Board Power OFF control */
37#define PA_VERREG 0xa4000032 /* FPGA Version Register */
38#define PA_INPORT 0xa4000034 /* KEY Input Port control */
39#define PA_OUTPORT 0xa4000036 /* LED control */
40#define PA_BVERREG 0xa4000038 /* Board Revision Register */
41
42#define PA_AX88796L 0xaa000400 /* AX88796L Area */
43#define PA_VOYAGER 0xab000000 /* VOYAGER GX Area */
44#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
45#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */
46
47#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
48
49#define R2D_FPGA_IRQ_BASE 100
50
51#define IRQ_VOYAGER (R2D_FPGA_IRQ_BASE + 0)
52#define IRQ_EXT (R2D_FPGA_IRQ_BASE + 1)
53#define IRQ_TP (R2D_FPGA_IRQ_BASE + 2)
54#define IRQ_RTC_T (R2D_FPGA_IRQ_BASE + 3)
55#define IRQ_RTC_A (R2D_FPGA_IRQ_BASE + 4)
56#define IRQ_SDCARD (R2D_FPGA_IRQ_BASE + 5)
57#define IRQ_CF_CD (R2D_FPGA_IRQ_BASE + 6)
58#define IRQ_CF_IDE (R2D_FPGA_IRQ_BASE + 7)
59#define IRQ_AX88796 (R2D_FPGA_IRQ_BASE + 8)
60#define IRQ_KEY (R2D_FPGA_IRQ_BASE + 9)
61#define IRQ_PCI_INTA (R2D_FPGA_IRQ_BASE + 10)
62#define IRQ_PCI_INTB (R2D_FPGA_IRQ_BASE + 11)
63#define IRQ_PCI_INTC (R2D_FPGA_IRQ_BASE + 12)
64#define IRQ_PCI_INTD (R2D_FPGA_IRQ_BASE + 13)
65
66/* arch/sh/boards/renesas/rts7751r2d/irq.c */
67void init_rts7751r2d_IRQ(void);
68int rts7751r2d_irq_demux(int);
69
70#endif /* __ASM_SH_RENESAS_RTS7751R2D */
diff --git a/arch/sh/include/asm/sdk7780.h b/arch/sh/include/asm/sdk7780.h
deleted file mode 100644
index 697dc865f21..00000000000
--- a/arch/sh/include/asm/sdk7780.h
+++ /dev/null
@@ -1,81 +0,0 @@
1#ifndef __ASM_SH_RENESAS_SDK7780_H
2#define __ASM_SH_RENESAS_SDK7780_H
3
4/*
5 * linux/include/asm-sh/sdk7780.h
6 *
7 * Renesas Solutions SH7780 SDK Support
8 * Copyright (C) 2008 Nicholas Beck <nbeck@mpc-data.co.uk>
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 */
14#include <asm/addrspace.h>
15
16/* Box specific addresses. */
17#define SE_AREA0_WIDTH 4 /* Area0: 32bit */
18#define PA_ROM 0xa0000000 /* EPROM */
19#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */
20#define PA_FROM 0xa0800000 /* Flash-ROM */
21#define PA_FROM_SIZE 0x00400000 /* Flash-ROM size 4M byte */
22#define PA_EXT1 0xa4000000
23#define PA_EXT1_SIZE 0x04000000
24#define PA_SDRAM 0xa8000000 /* DDR-SDRAM(Area2/3) 128MB */
25#define PA_SDRAM_SIZE 0x08000000
26
27#define PA_EXT4 0xb0000000
28#define PA_EXT4_SIZE 0x04000000
29#define PA_EXT_USER PA_EXT4 /* User Expansion Space */
30
31#define PA_PERIPHERAL PA_AREA5_IO
32
33/* SRAM/Reserved */
34#define PA_RESERVED (PA_PERIPHERAL + 0)
35/* FPGA base address */
36#define PA_FPGA (PA_PERIPHERAL + 0x01000000)
37/* SMC LAN91C111 */
38#define PA_LAN (PA_PERIPHERAL + 0x01800000)
39
40
41#define FPGA_SRSTR (PA_FPGA + 0x000) /* System reset */
42#define FPGA_IRQ0SR (PA_FPGA + 0x010) /* IRQ0 status */
43#define FPGA_IRQ0MR (PA_FPGA + 0x020) /* IRQ0 mask */
44#define FPGA_BDMR (PA_FPGA + 0x030) /* Board operating mode */
45#define FPGA_INTT0PRTR (PA_FPGA + 0x040) /* Interrupt test mode0 port */
46#define FPGA_INTT0SELR (PA_FPGA + 0x050) /* Int. test mode0 select */
47#define FPGA_INTT1POLR (PA_FPGA + 0x060) /* Int. test mode0 polarity */
48#define FPGA_NMIR (PA_FPGA + 0x070) /* NMI source */
49#define FPGA_NMIMR (PA_FPGA + 0x080) /* NMI mask */
50#define FPGA_IRQR (PA_FPGA + 0x090) /* IRQX source */
51#define FPGA_IRQMR (PA_FPGA + 0x0A0) /* IRQX mask */
52#define FPGA_SLEDR (PA_FPGA + 0x0B0) /* LED control */
53#define PA_LED FPGA_SLEDR
54#define FPGA_MAPSWR (PA_FPGA + 0x0C0) /* Map switch */
55#define FPGA_FPVERR (PA_FPGA + 0x0D0) /* FPGA version */
56#define FPGA_FPDATER (PA_FPGA + 0x0E0) /* FPGA date */
57#define FPGA_RSE (PA_FPGA + 0x100) /* Reset source */
58#define FPGA_EASR (PA_FPGA + 0x110) /* External area select */
59#define FPGA_SPER (PA_FPGA + 0x120) /* Serial port enable */
60#define FPGA_IMSR (PA_FPGA + 0x130) /* Interrupt mode select */
61#define FPGA_PCIMR (PA_FPGA + 0x140) /* PCI Mode */
62#define FPGA_DIPSWMR (PA_FPGA + 0x150) /* DIPSW monitor */
63#define FPGA_FPODR (PA_FPGA + 0x160) /* Output port data */
64#define FPGA_ATAESR (PA_FPGA + 0x170) /* ATA extended bus status */
65#define FPGA_IRQPOLR (PA_FPGA + 0x180) /* IRQx polarity */
66
67
68#define SDK7780_NR_IRL 15
69/* IDE/ATA interrupt */
70#define IRQ_CFCARD 14
71/* SMC interrupt */
72#define IRQ_ETHERNET 6
73
74
75/* arch/sh/boards/renesas/sdk7780/irq.c */
76void init_sdk7780_IRQ(void);
77
78#define __IO_PREFIX sdk7780
79#include <asm/io_generic.h>
80
81#endif /* __ASM_SH_RENESAS_SDK7780_H */
diff --git a/arch/sh/include/asm/setup.h b/arch/sh/include/asm/setup.h
index 55a2bd328d9..d450bcf59ee 100644
--- a/arch/sh/include/asm/setup.h
+++ b/arch/sh/include/asm/setup.h
@@ -4,7 +4,6 @@
4#define COMMAND_LINE_SIZE 256 4#define COMMAND_LINE_SIZE 256
5 5
6#ifdef __KERNEL__ 6#ifdef __KERNEL__
7
8/* 7/*
9 * This is set up by the setup-routine at boot-time 8 * This is set up by the setup-routine at boot-time
10 */ 9 */
diff --git a/arch/sh/include/asm/sh7763rdp.h b/arch/sh/include/asm/sh7763rdp.h
deleted file mode 100644
index 8750cc85297..00000000000
--- a/arch/sh/include/asm/sh7763rdp.h
+++ /dev/null
@@ -1,54 +0,0 @@
1#ifndef __ASM_SH_SH7763RDP_H
2#define __ASM_SH_SH7763RDP_H
3
4/*
5 * linux/include/asm-sh/sh7763drp.h
6 *
7 * Copyright (C) 2008 Renesas Solutions
8 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 *
14 */
15#include <asm/addrspace.h>
16
17/* clock control */
18#define MSTPCR1 0xFFC80038
19
20/* PORT */
21#define PORT_PSEL0 0xFFEF0070
22#define PORT_PSEL1 0xFFEF0072
23#define PORT_PSEL2 0xFFEF0074
24#define PORT_PSEL3 0xFFEF0076
25#define PORT_PSEL4 0xFFEF0078
26
27#define PORT_PACR 0xFFEF0000
28#define PORT_PCCR 0xFFEF0004
29#define PORT_PFCR 0xFFEF000A
30#define PORT_PGCR 0xFFEF000C
31#define PORT_PHCR 0xFFEF000E
32#define PORT_PICR 0xFFEF0010
33#define PORT_PJCR 0xFFEF0012
34#define PORT_PKCR 0xFFEF0014
35#define PORT_PLCR 0xFFEF0016
36#define PORT_PMCR 0xFFEF0018
37#define PORT_PNCR 0xFFEF001A
38
39/* FPGA */
40#define CPLD_BOARD_ID_ERV_REG 0xB1000000
41#define CPLD_CPLD_CMD_REG 0xB1000006
42
43/*
44 * USB SH7763RDP board can use Host only.
45 */
46#define USB_USBHSC 0xFFEC80f0
47
48/* arch/sh/boards/renesas/sh7763rdp/irq.c */
49void init_sh7763rdp_IRQ(void);
50int sh7763rdp_irq_demux(int irq);
51#define __IO_PREFIX sh7763rdp
52#include <asm/io_generic.h>
53
54#endif /* __ASM_SH_SH7763RDP_H */
diff --git a/arch/sh/include/asm/sh7785lcr.h b/arch/sh/include/asm/sh7785lcr.h
deleted file mode 100644
index 1ce27d5c749..00000000000
--- a/arch/sh/include/asm/sh7785lcr.h
+++ /dev/null
@@ -1,55 +0,0 @@
1#ifndef __ASM_SH_RENESAS_SH7785LCR_H
2#define __ASM_SH_RENESAS_SH7785LCR_H
3
4/*
5 * This board has 2 physical memory maps.
6 * It can be changed with DIP switch(S2-5).
7 *
8 * phys address | S2-5 = OFF | S2-5 = ON
9 * -----------------------------+---------------+---------------
10 * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash
11 * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD
12 * 0x06000000 - 0x07ffffff(CS1) | reserved | I2C
13 * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM
14 * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM
15 * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107
16 * 0x14000000 - 0x17ffffff(CS5) | I2C | USB
17 * 0x18000000 - 0x1bffffff(CS6) | reserved | SD
18 * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use)
19 *
20 */
21
22#define NOR_FLASH_ADDR 0x00000000
23#define NOR_FLASH_SIZE 0x04000000
24
25#define PLD_BASE_ADDR 0x04000000
26#define PLD_PCICR (PLD_BASE_ADDR + 0x00)
27#define PLD_LCD_BK_CONTR (PLD_BASE_ADDR + 0x02)
28#define PLD_LOCALCR (PLD_BASE_ADDR + 0x04)
29#define PLD_POFCR (PLD_BASE_ADDR + 0x06)
30#define PLD_LEDCR (PLD_BASE_ADDR + 0x08)
31#define PLD_SWSR (PLD_BASE_ADDR + 0x0a)
32#define PLD_VERSR (PLD_BASE_ADDR + 0x0c)
33#define PLD_MMSR (PLD_BASE_ADDR + 0x0e)
34
35#define SM107_MEM_ADDR 0x10000000
36#define SM107_MEM_SIZE 0x00e00000
37#define SM107_REG_ADDR 0x13e00000
38#define SM107_REG_SIZE 0x00200000
39
40#if defined(CONFIG_SH_SH7785LCR_29BIT_PHYSMAPS)
41#define R8A66597_ADDR 0x14000000 /* USB */
42#define CG200_ADDR 0x18000000 /* SD */
43#define PCA9564_ADDR 0x06000000 /* I2C */
44#else
45#define R8A66597_ADDR 0x08000000
46#define CG200_ADDR 0x0c000000
47#define PCA9564_ADDR 0x14000000
48#endif
49
50#define R8A66597_SIZE 0x00000100
51#define CG200_SIZE 0x00010000
52#define PCA9564_SIZE 0x00000100
53
54#endif /* __ASM_SH_RENESAS_SH7785LCR_H */
55
diff --git a/arch/sh/include/asm/sh_mobile_lcdc.h b/arch/sh/include/asm/sh_mobile_lcdc.h
deleted file mode 100644
index 130102f663f..00000000000
--- a/arch/sh/include/asm/sh_mobile_lcdc.h
+++ /dev/null
@@ -1,72 +0,0 @@
1#ifndef __ASM_SH_MOBILE_LCDC_H__
2#define __ASM_SH_MOBILE_LCDC_H__
3
4#include <linux/fb.h>
5
6enum { RGB8, /* 24bpp, 8:8:8 */
7 RGB9, /* 18bpp, 9:9 */
8 RGB12A, /* 24bpp, 12:12 */
9 RGB12B, /* 12bpp */
10 RGB16, /* 16bpp */
11 RGB18, /* 18bpp */
12 RGB24, /* 24bpp */
13 SYS8A, /* 24bpp, 8:8:8 */
14 SYS8B, /* 18bpp, 8:8:2 */
15 SYS8C, /* 18bpp, 2:8:8 */
16 SYS8D, /* 16bpp, 8:8 */
17 SYS9, /* 18bpp, 9:9 */
18 SYS12, /* 24bpp, 12:12 */
19 SYS16A, /* 16bpp */
20 SYS16B, /* 18bpp, 16:2 */
21 SYS16C, /* 18bpp, 2:16 */
22 SYS18, /* 18bpp */
23 SYS24 };/* 24bpp */
24
25enum { LCDC_CHAN_DISABLED = 0,
26 LCDC_CHAN_MAINLCD,
27 LCDC_CHAN_SUBLCD };
28
29enum { LCDC_CLK_BUS, LCDC_CLK_PERIPHERAL, LCDC_CLK_EXTERNAL };
30
31struct sh_mobile_lcdc_sys_bus_cfg {
32 unsigned long ldmt2r;
33 unsigned long ldmt3r;
34};
35
36struct sh_mobile_lcdc_sys_bus_ops {
37 void (*write_index)(void *handle, unsigned long data);
38 void (*write_data)(void *handle, unsigned long data);
39 unsigned long (*read_data)(void *handle);
40};
41
42struct sh_mobile_lcdc_board_cfg {
43 void *board_data;
44 int (*setup_sys)(void *board_data, void *sys_ops_handle,
45 struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
46 void (*display_on)(void *board_data);
47 void (*display_off)(void *board_data);
48};
49
50struct sh_mobile_lcdc_lcd_size_cfg { /* width and height of panel in mm */
51 unsigned long width;
52 unsigned long height;
53};
54
55struct sh_mobile_lcdc_chan_cfg {
56 int chan;
57 int bpp;
58 int interface_type; /* selects RGBn or SYSn I/F, see above */
59 int clock_divider;
60 struct fb_videomode lcd_cfg;
61 struct sh_mobile_lcdc_lcd_size_cfg lcd_size_cfg;
62 struct sh_mobile_lcdc_board_cfg board_cfg;
63 struct sh_mobile_lcdc_sys_bus_cfg sys_bus_cfg; /* only for SYSn I/F */
64};
65
66struct sh_mobile_lcdc_info {
67 unsigned long lddckr;
68 int clock_source;
69 struct sh_mobile_lcdc_chan_cfg ch[2];
70};
71
72#endif /* __ASM_SH_MOBILE_LCDC_H__ */
diff --git a/arch/sh/include/asm/shmin.h b/arch/sh/include/asm/shmin.h
deleted file mode 100644
index 36ba138a81f..00000000000
--- a/arch/sh/include/asm/shmin.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef __ASM_SH_SHMIN_H
2#define __ASM_SH_SHMIN_H
3
4#define SHMIN_IO_BASE 0xb0000000UL
5
6#define SHMIN_NE_IRQ IRQ2_IRQ
7#define SHMIN_NE_BASE 0x300
8
9#endif
diff --git a/arch/sh/include/asm/sizes.h b/arch/sh/include/asm/sizes.h
new file mode 100644
index 00000000000..3a1fb97770f
--- /dev/null
+++ b/arch/sh/include/asm/sizes.h
@@ -0,0 +1,61 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
15 */
16/* DO NOT EDIT!! - this file automatically generated
17 * from .s file by awk -f s2h.awk
18 */
19/* Size definitions
20 * Copyright (C) ARM Limited 1998. All rights reserved.
21 */
22
23#ifndef __sizes_h
24#define __sizes_h 1
25
26/* handy sizes */
27#define SZ_16 0x00000010
28#define SZ_32 0x00000020
29#define SZ_64 0x00000040
30#define SZ_128 0x00000080
31#define SZ_256 0x00000100
32#define SZ_512 0x00000200
33
34#define SZ_1K 0x00000400
35#define SZ_4K 0x00001000
36#define SZ_8K 0x00002000
37#define SZ_16K 0x00004000
38#define SZ_32K 0x00008000
39#define SZ_64K 0x00010000
40#define SZ_128K 0x00020000
41#define SZ_256K 0x00040000
42#define SZ_512K 0x00080000
43
44#define SZ_1M 0x00100000
45#define SZ_2M 0x00200000
46#define SZ_4M 0x00400000
47#define SZ_8M 0x00800000
48#define SZ_16M 0x01000000
49#define SZ_26M 0x01a00000
50#define SZ_32M 0x02000000
51#define SZ_64M 0x04000000
52#define SZ_128M 0x08000000
53#define SZ_256M 0x10000000
54#define SZ_512M 0x20000000
55
56#define SZ_1G 0x40000000
57#define SZ_2G 0x80000000
58
59#endif
60
61/* END */
diff --git a/arch/sh/include/asm/smp.h b/arch/sh/include/asm/smp.h
index 593343cd26e..85b660c17eb 100644
--- a/arch/sh/include/asm/smp.h
+++ b/arch/sh/include/asm/smp.h
@@ -21,25 +21,29 @@ extern int __cpu_number_map[NR_CPUS];
21extern int __cpu_logical_map[NR_CPUS]; 21extern int __cpu_logical_map[NR_CPUS];
22#define cpu_logical_map(cpu) __cpu_logical_map[cpu] 22#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
23 23
24/* I've no idea what the real meaning of this is */ 24enum {
25#define PROC_CHANGE_PENALTY 20 25 SMP_MSG_FUNCTION,
26 SMP_MSG_RESCHEDULE,
27 SMP_MSG_FUNCTION_SINGLE,
28 SMP_MSG_TIMER,
26 29
27#define NO_PROC_ID (-1) 30 SMP_MSG_NR, /* must be last */
31};
28 32
29#define SMP_MSG_FUNCTION 0 33void smp_message_recv(unsigned int msg);
30#define SMP_MSG_RESCHEDULE 1 34void smp_timer_broadcast(cpumask_t mask);
31#define SMP_MSG_FUNCTION_SINGLE 2 35
32#define SMP_MSG_NR 3 36void local_timer_interrupt(void);
37void local_timer_setup(unsigned int cpu);
33 38
34void plat_smp_setup(void); 39void plat_smp_setup(void);
35void plat_prepare_cpus(unsigned int max_cpus); 40void plat_prepare_cpus(unsigned int max_cpus);
36int plat_smp_processor_id(void); 41int plat_smp_processor_id(void);
37void plat_start_cpu(unsigned int cpu, unsigned long entry_point); 42void plat_start_cpu(unsigned int cpu, unsigned long entry_point);
38void plat_send_ipi(unsigned int cpu, unsigned int message); 43void plat_send_ipi(unsigned int cpu, unsigned int message);
39int plat_register_ipi_handler(unsigned int message, 44
40 void (*handler)(void *), void *arg); 45void arch_send_call_function_single_ipi(int cpu);
41extern void arch_send_call_function_single_ipi(int cpu); 46void arch_send_call_function_ipi(cpumask_t mask);
42extern void arch_send_call_function_ipi(cpumask_t mask);
43 47
44#else 48#else
45 49
diff --git a/arch/sh/include/asm/snapgear.h b/arch/sh/include/asm/snapgear.h
deleted file mode 100644
index 042d95f51c4..00000000000
--- a/arch/sh/include/asm/snapgear.h
+++ /dev/null
@@ -1,71 +0,0 @@
1/*
2 * include/asm-sh/snapgear.h
3 *
4 * Modified version of io_se.h for the snapgear-specific functions.
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * IO functions for a SnapGear
10 */
11
12#ifndef _ASM_SH_IO_SNAPGEAR_H
13#define _ASM_SH_IO_SNAPGEAR_H
14
15#if defined(CONFIG_CPU_SH4)
16/*
17 * The external interrupt lines, these take up ints 0 - 15 inclusive
18 * depending on the priority for the interrupt. In fact the priority
19 * is the interrupt :-)
20 */
21
22#define IRL0_IRQ 2
23#define IRL0_PRIORITY 13
24
25#define IRL1_IRQ 5
26#define IRL1_PRIORITY 10
27
28#define IRL2_IRQ 8
29#define IRL2_PRIORITY 7
30
31#define IRL3_IRQ 11
32#define IRL3_PRIORITY 4
33#endif
34
35#define __IO_PREFIX snapgear
36#include <asm/io_generic.h>
37
38#ifdef CONFIG_SH_SECUREEDGE5410
39/*
40 * We need to remember what was written to the ioport as some bits
41 * are shared with other functions and you cannot read back what was
42 * written :-|
43 *
44 * Bit Read Write
45 * -----------------------------------------------
46 * D0 DCD on ttySC1 power
47 * D1 Reset Switch heatbeat
48 * D2 ttySC0 CTS (7100) LAN
49 * D3 - WAN
50 * D4 ttySC0 DCD (7100) CONSOLE
51 * D5 - ONLINE
52 * D6 - VPN
53 * D7 - DTR on ttySC1
54 * D8 - ttySC0 RTS (7100)
55 * D9 - ttySC0 DTR (7100)
56 * D10 - RTC SCLK
57 * D11 RTC DATA RTC DATA
58 * D12 - RTS RESET
59 */
60
61#define SECUREEDGE_IOPORT_ADDR ((volatile short *) 0xb0000000)
62extern unsigned short secureedge5410_ioport;
63
64#define SECUREEDGE_WRITE_IOPORT(val, mask) (*SECUREEDGE_IOPORT_ADDR = \
65 (secureedge5410_ioport = \
66 ((secureedge5410_ioport & ~(mask)) | ((val) & (mask)))))
67#define SECUREEDGE_READ_IOPORT() \
68 ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817))
69#endif
70
71#endif /* _ASM_SH_IO_SNAPGEAR_H */
diff --git a/arch/sh/include/asm/syscall.h b/arch/sh/include/asm/syscall.h
new file mode 100644
index 00000000000..6a381429ee9
--- /dev/null
+++ b/arch/sh/include/asm/syscall.h
@@ -0,0 +1,10 @@
1#ifndef __ASM_SH_SYSCALL_H
2#define __ASM_SH_SYSCALL_H
3
4#ifdef CONFIG_SUPERH32
5# include "syscall_32.h"
6#else
7# include "syscall_64.h"
8#endif
9
10#endif /* __ASM_SH_SYSCALL_H */
diff --git a/arch/sh/include/asm/syscall_32.h b/arch/sh/include/asm/syscall_32.h
new file mode 100644
index 00000000000..54773f26cd4
--- /dev/null
+++ b/arch/sh/include/asm/syscall_32.h
@@ -0,0 +1,110 @@
1#ifndef __ASM_SH_SYSCALL_32_H
2#define __ASM_SH_SYSCALL_32_H
3
4#include <linux/kernel.h>
5#include <linux/sched.h>
6#include <asm/ptrace.h>
7
8/* The system call number is given by the user in %g1 */
9static inline long syscall_get_nr(struct task_struct *task,
10 struct pt_regs *regs)
11{
12 return (regs->tra >= 0) ? regs->regs[3] : -1L;
13}
14
15static inline void syscall_rollback(struct task_struct *task,
16 struct pt_regs *regs)
17{
18 /*
19 * XXX: This needs some thought. On SH we don't
20 * save away the original r0 value anywhere.
21 */
22}
23
24static inline bool syscall_has_error(struct pt_regs *regs)
25{
26 return (regs->sr & 0x1) ? true : false;
27}
28static inline void syscall_set_error(struct pt_regs *regs)
29{
30 regs->sr |= 0x1;
31}
32static inline void syscall_clear_error(struct pt_regs *regs)
33{
34 regs->sr &= ~0x1;
35}
36
37static inline long syscall_get_error(struct task_struct *task,
38 struct pt_regs *regs)
39{
40 return syscall_has_error(regs) ? regs->regs[0] : 0;
41}
42
43static inline long syscall_get_return_value(struct task_struct *task,
44 struct pt_regs *regs)
45{
46 return regs->regs[0];
47}
48
49static inline void syscall_set_return_value(struct task_struct *task,
50 struct pt_regs *regs,
51 int error, long val)
52{
53 if (error) {
54 syscall_set_error(regs);
55 regs->regs[0] = -error;
56 } else {
57 syscall_clear_error(regs);
58 regs->regs[0] = val;
59 }
60}
61
62static inline void syscall_get_arguments(struct task_struct *task,
63 struct pt_regs *regs,
64 unsigned int i, unsigned int n,
65 unsigned long *args)
66{
67 /*
68 * Do this simply for now. If we need to start supporting
69 * fetching arguments from arbitrary indices, this will need some
70 * extra logic. Presently there are no in-tree users that depend
71 * on this behaviour.
72 */
73 BUG_ON(i);
74
75 /* Argument pattern is: R4, R5, R6, R7, R0, R1 */
76 switch (n) {
77 case 6: args[5] = regs->regs[1];
78 case 5: args[4] = regs->regs[0];
79 case 4: args[3] = regs->regs[7];
80 case 3: args[2] = regs->regs[6];
81 case 2: args[1] = regs->regs[5];
82 case 1: args[0] = regs->regs[4];
83 break;
84 default:
85 BUG();
86 }
87}
88
89static inline void syscall_set_arguments(struct task_struct *task,
90 struct pt_regs *regs,
91 unsigned int i, unsigned int n,
92 const unsigned long *args)
93{
94 /* Same note as above applies */
95 BUG_ON(i);
96
97 switch (n) {
98 case 6: regs->regs[1] = args[5];
99 case 5: regs->regs[0] = args[4];
100 case 4: regs->regs[7] = args[3];
101 case 3: regs->regs[6] = args[2];
102 case 2: regs->regs[5] = args[1];
103 case 1: regs->regs[4] = args[0];
104 break;
105 default:
106 BUG();
107 }
108}
109
110#endif /* __ASM_SH_SYSCALL_32_H */
diff --git a/arch/sh/include/asm/syscall_64.h b/arch/sh/include/asm/syscall_64.h
new file mode 100644
index 00000000000..bcaaa8ca4d7
--- /dev/null
+++ b/arch/sh/include/asm/syscall_64.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_SH_SYSCALL_64_H
2#define __ASM_SH_SYSCALL_64_H
3
4#include <asm-generic/syscall.h>
5
6#endif /* __ASM_SH_SYSCALL_64_H */
diff --git a/arch/sh/include/asm/syscalls.h b/arch/sh/include/asm/syscalls.h
new file mode 100644
index 00000000000..c1e2b8deb83
--- /dev/null
+++ b/arch/sh/include/asm/syscalls.h
@@ -0,0 +1,25 @@
1#ifndef __ASM_SH_SYSCALLS_H
2#define __ASM_SH_SYSCALLS_H
3
4#ifdef __KERNEL__
5
6struct old_utsname;
7
8asmlinkage int old_mmap(unsigned long addr, unsigned long len,
9 unsigned long prot, unsigned long flags,
10 int fd, unsigned long off);
11asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
12 unsigned long prot, unsigned long flags,
13 unsigned long fd, unsigned long pgoff);
14asmlinkage int sys_ipc(uint call, int first, int second,
15 int third, void __user *ptr, long fifth);
16asmlinkage int sys_uname(struct old_utsname __user *name);
17
18#ifdef CONFIG_SUPERH32
19# include "syscalls_32.h"
20#else
21# include "syscalls_64.h"
22#endif
23
24#endif /* __KERNEL__ */
25#endif /* __ASM_SH_SYSCALLS_H */
diff --git a/arch/sh/include/asm/syscalls_32.h b/arch/sh/include/asm/syscalls_32.h
new file mode 100644
index 00000000000..104c5e68610
--- /dev/null
+++ b/arch/sh/include/asm/syscalls_32.h
@@ -0,0 +1,56 @@
1#ifndef __ASM_SH_SYSCALLS_32_H
2#define __ASM_SH_SYSCALLS_32_H
3
4#ifdef __KERNEL__
5
6#include <linux/compiler.h>
7#include <linux/linkage.h>
8#include <linux/types.h>
9
10struct pt_regs;
11
12asmlinkage int sys_fork(unsigned long r4, unsigned long r5,
13 unsigned long r6, unsigned long r7,
14 struct pt_regs __regs);
15asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp,
16 unsigned long parent_tidptr,
17 unsigned long child_tidptr,
18 struct pt_regs __regs);
19asmlinkage int sys_vfork(unsigned long r4, unsigned long r5,
20 unsigned long r6, unsigned long r7,
21 struct pt_regs __regs);
22asmlinkage int sys_execve(char __user *ufilename, char __user * __user *uargv,
23 char __user * __user *uenvp, unsigned long r7,
24 struct pt_regs __regs);
25asmlinkage int sys_sigsuspend(old_sigset_t mask, unsigned long r5,
26 unsigned long r6, unsigned long r7,
27 struct pt_regs __regs);
28asmlinkage int sys_sigaction(int sig, const struct old_sigaction __user *act,
29 struct old_sigaction __user *oact);
30asmlinkage int sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss,
31 unsigned long r6, unsigned long r7,
32 struct pt_regs __regs);
33asmlinkage int sys_sigreturn(unsigned long r4, unsigned long r5,
34 unsigned long r6, unsigned long r7,
35 struct pt_regs __regs);
36asmlinkage int sys_rt_sigreturn(unsigned long r4, unsigned long r5,
37 unsigned long r6, unsigned long r7,
38 struct pt_regs __regs);
39asmlinkage int sys_pipe(unsigned long r4, unsigned long r5,
40 unsigned long r6, unsigned long r7,
41 struct pt_regs __regs);
42asmlinkage ssize_t sys_pread_wrapper(unsigned int fd, char __user *buf,
43 size_t count, long dummy, loff_t pos);
44asmlinkage ssize_t sys_pwrite_wrapper(unsigned int fd, const char __user *buf,
45 size_t count, long dummy, loff_t pos);
46asmlinkage int sys_fadvise64_64_wrapper(int fd, u32 offset0, u32 offset1,
47 u32 len0, u32 len1, int advice);
48
49/* Misc syscall related bits */
50asmlinkage long do_syscall_trace_enter(struct pt_regs *regs);
51asmlinkage void do_syscall_trace_leave(struct pt_regs *regs);
52asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned int save_r0,
53 unsigned long thread_info_flags);
54
55#endif /* __KERNEL__ */
56#endif /* __ASM_SH_SYSCALLS_32_H */
diff --git a/arch/sh/include/asm/syscalls_64.h b/arch/sh/include/asm/syscalls_64.h
new file mode 100644
index 00000000000..751fd881136
--- /dev/null
+++ b/arch/sh/include/asm/syscalls_64.h
@@ -0,0 +1,34 @@
1#ifndef __ASM_SH_SYSCALLS_64_H
2#define __ASM_SH_SYSCALLS_64_H
3
4#ifdef __KERNEL__
5
6#include <linux/compiler.h>
7#include <linux/linkage.h>
8#include <linux/types.h>
9
10struct pt_regs;
11
12asmlinkage int sys_fork(unsigned long r2, unsigned long r3,
13 unsigned long r4, unsigned long r5,
14 unsigned long r6, unsigned long r7,
15 struct pt_regs *pregs);
16asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp,
17 unsigned long r4, unsigned long r5,
18 unsigned long r6, unsigned long r7,
19 struct pt_regs *pregs);
20asmlinkage int sys_vfork(unsigned long r2, unsigned long r3,
21 unsigned long r4, unsigned long r5,
22 unsigned long r6, unsigned long r7,
23 struct pt_regs *pregs);
24asmlinkage int sys_execve(char *ufilename, char **uargv,
25 char **uenvp, unsigned long r5,
26 unsigned long r6, unsigned long r7,
27 struct pt_regs *pregs);
28
29/* Misc syscall related bits */
30asmlinkage long long do_syscall_trace_enter(struct pt_regs *regs);
31asmlinkage void do_syscall_trace_leave(struct pt_regs *regs);
32
33#endif /* __KERNEL__ */
34#endif /* __ASM_SH_SYSCALLS_64_H */
diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h
index 056d68cd210..6160fe44516 100644
--- a/arch/sh/include/asm/system.h
+++ b/arch/sh/include/asm/system.h
@@ -70,6 +70,8 @@
70 70
71#ifdef CONFIG_GUSA_RB 71#ifdef CONFIG_GUSA_RB
72#include <asm/cmpxchg-grb.h> 72#include <asm/cmpxchg-grb.h>
73#elif defined(CONFIG_CPU_SH4A)
74#include <asm/cmpxchg-llsc.h>
73#else 75#else
74#include <asm/cmpxchg-irq.h> 76#include <asm/cmpxchg-irq.h>
75#endif 77#endif
@@ -125,6 +127,8 @@ static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
125 }) 127 })
126 128
127extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn)); 129extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn));
130void free_initmem(void);
131void free_initrd_mem(unsigned long start, unsigned long end);
128 132
129extern void *set_exception_table_vec(unsigned int vec, void *handler); 133extern void *set_exception_table_vec(unsigned int vec, void *handler);
130 134
@@ -177,8 +181,8 @@ BUILD_TRAP_HANDLER(fpu_state_restore);
177#define arch_align_stack(x) (x) 181#define arch_align_stack(x) (x)
178 182
179struct mem_access { 183struct mem_access {
180 unsigned long (*from)(void *dst, const void *src, unsigned long cnt); 184 unsigned long (*from)(void *dst, const void __user *src, unsigned long cnt);
181 unsigned long (*to)(void *dst, const void *src, unsigned long cnt); 185 unsigned long (*to)(void __user *dst, const void *src, unsigned long cnt);
182}; 186};
183 187
184#ifdef CONFIG_SUPERH32 188#ifdef CONFIG_SUPERH32
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h
index f11bcf0855e..a726d5d0727 100644
--- a/arch/sh/include/asm/system_32.h
+++ b/arch/sh/include/asm/system_32.h
@@ -58,7 +58,8 @@ do { \
58 last = __last; \ 58 last = __last; \
59} while (0) 59} while (0)
60 60
61#define __uses_jump_to_uncached __attribute__ ((__section__ (".uncached.text"))) 61#define __uses_jump_to_uncached \
62 noinline __attribute__ ((__section__ (".uncached.text")))
62 63
63/* 64/*
64 * Jump to uncached area. 65 * Jump to uncached area.
@@ -96,7 +97,48 @@ do { \
96 : "=&r" (__dummy)); \ 97 : "=&r" (__dummy)); \
97} while (0) 98} while (0)
98 99
100#ifdef CONFIG_CPU_HAS_SR_RB
101#define lookup_exception_vector() \
102({ \
103 unsigned long _vec; \
104 \
105 __asm__ __volatile__ ( \
106 "stc r2_bank, %0\n\t" \
107 : "=r" (_vec) \
108 ); \
109 \
110 _vec; \
111})
112#else
113#define lookup_exception_vector() \
114({ \
115 unsigned long _vec; \
116 __asm__ __volatile__ ( \
117 "mov r4, %0\n\t" \
118 : "=r" (_vec) \
119 ); \
120 \
121 _vec; \
122})
123#endif
124
99int handle_unaligned_access(opcode_t instruction, struct pt_regs *regs, 125int handle_unaligned_access(opcode_t instruction, struct pt_regs *regs,
100 struct mem_access *ma); 126 struct mem_access *ma);
101 127
128asmlinkage void do_address_error(struct pt_regs *regs,
129 unsigned long writeaccess,
130 unsigned long address);
131asmlinkage void do_divide_error(unsigned long r4, unsigned long r5,
132 unsigned long r6, unsigned long r7,
133 struct pt_regs __regs);
134asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
135 unsigned long r6, unsigned long r7,
136 struct pt_regs __regs);
137asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5,
138 unsigned long r6, unsigned long r7,
139 struct pt_regs __regs);
140asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
141 unsigned long r6, unsigned long r7,
142 struct pt_regs __regs);
143
102#endif /* __ASM_SH_SYSTEM_32_H */ 144#endif /* __ASM_SH_SYSTEM_32_H */
diff --git a/arch/sh/include/asm/systemh7751.h b/arch/sh/include/asm/systemh7751.h
deleted file mode 100644
index 4161122c84e..00000000000
--- a/arch/sh/include/asm/systemh7751.h
+++ /dev/null
@@ -1,71 +0,0 @@
1#ifndef __ASM_SH_SYSTEMH_7751SYSTEMH_H
2#define __ASM_SH_SYSTEMH_7751SYSTEMH_H
3
4/*
5 * linux/include/asm-sh/systemh/7751systemh.h
6 *
7 * Copyright (C) 2000 Kazumoto Kojima
8 *
9 * Hitachi SystemH support
10
11 * Modified for 7751 SystemH by
12 * Jonathan Short, 2002.
13 */
14
15/* Box specific addresses. */
16
17#define PA_ROM 0x00000000 /* EPROM */
18#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */
19#define PA_FROM 0x01000000 /* EPROM */
20#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */
21#define PA_EXT1 0x04000000
22#define PA_EXT1_SIZE 0x04000000
23#define PA_EXT2 0x08000000
24#define PA_EXT2_SIZE 0x04000000
25#define PA_SDRAM 0x0c000000
26#define PA_SDRAM_SIZE 0x04000000
27
28#define PA_EXT4 0x12000000
29#define PA_EXT4_SIZE 0x02000000
30#define PA_EXT5 0x14000000
31#define PA_EXT5_SIZE 0x04000000
32#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */
33
34#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */
35#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */
36#define PA_LED 0xba000000 /* LED */
37#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */
38
39#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */
40#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */
41#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */
42#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */
43#define MRSHPC_MODE (PA_MRSHPC + 4)
44#define MRSHPC_OPTION (PA_MRSHPC + 6)
45#define MRSHPC_CSR (PA_MRSHPC + 8)
46#define MRSHPC_ISR (PA_MRSHPC + 10)
47#define MRSHPC_ICR (PA_MRSHPC + 12)
48#define MRSHPC_CPWCR (PA_MRSHPC + 14)
49#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
50#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
51#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
52#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
53#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
54#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
55#define MRSHPC_CDCR (PA_MRSHPC + 28)
56#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
57
58#define BCR_ILCRA (PA_BCR + 0)
59#define BCR_ILCRB (PA_BCR + 2)
60#define BCR_ILCRC (PA_BCR + 4)
61#define BCR_ILCRD (PA_BCR + 6)
62#define BCR_ILCRE (PA_BCR + 8)
63#define BCR_ILCRF (PA_BCR + 10)
64#define BCR_ILCRG (PA_BCR + 12)
65
66#define IRQ_79C973 13
67
68#define __IO_PREFIX sh7751systemh
69#include <asm/io_generic.h>
70
71#endif /* __ASM_SH_SYSTEMH_7751SYSTEMH_H */
diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h
index 0a894cafb1d..f09ac480629 100644
--- a/arch/sh/include/asm/thread_info.h
+++ b/arch/sh/include/asm/thread_info.h
@@ -33,20 +33,12 @@ struct thread_info {
33#define PREEMPT_ACTIVE 0x10000000 33#define PREEMPT_ACTIVE 0x10000000
34 34
35#if defined(CONFIG_4KSTACKS) 35#if defined(CONFIG_4KSTACKS)
36#define THREAD_SIZE_ORDER (0) 36#define THREAD_SHIFT 12
37#elif defined(CONFIG_PAGE_SIZE_4KB)
38#define THREAD_SIZE_ORDER (1)
39#elif defined(CONFIG_PAGE_SIZE_8KB)
40#define THREAD_SIZE_ORDER (1)
41#elif defined(CONFIG_PAGE_SIZE_16KB)
42#define THREAD_SIZE_ORDER (0)
43#elif defined(CONFIG_PAGE_SIZE_64KB)
44#define THREAD_SIZE_ORDER (0)
45#else 37#else
46#error "Unknown thread size" 38#define THREAD_SHIFT 13
47#endif 39#endif
48 40
49#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) 41#define THREAD_SIZE (1 << THREAD_SHIFT)
50#define STACK_WARN (THREAD_SIZE >> 3) 42#define STACK_WARN (THREAD_SIZE >> 3)
51 43
52/* 44/*
@@ -94,15 +86,19 @@ static inline struct thread_info *current_thread_info(void)
94 return ti; 86 return ti;
95} 87}
96 88
89/* thread information allocation */
90#if THREAD_SHIFT >= PAGE_SHIFT
91
92#define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT)
93
94#else /* THREAD_SHIFT < PAGE_SHIFT */
95
97#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR 96#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
98 97
99/* thread information allocation */ 98extern struct thread_info *alloc_thread_info(struct task_struct *tsk);
100#ifdef CONFIG_DEBUG_STACK_USAGE 99extern void free_thread_info(struct thread_info *ti);
101#define alloc_thread_info(ti) kzalloc(THREAD_SIZE, GFP_KERNEL) 100
102#else 101#endif /* THREAD_SHIFT < PAGE_SHIFT */
103#define alloc_thread_info(ti) kmalloc(THREAD_SIZE, GFP_KERNEL)
104#endif
105#define free_thread_info(ti) kfree(ti)
106 102
107#endif /* __ASSEMBLY__ */ 103#endif /* __ASSEMBLY__ */
108 104
diff --git a/arch/sh/include/asm/titan.h b/arch/sh/include/asm/titan.h
deleted file mode 100644
index 03f3583c891..00000000000
--- a/arch/sh/include/asm/titan.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * Platform defintions for Titan
3 */
4#ifndef _ASM_SH_TITAN_H
5#define _ASM_SH_TITAN_H
6
7#define __IO_PREFIX titan
8#include <asm/io_generic.h>
9
10/* IRQ assignments */
11#define TITAN_IRQ_WAN 2 /* eth0 (WAN) */
12#define TITAN_IRQ_LAN 5 /* eth1 (LAN) */
13#define TITAN_IRQ_MPCIA 8 /* mPCI A */
14#define TITAN_IRQ_MPCIB 11 /* mPCI B */
15#define TITAN_IRQ_USB 11 /* USB */
16
17#endif /* __ASM_SH_TITAN_H */
diff --git a/arch/sh/include/asm/uaccess_64.h b/arch/sh/include/asm/uaccess_64.h
index 5580fd47100..56fd20b8cdc 100644
--- a/arch/sh/include/asm/uaccess_64.h
+++ b/arch/sh/include/asm/uaccess_64.h
@@ -26,16 +26,20 @@ do { \
26 retval = 0; \ 26 retval = 0; \
27 switch (size) { \ 27 switch (size) { \
28 case 1: \ 28 case 1: \
29 retval = __get_user_asm_b(x, ptr); \ 29 retval = __get_user_asm_b((void *)&x, \
30 (long)ptr); \
30 break; \ 31 break; \
31 case 2: \ 32 case 2: \
32 retval = __get_user_asm_w(x, ptr); \ 33 retval = __get_user_asm_w((void *)&x, \
34 (long)ptr); \
33 break; \ 35 break; \
34 case 4: \ 36 case 4: \
35 retval = __get_user_asm_l(x, ptr); \ 37 retval = __get_user_asm_l((void *)&x, \
38 (long)ptr); \
36 break; \ 39 break; \
37 case 8: \ 40 case 8: \
38 retval = __get_user_asm_q(x, ptr); \ 41 retval = __get_user_asm_q((void *)&x, \
42 (long)ptr); \
39 break; \ 43 break; \
40 default: \ 44 default: \
41 __get_user_unknown(); \ 45 __get_user_unknown(); \
@@ -54,16 +58,20 @@ do { \
54 retval = 0; \ 58 retval = 0; \
55 switch (size) { \ 59 switch (size) { \
56 case 1: \ 60 case 1: \
57 retval = __put_user_asm_b(x, ptr); \ 61 retval = __put_user_asm_b((void *)&x, \
62 (long)ptr); \
58 break; \ 63 break; \
59 case 2: \ 64 case 2: \
60 retval = __put_user_asm_w(x, ptr); \ 65 retval = __put_user_asm_w((void *)&x, \
66 (long)ptr); \
61 break; \ 67 break; \
62 case 4: \ 68 case 4: \
63 retval = __put_user_asm_l(x, ptr); \ 69 retval = __put_user_asm_l((void *)&x, \
70 (long)ptr); \
64 break; \ 71 break; \
65 case 8: \ 72 case 8: \
66 retval = __put_user_asm_q(x, ptr); \ 73 retval = __put_user_asm_q((void *)&x, \
74 (long)ptr); \
67 break; \ 75 break; \
68 default: \ 76 default: \
69 __put_user_unknown(); \ 77 __put_user_unknown(); \
@@ -77,5 +85,7 @@ extern long __put_user_asm_q(void *, long);
77extern void __put_user_unknown(void); 85extern void __put_user_unknown(void);
78 86
79extern long __strnlen_user(const char *__s, long __n); 87extern long __strnlen_user(const char *__s, long __n);
88extern int __strncpy_from_user(unsigned long __dest,
89 unsigned long __user __src, int __count);
80 90
81#endif /* __ASM_SH_UACCESS_64_H */ 91#endif /* __ASM_SH_UACCESS_64_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-18 04:29:07 -0400