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-rw-r--r--arch/sh/boards/Kconfig8
-rw-r--r--arch/sh/boards/Makefile1
-rw-r--r--arch/sh/boards/board-magicpanelr2.c74
-rw-r--r--arch/sh/boards/board-polaris.c37
-rw-r--r--arch/sh/boards/board-sh7785lcr.c32
-rw-r--r--arch/sh/boards/board-shmin.c4
-rw-r--r--arch/sh/boards/board-titan.c (renamed from arch/sh/boards/mach-titan/setup.c)24
-rw-r--r--arch/sh/boards/board-urquell.c46
-rw-r--r--arch/sh/boards/mach-ap325rxa/setup.c24
-rw-r--r--arch/sh/boards/mach-cayman/irq.c16
-rw-r--r--arch/sh/boards/mach-dreamcast/irq.c27
-rw-r--r--arch/sh/boards/mach-dreamcast/rtc.c20
-rw-r--r--arch/sh/boards/mach-dreamcast/setup.c18
-rw-r--r--arch/sh/boards/mach-ecovec24/sdram.S59
-rw-r--r--arch/sh/boards/mach-ecovec24/setup.c87
-rw-r--r--arch/sh/boards/mach-highlander/irq-r7780mp.c2
-rw-r--r--arch/sh/boards/mach-highlander/irq-r7780rp.c2
-rw-r--r--arch/sh/boards/mach-highlander/irq-r7785rp.c16
-rw-r--r--arch/sh/boards/mach-highlander/psw.c4
-rw-r--r--arch/sh/boards/mach-highlander/setup.c14
-rw-r--r--arch/sh/boards/mach-hp6xx/hp6xx_apm.c2
-rw-r--r--arch/sh/boards/mach-hp6xx/pm.c38
-rw-r--r--arch/sh/boards/mach-hp6xx/setup.c12
-rw-r--r--arch/sh/boards/mach-kfr2r09/setup.c16
-rw-r--r--arch/sh/boards/mach-landisk/gio.c12
-rw-r--r--arch/sh/boards/mach-landisk/irq.c6
-rw-r--r--arch/sh/boards/mach-landisk/psw.c4
-rw-r--r--arch/sh/boards/mach-landisk/setup.c6
-rw-r--r--arch/sh/boards/mach-lboxre2/setup.c4
-rw-r--r--arch/sh/boards/mach-microdev/io.c4
-rw-r--r--arch/sh/boards/mach-microdev/irq.c10
-rw-r--r--arch/sh/boards/mach-migor/setup.c24
-rw-r--r--arch/sh/boards/mach-r2d/irq.c4
-rw-r--r--arch/sh/boards/mach-r2d/setup.c8
-rw-r--r--arch/sh/boards/mach-rsk/devices-rsk7203.c2
-rw-r--r--arch/sh/boards/mach-sdk7780/irq.c4
-rw-r--r--arch/sh/boards/mach-sdk7780/setup.c29
-rw-r--r--arch/sh/boards/mach-sdk7786/Makefile1
-rw-r--r--arch/sh/boards/mach-sdk7786/fpga.c72
-rw-r--r--arch/sh/boards/mach-sdk7786/irq.c48
-rw-r--r--arch/sh/boards/mach-sdk7786/setup.c189
-rw-r--r--arch/sh/boards/mach-se/7206/io.c2
-rw-r--r--arch/sh/boards/mach-se/7206/irq.c43
-rw-r--r--arch/sh/boards/mach-se/7206/setup.c15
-rw-r--r--arch/sh/boards/mach-se/7343/irq.c45
-rw-r--r--arch/sh/boards/mach-se/7343/setup.c43
-rw-r--r--arch/sh/boards/mach-se/770x/irq.c14
-rw-r--r--arch/sh/boards/mach-se/770x/setup.c15
-rw-r--r--arch/sh/boards/mach-se/7721/irq.c2
-rw-r--r--arch/sh/boards/mach-se/7721/setup.c23
-rw-r--r--arch/sh/boards/mach-se/7722/irq.c10
-rw-r--r--arch/sh/boards/mach-se/7722/setup.c55
-rw-r--r--arch/sh/boards/mach-se/7724/irq.c62
-rw-r--r--arch/sh/boards/mach-se/7724/sdram.S79
-rw-r--r--arch/sh/boards/mach-se/7724/setup.c114
-rw-r--r--arch/sh/boards/mach-se/7780/irq.c18
-rw-r--r--arch/sh/boards/mach-se/7780/setup.c47
-rw-r--r--arch/sh/boards/mach-sh03/rtc.c50
-rw-r--r--arch/sh/boards/mach-sh03/setup.c2
-rw-r--r--arch/sh/boards/mach-sh7763rdp/irq.c10
-rw-r--r--arch/sh/boards/mach-sh7763rdp/setup.c40
-rw-r--r--arch/sh/boards/mach-snapgear/setup.c2
-rw-r--r--arch/sh/boards/mach-systemh/irq.c12
-rw-r--r--arch/sh/boards/mach-titan/Makefile5
-rw-r--r--arch/sh/boards/mach-titan/io.c108
-rw-r--r--arch/sh/boards/mach-x3proto/ilsel.c8
-rw-r--r--arch/sh/boards/mach-x3proto/setup.c2
67 files changed, 1100 insertions, 736 deletions
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index aedd9deb5de..938e87d5148 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -150,6 +150,14 @@ config SH_SDK7780
150 Select SDK7780 if configuring for a Renesas SH7780 SDK7780R3 150 Select SDK7780 if configuring for a Renesas SH7780 SDK7780R3
151 evaluation board. 151 evaluation board.
152 152
153config SH_SDK7786
154 bool "SDK7786"
155 depends on CPU_SUBTYPE_SH7786
156 select SYS_SUPPORTS_PCI
157 help
158 Select SDK7786 if configuring for a Renesas Technology Europe
159 SH7786-65nm board.
160
153config SH_HIGHLANDER 161config SH_HIGHLANDER
154 bool "Highlander" 162 bool "Highlander"
155 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 163 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile
index ce0f2638178..4f90f9b7a92 100644
--- a/arch/sh/boards/Makefile
+++ b/arch/sh/boards/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_SH_SHMIN) += board-shmin.o
8obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o 8obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o
9obj-$(CONFIG_SH_ESPT) += board-espt.o 9obj-$(CONFIG_SH_ESPT) += board-espt.o
10obj-$(CONFIG_SH_POLARIS) += board-polaris.o 10obj-$(CONFIG_SH_POLARIS) += board-polaris.o
11obj-$(CONFIG_SH_TITAN) += board-titan.o
diff --git a/arch/sh/boards/board-magicpanelr2.c b/arch/sh/boards/board-magicpanelr2.c
index 99ffc5f1c0d..efba450a051 100644
--- a/arch/sh/boards/board-magicpanelr2.c
+++ b/arch/sh/boards/board-magicpanelr2.c
@@ -23,7 +23,7 @@
23#include <asm/heartbeat.h> 23#include <asm/heartbeat.h>
24#include <cpu/sh7720.h> 24#include <cpu/sh7720.h>
25 25
26#define LAN9115_READY (ctrl_inl(0xA8000084UL) & 0x00000001UL) 26#define LAN9115_READY (__raw_readl(0xA8000084UL) & 0x00000001UL)
27 27
28/* Prefer cmdline over RedBoot */ 28/* Prefer cmdline over RedBoot */
29static const char *probes[] = { "cmdlinepart", "RedBoot", NULL }; 29static const char *probes[] = { "cmdlinepart", "RedBoot", NULL };
@@ -60,33 +60,33 @@ static void __init setup_chip_select(void)
60{ 60{
61 /* CS2: LAN (0x08000000 - 0x0bffffff) */ 61 /* CS2: LAN (0x08000000 - 0x0bffffff) */
62 /* no idle cycles, normal space, 8 bit data bus */ 62 /* no idle cycles, normal space, 8 bit data bus */
63 ctrl_outl(0x36db0400, CS2BCR); 63 __raw_writel(0x36db0400, CS2BCR);
64 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ 64 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
65 ctrl_outl(0x000003c0, CS2WCR); 65 __raw_writel(0x000003c0, CS2WCR);
66 66
67 /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */ 67 /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */
68 /* no idle cycles, normal space, 8 bit data bus */ 68 /* no idle cycles, normal space, 8 bit data bus */
69 ctrl_outl(0x00000200, CS4BCR); 69 __raw_writel(0x00000200, CS4BCR);
70 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ 70 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
71 ctrl_outl(0x00100981, CS4WCR); 71 __raw_writel(0x00100981, CS4WCR);
72 72
73 /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */ 73 /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */
74 /* no idle cycles, normal space, 8 bit data bus */ 74 /* no idle cycles, normal space, 8 bit data bus */
75 ctrl_outl(0x00000200, CS5ABCR); 75 __raw_writel(0x00000200, CS5ABCR);
76 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ 76 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
77 ctrl_outl(0x00100981, CS5AWCR); 77 __raw_writel(0x00100981, CS5AWCR);
78 78
79 /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */ 79 /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */
80 /* no idle cycles, normal space, 8 bit data bus */ 80 /* no idle cycles, normal space, 8 bit data bus */
81 ctrl_outl(0x00000200, CS5BBCR); 81 __raw_writel(0x00000200, CS5BBCR);
82 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ 82 /* (SW:1.5 WR:3 HW:1.5), ext. wait */
83 ctrl_outl(0x00100981, CS5BWCR); 83 __raw_writel(0x00100981, CS5BWCR);
84 84
85 /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */ 85 /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */
86 /* no idle cycles, normal space, 8 bit data bus */ 86 /* no idle cycles, normal space, 8 bit data bus */
87 ctrl_outl(0x00000200, CS6ABCR); 87 __raw_writel(0x00000200, CS6ABCR);
88 /* (SW:1.5 WR:3 HW:1.5), no ext. wait */ 88 /* (SW:1.5 WR:3 HW:1.5), no ext. wait */
89 ctrl_outl(0x001009C1, CS6AWCR); 89 __raw_writel(0x001009C1, CS6AWCR);
90} 90}
91 91
92static void __init setup_port_multiplexing(void) 92static void __init setup_port_multiplexing(void)
@@ -94,71 +94,71 @@ static void __init setup_port_multiplexing(void)
94 /* A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5); 94 /* A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5);
95 * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1); 95 * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1);
96 */ 96 */
97 ctrl_outw(0x5555, PORT_PACR); /* 01 01 01 01 01 01 01 01 */ 97 __raw_writew(0x5555, PORT_PACR); /* 01 01 01 01 01 01 01 01 */
98 98
99 /* B7 GPO(RST4); B6 GPO(RST3); B5 GPO(RST2); B4 GPO(RST1); 99 /* B7 GPO(RST4); B6 GPO(RST3); B5 GPO(RST2); B4 GPO(RST1);
100 * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0); 100 * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0);
101 */ 101 */
102 ctrl_outw(0x5555, PORT_PBCR); /* 01 01 01 01 01 01 01 01 */ 102 __raw_writew(0x5555, PORT_PBCR); /* 01 01 01 01 01 01 01 01 */
103 103
104 /* C7 GPO(PC7); C6 GPO(PC6); C5 GPO(PC5); C4 GPO(PC4); 104 /* C7 GPO(PC7); C6 GPO(PC6); C5 GPO(PC5); C4 GPO(PC4);
105 * C3 LCD_DATA3; C2 LCD_DATA2; C1 LCD_DATA1; C0 LCD_DATA0; 105 * C3 LCD_DATA3; C2 LCD_DATA2; C1 LCD_DATA1; C0 LCD_DATA0;
106 */ 106 */
107 ctrl_outw(0x5500, PORT_PCCR); /* 01 01 01 01 00 00 00 00 */ 107 __raw_writew(0x5500, PORT_PCCR); /* 01 01 01 01 00 00 00 00 */
108 108
109 /* D7 GPO(PD7); D6 GPO(PD6); D5 GPO(PD5); D4 GPO(PD4); 109 /* D7 GPO(PD7); D6 GPO(PD6); D5 GPO(PD5); D4 GPO(PD4);
110 * D3 GPO(PD3); D2 GPO(PD2); D1 GPO(PD1); D0 GPO(PD0); 110 * D3 GPO(PD3); D2 GPO(PD2); D1 GPO(PD1); D0 GPO(PD0);
111 */ 111 */
112 ctrl_outw(0x5555, PORT_PDCR); /* 01 01 01 01 01 01 01 01 */ 112 __raw_writew(0x5555, PORT_PDCR); /* 01 01 01 01 01 01 01 01 */
113 113
114 /* E7 (x); E6 GPI(nu); E5 GPI(nu); E4 LCD_M_DISP; 114 /* E7 (x); E6 GPI(nu); E5 GPI(nu); E4 LCD_M_DISP;
115 * E3 LCD_CL1; E2 LCD_CL2; E1 LCD_DON; E0 LCD_FLM; 115 * E3 LCD_CL1; E2 LCD_CL2; E1 LCD_DON; E0 LCD_FLM;
116 */ 116 */
117 ctrl_outw(0x3C00, PORT_PECR); /* 00 11 11 00 00 00 00 00 */ 117 __raw_writew(0x3C00, PORT_PECR); /* 00 11 11 00 00 00 00 00 */
118 118
119 /* F7 (x); F6 DA1(VLCD); F5 DA0(nc); F4 AN3; 119 /* F7 (x); F6 DA1(VLCD); F5 DA0(nc); F4 AN3;
120 * F3 AN2(MID_AD); F2 AN1(EARTH_AD); F1 AN0(TEMP); F0 GPI+(nc); 120 * F3 AN2(MID_AD); F2 AN1(EARTH_AD); F1 AN0(TEMP); F0 GPI+(nc);
121 */ 121 */
122 ctrl_outw(0x0002, PORT_PFCR); /* 00 00 00 00 00 00 00 10 */ 122 __raw_writew(0x0002, PORT_PFCR); /* 00 00 00 00 00 00 00 10 */
123 123
124 /* G7 (x); G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ); G4 GPI(KEY2); 124 /* G7 (x); G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ); G4 GPI(KEY2);
125 * G3 GPI(KEY1); G2 GPO(LED11); G1 GPO(LED10); G0 GPO(LED9); 125 * G3 GPI(KEY1); G2 GPO(LED11); G1 GPO(LED10); G0 GPO(LED9);
126 */ 126 */
127 ctrl_outw(0x03D5, PORT_PGCR); /* 00 00 00 11 11 01 01 01 */ 127 __raw_writew(0x03D5, PORT_PGCR); /* 00 00 00 11 11 01 01 01 */
128 128
129 /* H7 (x); H6 /RAS(BRAS); H5 /CAS(BCAS); H4 CKE(BCKE); 129 /* H7 (x); H6 /RAS(BRAS); H5 /CAS(BCAS); H4 CKE(BCKE);
130 * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR; H0 USB1_PWR; 130 * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR; H0 USB1_PWR;
131 */ 131 */
132 ctrl_outw(0x0050, PORT_PHCR); /* 00 00 00 00 01 01 00 00 */ 132 __raw_writew(0x0050, PORT_PHCR); /* 00 00 00 00 01 01 00 00 */
133 133
134 /* J7 (x); J6 AUDCK; J5 ASEBRKAK; J4 AUDATA3; 134 /* J7 (x); J6 AUDCK; J5 ASEBRKAK; J4 AUDATA3;
135 * J3 AUDATA2; J2 AUDATA1; J1 AUDATA0; J0 AUDSYNC; 135 * J3 AUDATA2; J2 AUDATA1; J1 AUDATA0; J0 AUDSYNC;
136 */ 136 */
137 ctrl_outw(0x0000, PORT_PJCR); /* 00 00 00 00 00 00 00 00 */ 137 __raw_writew(0x0000, PORT_PJCR); /* 00 00 00 00 00 00 00 00 */
138 138
139 /* K7 (x); K6 (x); K5 (x); K4 (x); 139 /* K7 (x); K6 (x); K5 (x); K4 (x);
140 * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nu); K0 PINT4(FLASH_READY) 140 * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nu); K0 PINT4(FLASH_READY)
141 */ 141 */
142 ctrl_outw(0x00FF, PORT_PKCR); /* 00 00 00 00 11 11 11 11 */ 142 __raw_writew(0x00FF, PORT_PKCR); /* 00 00 00 00 11 11 11 11 */
143 143
144 /* L7 TRST; L6 TMS; L5 TDO; L4 TDI; 144 /* L7 TRST; L6 TMS; L5 TDO; L4 TDI;
145 * L3 TCK; L2 (x); L1 (x); L0 (x); 145 * L3 TCK; L2 (x); L1 (x); L0 (x);
146 */ 146 */
147 ctrl_outw(0x0000, PORT_PLCR); /* 00 00 00 00 00 00 00 00 */ 147 __raw_writew(0x0000, PORT_PLCR); /* 00 00 00 00 00 00 00 00 */
148 148
149 /* M7 GPO(CURRENT_SINK); M6 GPO(PWR_SWITCH); M5 GPO(LAN_SPEED); 149 /* M7 GPO(CURRENT_SINK); M6 GPO(PWR_SWITCH); M5 GPO(LAN_SPEED);
150 * M4 GPO(LAN_RESET); M3 GPO(BUZZER); M2 GPO(LCD_BL); 150 * M4 GPO(LAN_RESET); M3 GPO(BUZZER); M2 GPO(LCD_BL);
151 * M1 CS5B(CAN3_CS); M0 GPI+(nc); 151 * M1 CS5B(CAN3_CS); M0 GPI+(nc);
152 */ 152 */
153 ctrl_outw(0x5552, PORT_PMCR); /* 01 01 01 01 01 01 00 10 */ 153 __raw_writew(0x5552, PORT_PMCR); /* 01 01 01 01 01 01 00 10 */
154 154
155 /* CURRENT_SINK=off, PWR_SWITCH=off, LAN_SPEED=100MBit, 155 /* CURRENT_SINK=off, PWR_SWITCH=off, LAN_SPEED=100MBit,
156 * LAN_RESET=off, BUZZER=off, LCD_BL=off 156 * LAN_RESET=off, BUZZER=off, LCD_BL=off
157 */ 157 */
158#if CONFIG_SH_MAGIC_PANEL_R2_VERSION == 2 158#if CONFIG_SH_MAGIC_PANEL_R2_VERSION == 2
159 ctrl_outb(0x30, PORT_PMDR); 159 __raw_writeb(0x30, PORT_PMDR);
160#elif CONFIG_SH_MAGIC_PANEL_R2_VERSION == 3 160#elif CONFIG_SH_MAGIC_PANEL_R2_VERSION == 3
161 ctrl_outb(0xF0, PORT_PMDR); 161 __raw_writeb(0xF0, PORT_PMDR);
162#else 162#else
163#error Unknown revision of PLATFORM_MP_R2 163#error Unknown revision of PLATFORM_MP_R2
164#endif 164#endif
@@ -167,8 +167,8 @@ static void __init setup_port_multiplexing(void)
167 * P4 GPO(nu); P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ); 167 * P4 GPO(nu); P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ);
168 * P1 IRQ1(CAN2_IRQ); P0 IRQ0(CAN1_IRQ) 168 * P1 IRQ1(CAN2_IRQ); P0 IRQ0(CAN1_IRQ)
169 */ 169 */
170 ctrl_outw(0x0100, PORT_PPCR); /* 00 00 00 01 00 00 00 00 */ 170 __raw_writew(0x0100, PORT_PPCR); /* 00 00 00 01 00 00 00 00 */
171 ctrl_outb(0x10, PORT_PPDR); 171 __raw_writeb(0x10, PORT_PPDR);
172 172
173 /* R7 A25; R6 A24; R5 A23; R4 A22; 173 /* R7 A25; R6 A24; R5 A23; R4 A22;
174 * R3 A21; R2 A20; R1 A19; R0 A0; 174 * R3 A21; R2 A20; R1 A19; R0 A0;
@@ -185,22 +185,22 @@ static void __init setup_port_multiplexing(void)
185 /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2); 185 /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2);
186 * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK; 186 * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK;
187 */ 187 */
188 ctrl_outw(0x0140, PORT_PSCR); /* 00 00 00 01 01 00 00 00 */ 188 __raw_writew(0x0140, PORT_PSCR); /* 00 00 00 01 01 00 00 00 */
189 189
190 /* T7 (x); T6 (x); T5 (x); T4 COM1_CTS; 190 /* T7 (x); T6 (x); T5 (x); T4 COM1_CTS;
191 * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG) 191 * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG)
192 */ 192 */
193 ctrl_outw(0x0001, PORT_PTCR); /* 00 00 00 00 00 00 00 01 */ 193 __raw_writew(0x0001, PORT_PTCR); /* 00 00 00 00 00 00 00 01 */
194 194
195 /* U7 (x); U6 (x); U5 (x); U4 GPI+(/AC_FAULT); 195 /* U7 (x); U6 (x); U5 (x); U4 GPI+(/AC_FAULT);
196 * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD; U0 TOUCH_SCK; 196 * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD; U0 TOUCH_SCK;
197 */ 197 */
198 ctrl_outw(0x0240, PORT_PUCR); /* 00 00 00 10 01 00 00 00 */ 198 __raw_writew(0x0240, PORT_PUCR); /* 00 00 00 10 01 00 00 00 */
199 199
200 /* V7 (x); V6 (x); V5 (x); V4 GPO(MID2); 200 /* V7 (x); V6 (x); V5 (x); V4 GPO(MID2);
201 * V3 GPO(MID1); V2 CARD_TxD; V1 CARD_RxD; V0 GPI+(/BAT_FAULT); 201 * V3 GPO(MID1); V2 CARD_TxD; V1 CARD_RxD; V0 GPI+(/BAT_FAULT);
202 */ 202 */
203 ctrl_outw(0x0142, PORT_PVCR); /* 00 00 00 01 01 00 00 10 */ 203 __raw_writew(0x0142, PORT_PVCR); /* 00 00 00 01 01 00 00 10 */
204} 204}
205 205
206static void __init mpr2_setup(char **cmdline_p) 206static void __init mpr2_setup(char **cmdline_p)
@@ -209,24 +209,24 @@ static void __init mpr2_setup(char **cmdline_p)
209 * /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2, 209 * /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2,
210 * /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND 210 * /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND
211 */ 211 */
212 ctrl_outw(0xAABC, PORT_PSELA); 212 __raw_writew(0xAABC, PORT_PSELA);
213 /* set Pin Select Register B: 213 /* set Pin Select Register B:
214 * /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC, 214 * /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC,
215 * LCD_VEPWC, IIC_SDA, IIC_SCL, Reserved 215 * LCD_VEPWC, IIC_SDA, IIC_SCL, Reserved
216 */ 216 */
217 ctrl_outw(0x3C00, PORT_PSELB); 217 __raw_writew(0x3C00, PORT_PSELB);
218 /* set Pin Select Register C: 218 /* set Pin Select Register C:
219 * SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved 219 * SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved
220 */ 220 */
221 ctrl_outw(0x0000, PORT_PSELC); 221 __raw_writew(0x0000, PORT_PSELC);
222 /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK, 222 /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK,
223 * Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved 223 * Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved
224 */ 224 */
225 ctrl_outw(0x0000, PORT_PSELD); 225 __raw_writew(0x0000, PORT_PSELD);
226 /* set USB TxRx Control: Reserved, DRV, Reserved, USB_TRANS, USB_SEL */ 226 /* set USB TxRx Control: Reserved, DRV, Reserved, USB_TRANS, USB_SEL */
227 ctrl_outw(0x0101, PORT_UTRCTL); 227 __raw_writew(0x0101, PORT_UTRCTL);
228 /* set USB Clock Control: USSCS, USSTB, Reserved (HighByte always A5) */ 228 /* set USB Clock Control: USSCS, USSTB, Reserved (HighByte always A5) */
229 ctrl_outw(0xA5C0, PORT_UCLKCR_W); 229 __raw_writew(0xA5C0, PORT_UCLKCR_W);
230 230
231 setup_chip_select(); 231 setup_chip_select();
232 232
diff --git a/arch/sh/boards/board-polaris.c b/arch/sh/boards/board-polaris.c
index 62607eb5100..594866356c2 100644
--- a/arch/sh/boards/board-polaris.c
+++ b/arch/sh/boards/board-polaris.c
@@ -59,15 +59,12 @@ static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };
59static struct heartbeat_data heartbeat_data = { 59static struct heartbeat_data heartbeat_data = {
60 .bit_pos = heartbeat_bit_pos, 60 .bit_pos = heartbeat_bit_pos,
61 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 61 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
62 .regsize = 8,
63}; 62};
64 63
65static struct resource heartbeat_resources[] = { 64static struct resource heartbeat_resource = {
66 [0] = { 65 .start = PORT_PCDR,
67 .start = PORT_PCDR, 66 .end = PORT_PCDR,
68 .end = PORT_PCDR, 67 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
69 .flags = IORESOURCE_MEM,
70 },
71}; 68};
72 69
73static struct platform_device heartbeat_device = { 70static struct platform_device heartbeat_device = {
@@ -76,8 +73,8 @@ static struct platform_device heartbeat_device = {
76 .dev = { 73 .dev = {
77 .platform_data = &heartbeat_data, 74 .platform_data = &heartbeat_data,
78 }, 75 },
79 .num_resources = ARRAY_SIZE(heartbeat_resources), 76 .num_resources = 1,
80 .resource = heartbeat_resources, 77 .resource = &heartbeat_resource,
81}; 78};
82 79
83static struct platform_device *polaris_devices[] __initdata = { 80static struct platform_device *polaris_devices[] __initdata = {
@@ -92,15 +89,15 @@ static int __init polaris_initialise(void)
92 printk(KERN_INFO "Configuring Polaris external bus\n"); 89 printk(KERN_INFO "Configuring Polaris external bus\n");
93 90
94 /* Configure area 5 with 2 wait states */ 91 /* Configure area 5 with 2 wait states */
95 wcr = ctrl_inw(WCR2); 92 wcr = __raw_readw(WCR2);
96 wcr &= (~AREA5_WAIT_CTRL); 93 wcr &= (~AREA5_WAIT_CTRL);
97 wcr |= (WAIT_STATES_10 << 10); 94 wcr |= (WAIT_STATES_10 << 10);
98 ctrl_outw(wcr, WCR2); 95 __raw_writew(wcr, WCR2);
99 96
100 /* Configure area 5 for 32-bit access */ 97 /* Configure area 5 for 32-bit access */
101 bcr_mask = ctrl_inw(BCR2); 98 bcr_mask = __raw_readw(BCR2);
102 bcr_mask |= 1 << 10; 99 bcr_mask |= 1 << 10;
103 ctrl_outw(bcr_mask, BCR2); 100 __raw_writew(bcr_mask, BCR2);
104 101
105 return platform_add_devices(polaris_devices, 102 return platform_add_devices(polaris_devices,
106 ARRAY_SIZE(polaris_devices)); 103 ARRAY_SIZE(polaris_devices));
@@ -131,13 +128,13 @@ static struct ipr_desc ipr_irq_desc = {
131static void __init init_polaris_irq(void) 128static void __init init_polaris_irq(void)
132{ 129{
133 /* Disable all interrupts */ 130 /* Disable all interrupts */
134 ctrl_outw(0, BCR_ILCRA); 131 __raw_writew(0, BCR_ILCRA);
135 ctrl_outw(0, BCR_ILCRB); 132 __raw_writew(0, BCR_ILCRB);
136 ctrl_outw(0, BCR_ILCRC); 133 __raw_writew(0, BCR_ILCRC);
137 ctrl_outw(0, BCR_ILCRD); 134 __raw_writew(0, BCR_ILCRD);
138 ctrl_outw(0, BCR_ILCRE); 135 __raw_writew(0, BCR_ILCRE);
139 ctrl_outw(0, BCR_ILCRF); 136 __raw_writew(0, BCR_ILCRF);
140 ctrl_outw(0, BCR_ILCRG); 137 __raw_writew(0, BCR_ILCRG);
141 138
142 register_ipr_controller(&ipr_irq_desc); 139 register_ipr_controller(&ipr_irq_desc);
143} 140}
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index e5a8a2fde39..fe7e686c94a 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -21,6 +21,7 @@
21#include <linux/i2c-algo-pca.h> 21#include <linux/i2c-algo-pca.h>
22#include <linux/usb/r8a66597.h> 22#include <linux/usb/r8a66597.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/io.h>
24#include <linux/clk.h> 25#include <linux/clk.h>
25#include <linux/errno.h> 26#include <linux/errno.h>
26#include <mach/sh7785lcr.h> 27#include <mach/sh7785lcr.h>
@@ -32,26 +33,17 @@
32 * NOTE: This board has 2 physical memory maps. 33 * NOTE: This board has 2 physical memory maps.
33 * Please look at include/asm-sh/sh7785lcr.h or hardware manual. 34 * Please look at include/asm-sh/sh7785lcr.h or hardware manual.
34 */ 35 */
35static struct resource heartbeat_resources[] = { 36static struct resource heartbeat_resource = {
36 [0] = { 37 .start = PLD_LEDCR,
37 .start = PLD_LEDCR, 38 .end = PLD_LEDCR,
38 .end = PLD_LEDCR, 39 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
39 .flags = IORESOURCE_MEM,
40 },
41};
42
43static struct heartbeat_data heartbeat_data = {
44 .regsize = 8,
45}; 40};
46 41
47static struct platform_device heartbeat_device = { 42static struct platform_device heartbeat_device = {
48 .name = "heartbeat", 43 .name = "heartbeat",
49 .id = -1, 44 .id = -1,
50 .dev = { 45 .num_resources = 1,
51 .platform_data = &heartbeat_data, 46 .resource = &heartbeat_resource,
52 },
53 .num_resources = ARRAY_SIZE(heartbeat_resources),
54 .resource = heartbeat_resources,
55}; 47};
56 48
57static struct mtd_partition nor_flash_partitions[] = { 49static struct mtd_partition nor_flash_partitions[] = {
@@ -341,8 +333,14 @@ static void __init sh7785lcr_setup(char **cmdline_p)
341 pm_power_off = sh7785lcr_power_off; 333 pm_power_off = sh7785lcr_power_off;
342 334
343 /* sm501 DRAM configuration */ 335 /* sm501 DRAM configuration */
344 sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL; 336 sm501_reg = ioremap_nocache(SM107_REG_ADDR, SM501_DRAM_CONTROL);
345 writel(0x000307c2, sm501_reg); 337 if (!sm501_reg) {
338 printk(KERN_ERR "%s: ioremap error.\n", __func__);
339 return;
340 }
341
342 writel(0x000307c2, sm501_reg + SM501_DRAM_CONTROL);
343 iounmap(sm501_reg);
346} 344}
347 345
348/* Return the board specific boot mode pin configuration */ 346/* Return the board specific boot mode pin configuration */
diff --git a/arch/sh/boards/board-shmin.c b/arch/sh/boards/board-shmin.c
index b1dcbbc8918..325bed53b87 100644
--- a/arch/sh/boards/board-shmin.c
+++ b/arch/sh/boards/board-shmin.c
@@ -17,8 +17,8 @@
17 17
18static void __init init_shmin_irq(void) 18static void __init init_shmin_irq(void)
19{ 19{
20 ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ 20 __raw_writew(0x2a00, PFC_PHCR); // IRQ0-3=IRQ
21 ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active. 21 __raw_writew(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active.
22 plat_irq_setup_pins(IRQ_MODE_IRQ); 22 plat_irq_setup_pins(IRQ_MODE_IRQ);
23} 23}
24 24
diff --git a/arch/sh/boards/mach-titan/setup.c b/arch/sh/boards/board-titan.c
index 81e7e0f0386..94c36c7bc0b 100644
--- a/arch/sh/boards/mach-titan/setup.c
+++ b/arch/sh/boards/board-titan.c
@@ -19,26 +19,6 @@ static void __init init_titan_irq(void)
19} 19}
20 20
21static struct sh_machine_vector mv_titan __initmv = { 21static struct sh_machine_vector mv_titan __initmv = {
22 .mv_name = "Titan", 22 .mv_name = "Titan",
23 23 .mv_init_irq = init_titan_irq,
24 .mv_inb = titan_inb,
25 .mv_inw = titan_inw,
26 .mv_inl = titan_inl,
27 .mv_outb = titan_outb,
28 .mv_outw = titan_outw,
29 .mv_outl = titan_outl,
30
31 .mv_inb_p = titan_inb_p,
32 .mv_inw_p = titan_inw,
33 .mv_inl_p = titan_inl,
34 .mv_outb_p = titan_outb_p,
35 .mv_outw_p = titan_outw,
36 .mv_outl_p = titan_outl,
37
38 .mv_insl = titan_insl,
39 .mv_outsl = titan_outsl,
40
41 .mv_ioport_map = titan_ioport_map,
42
43 .mv_init_irq = init_titan_irq,
44}; 24};
diff --git a/arch/sh/boards/board-urquell.c b/arch/sh/boards/board-urquell.c
index 36b8bac9b12..a9bd6e3ee10 100644
--- a/arch/sh/boards/board-urquell.c
+++ b/arch/sh/boards/board-urquell.c
@@ -2,7 +2,7 @@
2 * Renesas Technology Corp. SH7786 Urquell Support. 2 * Renesas Technology Corp. SH7786 Urquell Support.
3 * 3 *
4 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com> 4 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 * Copyright (C) 2009 Paul Mundt 5 * Copyright (C) 2009, 2010 Paul Mundt
6 * 6 *
7 * Based on board-sh7785lcr.c 7 * Based on board-sh7785lcr.c
8 * Copyright (C) 2008 Yoshihiro Shimoda 8 * Copyright (C) 2008 Yoshihiro Shimoda
@@ -19,6 +19,7 @@
19#include <linux/delay.h> 19#include <linux/delay.h>
20#include <linux/gpio.h> 20#include <linux/gpio.h>
21#include <linux/irq.h> 21#include <linux/irq.h>
22#include <linux/clk.h>
22#include <mach/urquell.h> 23#include <mach/urquell.h>
23#include <cpu/sh7786.h> 24#include <cpu/sh7786.h>
24#include <asm/heartbeat.h> 25#include <asm/heartbeat.h>
@@ -50,26 +51,17 @@
50 */ 51 */
51 52
52/* HeartBeat */ 53/* HeartBeat */
53static struct resource heartbeat_resources[] = { 54static struct resource heartbeat_resource = {
54 [0] = { 55 .start = BOARDREG(SLEDR),
55 .start = BOARDREG(SLEDR), 56 .end = BOARDREG(SLEDR),
56 .end = BOARDREG(SLEDR), 57 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
57 .flags = IORESOURCE_MEM,
58 },
59};
60
61static struct heartbeat_data heartbeat_data = {
62 .regsize = 16,
63}; 58};
64 59
65static struct platform_device heartbeat_device = { 60static struct platform_device heartbeat_device = {
66 .name = "heartbeat", 61 .name = "heartbeat",
67 .id = -1, 62 .id = -1,
68 .dev = { 63 .num_resources = 1,
69 .platform_data = &heartbeat_data, 64 .resource = &heartbeat_resource,
70 },
71 .num_resources = ARRAY_SIZE(heartbeat_resources),
72 .resource = heartbeat_resources,
73}; 65};
74 66
75/* LAN91C111 */ 67/* LAN91C111 */
@@ -184,6 +176,27 @@ static int urquell_mode_pins(void)
184 return __raw_readw(UBOARDREG(MDSWMR)); 176 return __raw_readw(UBOARDREG(MDSWMR));
185} 177}
186 178
179static int urquell_clk_init(void)
180{
181 struct clk *clk;
182 int ret;
183
184 /*
185 * Only handle the EXTAL case, anyone interfacing a crystal
186 * resonator will need to provide their own input clock.
187 */
188 if (test_mode_pin(MODE_PIN9))
189 return -EINVAL;
190
191 clk = clk_get(NULL, "extal");
192 if (!clk || IS_ERR(clk))
193 return PTR_ERR(clk);
194 ret = clk_set_rate(clk, 33333333);
195 clk_put(clk);
196
197 return ret;
198}
199
187/* Initialize the board */ 200/* Initialize the board */
188static void __init urquell_setup(char **cmdline_p) 201static void __init urquell_setup(char **cmdline_p)
189{ 202{
@@ -200,4 +213,5 @@ static struct sh_machine_vector mv_urquell __initmv = {
200 .mv_setup = urquell_setup, 213 .mv_setup = urquell_setup,
201 .mv_init_irq = urquell_init_irq, 214 .mv_init_irq = urquell_init_irq,
202 .mv_mode_pins = urquell_mode_pins, 215 .mv_mode_pins = urquell_mode_pins,
216 .mv_clk_init = urquell_clk_init,
203}; 217};
diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c
index 1f5fa5c44f6..57e37e28420 100644
--- a/arch/sh/boards/mach-ap325rxa/setup.c
+++ b/arch/sh/boards/mach-ap325rxa/setup.c
@@ -159,21 +159,21 @@ static void ap320_wvga_power_on(void *board_data)
159 msleep(100); 159 msleep(100);
160 160
161 /* ASD AP-320/325 LCD ON */ 161 /* ASD AP-320/325 LCD ON */
162 ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG); 162 __raw_writew(FPGA_LCDREG_VAL, FPGA_LCDREG);
163 163
164 /* backlight */ 164 /* backlight */
165 gpio_set_value(GPIO_PTS3, 0); 165 gpio_set_value(GPIO_PTS3, 0);
166 ctrl_outw(0x100, FPGA_BKLREG); 166 __raw_writew(0x100, FPGA_BKLREG);
167} 167}
168 168
169static void ap320_wvga_power_off(void *board_data) 169static void ap320_wvga_power_off(void *board_data)
170{ 170{
171 /* backlight */ 171 /* backlight */
172 ctrl_outw(0, FPGA_BKLREG); 172 __raw_writew(0, FPGA_BKLREG);
173 gpio_set_value(GPIO_PTS3, 1); 173 gpio_set_value(GPIO_PTS3, 1);
174 174
175 /* ASD AP-320/325 LCD OFF */ 175 /* ASD AP-320/325 LCD OFF */
176 ctrl_outw(0, FPGA_LCDREG); 176 __raw_writew(0, FPGA_LCDREG);
177} 177}
178 178
179static struct sh_mobile_lcdc_info lcdc_info = { 179static struct sh_mobile_lcdc_info lcdc_info = {
@@ -420,7 +420,7 @@ static struct resource sdhi0_cn3_resources[] = {
420 .flags = IORESOURCE_MEM, 420 .flags = IORESOURCE_MEM,
421 }, 421 },
422 [1] = { 422 [1] = {
423 .start = 101, 423 .start = 100,
424 .flags = IORESOURCE_IRQ, 424 .flags = IORESOURCE_IRQ,
425 }, 425 },
426}; 426};
@@ -443,7 +443,7 @@ static struct resource sdhi1_cn7_resources[] = {
443 .flags = IORESOURCE_MEM, 443 .flags = IORESOURCE_MEM,
444 }, 444 },
445 [1] = { 445 [1] = {
446 .start = 24, 446 .start = 23,
447 .flags = IORESOURCE_IRQ, 447 .flags = IORESOURCE_IRQ,
448 }, 448 },
449}; 449};
@@ -471,8 +471,8 @@ static struct i2c_board_info ap325rxa_i2c_camera[] = {
471}; 471};
472 472
473static struct ov772x_camera_info ov7725_info = { 473static struct ov772x_camera_info ov7725_info = {
474 .buswidth = SOCAM_DATAWIDTH_8, 474 .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP | \
475 .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP, 475 OV772X_FLAG_8BIT,
476 .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0), 476 .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0),
477}; 477};
478 478
@@ -595,7 +595,7 @@ static int __init ap325rxa_devices_setup(void)
595 gpio_request(GPIO_PTZ4, NULL); 595 gpio_request(GPIO_PTZ4, NULL);
596 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */ 596 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
597 597
598 ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB); 598 __raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
599 599
600 /* FLCTL */ 600 /* FLCTL */
601 gpio_request(GPIO_FN_FCE, NULL); 601 gpio_request(GPIO_FN_FCE, NULL);
@@ -613,9 +613,9 @@ static int __init ap325rxa_devices_setup(void)
613 gpio_request(GPIO_FN_FWE, NULL); 613 gpio_request(GPIO_FN_FWE, NULL);
614 gpio_request(GPIO_FN_FRB, NULL); 614 gpio_request(GPIO_FN_FRB, NULL);
615 615
616 ctrl_outw(0, PORT_HIZCRC); 616 __raw_writew(0, PORT_HIZCRC);
617 ctrl_outw(0xFFFF, PORT_DRVCRA); 617 __raw_writew(0xFFFF, PORT_DRVCRA);
618 ctrl_outw(0xFFFF, PORT_DRVCRB); 618 __raw_writew(0xFFFF, PORT_DRVCRB);
619 619
620 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20); 620 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
621 621
diff --git a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c
index 33f77085631..1394b078db3 100644
--- a/arch/sh/boards/mach-cayman/irq.c
+++ b/arch/sh/boards/mach-cayman/irq.c
@@ -66,9 +66,9 @@ static void enable_cayman_irq(unsigned int irq)
66 reg = EPLD_MASK_BASE + ((irq / 8) << 2); 66 reg = EPLD_MASK_BASE + ((irq / 8) << 2);
67 bit = 1<<(irq % 8); 67 bit = 1<<(irq % 8);
68 local_irq_save(flags); 68 local_irq_save(flags);
69 mask = ctrl_inl(reg); 69 mask = __raw_readl(reg);
70 mask |= bit; 70 mask |= bit;
71 ctrl_outl(mask, reg); 71 __raw_writel(mask, reg);
72 local_irq_restore(flags); 72 local_irq_restore(flags);
73} 73}
74 74
@@ -83,9 +83,9 @@ void disable_cayman_irq(unsigned int irq)
83 reg = EPLD_MASK_BASE + ((irq / 8) << 2); 83 reg = EPLD_MASK_BASE + ((irq / 8) << 2);
84 bit = 1<<(irq % 8); 84 bit = 1<<(irq % 8);
85 local_irq_save(flags); 85 local_irq_save(flags);
86 mask = ctrl_inl(reg); 86 mask = __raw_readl(reg);
87 mask &= ~bit; 87 mask &= ~bit;
88 ctrl_outl(mask, reg); 88 __raw_writel(mask, reg);
89 local_irq_restore(flags); 89 local_irq_restore(flags);
90} 90}
91 91
@@ -109,8 +109,8 @@ int cayman_irq_demux(int evt)
109 unsigned long status; 109 unsigned long status;
110 int i; 110 int i;
111 111
112 status = ctrl_inl(EPLD_STATUS_BASE) & 112 status = __raw_readl(EPLD_STATUS_BASE) &
113 ctrl_inl(EPLD_MASK_BASE) & 0xff; 113 __raw_readl(EPLD_MASK_BASE) & 0xff;
114 if (status == 0) { 114 if (status == 0) {
115 irq = -1; 115 irq = -1;
116 } else { 116 } else {
@@ -126,8 +126,8 @@ int cayman_irq_demux(int evt)
126 unsigned long status; 126 unsigned long status;
127 int i; 127 int i;
128 128
129 status = ctrl_inl(EPLD_STATUS_BASE + 3 * sizeof(u32)) & 129 status = __raw_readl(EPLD_STATUS_BASE + 3 * sizeof(u32)) &
130 ctrl_inl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff; 130 __raw_readl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff;
131 if (status == 0) { 131 if (status == 0) {
132 irq = -1; 132 irq = -1;
133 } else { 133 } else {
diff --git a/arch/sh/boards/mach-dreamcast/irq.c b/arch/sh/boards/mach-dreamcast/irq.c
index f55fc8e795e..d932667410a 100644
--- a/arch/sh/boards/mach-dreamcast/irq.c
+++ b/arch/sh/boards/mach-dreamcast/irq.c
@@ -135,3 +135,30 @@ int systemasic_irq_demux(int irq)
135 /* Not reached */ 135 /* Not reached */
136 return irq; 136 return irq;
137} 137}
138
139void systemasic_irq_init(void)
140{
141 int i, nid = cpu_to_node(boot_cpu_data);
142
143 /* Assign all virtual IRQs to the System ASIC int. handler */
144 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) {
145 unsigned int irq;
146
147 irq = create_irq_nr(i, nid);
148 if (unlikely(irq == 0)) {
149 pr_err("%s: failed hooking irq %d for systemasic\n",
150 __func__, i);
151 return;
152 }
153
154 if (unlikely(irq != i)) {
155 pr_err("%s: got irq %d but wanted %d, bailing.\n",
156 __func__, irq, i);
157 destroy_irq(irq);
158 return;
159 }
160
161 set_irq_chip_and_handler(i, &systemasic_int,
162 handle_level_irq);
163 }
164}
diff --git a/arch/sh/boards/mach-dreamcast/rtc.c b/arch/sh/boards/mach-dreamcast/rtc.c
index a7433685798..061d65714fc 100644
--- a/arch/sh/boards/mach-dreamcast/rtc.c
+++ b/arch/sh/boards/mach-dreamcast/rtc.c
@@ -35,11 +35,11 @@ static void aica_rtc_gettimeofday(struct timespec *ts)
35 unsigned long val1, val2; 35 unsigned long val1, val2;
36 36
37 do { 37 do {
38 val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | 38 val1 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
39 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); 39 (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
40 40
41 val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | 41 val2 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
42 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); 42 (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
43 } while (val1 != val2); 43 } while (val1 != val2);
44 44
45 ts->tv_sec = val1 - TWENTY_YEARS; 45 ts->tv_sec = val1 - TWENTY_YEARS;
@@ -60,14 +60,14 @@ static int aica_rtc_settimeofday(const time_t secs)
60 unsigned long adj = secs + TWENTY_YEARS; 60 unsigned long adj = secs + TWENTY_YEARS;
61 61
62 do { 62 do {
63 ctrl_outl((adj & 0xffff0000) >> 16, AICA_RTC_SECS_H); 63 __raw_writel((adj & 0xffff0000) >> 16, AICA_RTC_SECS_H);
64 ctrl_outl((adj & 0xffff), AICA_RTC_SECS_L); 64 __raw_writel((adj & 0xffff), AICA_RTC_SECS_L);
65 65
66 val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | 66 val1 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
67 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); 67 (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
68 68
69 val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | 69 val2 = ((__raw_readl(AICA_RTC_SECS_H) & 0xffff) << 16) |
70 (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); 70 (__raw_readl(AICA_RTC_SECS_L) & 0xffff);
71 } while (val1 != val2); 71 } while (val1 != val2);
72 72
73 return 0; 73 return 0;
diff --git a/arch/sh/boards/mach-dreamcast/setup.c b/arch/sh/boards/mach-dreamcast/setup.c
index a4b7402d617..ad1a4db72e0 100644
--- a/arch/sh/boards/mach-dreamcast/setup.c
+++ b/arch/sh/boards/mach-dreamcast/setup.c
@@ -28,25 +28,8 @@
28#include <asm/machvec.h> 28#include <asm/machvec.h>
29#include <mach/sysasic.h> 29#include <mach/sysasic.h>
30 30
31extern struct irq_chip systemasic_int;
32extern void aica_time_init(void);
33extern int systemasic_irq_demux(int);
34
35static void __init dreamcast_setup(char **cmdline_p) 31static void __init dreamcast_setup(char **cmdline_p)
36{ 32{
37 int i;
38
39 /* Mask all hardware events */
40 /* XXX */
41
42 /* Acknowledge any previous events */
43 /* XXX */
44
45 /* Assign all virtual IRQs to the System ASIC int. handler */
46 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
47 set_irq_chip_and_handler(i, &systemasic_int,
48 handle_level_irq);
49
50 board_time_init = aica_time_init; 33 board_time_init = aica_time_init;
51} 34}
52 35
@@ -54,4 +37,5 @@ static struct sh_machine_vector mv_dreamcast __initmv = {
54 .mv_name = "Sega Dreamcast", 37 .mv_name = "Sega Dreamcast",
55 .mv_setup = dreamcast_setup, 38 .mv_setup = dreamcast_setup,
56 .mv_irq_demux = systemasic_irq_demux, 39 .mv_irq_demux = systemasic_irq_demux,
40 .mv_init_irq = systemasic_irq_init,
57}; 41};
diff --git a/arch/sh/boards/mach-ecovec24/sdram.S b/arch/sh/boards/mach-ecovec24/sdram.S
index 83344004440..3963c6f23d5 100644
--- a/arch/sh/boards/mach-ecovec24/sdram.S
+++ b/arch/sh/boards/mach-ecovec24/sdram.S
@@ -37,6 +37,10 @@ ENTRY(ecovec24_sdram_enter_end)
37 .balign 4 37 .balign 4
38ENTRY(ecovec24_sdram_leave_start) 38ENTRY(ecovec24_sdram_leave_start)
39 39
40 mov.l @(SH_SLEEP_MODE, r5), r0
41 tst #SUSP_SH_RSTANDBY, r0
42 bf resume_rstandby
43
40 /* DBSC: put memory in auto-refresh mode */ 44 /* DBSC: put memory in auto-refresh mode */
41 45
42 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */ 46 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
@@ -49,4 +53,59 @@ ENTRY(ecovec24_sdram_leave_start)
49 rts 53 rts
50 nop 54 nop
51 55
56resume_rstandby:
57
58 /* DBSC: re-initialize and put in auto-refresh */
59
60 ED 0xFD000108, 0x00000181 /* DBPDCNT0 */
61 ED 0xFD000020, 0x015B0002 /* DBCONF */
62 ED 0xFD000030, 0x03071502 /* DBTR0 */
63 ED 0xFD000034, 0x02020102 /* DBTR1 */
64 ED 0xFD000038, 0x01090405 /* DBTR2 */
65 ED 0xFD00003C, 0x00000002 /* DBTR3 */
66 ED 0xFD000008, 0x00000005 /* DBKIND */
67 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
68 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
69 ED 0xFD000018, 0x00000001 /* DBCKECNT */
70
71 mov #100,r0
72WAIT_400NS:
73 dt r0
74 bf WAIT_400NS
75
76 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
77 ED 0xFD000060, 0x00020000 /* DBMRCNT (EMR2) */
78 ED 0xFD000060, 0x00030000 /* DBMRCNT (EMR3) */
79 ED 0xFD000060, 0x00010004 /* DBMRCNT (EMR) */
80 ED 0xFD000060, 0x00000532 /* DBMRCNT (MRS) */
81 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
82 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
83 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
84 ED 0xFD000060, 0x00000432 /* DBMRCNT (MRS) */
85 ED 0xFD000060, 0x000103c0 /* DBMRCNT (EMR) */
86 ED 0xFD000060, 0x00010040 /* DBMRCNT (EMR) */
87
88 mov #100,r0
89WAIT_400NS_2:
90 dt r0
91 bf WAIT_400NS_2
92
93 ED 0xFD000010, 0x00000001 /* DBEN */
94 ED 0xFD000044, 0x0000050f /* DBRFPDN1 */
95 ED 0xFD000048, 0x236800e6 /* DBRFPDN2 */
96
97 mov.l DUMMY,r0
98 mov.l @r0, r1 /* force single dummy read */
99
100 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
101 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
102 ED 0xFD000108, 0x00000080 /* DBPDCNT0 */
103 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
104
105 rts
106 nop
107
108 .balign 4
109DUMMY: .long 0xac400000
110
52ENTRY(ecovec24_sdram_leave_end) 111ENTRY(ecovec24_sdram_leave_end)
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 5c246289b4f..39ed8722d11 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -64,18 +64,16 @@
64 64
65/* Heartbeat */ 65/* Heartbeat */
66static unsigned char led_pos[] = { 0, 1, 2, 3 }; 66static unsigned char led_pos[] = { 0, 1, 2, 3 };
67
67static struct heartbeat_data heartbeat_data = { 68static struct heartbeat_data heartbeat_data = {
68 .regsize = 8,
69 .nr_bits = 4, 69 .nr_bits = 4,
70 .bit_pos = led_pos, 70 .bit_pos = led_pos,
71}; 71};
72 72
73static struct resource heartbeat_resources[] = { 73static struct resource heartbeat_resource = {
74 [0] = { 74 .start = 0xA405012C, /* PTG */
75 .start = 0xA405012C, /* PTG */ 75 .end = 0xA405012E - 1,
76 .end = 0xA405012E - 1, 76 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
77 .flags = IORESOURCE_MEM,
78 },
79}; 77};
80 78
81static struct platform_device heartbeat_device = { 79static struct platform_device heartbeat_device = {
@@ -84,8 +82,8 @@ static struct platform_device heartbeat_device = {
84 .dev = { 82 .dev = {
85 .platform_data = &heartbeat_data, 83 .platform_data = &heartbeat_data,
86 }, 84 },
87 .num_resources = ARRAY_SIZE(heartbeat_resources), 85 .num_resources = 1,
88 .resource = heartbeat_resources, 86 .resource = &heartbeat_resource,
89}; 87};
90 88
91/* MTD */ 89/* MTD */
@@ -455,7 +453,7 @@ static struct resource sdhi0_resources[] = {
455 .flags = IORESOURCE_MEM, 453 .flags = IORESOURCE_MEM,
456 }, 454 },
457 [1] = { 455 [1] = {
458 .start = 101, 456 .start = 100,
459 .flags = IORESOURCE_IRQ, 457 .flags = IORESOURCE_IRQ,
460 }, 458 },
461}; 459};
@@ -491,7 +489,7 @@ static struct resource sdhi1_resources[] = {
491 .flags = IORESOURCE_MEM, 489 .flags = IORESOURCE_MEM,
492 }, 490 },
493 [1] = { 491 [1] = {
494 .start = 24, 492 .start = 23,
495 .flags = IORESOURCE_IRQ, 493 .flags = IORESOURCE_IRQ,
496 }, 494 },
497}; 495};
@@ -698,13 +696,13 @@ static struct platform_device camera_devices[] = {
698#define FCLKBCR 0xa415000c 696#define FCLKBCR 0xa415000c
699static void fsimck_init(struct clk *clk) 697static void fsimck_init(struct clk *clk)
700{ 698{
701 u32 status = ctrl_inl(clk->enable_reg); 699 u32 status = __raw_readl(clk->enable_reg);
702 700
703 /* use external clock */ 701 /* use external clock */
704 status &= ~0x000000ff; 702 status &= ~0x000000ff;
705 status |= 0x00000080; 703 status |= 0x00000080;
706 704
707 ctrl_outl(status, clk->enable_reg); 705 __raw_writel(status, clk->enable_reg);
708} 706}
709 707
710static struct clk_ops fsimck_clk_ops = { 708static struct clk_ops fsimck_clk_ops = {
@@ -753,6 +751,26 @@ static struct platform_device fsi_device = {
753 }, 751 },
754}; 752};
755 753
754/* IrDA */
755static struct resource irda_resources[] = {
756 [0] = {
757 .name = "IrDA",
758 .start = 0xA45D0000,
759 .end = 0xA45D0049,
760 .flags = IORESOURCE_MEM,
761 },
762 [1] = {
763 .start = 20,
764 .flags = IORESOURCE_IRQ,
765 },
766};
767
768static struct platform_device irda_device = {
769 .name = "sh_sir",
770 .num_resources = ARRAY_SIZE(irda_resources),
771 .resource = irda_resources,
772};
773
756static struct platform_device *ecovec_devices[] __initdata = { 774static struct platform_device *ecovec_devices[] __initdata = {
757 &heartbeat_device, 775 &heartbeat_device,
758 &nor_flash_device, 776 &nor_flash_device,
@@ -773,8 +791,10 @@ static struct platform_device *ecovec_devices[] __initdata = {
773 &camera_devices[1], 791 &camera_devices[1],
774 &camera_devices[2], 792 &camera_devices[2],
775 &fsi_device, 793 &fsi_device,
794 &irda_device,
776}; 795};
777 796
797#ifdef CONFIG_I2C
778#define EEPROM_ADDR 0x50 798#define EEPROM_ADDR 0x50
779static u8 mac_read(struct i2c_adapter *a, u8 command) 799static u8 mac_read(struct i2c_adapter *a, u8 command)
780{ 800{
@@ -817,6 +837,12 @@ static void __init sh_eth_init(struct sh_eth_plat_data *pd)
817 msleep(10); 837 msleep(10);
818 } 838 }
819} 839}
840#else
841static void __init sh_eth_init(struct sh_eth_plat_data *pd)
842{
843 pr_err("unable to read sh_eth MAC address\n");
844}
845#endif
820 846
821#define PORT_HIZA 0xA4050158 847#define PORT_HIZA 0xA4050158
822#define IODRIVEA 0xA405018A 848#define IODRIVEA 0xA405018A
@@ -831,7 +857,8 @@ static int __init arch_setup(void)
831 struct clk *clk; 857 struct clk *clk;
832 858
833 /* register board specific self-refresh code */ 859 /* register board specific self-refresh code */
834 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF, 860 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
861 SUSP_SH_RSTANDBY,
835 &ecovec24_sdram_enter_start, 862 &ecovec24_sdram_enter_start,
836 &ecovec24_sdram_enter_end, 863 &ecovec24_sdram_enter_end,
837 &ecovec24_sdram_leave_start, 864 &ecovec24_sdram_leave_start,
@@ -855,7 +882,7 @@ static int __init arch_setup(void)
855 gpio_direction_output(GPIO_PTG1, 0); 882 gpio_direction_output(GPIO_PTG1, 0);
856 gpio_direction_output(GPIO_PTG2, 0); 883 gpio_direction_output(GPIO_PTG2, 0);
857 gpio_direction_output(GPIO_PTG3, 0); 884 gpio_direction_output(GPIO_PTG3, 0);
858 ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); 885 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
859 886
860 /* enable SH-Eth */ 887 /* enable SH-Eth */
861 gpio_request(GPIO_PTA1, NULL); 888 gpio_request(GPIO_PTA1, NULL);
@@ -875,16 +902,16 @@ static int __init arch_setup(void)
875 gpio_request(GPIO_FN_LNKSTA, NULL); 902 gpio_request(GPIO_FN_LNKSTA, NULL);
876 903
877 /* enable USB */ 904 /* enable USB */
878 ctrl_outw(0x0000, 0xA4D80000); 905 __raw_writew(0x0000, 0xA4D80000);
879 ctrl_outw(0x0000, 0xA4D90000); 906 __raw_writew(0x0000, 0xA4D90000);
880 gpio_request(GPIO_PTB3, NULL); 907 gpio_request(GPIO_PTB3, NULL);
881 gpio_request(GPIO_PTB4, NULL); 908 gpio_request(GPIO_PTB4, NULL);
882 gpio_request(GPIO_PTB5, NULL); 909 gpio_request(GPIO_PTB5, NULL);
883 gpio_direction_input(GPIO_PTB3); 910 gpio_direction_input(GPIO_PTB3);
884 gpio_direction_output(GPIO_PTB4, 0); 911 gpio_direction_output(GPIO_PTB4, 0);
885 gpio_direction_output(GPIO_PTB5, 0); 912 gpio_direction_output(GPIO_PTB5, 0);
886 ctrl_outw(0x0600, 0xa40501d4); 913 __raw_writew(0x0600, 0xa40501d4);
887 ctrl_outw(0x0600, 0xa4050192); 914 __raw_writew(0x0600, 0xa4050192);
888 915
889 if (gpio_get_value(GPIO_PTB3)) { 916 if (gpio_get_value(GPIO_PTB3)) {
890 printk(KERN_INFO "USB1 function is selected\n"); 917 printk(KERN_INFO "USB1 function is selected\n");
@@ -925,7 +952,7 @@ static int __init arch_setup(void)
925 gpio_request(GPIO_FN_LCDVSYN, NULL); 952 gpio_request(GPIO_FN_LCDVSYN, NULL);
926 gpio_request(GPIO_FN_LCDDON, NULL); 953 gpio_request(GPIO_FN_LCDDON, NULL);
927 gpio_request(GPIO_FN_LCDLCLK, NULL); 954 gpio_request(GPIO_FN_LCDLCLK, NULL);
928 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA); 955 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
929 956
930 gpio_request(GPIO_PTE6, NULL); 957 gpio_request(GPIO_PTE6, NULL);
931 gpio_request(GPIO_PTU1, NULL); 958 gpio_request(GPIO_PTU1, NULL);
@@ -937,7 +964,7 @@ static int __init arch_setup(void)
937 gpio_direction_output(GPIO_PTA2, 0); 964 gpio_direction_output(GPIO_PTA2, 0);
938 965
939 /* I/O buffer drive ability is high */ 966 /* I/O buffer drive ability is high */
940 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA); 967 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
941 968
942 if (gpio_get_value(GPIO_PTE6)) { 969 if (gpio_get_value(GPIO_PTE6)) {
943 /* DVI */ 970 /* DVI */
@@ -1069,7 +1096,7 @@ static int __init arch_setup(void)
1069 gpio_direction_output(GPIO_PTB7, 0); 1096 gpio_direction_output(GPIO_PTB7, 0);
1070 1097
1071 /* I/O buffer drive ability is high for SDHI1 */ 1098 /* I/O buffer drive ability is high for SDHI1 */
1072 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); 1099 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
1073#else 1100#else
1074 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */ 1101 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1075 gpio_request(GPIO_FN_MSIOF0_TXD, NULL); 1102 gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
@@ -1107,6 +1134,11 @@ static int __init arch_setup(void)
1107 gpio_request(GPIO_FN_FSIOBLRCK, NULL); 1134 gpio_request(GPIO_FN_FSIOBLRCK, NULL);
1108 gpio_request(GPIO_FN_CLKAUDIOBO, NULL); 1135 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
1109 1136
1137 /* set SPU2 clock to 83.4 MHz */
1138 clk = clk_get(NULL, "spu_clk");
1139 clk_set_rate(clk, clk_round_rate(clk, 83333333));
1140 clk_put(clk);
1141
1110 /* change parent of FSI B */ 1142 /* change parent of FSI B */
1111 clk = clk_get(NULL, "fsib_clk"); 1143 clk = clk_get(NULL, "fsib_clk");
1112 clk_register(&fsimckb_clk); 1144 clk_register(&fsimckb_clk);
@@ -1123,6 +1155,17 @@ static int __init arch_setup(void)
1123 gpio_request(GPIO_FN_INTC_IRQ1, NULL); 1155 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1124 gpio_direction_input(GPIO_FN_INTC_IRQ1); 1156 gpio_direction_input(GPIO_FN_INTC_IRQ1);
1125 1157
1158 /* set VPU clock to 166 MHz */
1159 clk = clk_get(NULL, "vpu_clk");
1160 clk_set_rate(clk, clk_round_rate(clk, 166000000));
1161 clk_put(clk);
1162
1163 /* enable IrDA */
1164 gpio_request(GPIO_FN_IRDA_OUT, NULL);
1165 gpio_request(GPIO_FN_IRDA_IN, NULL);
1166 gpio_request(GPIO_PTU5, NULL);
1167 gpio_direction_output(GPIO_PTU5, 0);
1168
1126 /* enable I2C device */ 1169 /* enable I2C device */
1127 i2c_register_board_info(0, i2c0_devices, 1170 i2c_register_board_info(0, i2c0_devices,
1128 ARRAY_SIZE(i2c0_devices)); 1171 ARRAY_SIZE(i2c0_devices));
diff --git a/arch/sh/boards/mach-highlander/irq-r7780mp.c b/arch/sh/boards/mach-highlander/irq-r7780mp.c
index 83c28bcd4d2..9893fd3a135 100644
--- a/arch/sh/boards/mach-highlander/irq-r7780mp.c
+++ b/arch/sh/boards/mach-highlander/irq-r7780mp.c
@@ -64,7 +64,7 @@ static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
64 64
65unsigned char * __init highlander_plat_irq_setup(void) 65unsigned char * __init highlander_plat_irq_setup(void)
66{ 66{
67 if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) { 67 if ((__raw_readw(0xa4000700) & 0xf000) == 0x2000) {
68 printk(KERN_INFO "Using r7780mp interrupt controller.\n"); 68 printk(KERN_INFO "Using r7780mp interrupt controller.\n");
69 register_intc_controller(&intc_desc); 69 register_intc_controller(&intc_desc);
70 return irl2irq; 70 return irl2irq;
diff --git a/arch/sh/boards/mach-highlander/irq-r7780rp.c b/arch/sh/boards/mach-highlander/irq-r7780rp.c
index b721e86b5af..0805b215145 100644
--- a/arch/sh/boards/mach-highlander/irq-r7780rp.c
+++ b/arch/sh/boards/mach-highlander/irq-r7780rp.c
@@ -57,7 +57,7 @@ static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors,
57 57
58unsigned char * __init highlander_plat_irq_setup(void) 58unsigned char * __init highlander_plat_irq_setup(void)
59{ 59{
60 if (ctrl_inw(0xa5000600)) { 60 if (__raw_readw(0xa5000600)) {
61 printk(KERN_INFO "Using r7780rp interrupt controller.\n"); 61 printk(KERN_INFO "Using r7780rp interrupt controller.\n");
62 register_intc_controller(&intc_desc); 62 register_intc_controller(&intc_desc);
63 return irl2irq; 63 return irl2irq;
diff --git a/arch/sh/boards/mach-highlander/irq-r7785rp.c b/arch/sh/boards/mach-highlander/irq-r7785rp.c
index 3811b060a39..558b2486277 100644
--- a/arch/sh/boards/mach-highlander/irq-r7785rp.c
+++ b/arch/sh/boards/mach-highlander/irq-r7785rp.c
@@ -66,20 +66,20 @@ static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
66 66
67unsigned char * __init highlander_plat_irq_setup(void) 67unsigned char * __init highlander_plat_irq_setup(void)
68{ 68{
69 if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000) 69 if ((__raw_readw(0xa4000158) & 0xf000) != 0x1000)
70 return NULL; 70 return NULL;
71 71
72 printk(KERN_INFO "Using r7785rp interrupt controller.\n"); 72 printk(KERN_INFO "Using r7785rp interrupt controller.\n");
73 73
74 ctrl_outw(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */ 74 __raw_writew(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */
75 75
76 /* Setup the FPGA IRL */ 76 /* Setup the FPGA IRL */
77 ctrl_outw(0x0000, PA_IRLPRA); /* FPGA IRLA */ 77 __raw_writew(0x0000, PA_IRLPRA); /* FPGA IRLA */
78 ctrl_outw(0xe598, PA_IRLPRB); /* FPGA IRLB */ 78 __raw_writew(0xe598, PA_IRLPRB); /* FPGA IRLB */
79 ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */ 79 __raw_writew(0x7060, PA_IRLPRC); /* FPGA IRLC */
80 ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */ 80 __raw_writew(0x0000, PA_IRLPRD); /* FPGA IRLD */
81 ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */ 81 __raw_writew(0x4321, PA_IRLPRE); /* FPGA IRLE */
82 ctrl_outw(0xdcba, PA_IRLPRF); /* FPGA IRLF */ 82 __raw_writew(0xdcba, PA_IRLPRF); /* FPGA IRLF */
83 83
84 register_intc_controller(&intc_desc); 84 register_intc_controller(&intc_desc);
85 return irl2irq; 85 return irl2irq;
diff --git a/arch/sh/boards/mach-highlander/psw.c b/arch/sh/boards/mach-highlander/psw.c
index 37b1a2ee71a..522786318d3 100644
--- a/arch/sh/boards/mach-highlander/psw.c
+++ b/arch/sh/boards/mach-highlander/psw.c
@@ -24,7 +24,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
24 unsigned int l, mask; 24 unsigned int l, mask;
25 int ret = 0; 25 int ret = 0;
26 26
27 l = ctrl_inw(PA_DBSW); 27 l = __raw_readw(PA_DBSW);
28 28
29 /* Nothing to do if there's no state change */ 29 /* Nothing to do if there's no state change */
30 if (psw->state) { 30 if (psw->state) {
@@ -45,7 +45,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
45out: 45out:
46 /* Clear the switch IRQs */ 46 /* Clear the switch IRQs */
47 l |= (0x7 << 12); 47 l |= (0x7 << 12);
48 ctrl_outw(l, PA_DBSW); 48 __raw_writew(l, PA_DBSW);
49 49
50 return IRQ_RETVAL(ret); 50 return IRQ_RETVAL(ret);
51} 51}
diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c
index f663c14d888..affd66747ba 100644
--- a/arch/sh/boards/mach-highlander/setup.c
+++ b/arch/sh/boards/mach-highlander/setup.c
@@ -311,13 +311,13 @@ device_initcall(r7780rp_devices_setup);
311 */ 311 */
312static int ivdr_clk_enable(struct clk *clk) 312static int ivdr_clk_enable(struct clk *clk)
313{ 313{
314 ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL); 314 __raw_writew(__raw_readw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL);
315 return 0; 315 return 0;
316} 316}
317 317
318static void ivdr_clk_disable(struct clk *clk) 318static void ivdr_clk_disable(struct clk *clk)
319{ 319{
320 ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL); 320 __raw_writew(__raw_readw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL);
321} 321}
322 322
323static struct clk_ops ivdr_clk_ops = { 323static struct clk_ops ivdr_clk_ops = {
@@ -337,7 +337,7 @@ static struct clk *r7780rp_clocks[] = {
337static void r7780rp_power_off(void) 337static void r7780rp_power_off(void)
338{ 338{
339 if (mach_is_r7780mp() || mach_is_r7785rp()) 339 if (mach_is_r7780mp() || mach_is_r7785rp())
340 ctrl_outw(0x0001, PA_POFF); 340 __raw_writew(0x0001, PA_POFF);
341} 341}
342 342
343/* 343/*
@@ -345,7 +345,7 @@ static void r7780rp_power_off(void)
345 */ 345 */
346static void __init highlander_setup(char **cmdline_p) 346static void __init highlander_setup(char **cmdline_p)
347{ 347{
348 u16 ver = ctrl_inw(PA_VERREG); 348 u16 ver = __raw_readw(PA_VERREG);
349 int i; 349 int i;
350 350
351 printk(KERN_INFO "Renesas Solutions Highlander %s support.\n", 351 printk(KERN_INFO "Renesas Solutions Highlander %s support.\n",
@@ -370,12 +370,12 @@ static void __init highlander_setup(char **cmdline_p)
370 clk_enable(clk); 370 clk_enable(clk);
371 } 371 }
372 372
373 ctrl_outw(0x0000, PA_OBLED); /* Clear LED. */ 373 __raw_writew(0x0000, PA_OBLED); /* Clear LED. */
374 374
375 if (mach_is_r7780rp()) 375 if (mach_is_r7780rp())
376 ctrl_outw(0x0001, PA_SDPOW); /* SD Power ON */ 376 __raw_writew(0x0001, PA_SDPOW); /* SD Power ON */
377 377
378 ctrl_outw(ctrl_inw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */ 378 __raw_writew(__raw_readw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */
379 379
380 pm_power_off = r7780rp_power_off; 380 pm_power_off = r7780rp_power_off;
381} 381}
diff --git a/arch/sh/boards/mach-hp6xx/hp6xx_apm.c b/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
index e85212faf40..b49535c0ddd 100644
--- a/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
+++ b/arch/sh/boards/mach-hp6xx/hp6xx_apm.c
@@ -53,7 +53,7 @@ static void hp6x0_apm_get_power_status(struct apm_power_info *info)
53 info->ac_line_status = (battery > HP680_BATTERY_AC_ON) ? 53 info->ac_line_status = (battery > HP680_BATTERY_AC_ON) ?
54 APM_AC_ONLINE : APM_AC_OFFLINE; 54 APM_AC_ONLINE : APM_AC_OFFLINE;
55 55
56 pgdr = ctrl_inb(PGDR); 56 pgdr = __raw_readb(PGDR);
57 if (pgdr & PGDR_MAIN_BATTERY_OUT) { 57 if (pgdr & PGDR_MAIN_BATTERY_OUT) {
58 info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT; 58 info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT;
59 info->battery_flag = 0x80; 59 info->battery_flag = 0x80;
diff --git a/arch/sh/boards/mach-hp6xx/pm.c b/arch/sh/boards/mach-hp6xx/pm.c
index d936c1af762..4499a3749d4 100644
--- a/arch/sh/boards/mach-hp6xx/pm.c
+++ b/arch/sh/boards/mach-hp6xx/pm.c
@@ -53,17 +53,17 @@ static void pm_enter(void)
53 sh_wdt_write_cnt(0); 53 sh_wdt_write_cnt(0);
54 54
55 /* disable PLL1 */ 55 /* disable PLL1 */
56 frqcr = ctrl_inw(FRQCR); 56 frqcr = __raw_readw(FRQCR);
57 frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY); 57 frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY);
58 ctrl_outw(frqcr, FRQCR); 58 __raw_writew(frqcr, FRQCR);
59 59
60 /* enable standby */ 60 /* enable standby */
61 stbcr = ctrl_inb(STBCR); 61 stbcr = __raw_readb(STBCR);
62 ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR); 62 __raw_writeb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR);
63 63
64 /* set self-refresh */ 64 /* set self-refresh */
65 mcr = ctrl_inw(MCR); 65 mcr = __raw_readw(MCR);
66 ctrl_outw(mcr & ~MCR_RFSH, MCR); 66 __raw_writew(mcr & ~MCR_RFSH, MCR);
67 67
68 /* set interrupt handler */ 68 /* set interrupt handler */
69 asm volatile("stc vbr, %0" : "=r" (vbr_old)); 69 asm volatile("stc vbr, %0" : "=r" (vbr_old));
@@ -73,8 +73,8 @@ static void pm_enter(void)
73 &wakeup_start, &wakeup_end - &wakeup_start); 73 &wakeup_start, &wakeup_end - &wakeup_start);
74 asm volatile("ldc %0, vbr" : : "r" (vbr_new)); 74 asm volatile("ldc %0, vbr" : : "r" (vbr_new));
75 75
76 ctrl_outw(0, RTCNT); 76 __raw_writew(0, RTCNT);
77 ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR); 77 __raw_writew(mcr | MCR_RFSH | MCR_RMODE, MCR);
78 78
79 cpu_sleep(); 79 cpu_sleep();
80 80
@@ -83,14 +83,14 @@ static void pm_enter(void)
83 free_page(vbr_new); 83 free_page(vbr_new);
84 84
85 /* enable PLL1 */ 85 /* enable PLL1 */
86 frqcr = ctrl_inw(FRQCR); 86 frqcr = __raw_readw(FRQCR);
87 frqcr |= FRQCR_PSTBY; 87 frqcr |= FRQCR_PSTBY;
88 ctrl_outw(frqcr, FRQCR); 88 __raw_writew(frqcr, FRQCR);
89 udelay(50); 89 udelay(50);
90 frqcr |= FRQCR_PLLEN; 90 frqcr |= FRQCR_PLLEN;
91 ctrl_outw(frqcr, FRQCR); 91 __raw_writew(frqcr, FRQCR);
92 92
93 ctrl_outb(stbcr, STBCR); 93 __raw_writeb(stbcr, STBCR);
94 94
95 clear_bl_bit(); 95 clear_bl_bit();
96} 96}
@@ -115,21 +115,21 @@ static int hp6x0_pm_enter(suspend_state_t state)
115 outw(hd64461_stbcr, HD64461_STBCR); 115 outw(hd64461_stbcr, HD64461_STBCR);
116#endif 116#endif
117 117
118 ctrl_outb(0x1f, DACR); 118 __raw_writeb(0x1f, DACR);
119 119
120 stbcr = ctrl_inb(STBCR); 120 stbcr = __raw_readb(STBCR);
121 ctrl_outb(0x01, STBCR); 121 __raw_writeb(0x01, STBCR);
122 122
123 stbcr2 = ctrl_inb(STBCR2); 123 stbcr2 = __raw_readb(STBCR2);
124 ctrl_outb(0x7f , STBCR2); 124 __raw_writeb(0x7f , STBCR2);
125 125
126 outw(0xf07f, HD64461_SCPUCR); 126 outw(0xf07f, HD64461_SCPUCR);
127 127
128 pm_enter(); 128 pm_enter();
129 129
130 outw(0, HD64461_SCPUCR); 130 outw(0, HD64461_SCPUCR);
131 ctrl_outb(stbcr, STBCR); 131 __raw_writeb(stbcr, STBCR);
132 ctrl_outb(stbcr2, STBCR2); 132 __raw_writeb(stbcr2, STBCR2);
133 133
134#ifdef CONFIG_HD64461_ENABLER 134#ifdef CONFIG_HD64461_ENABLER
135 hd64461_stbcr = inw(HD64461_STBCR); 135 hd64461_stbcr = inw(HD64461_STBCR);
diff --git a/arch/sh/boards/mach-hp6xx/setup.c b/arch/sh/boards/mach-hp6xx/setup.c
index e6dd5e96321..8c9add5f4cf 100644
--- a/arch/sh/boards/mach-hp6xx/setup.c
+++ b/arch/sh/boards/mach-hp6xx/setup.c
@@ -149,19 +149,19 @@ static void __init hp6xx_setup(char **cmdline_p)
149 149
150 sh_dac_output(0, DAC_SPEAKER_VOLUME); 150 sh_dac_output(0, DAC_SPEAKER_VOLUME);
151 sh_dac_disable(DAC_SPEAKER_VOLUME); 151 sh_dac_disable(DAC_SPEAKER_VOLUME);
152 v8 = ctrl_inb(DACR); 152 v8 = __raw_readb(DACR);
153 v8 &= ~DACR_DAE; 153 v8 &= ~DACR_DAE;
154 ctrl_outb(v8,DACR); 154 __raw_writeb(v8,DACR);
155 155
156 v8 = ctrl_inb(SCPDR); 156 v8 = __raw_readb(SCPDR);
157 v8 |= SCPDR_TS_SCAN_X | SCPDR_TS_SCAN_Y; 157 v8 |= SCPDR_TS_SCAN_X | SCPDR_TS_SCAN_Y;
158 v8 &= ~SCPDR_TS_SCAN_ENABLE; 158 v8 &= ~SCPDR_TS_SCAN_ENABLE;
159 ctrl_outb(v8, SCPDR); 159 __raw_writeb(v8, SCPDR);
160 160
161 v = ctrl_inw(SCPCR); 161 v = __raw_readw(SCPCR);
162 v &= ~SCPCR_TS_MASK; 162 v &= ~SCPCR_TS_MASK;
163 v |= SCPCR_TS_ENABLE; 163 v |= SCPCR_TS_ENABLE;
164 ctrl_outw(v, SCPCR); 164 __raw_writew(v, SCPCR);
165} 165}
166device_initcall(hp6xx_devices_setup); 166device_initcall(hp6xx_devices_setup);
167 167
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
index 5d7b5d92475..b2cd0ed8664 100644
--- a/arch/sh/boards/mach-kfr2r09/setup.c
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -282,7 +282,7 @@ static int camera_power(struct device *dev, int mode)
282 * use 1.8 V for VccQ_VIO 282 * use 1.8 V for VccQ_VIO
283 * use 2.85V for VccQ_SR 283 * use 2.85V for VccQ_SR
284 */ 284 */
285 ctrl_outw((ctrl_inw(DRVCRB) & ~0x0003) | 0x0001, DRVCRB); 285 __raw_writew((__raw_readw(DRVCRB) & ~0x0003) | 0x0001, DRVCRB);
286 286
287 /* reset clear */ 287 /* reset clear */
288 ret = gpio_request(GPIO_PTB4, NULL); 288 ret = gpio_request(GPIO_PTB4, NULL);
@@ -351,7 +351,7 @@ static struct resource kfr2r09_sh_sdhi0_resources[] = {
351 .flags = IORESOURCE_MEM, 351 .flags = IORESOURCE_MEM,
352 }, 352 },
353 [1] = { 353 [1] = {
354 .start = 101, 354 .start = 100,
355 .flags = IORESOURCE_IRQ, 355 .flags = IORESOURCE_IRQ,
356 }, 356 },
357}; 357};
@@ -492,13 +492,13 @@ static int kfr2r09_usb0_gadget_setup(void)
492 if (kfr2r09_usb0_gadget_i2c_setup() != 0) 492 if (kfr2r09_usb0_gadget_i2c_setup() != 0)
493 return -ENODEV; /* unable to configure using i2c */ 493 return -ENODEV; /* unable to configure using i2c */
494 494
495 ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); 495 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
496 gpio_request(GPIO_FN_PDSTATUS, NULL); /* R-standby disables USB clock */ 496 gpio_request(GPIO_FN_PDSTATUS, NULL); /* R-standby disables USB clock */
497 gpio_request(GPIO_PTV6, NULL); /* USBCLK_ON */ 497 gpio_request(GPIO_PTV6, NULL); /* USBCLK_ON */
498 gpio_direction_output(GPIO_PTV6, 1); /* USBCLK_ON = H */ 498 gpio_direction_output(GPIO_PTV6, 1); /* USBCLK_ON = H */
499 msleep(20); /* wait 20ms to let the clock settle */ 499 msleep(20); /* wait 20ms to let the clock settle */
500 clk_enable(clk_get(NULL, "usb0")); 500 clk_enable(clk_get(NULL, "usb0"));
501 ctrl_outw(0x0600, 0xa40501d4); 501 __raw_writew(0x0600, 0xa40501d4);
502 502
503 return 0; 503 return 0;
504} 504}
@@ -526,12 +526,12 @@ static int __init kfr2r09_devices_setup(void)
526 gpio_direction_output(GPIO_PTG3, 1); /* HPON_ON = H */ 526 gpio_direction_output(GPIO_PTG3, 1); /* HPON_ON = H */
527 527
528 /* setup NOR flash at CS0 */ 528 /* setup NOR flash at CS0 */
529 ctrl_outl(0x36db0400, BSC_CS0BCR); 529 __raw_writel(0x36db0400, BSC_CS0BCR);
530 ctrl_outl(0x00000500, BSC_CS0WCR); 530 __raw_writel(0x00000500, BSC_CS0WCR);
531 531
532 /* setup NAND flash at CS4 */ 532 /* setup NAND flash at CS4 */
533 ctrl_outl(0x36db0400, BSC_CS4BCR); 533 __raw_writel(0x36db0400, BSC_CS4BCR);
534 ctrl_outl(0x00000500, BSC_CS4WCR); 534 __raw_writel(0x00000500, BSC_CS4WCR);
535 535
536 /* setup KEYSC pins */ 536 /* setup KEYSC pins */
537 gpio_request(GPIO_FN_KEYOUT0, NULL); 537 gpio_request(GPIO_FN_KEYOUT0, NULL);
diff --git a/arch/sh/boards/mach-landisk/gio.c b/arch/sh/boards/mach-landisk/gio.c
index 52801318819..01e6abb769b 100644
--- a/arch/sh/boards/mach-landisk/gio.c
+++ b/arch/sh/boards/mach-landisk/gio.c
@@ -76,39 +76,39 @@ static long gio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
76 break; 76 break;
77 77
78 case GIODRV_IOCSGIODATA1: /* write byte */ 78 case GIODRV_IOCSGIODATA1: /* write byte */
79 ctrl_outb((unsigned char)(0x0ff & data), addr); 79 __raw_writeb((unsigned char)(0x0ff & data), addr);
80 break; 80 break;
81 81
82 case GIODRV_IOCSGIODATA2: /* write word */ 82 case GIODRV_IOCSGIODATA2: /* write word */
83 if (addr & 0x01) { 83 if (addr & 0x01) {
84 return -EFAULT; 84 return -EFAULT;
85 } 85 }
86 ctrl_outw((unsigned short int)(0x0ffff & data), addr); 86 __raw_writew((unsigned short int)(0x0ffff & data), addr);
87 break; 87 break;
88 88
89 case GIODRV_IOCSGIODATA4: /* write long */ 89 case GIODRV_IOCSGIODATA4: /* write long */
90 if (addr & 0x03) { 90 if (addr & 0x03) {
91 return -EFAULT; 91 return -EFAULT;
92 } 92 }
93 ctrl_outl(data, addr); 93 __raw_writel(data, addr);
94 break; 94 break;
95 95
96 case GIODRV_IOCGGIODATA1: /* read byte */ 96 case GIODRV_IOCGGIODATA1: /* read byte */
97 data = ctrl_inb(addr); 97 data = __raw_readb(addr);
98 break; 98 break;
99 99
100 case GIODRV_IOCGGIODATA2: /* read word */ 100 case GIODRV_IOCGGIODATA2: /* read word */
101 if (addr & 0x01) { 101 if (addr & 0x01) {
102 return -EFAULT; 102 return -EFAULT;
103 } 103 }
104 data = ctrl_inw(addr); 104 data = __raw_readw(addr);
105 break; 105 break;
106 106
107 case GIODRV_IOCGGIODATA4: /* read long */ 107 case GIODRV_IOCGGIODATA4: /* read long */
108 if (addr & 0x03) { 108 if (addr & 0x03) {
109 return -EFAULT; 109 return -EFAULT;
110 } 110 }
111 data = ctrl_inl(addr); 111 data = __raw_readl(addr);
112 break; 112 break;
113 default: 113 default:
114 return -EFAULT; 114 return -EFAULT;
diff --git a/arch/sh/boards/mach-landisk/irq.c b/arch/sh/boards/mach-landisk/irq.c
index 7b284cde1f5..96f38a4187d 100644
--- a/arch/sh/boards/mach-landisk/irq.c
+++ b/arch/sh/boards/mach-landisk/irq.c
@@ -22,14 +22,14 @@ static void disable_landisk_irq(unsigned int irq)
22{ 22{
23 unsigned char mask = 0xff ^ (0x01 << (irq - 5)); 23 unsigned char mask = 0xff ^ (0x01 << (irq - 5));
24 24
25 ctrl_outb(ctrl_inb(PA_IMASK) & mask, PA_IMASK); 25 __raw_writeb(__raw_readb(PA_IMASK) & mask, PA_IMASK);
26} 26}
27 27
28static void enable_landisk_irq(unsigned int irq) 28static void enable_landisk_irq(unsigned int irq)
29{ 29{
30 unsigned char value = (0x01 << (irq - 5)); 30 unsigned char value = (0x01 << (irq - 5));
31 31
32 ctrl_outb(ctrl_inb(PA_IMASK) | value, PA_IMASK); 32 __raw_writeb(__raw_readb(PA_IMASK) | value, PA_IMASK);
33} 33}
34 34
35static struct irq_chip landisk_irq_chip __read_mostly = { 35static struct irq_chip landisk_irq_chip __read_mostly = {
@@ -52,5 +52,5 @@ void __init init_landisk_IRQ(void)
52 handle_level_irq, "level"); 52 handle_level_irq, "level");
53 enable_landisk_irq(i); 53 enable_landisk_irq(i);
54 } 54 }
55 ctrl_outb(0x00, PA_PWRINT_CLR); 55 __raw_writeb(0x00, PA_PWRINT_CLR);
56} 56}
diff --git a/arch/sh/boards/mach-landisk/psw.c b/arch/sh/boards/mach-landisk/psw.c
index e6b0efa098d..bef83522f95 100644
--- a/arch/sh/boards/mach-landisk/psw.c
+++ b/arch/sh/boards/mach-landisk/psw.c
@@ -25,7 +25,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
25 unsigned int sw_value; 25 unsigned int sw_value;
26 int ret = 0; 26 int ret = 0;
27 27
28 sw_value = (0x0ff & (~ctrl_inb(PA_STATUS))); 28 sw_value = (0x0ff & (~__raw_readb(PA_STATUS)));
29 29
30 /* Nothing to do if there's no state change */ 30 /* Nothing to do if there's no state change */
31 if (psw->state) { 31 if (psw->state) {
@@ -42,7 +42,7 @@ static irqreturn_t psw_irq_handler(int irq, void *arg)
42 42
43out: 43out:
44 /* Clear the switch IRQs */ 44 /* Clear the switch IRQs */
45 ctrl_outb(0x00, PA_PWRINT_CLR); 45 __raw_writeb(0x00, PA_PWRINT_CLR);
46 46
47 return IRQ_RETVAL(ret); 47 return IRQ_RETVAL(ret);
48} 48}
diff --git a/arch/sh/boards/mach-landisk/setup.c b/arch/sh/boards/mach-landisk/setup.c
index db22ea2e6d4..50337acc18c 100644
--- a/arch/sh/boards/mach-landisk/setup.c
+++ b/arch/sh/boards/mach-landisk/setup.c
@@ -25,7 +25,7 @@ void init_landisk_IRQ(void);
25 25
26static void landisk_power_off(void) 26static void landisk_power_off(void)
27{ 27{
28 ctrl_outb(0x01, PA_SHUTDOWN); 28 __raw_writeb(0x01, PA_SHUTDOWN);
29} 29}
30 30
31static struct resource cf_ide_resources[3]; 31static struct resource cf_ide_resources[3];
@@ -63,7 +63,7 @@ static int __init landisk_devices_setup(void)
63 /* open I/O area window */ 63 /* open I/O area window */
64 paddrbase = virt_to_phys((void *)PA_AREA5_IO); 64 paddrbase = virt_to_phys((void *)PA_AREA5_IO);
65 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16); 65 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
66 cf_ide_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot); 66 cf_ide_base = ioremap_prot(paddrbase, PAGE_SIZE, pgprot_val(prot));
67 if (!cf_ide_base) { 67 if (!cf_ide_base) {
68 printk("allocate_cf_area : can't open CF I/O window!\n"); 68 printk("allocate_cf_area : can't open CF I/O window!\n");
69 return -ENOMEM; 69 return -ENOMEM;
@@ -88,7 +88,7 @@ __initcall(landisk_devices_setup);
88static void __init landisk_setup(char **cmdline_p) 88static void __init landisk_setup(char **cmdline_p)
89{ 89{
90 /* LED ON */ 90 /* LED ON */
91 ctrl_outb(ctrl_inb(PA_LED) | 0x03, PA_LED); 91 __raw_writeb(__raw_readb(PA_LED) | 0x03, PA_LED);
92 92
93 printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n"); 93 printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n");
94 pm_power_off = landisk_power_off; 94 pm_power_off = landisk_power_off;
diff --git a/arch/sh/boards/mach-lboxre2/setup.c b/arch/sh/boards/mach-lboxre2/setup.c
index 2b0b5818e1e..79b4e0d77b7 100644
--- a/arch/sh/boards/mach-lboxre2/setup.c
+++ b/arch/sh/boards/mach-lboxre2/setup.c
@@ -56,8 +56,8 @@ static int __init lboxre2_devices_setup(void)
56 /* open I/O area window */ 56 /* open I/O area window */
57 paddrbase = virt_to_phys((void*)PA_AREA5_IO); 57 paddrbase = virt_to_phys((void*)PA_AREA5_IO);
58 psize = PAGE_SIZE; 58 psize = PAGE_SIZE;
59 prot = PAGE_KERNEL_PCC( 1 , _PAGE_PCC_IO16); 59 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
60 cf0_io_base = (u32)p3_ioremap(paddrbase, psize, prot.pgprot); 60 cf0_io_base = (u32)ioremap_prot(paddrbase, psize, pgprot_val(prot));
61 if (!cf0_io_base) { 61 if (!cf0_io_base) {
62 printk(KERN_ERR "%s : can't open CF I/O window!\n" , __func__ ); 62 printk(KERN_ERR "%s : can't open CF I/O window!\n" , __func__ );
63 return -ENOMEM; 63 return -ENOMEM;
diff --git a/arch/sh/boards/mach-microdev/io.c b/arch/sh/boards/mach-microdev/io.c
index 52dd748211c..2960c659020 100644
--- a/arch/sh/boards/mach-microdev/io.c
+++ b/arch/sh/boards/mach-microdev/io.c
@@ -141,10 +141,10 @@ static inline void delay(void)
141#if defined(CONFIG_PCI) 141#if defined(CONFIG_PCI)
142 /* System board present, just make a dummy SRAM access. (CS0 will be 142 /* System board present, just make a dummy SRAM access. (CS0 will be
143 mapped to PCI memory, probably good to avoid it.) */ 143 mapped to PCI memory, probably good to avoid it.) */
144 ctrl_inw(0xa6800000); 144 __raw_readw(0xa6800000);
145#else 145#else
146 /* CS0 will be mapped to flash, ROM etc so safe to access it. */ 146 /* CS0 will be mapped to flash, ROM etc so safe to access it. */
147 ctrl_inw(0xa0000000); 147 __raw_readw(0xa0000000);
148#endif 148#endif
149} 149}
150 150
diff --git a/arch/sh/boards/mach-microdev/irq.c b/arch/sh/boards/mach-microdev/irq.c
index b551963579c..a26d16669aa 100644
--- a/arch/sh/boards/mach-microdev/irq.c
+++ b/arch/sh/boards/mach-microdev/irq.c
@@ -88,7 +88,7 @@ static void disable_microdev_irq(unsigned int irq)
88 fpgaIrq = fpgaIrqTable[irq].fpgaIrq; 88 fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
89 89
90 /* disable interrupts on the FPGA INTC register */ 90 /* disable interrupts on the FPGA INTC register */
91 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG); 91 __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
92} 92}
93 93
94static void enable_microdev_irq(unsigned int irq) 94static void enable_microdev_irq(unsigned int irq)
@@ -107,13 +107,13 @@ static void enable_microdev_irq(unsigned int irq)
107 priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq); 107 priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq);
108 108
109 /* set priority for the interrupt */ 109 /* set priority for the interrupt */
110 priorities = ctrl_inl(priorityReg); 110 priorities = __raw_readl(priorityReg);
111 priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq); 111 priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq);
112 priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri); 112 priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri);
113 ctrl_outl(priorities, priorityReg); 113 __raw_writel(priorities, priorityReg);
114 114
115 /* enable interrupts on the FPGA INTC register */ 115 /* enable interrupts on the FPGA INTC register */
116 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG); 116 __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
117} 117}
118 118
119/* This function sets the desired irq handler to be a MicroDev type */ 119/* This function sets the desired irq handler to be a MicroDev type */
@@ -134,7 +134,7 @@ extern void __init init_microdev_irq(void)
134 int i; 134 int i;
135 135
136 /* disable interrupts on the FPGA INTC register */ 136 /* disable interrupts on the FPGA INTC register */
137 ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG); 137 __raw_writel(~0ul, MICRODEV_FPGA_INTDSB_REG);
138 138
139 for (i = 0; i < NUM_EXTERNAL_IRQS; i++) 139 for (i = 0; i < NUM_EXTERNAL_IRQS; i++)
140 make_microdev_irq(i); 140 make_microdev_irq(i);
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 507c77be476..be300aaca6f 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -397,7 +397,7 @@ static struct resource sdhi_cn9_resources[] = {
397 .flags = IORESOURCE_MEM, 397 .flags = IORESOURCE_MEM,
398 }, 398 },
399 [1] = { 399 [1] = {
400 .start = 101, 400 .start = 100,
401 .flags = IORESOURCE_IRQ, 401 .flags = IORESOURCE_IRQ,
402 }, 402 },
403}; 403};
@@ -431,7 +431,7 @@ static struct i2c_board_info migor_i2c_camera[] = {
431}; 431};
432 432
433static struct ov772x_camera_info ov7725_info = { 433static struct ov772x_camera_info ov7725_info = {
434 .buswidth = SOCAM_DATAWIDTH_8, 434 .flags = OV772X_FLAG_8BIT,
435}; 435};
436 436
437static struct soc_camera_link ov7725_link = { 437static struct soc_camera_link ov7725_link = {
@@ -496,28 +496,16 @@ static int __init migor_devices_setup(void)
496 &migor_sdram_enter_end, 496 &migor_sdram_enter_end,
497 &migor_sdram_leave_start, 497 &migor_sdram_leave_start,
498 &migor_sdram_leave_end); 498 &migor_sdram_leave_end);
499#ifdef CONFIG_PM
500 /* Let D11 LED show STATUS0 */ 499 /* Let D11 LED show STATUS0 */
501 gpio_request(GPIO_FN_STATUS0, NULL); 500 gpio_request(GPIO_FN_STATUS0, NULL);
502 501
503 /* Lit D12 LED show PDSTATUS */ 502 /* Lit D12 LED show PDSTATUS */
504 gpio_request(GPIO_FN_PDSTATUS, NULL); 503 gpio_request(GPIO_FN_PDSTATUS, NULL);
505#else
506 /* Lit D11 LED */
507 gpio_request(GPIO_PTJ7, NULL);
508 gpio_direction_output(GPIO_PTJ7, 1);
509 gpio_export(GPIO_PTJ7, 0);
510
511 /* Lit D12 LED */
512 gpio_request(GPIO_PTJ5, NULL);
513 gpio_direction_output(GPIO_PTJ5, 1);
514 gpio_export(GPIO_PTJ5, 0);
515#endif
516 504
517 /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */ 505 /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
518 gpio_request(GPIO_FN_IRQ0, NULL); 506 gpio_request(GPIO_FN_IRQ0, NULL);
519 ctrl_outl(0x00003400, BSC_CS4BCR); 507 __raw_writel(0x00003400, BSC_CS4BCR);
520 ctrl_outl(0x00110080, BSC_CS4WCR); 508 __raw_writel(0x00110080, BSC_CS4WCR);
521 509
522 /* KEYSC */ 510 /* KEYSC */
523 gpio_request(GPIO_FN_KEYOUT0, NULL); 511 gpio_request(GPIO_FN_KEYOUT0, NULL);
@@ -533,7 +521,7 @@ static int __init migor_devices_setup(void)
533 521
534 /* NAND Flash */ 522 /* NAND Flash */
535 gpio_request(GPIO_FN_CS6A_CE2B, NULL); 523 gpio_request(GPIO_FN_CS6A_CE2B, NULL);
536 ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR); 524 __raw_writel((__raw_readl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR);
537 gpio_request(GPIO_PTA1, NULL); 525 gpio_request(GPIO_PTA1, NULL);
538 gpio_direction_input(GPIO_PTA1); 526 gpio_direction_input(GPIO_PTA1);
539 527
@@ -627,7 +615,7 @@ static int __init migor_devices_setup(void)
627#else 615#else
628 gpio_direction_output(GPIO_PTT0, 1); 616 gpio_direction_output(GPIO_PTT0, 1);
629#endif 617#endif
630 ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */ 618 __raw_writew(__raw_readw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */
631 619
632 platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20); 620 platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
633 621
diff --git a/arch/sh/boards/mach-r2d/irq.c b/arch/sh/boards/mach-r2d/irq.c
index 78d7b27c80d..574f009c3c3 100644
--- a/arch/sh/boards/mach-r2d/irq.c
+++ b/arch/sh/boards/mach-r2d/irq.c
@@ -129,7 +129,7 @@ void __init init_rts7751r2d_IRQ(void)
129{ 129{
130 struct intc_desc *d; 130 struct intc_desc *d;
131 131
132 switch (ctrl_inw(PA_VERREG) & 0xf0) { 132 switch (__raw_readw(PA_VERREG) & 0xf0) {
133#ifdef CONFIG_RTS7751R2D_PLUS 133#ifdef CONFIG_RTS7751R2D_PLUS
134 case 0x10: 134 case 0x10:
135 printk(KERN_INFO "Using R2D-PLUS interrupt controller.\n"); 135 printk(KERN_INFO "Using R2D-PLUS interrupt controller.\n");
@@ -147,7 +147,7 @@ void __init init_rts7751r2d_IRQ(void)
147#endif 147#endif
148 default: 148 default:
149 printk(KERN_INFO "Unknown R2D interrupt controller 0x%04x\n", 149 printk(KERN_INFO "Unknown R2D interrupt controller 0x%04x\n",
150 ctrl_inw(PA_VERREG)); 150 __raw_readw(PA_VERREG));
151 return; 151 return;
152 } 152 }
153 153
diff --git a/arch/sh/boards/mach-r2d/setup.c b/arch/sh/boards/mach-r2d/setup.c
index a625ecb93e4..b84df6a3a93 100644
--- a/arch/sh/boards/mach-r2d/setup.c
+++ b/arch/sh/boards/mach-r2d/setup.c
@@ -70,7 +70,7 @@ static struct spi_board_info spi_bus[] = {
70static void r2d_chip_select(struct sh_spi_info *spi, int cs, int state) 70static void r2d_chip_select(struct sh_spi_info *spi, int cs, int state)
71{ 71{
72 BUG_ON(cs != 0); /* Single Epson RTC-9701JE attached on CS0 */ 72 BUG_ON(cs != 0); /* Single Epson RTC-9701JE attached on CS0 */
73 ctrl_outw(state == BITBANG_CS_ACTIVE, PA_RTCCE); 73 __raw_writew(state == BITBANG_CS_ACTIVE, PA_RTCCE);
74} 74}
75 75
76static struct sh_spi_info spi_info = { 76static struct sh_spi_info spi_info = {
@@ -262,7 +262,7 @@ __initcall(rts7751r2d_devices_setup);
262 262
263static void rts7751r2d_power_off(void) 263static void rts7751r2d_power_off(void)
264{ 264{
265 ctrl_outw(0x0001, PA_POWOFF); 265 __raw_writew(0x0001, PA_POWOFF);
266} 266}
267 267
268/* 268/*
@@ -271,14 +271,14 @@ static void rts7751r2d_power_off(void)
271static void __init rts7751r2d_setup(char **cmdline_p) 271static void __init rts7751r2d_setup(char **cmdline_p)
272{ 272{
273 void __iomem *sm501_reg; 273 void __iomem *sm501_reg;
274 u16 ver = ctrl_inw(PA_VERREG); 274 u16 ver = __raw_readw(PA_VERREG);
275 275
276 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n"); 276 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
277 277
278 printk(KERN_INFO "FPGA version:%d (revision:%d)\n", 278 printk(KERN_INFO "FPGA version:%d (revision:%d)\n",
279 (ver >> 4) & 0xf, ver & 0xf); 279 (ver >> 4) & 0xf, ver & 0xf);
280 280
281 ctrl_outw(0x0000, PA_OUTPORT); 281 __raw_writew(0x0000, PA_OUTPORT);
282 pm_power_off = rts7751r2d_power_off; 282 pm_power_off = rts7751r2d_power_off;
283 283
284 /* sm501 dram configuration: 284 /* sm501 dram configuration:
diff --git a/arch/sh/boards/mach-rsk/devices-rsk7203.c b/arch/sh/boards/mach-rsk/devices-rsk7203.c
index c37617e6322..4fa08ba1025 100644
--- a/arch/sh/boards/mach-rsk/devices-rsk7203.c
+++ b/arch/sh/boards/mach-rsk/devices-rsk7203.c
@@ -96,7 +96,7 @@ static int __init rsk7203_devices_setup(void)
96 gpio_request(GPIO_FN_RXD0, NULL); 96 gpio_request(GPIO_FN_RXD0, NULL);
97 97
98 /* Setup LAN9118: CS1 in 16-bit Big Endian Mode, IRQ0 at Port B */ 98 /* Setup LAN9118: CS1 in 16-bit Big Endian Mode, IRQ0 at Port B */
99 ctrl_outl(0x36db0400, 0xfffc0008); /* CS1BCR */ 99 __raw_writel(0x36db0400, 0xfffc0008); /* CS1BCR */
100 gpio_request(GPIO_FN_IRQ0_PB, NULL); 100 gpio_request(GPIO_FN_IRQ0_PB, NULL);
101 101
102 return platform_add_devices(rsk7203_devices, 102 return platform_add_devices(rsk7203_devices,
diff --git a/arch/sh/boards/mach-sdk7780/irq.c b/arch/sh/boards/mach-sdk7780/irq.c
index 855558163c5..e5f7564f251 100644
--- a/arch/sh/boards/mach-sdk7780/irq.c
+++ b/arch/sh/boards/mach-sdk7780/irq.c
@@ -37,9 +37,9 @@ void __init init_sdk7780_IRQ(void)
37{ 37{
38 printk(KERN_INFO "Using SDK7780 interrupt controller.\n"); 38 printk(KERN_INFO "Using SDK7780 interrupt controller.\n");
39 39
40 ctrl_outw(0xFFFF, FPGA_IRQ0MR); 40 __raw_writew(0xFFFF, FPGA_IRQ0MR);
41 /* Setup IRL 0-3 */ 41 /* Setup IRL 0-3 */
42 ctrl_outw(0x0003, FPGA_IMSR); 42 __raw_writew(0x0003, FPGA_IMSR);
43 plat_irq_setup_pins(IRQ_MODE_IRL3210); 43 plat_irq_setup_pins(IRQ_MODE_IRL3210);
44 44
45 register_intc_controller(&fpga_intc_desc); 45 register_intc_controller(&fpga_intc_desc);
diff --git a/arch/sh/boards/mach-sdk7780/setup.c b/arch/sh/boards/mach-sdk7780/setup.c
index aad94a78dc7..4da38db4b5f 100644
--- a/arch/sh/boards/mach-sdk7780/setup.c
+++ b/arch/sh/boards/mach-sdk7780/setup.c
@@ -20,27 +20,18 @@
20 20
21#define GPIO_PECR 0xFFEA0008 21#define GPIO_PECR 0xFFEA0008
22 22
23//* Heartbeat */ 23/* Heartbeat */
24static struct heartbeat_data heartbeat_data = { 24static struct resource heartbeat_resource = {
25 .regsize = 16, 25 .start = PA_LED,
26}; 26 .end = PA_LED,
27 27 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
28static struct resource heartbeat_resources[] = {
29 [0] = {
30 .start = PA_LED,
31 .end = PA_LED,
32 .flags = IORESOURCE_MEM,
33 },
34}; 28};
35 29
36static struct platform_device heartbeat_device = { 30static struct platform_device heartbeat_device = {
37 .name = "heartbeat", 31 .name = "heartbeat",
38 .id = -1, 32 .id = -1,
39 .dev = { 33 .num_resources = 1,
40 .platform_data = &heartbeat_data, 34 .resource = &heartbeat_resource,
41 },
42 .num_resources = ARRAY_SIZE(heartbeat_resources),
43 .resource = heartbeat_resources,
44}; 35};
45 36
46/* SMC91x */ 37/* SMC91x */
@@ -83,8 +74,8 @@ device_initcall(sdk7780_devices_setup);
83 74
84static void __init sdk7780_setup(char **cmdline_p) 75static void __init sdk7780_setup(char **cmdline_p)
85{ 76{
86 u16 ver = ctrl_inw(FPGA_FPVERR); 77 u16 ver = __raw_readw(FPGA_FPVERR);
87 u16 dateStamp = ctrl_inw(FPGA_FPDATER); 78 u16 dateStamp = __raw_readw(FPGA_FPDATER);
88 79
89 printk(KERN_INFO "Renesas Technology Europe SDK7780 support.\n"); 80 printk(KERN_INFO "Renesas Technology Europe SDK7780 support.\n");
90 printk(KERN_INFO "Board version: %d (revision %d), " 81 printk(KERN_INFO "Board version: %d (revision %d), "
@@ -94,7 +85,7 @@ static void __init sdk7780_setup(char **cmdline_p)
94 dateStamp); 85 dateStamp);
95 86
96 /* Setup pin mux'ing for PCIC */ 87 /* Setup pin mux'ing for PCIC */
97 ctrl_outw(0x0000, GPIO_PECR); 88 __raw_writew(0x0000, GPIO_PECR);
98} 89}
99 90
100/* 91/*
diff --git a/arch/sh/boards/mach-sdk7786/Makefile b/arch/sh/boards/mach-sdk7786/Makefile
new file mode 100644
index 00000000000..a29f19e85b6
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/Makefile
@@ -0,0 +1 @@
obj-y := setup.o fpga.o irq.o
diff --git a/arch/sh/boards/mach-sdk7786/fpga.c b/arch/sh/boards/mach-sdk7786/fpga.c
new file mode 100644
index 00000000000..3e4ec66a041
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/fpga.c
@@ -0,0 +1,72 @@
1/*
2 * SDK7786 FPGA Support.
3 *
4 * Copyright (C) 2010 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/init.h>
11#include <linux/io.h>
12#include <linux/bcd.h>
13#include <mach/fpga.h>
14#include <asm/sizes.h>
15
16#define FPGA_REGS_OFFSET 0x03fff800
17#define FPGA_REGS_SIZE 0x490
18
19/*
20 * The FPGA can be mapped in any of the generally available areas,
21 * so we attempt to scan for it using the fixed SRSTR read magic.
22 *
23 * Once the FPGA is located, the rest of the mapping data for the other
24 * components can be determined dynamically from its section mapping
25 * registers.
26 */
27static void __iomem *sdk7786_fpga_probe(void)
28{
29 unsigned long area;
30 void __iomem *base;
31
32 /*
33 * Iterate over all of the areas where the FPGA could be mapped.
34 * The possible range is anywhere from area 0 through 6, area 7
35 * is reserved.
36 */
37 for (area = PA_AREA0; area < PA_AREA7; area += SZ_64M) {
38 base = ioremap_nocache(area + FPGA_REGS_OFFSET, FPGA_REGS_SIZE);
39 if (!base) {
40 /* Failed to remap this area, move along. */
41 continue;
42 }
43
44 if (ioread16(base + SRSTR) == SRSTR_MAGIC)
45 return base; /* Found it! */
46
47 iounmap(base);
48 }
49
50 return NULL;
51}
52
53void __iomem *sdk7786_fpga_base;
54
55void __init sdk7786_fpga_init(void)
56{
57 u16 version, date;
58
59 sdk7786_fpga_base = sdk7786_fpga_probe();
60 if (unlikely(!sdk7786_fpga_base)) {
61 panic("FPGA detection failed.\n");
62 return;
63 }
64
65 version = fpga_read_reg(FPGAVR);
66 date = fpga_read_reg(FPGADR);
67
68 pr_info("\tFPGA version:\t%d.%d (built on %d/%d/%d)\n",
69 bcd2bin(version >> 8) & 0xf, bcd2bin(version & 0xf),
70 ((date >> 12) & 0xf) + 2000,
71 (date >> 8) & 0xf, bcd2bin(date & 0xff));
72}
diff --git a/arch/sh/boards/mach-sdk7786/irq.c b/arch/sh/boards/mach-sdk7786/irq.c
new file mode 100644
index 00000000000..46943a0da5b
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/irq.c
@@ -0,0 +1,48 @@
1/*
2 * SDK7786 FPGA IRQ Controller Support.
3 *
4 * Copyright (C) 2010 Matt Fleming
5 * Copyright (C) 2010 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/irq.h>
12#include <mach/fpga.h>
13#include <mach/irq.h>
14
15enum {
16 ATA_IRQ_BIT = 1,
17 SPI_BUSY_BIT = 2,
18 LIRQ5_BIT = 3,
19 LIRQ6_BIT = 4,
20 LIRQ7_BIT = 5,
21 LIRQ8_BIT = 6,
22 KEY_IRQ_BIT = 7,
23 PEN_IRQ_BIT = 8,
24 ETH_IRQ_BIT = 9,
25 RTC_ALARM_BIT = 10,
26 CRYSTAL_FAIL_BIT = 12,
27 ETH_PME_BIT = 14,
28};
29
30void __init sdk7786_init_irq(void)
31{
32 unsigned int tmp;
33
34 /* Enable priority encoding for all IRLs */
35 fpga_write_reg(fpga_read_reg(INTMSR) | 0x0303, INTMSR);
36
37 /* Clear FPGA interrupt status registers */
38 fpga_write_reg(0x0000, INTASR);
39 fpga_write_reg(0x0000, INTBSR);
40
41 /* Unmask FPGA interrupts */
42 tmp = fpga_read_reg(INTAMR);
43 tmp &= ~(1 << ETH_IRQ_BIT);
44 fpga_write_reg(tmp, INTAMR);
45
46 plat_irq_setup_pins(IRQ_MODE_IRL7654_MASK);
47 plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK);
48}
diff --git a/arch/sh/boards/mach-sdk7786/setup.c b/arch/sh/boards/mach-sdk7786/setup.c
new file mode 100644
index 00000000000..f094ea2ee78
--- /dev/null
+++ b/arch/sh/boards/mach-sdk7786/setup.c
@@ -0,0 +1,189 @@
1/*
2 * Renesas Technology Europe SDK7786 Support.
3 *
4 * Copyright (C) 2010 Matt Fleming
5 * Copyright (C) 2010 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/io.h>
14#include <linux/smsc911x.h>
15#include <linux/i2c.h>
16#include <linux/irq.h>
17#include <linux/clk.h>
18#include <mach/fpga.h>
19#include <mach/irq.h>
20#include <asm/machvec.h>
21#include <asm/heartbeat.h>
22#include <asm/sizes.h>
23#include <asm/reboot.h>
24
25static struct resource heartbeat_resource = {
26 .start = 0x07fff8b0,
27 .end = 0x07fff8b0 + sizeof(u16) - 1,
28 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
29};
30
31static struct platform_device heartbeat_device = {
32 .name = "heartbeat",
33 .id = -1,
34 .num_resources = 1,
35 .resource = &heartbeat_resource,
36};
37
38static struct resource smsc911x_resources[] = {
39 [0] = {
40 .name = "smsc911x-memory",
41 .start = 0x07ffff00,
42 .end = 0x07ffff00 + SZ_256 - 1,
43 .flags = IORESOURCE_MEM,
44 },
45 [1] = {
46 .name = "smsc911x-irq",
47 .start = evt2irq(0x2c0),
48 .end = evt2irq(0x2c0),
49 .flags = IORESOURCE_IRQ,
50 },
51};
52
53static struct smsc911x_platform_config smsc911x_config = {
54 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
55 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
56 .flags = SMSC911X_USE_32BIT,
57 .phy_interface = PHY_INTERFACE_MODE_MII,
58};
59
60static struct platform_device smsc911x_device = {
61 .name = "smsc911x",
62 .id = -1,
63 .num_resources = ARRAY_SIZE(smsc911x_resources),
64 .resource = smsc911x_resources,
65 .dev = {
66 .platform_data = &smsc911x_config,
67 },
68};
69
70static struct resource smbus_fpga_resource = {
71 .start = 0x07fff9e0,
72 .end = 0x07fff9e0 + SZ_32 - 1,
73 .flags = IORESOURCE_MEM,
74};
75
76static struct platform_device smbus_fpga_device = {
77 .name = "i2c-sdk7786",
78 .id = 0,
79 .num_resources = 1,
80 .resource = &smbus_fpga_resource,
81};
82
83static struct resource smbus_pcie_resource = {
84 .start = 0x07fffc30,
85 .end = 0x07fffc30 + SZ_32 - 1,
86 .flags = IORESOURCE_MEM,
87};
88
89static struct platform_device smbus_pcie_device = {
90 .name = "i2c-sdk7786",
91 .id = 1,
92 .num_resources = 1,
93 .resource = &smbus_pcie_resource,
94};
95
96static struct i2c_board_info __initdata sdk7786_i2c_devices[] = {
97 {
98 I2C_BOARD_INFO("max6900", 0x68),
99 },
100};
101
102static struct platform_device *sh7786_devices[] __initdata = {
103 &heartbeat_device,
104 &smsc911x_device,
105 &smbus_fpga_device,
106 &smbus_pcie_device,
107};
108
109static int sdk7786_i2c_setup(void)
110{
111 unsigned int tmp;
112
113 /*
114 * Hand over I2C control to the FPGA.
115 */
116 tmp = fpga_read_reg(SBCR);
117 tmp &= ~SCBR_I2CCEN;
118 tmp |= SCBR_I2CMEN;
119 fpga_write_reg(tmp, SBCR);
120
121 return i2c_register_board_info(0, sdk7786_i2c_devices,
122 ARRAY_SIZE(sdk7786_i2c_devices));
123}
124
125static int __init sdk7786_devices_setup(void)
126{
127 int ret;
128
129 ret = platform_add_devices(sh7786_devices, ARRAY_SIZE(sh7786_devices));
130 if (unlikely(ret != 0))
131 return ret;
132
133 return sdk7786_i2c_setup();
134}
135__initcall(sdk7786_devices_setup);
136
137static int sdk7786_mode_pins(void)
138{
139 return fpga_read_reg(MODSWR);
140}
141
142static int sdk7786_clk_init(void)
143{
144 struct clk *clk;
145 int ret;
146
147 /*
148 * Only handle the EXTAL case, anyone interfacing a crystal
149 * resonator will need to provide their own input clock.
150 */
151 if (test_mode_pin(MODE_PIN9))
152 return -EINVAL;
153
154 clk = clk_get(NULL, "extal");
155 if (!clk || IS_ERR(clk))
156 return PTR_ERR(clk);
157 ret = clk_set_rate(clk, 33333333);
158 clk_put(clk);
159
160 return ret;
161}
162
163static void sdk7786_restart(char *cmd)
164{
165 fpga_write_reg(0xa5a5, SRSTR);
166}
167
168/* Initialize the board */
169static void __init sdk7786_setup(char **cmdline_p)
170{
171 pr_info("Renesas Technology Europe SDK7786 support:\n");
172
173 sdk7786_fpga_init();
174
175 pr_info("\tPCB revision:\t%d\n", fpga_read_reg(PCBRR) & 0xf);
176
177 machine_ops.restart = sdk7786_restart;
178}
179
180/*
181 * The Machine Vector
182 */
183static struct sh_machine_vector mv_sdk7786 __initmv = {
184 .mv_name = "SDK7786",
185 .mv_setup = sdk7786_setup,
186 .mv_mode_pins = sdk7786_mode_pins,
187 .mv_clk_init = sdk7786_clk_init,
188 .mv_init_irq = sdk7786_init_irq,
189};
diff --git a/arch/sh/boards/mach-se/7206/io.c b/arch/sh/boards/mach-se/7206/io.c
index 180455642a4..adadc77532e 100644
--- a/arch/sh/boards/mach-se/7206/io.c
+++ b/arch/sh/boards/mach-se/7206/io.c
@@ -16,7 +16,7 @@
16 16
17static inline void delay(void) 17static inline void delay(void)
18{ 18{
19 ctrl_inw(0x20000000); /* P2 ROM Area */ 19 __raw_readw(0x20000000); /* P2 ROM Area */
20} 20}
21 21
22/* MS7750 requires special versions of in*, out* routines, since 22/* MS7750 requires special versions of in*, out* routines, since
diff --git a/arch/sh/boards/mach-se/7206/irq.c b/arch/sh/boards/mach-se/7206/irq.c
index aef7f052851..8d82175d83a 100644
--- a/arch/sh/boards/mach-se/7206/irq.c
+++ b/arch/sh/boards/mach-se/7206/irq.c
@@ -32,12 +32,12 @@ static void disable_se7206_irq(unsigned int irq)
32 unsigned short msk0,msk1; 32 unsigned short msk0,msk1;
33 33
34 /* Set the priority in IPR to 0 */ 34 /* Set the priority in IPR to 0 */
35 val = ctrl_inw(INTC_IPR01); 35 val = __raw_readw(INTC_IPR01);
36 val &= mask; 36 val &= mask;
37 ctrl_outw(val, INTC_IPR01); 37 __raw_writew(val, INTC_IPR01);
38 /* FPGA mask set */ 38 /* FPGA mask set */
39 msk0 = ctrl_inw(INTMSK0); 39 msk0 = __raw_readw(INTMSK0);
40 msk1 = ctrl_inw(INTMSK1); 40 msk1 = __raw_readw(INTMSK1);
41 41
42 switch (irq) { 42 switch (irq) {
43 case IRQ0_IRQ: 43 case IRQ0_IRQ:
@@ -51,8 +51,8 @@ static void disable_se7206_irq(unsigned int irq)
51 msk1 |= 0x00ff; 51 msk1 |= 0x00ff;
52 break; 52 break;
53 } 53 }
54 ctrl_outw(msk0, INTMSK0); 54 __raw_writew(msk0, INTMSK0);
55 ctrl_outw(msk1, INTMSK1); 55 __raw_writew(msk1, INTMSK1);
56} 56}
57 57
58static void enable_se7206_irq(unsigned int irq) 58static void enable_se7206_irq(unsigned int irq)
@@ -62,13 +62,13 @@ static void enable_se7206_irq(unsigned int irq)
62 unsigned short msk0,msk1; 62 unsigned short msk0,msk1;
63 63
64 /* Set priority in IPR back to original value */ 64 /* Set priority in IPR back to original value */
65 val = ctrl_inw(INTC_IPR01); 65 val = __raw_readw(INTC_IPR01);
66 val |= value; 66 val |= value;
67 ctrl_outw(val, INTC_IPR01); 67 __raw_writew(val, INTC_IPR01);
68 68
69 /* FPGA mask reset */ 69 /* FPGA mask reset */
70 msk0 = ctrl_inw(INTMSK0); 70 msk0 = __raw_readw(INTMSK0);
71 msk1 = ctrl_inw(INTMSK1); 71 msk1 = __raw_readw(INTMSK1);
72 72
73 switch (irq) { 73 switch (irq) {
74 case IRQ0_IRQ: 74 case IRQ0_IRQ:
@@ -82,19 +82,20 @@ static void enable_se7206_irq(unsigned int irq)
82 msk1 &= ~0x00ff; 82 msk1 &= ~0x00ff;
83 break; 83 break;
84 } 84 }
85 ctrl_outw(msk0, INTMSK0); 85 __raw_writew(msk0, INTMSK0);
86 ctrl_outw(msk1, INTMSK1); 86 __raw_writew(msk1, INTMSK1);
87} 87}
88 88
89static void eoi_se7206_irq(unsigned int irq) 89static void eoi_se7206_irq(unsigned int irq)
90{ 90{
91 unsigned short sts0,sts1; 91 unsigned short sts0,sts1;
92 struct irq_desc *desc = irq_to_desc(irq);
92 93
93 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) 94 if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
94 enable_se7206_irq(irq); 95 enable_se7206_irq(irq);
95 /* FPGA isr clear */ 96 /* FPGA isr clear */
96 sts0 = ctrl_inw(INTSTS0); 97 sts0 = __raw_readw(INTSTS0);
97 sts1 = ctrl_inw(INTSTS1); 98 sts1 = __raw_readw(INTSTS1);
98 99
99 switch (irq) { 100 switch (irq) {
100 case IRQ0_IRQ: 101 case IRQ0_IRQ:
@@ -108,8 +109,8 @@ static void eoi_se7206_irq(unsigned int irq)
108 sts1 &= ~0x00ff; 109 sts1 &= ~0x00ff;
109 break; 110 break;
110 } 111 }
111 ctrl_outw(sts0, INTSTS0); 112 __raw_writew(sts0, INTSTS0);
112 ctrl_outw(sts1, INTSTS1); 113 __raw_writew(sts1, INTSTS1);
113} 114}
114 115
115static struct irq_chip se7206_irq_chip __read_mostly = { 116static struct irq_chip se7206_irq_chip __read_mostly = {
@@ -136,11 +137,11 @@ void __init init_se7206_IRQ(void)
136 make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */ 137 make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */
137 make_se7206_irq(IRQ1_IRQ); /* ATA */ 138 make_se7206_irq(IRQ1_IRQ); /* ATA */
138 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */ 139 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */
139 ctrl_outw(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */ 140 __raw_writew(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */
140 141
141 /* FPGA System register setup*/ 142 /* FPGA System register setup*/
142 ctrl_outw(0x0000,INTSTS0); /* Clear INTSTS0 */ 143 __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */
143 ctrl_outw(0x0000,INTSTS1); /* Clear INTSTS1 */ 144 __raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */
144 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */ 145 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */
145 ctrl_outw(0x0001,INTSEL); 146 __raw_writew(0x0001,INTSEL);
146} 147}
diff --git a/arch/sh/boards/mach-se/7206/setup.c b/arch/sh/boards/mach-se/7206/setup.c
index f5466384972..8f5c65d43d1 100644
--- a/arch/sh/boards/mach-se/7206/setup.c
+++ b/arch/sh/boards/mach-se/7206/setup.c
@@ -50,15 +50,12 @@ static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
50static struct heartbeat_data heartbeat_data = { 50static struct heartbeat_data heartbeat_data = {
51 .bit_pos = heartbeat_bit_pos, 51 .bit_pos = heartbeat_bit_pos,
52 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 52 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
53 .regsize = 32,
54}; 53};
55 54
56static struct resource heartbeat_resources[] = { 55static struct resource heartbeat_resource = {
57 [0] = { 56 .start = PA_LED,
58 .start = PA_LED, 57 .end = PA_LED,
59 .end = PA_LED, 58 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
60 .flags = IORESOURCE_MEM,
61 },
62}; 59};
63 60
64static struct platform_device heartbeat_device = { 61static struct platform_device heartbeat_device = {
@@ -67,8 +64,8 @@ static struct platform_device heartbeat_device = {
67 .dev = { 64 .dev = {
68 .platform_data = &heartbeat_data, 65 .platform_data = &heartbeat_data,
69 }, 66 },
70 .num_resources = ARRAY_SIZE(heartbeat_resources), 67 .num_resources = 1,
71 .resource = heartbeat_resources, 68 .resource = &heartbeat_resource,
72}; 69};
73 70
74static struct platform_device *se7206_devices[] __initdata = { 71static struct platform_device *se7206_devices[] __initdata = {
diff --git a/arch/sh/boards/mach-se/7343/irq.c b/arch/sh/boards/mach-se/7343/irq.c
index 051c29d4eae..d4305c26e9f 100644
--- a/arch/sh/boards/mach-se/7343/irq.c
+++ b/arch/sh/boards/mach-se/7343/irq.c
@@ -16,16 +16,18 @@
16#include <linux/io.h> 16#include <linux/io.h>
17#include <mach-se/mach/se7343.h> 17#include <mach-se/mach/se7343.h>
18 18
19unsigned int se7343_fpga_irq[SE7343_FPGA_IRQ_NR] = { 0, };
20
19static void disable_se7343_irq(unsigned int irq) 21static void disable_se7343_irq(unsigned int irq)
20{ 22{
21 unsigned int bit = irq - SE7343_FPGA_IRQ_BASE; 23 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
22 ctrl_outw(ctrl_inw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK); 24 __raw_writew(__raw_readw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK);
23} 25}
24 26
25static void enable_se7343_irq(unsigned int irq) 27static void enable_se7343_irq(unsigned int irq)
26{ 28{
27 unsigned int bit = irq - SE7343_FPGA_IRQ_BASE; 29 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
28 ctrl_outw(ctrl_inw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK); 30 __raw_writew(__raw_readw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK);
29} 31}
30 32
31static struct irq_chip se7343_irq_chip __read_mostly = { 33static struct irq_chip se7343_irq_chip __read_mostly = {
@@ -37,19 +39,16 @@ static struct irq_chip se7343_irq_chip __read_mostly = {
37 39
38static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc) 40static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
39{ 41{
40 unsigned short intv = ctrl_inw(PA_CPLD_ST); 42 unsigned short intv = __raw_readw(PA_CPLD_ST);
41 struct irq_desc *ext_desc; 43 unsigned int ext_irq = 0;
42 unsigned int ext_irq = SE7343_FPGA_IRQ_BASE;
43 44
44 intv &= (1 << SE7343_FPGA_IRQ_NR) - 1; 45 intv &= (1 << SE7343_FPGA_IRQ_NR) - 1;
45 46
46 while (intv) { 47 for (; intv; intv >>= 1, ext_irq++) {
47 if (intv & 1) { 48 if (!(intv & 1))
48 ext_desc = irq_desc + ext_irq; 49 continue;
49 handle_level_irq(ext_irq, ext_desc); 50
50 } 51 generic_handle_irq(se7343_fpga_irq[ext_irq]);
51 intv >>= 1;
52 ext_irq++;
53 } 52 }
54} 53}
55 54
@@ -58,16 +57,24 @@ static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
58 */ 57 */
59void __init init_7343se_IRQ(void) 58void __init init_7343se_IRQ(void)
60{ 59{
61 int i; 60 int i, irq;
61
62 __raw_writew(0, PA_CPLD_IMSK); /* disable all irqs */
63 __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
62 64
63 ctrl_outw(0, PA_CPLD_IMSK); /* disable all irqs */ 65 for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) {
64 ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */ 66 irq = create_irq();
67 if (irq < 0)
68 return;
69 se7343_fpga_irq[i] = irq;
65 70
66 for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) 71 set_irq_chip_and_handler_name(se7343_fpga_irq[i],
67 set_irq_chip_and_handler_name(SE7343_FPGA_IRQ_BASE + i,
68 &se7343_irq_chip, 72 &se7343_irq_chip,
69 handle_level_irq, "level"); 73 handle_level_irq, "level");
70 74
75 set_irq_chip_data(se7343_fpga_irq[i], (void *)i);
76 }
77
71 set_irq_chained_handler(IRQ0_IRQ, se7343_irq_demux); 78 set_irq_chained_handler(IRQ0_IRQ, se7343_irq_demux);
72 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); 79 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
73 set_irq_chained_handler(IRQ1_IRQ, se7343_irq_demux); 80 set_irq_chained_handler(IRQ1_IRQ, se7343_irq_demux);
diff --git a/arch/sh/boards/mach-se/7343/setup.c b/arch/sh/boards/mach-se/7343/setup.c
index 4de56f35f41..d2370af56d7 100644
--- a/arch/sh/boards/mach-se/7343/setup.c
+++ b/arch/sh/boards/mach-se/7343/setup.c
@@ -11,26 +11,17 @@
11#include <asm/irq.h> 11#include <asm/irq.h>
12#include <asm/io.h> 12#include <asm/io.h>
13 13
14static struct resource heartbeat_resources[] = { 14static struct resource heartbeat_resource = {
15 [0] = { 15 .start = PA_LED,
16 .start = PA_LED, 16 .end = PA_LED,
17 .end = PA_LED, 17 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
18 .flags = IORESOURCE_MEM,
19 },
20};
21
22static struct heartbeat_data heartbeat_data = {
23 .regsize = 16,
24}; 18};
25 19
26static struct platform_device heartbeat_device = { 20static struct platform_device heartbeat_device = {
27 .name = "heartbeat", 21 .name = "heartbeat",
28 .id = -1, 22 .id = -1,
29 .dev = { 23 .num_resources = 1,
30 .platform_data = &heartbeat_data, 24 .resource = &heartbeat_resource,
31 },
32 .num_resources = ARRAY_SIZE(heartbeat_resources),
33 .resource = heartbeat_resources,
34}; 25};
35 26
36static struct mtd_partition nor_flash_partitions[] = { 27static struct mtd_partition nor_flash_partitions[] = {
@@ -82,7 +73,6 @@ static struct plat_serial8250_port serial_platform_data[] = {
82 .mapbase = 0x16000000, 73 .mapbase = 0x16000000,
83 .regshift = 1, 74 .regshift = 1,
84 .flags = ST16C2550C_FLAGS, 75 .flags = ST16C2550C_FLAGS,
85 .irq = UARTA_IRQ,
86 .uartclk = 7372800, 76 .uartclk = 7372800,
87 }, 77 },
88 [1] = { 78 [1] = {
@@ -90,7 +80,6 @@ static struct plat_serial8250_port serial_platform_data[] = {
90 .mapbase = 0x17000000, 80 .mapbase = 0x17000000,
91 .regshift = 1, 81 .regshift = 1,
92 .flags = ST16C2550C_FLAGS, 82 .flags = ST16C2550C_FLAGS,
93 .irq = UARTB_IRQ,
94 .uartclk = 7372800, 83 .uartclk = 7372800,
95 }, 84 },
96 { }, 85 { },
@@ -121,7 +110,7 @@ static struct resource usb_resources[] = {
121 .flags = IORESOURCE_MEM, 110 .flags = IORESOURCE_MEM,
122 }, 111 },
123 [2] = { 112 [2] = {
124 .start = USB_IRQ, 113 /* Filled in later */
125 .flags = IORESOURCE_IRQ, 114 .flags = IORESOURCE_IRQ,
126 }, 115 },
127}; 116};
@@ -138,8 +127,8 @@ static struct isp116x_platform_data usb_platform_data = {
138static struct platform_device usb_device = { 127static struct platform_device usb_device = {
139 .name = "isp116x-hcd", 128 .name = "isp116x-hcd",
140 .id = -1, 129 .id = -1,
141 .num_resources = ARRAY_SIZE(usb_resources), 130 .num_resources = ARRAY_SIZE(usb_resources),
142 .resource = usb_resources, 131 .resource = usb_resources,
143 .dev = { 132 .dev = {
144 .platform_data = &usb_platform_data, 133 .platform_data = &usb_platform_data,
145 }, 134 },
@@ -155,6 +144,13 @@ static struct platform_device *sh7343se_platform_devices[] __initdata = {
155 144
156static int __init sh7343se_devices_setup(void) 145static int __init sh7343se_devices_setup(void)
157{ 146{
147 /* Wire-up dynamic vectors */
148 serial_platform_data[0].irq = se7343_fpga_irq[SE7343_FPGA_IRQ_UARTA];
149 serial_platform_data[1].irq = se7343_fpga_irq[SE7343_FPGA_IRQ_UARTB];
150
151 usb_resources[2].start = usb_resources[2].end =
152 se7343_fpga_irq[SE7343_FPGA_IRQ_USB];
153
158 return platform_add_devices(sh7343se_platform_devices, 154 return platform_add_devices(sh7343se_platform_devices,
159 ARRAY_SIZE(sh7343se_platform_devices)); 155 ARRAY_SIZE(sh7343se_platform_devices));
160} 156}
@@ -165,10 +161,10 @@ device_initcall(sh7343se_devices_setup);
165 */ 161 */
166static void __init sh7343se_setup(char **cmdline_p) 162static void __init sh7343se_setup(char **cmdline_p)
167{ 163{
168 ctrl_outw(0xf900, FPGA_OUT); /* FPGA */ 164 __raw_writew(0xf900, FPGA_OUT); /* FPGA */
169 165
170 ctrl_outw(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */ 166 __raw_writew(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */
171 ctrl_outw(0x0020, PORT_PSELD); 167 __raw_writew(0x0020, PORT_PSELD);
172 168
173 printk(KERN_INFO "MS7343CP01 Setup...done\n"); 169 printk(KERN_INFO "MS7343CP01 Setup...done\n");
174} 170}
@@ -179,6 +175,5 @@ static void __init sh7343se_setup(char **cmdline_p)
179static struct sh_machine_vector mv_7343se __initmv = { 175static struct sh_machine_vector mv_7343se __initmv = {
180 .mv_name = "SolutionEngine 7343", 176 .mv_name = "SolutionEngine 7343",
181 .mv_setup = sh7343se_setup, 177 .mv_setup = sh7343se_setup,
182 .mv_nr_irqs = SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_NR,
183 .mv_init_irq = init_7343se_IRQ, 178 .mv_init_irq = init_7343se_IRQ,
184}; 179};
diff --git a/arch/sh/boards/mach-se/770x/irq.c b/arch/sh/boards/mach-se/770x/irq.c
index ec1fea571b5..1028c17b81b 100644
--- a/arch/sh/boards/mach-se/770x/irq.c
+++ b/arch/sh/boards/mach-se/770x/irq.c
@@ -96,13 +96,13 @@ static struct ipr_desc ipr_irq_desc = {
96void __init init_se_IRQ(void) 96void __init init_se_IRQ(void)
97{ 97{
98 /* Disable all interrupts */ 98 /* Disable all interrupts */
99 ctrl_outw(0, BCR_ILCRA); 99 __raw_writew(0, BCR_ILCRA);
100 ctrl_outw(0, BCR_ILCRB); 100 __raw_writew(0, BCR_ILCRB);
101 ctrl_outw(0, BCR_ILCRC); 101 __raw_writew(0, BCR_ILCRC);
102 ctrl_outw(0, BCR_ILCRD); 102 __raw_writew(0, BCR_ILCRD);
103 ctrl_outw(0, BCR_ILCRE); 103 __raw_writew(0, BCR_ILCRE);
104 ctrl_outw(0, BCR_ILCRF); 104 __raw_writew(0, BCR_ILCRF);
105 ctrl_outw(0, BCR_ILCRG); 105 __raw_writew(0, BCR_ILCRG);
106 106
107 register_ipr_controller(&ipr_irq_desc); 107 register_ipr_controller(&ipr_irq_desc);
108} 108}
diff --git a/arch/sh/boards/mach-se/770x/setup.c b/arch/sh/boards/mach-se/770x/setup.c
index 527eb6b1261..66d39d1b090 100644
--- a/arch/sh/boards/mach-se/770x/setup.c
+++ b/arch/sh/boards/mach-se/770x/setup.c
@@ -93,15 +93,12 @@ static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
93static struct heartbeat_data heartbeat_data = { 93static struct heartbeat_data heartbeat_data = {
94 .bit_pos = heartbeat_bit_pos, 94 .bit_pos = heartbeat_bit_pos,
95 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 95 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
96 .regsize = 16,
97}; 96};
98 97
99static struct resource heartbeat_resources[] = { 98static struct resource heartbeat_resource = {
100 [0] = { 99 .start = PA_LED,
101 .start = PA_LED, 100 .end = PA_LED,
102 .end = PA_LED, 101 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
103 .flags = IORESOURCE_MEM,
104 },
105}; 102};
106 103
107static struct platform_device heartbeat_device = { 104static struct platform_device heartbeat_device = {
@@ -110,8 +107,8 @@ static struct platform_device heartbeat_device = {
110 .dev = { 107 .dev = {
111 .platform_data = &heartbeat_data, 108 .platform_data = &heartbeat_data,
112 }, 109 },
113 .num_resources = ARRAY_SIZE(heartbeat_resources), 110 .num_resources = 1,
114 .resource = heartbeat_resources, 111 .resource = &heartbeat_resource,
115}; 112};
116 113
117#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\ 114#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
diff --git a/arch/sh/boards/mach-se/7721/irq.c b/arch/sh/boards/mach-se/7721/irq.c
index b417acc4dad..d85022ea3f1 100644
--- a/arch/sh/boards/mach-se/7721/irq.c
+++ b/arch/sh/boards/mach-se/7721/irq.c
@@ -38,7 +38,7 @@ static DECLARE_INTC_DESC(intc_desc, "SE7721", vectors,
38void __init init_se7721_IRQ(void) 38void __init init_se7721_IRQ(void)
39{ 39{
40 /* PPCR */ 40 /* PPCR */
41 ctrl_outw(ctrl_inw(0xa4050118) & ~0x00ff, 0xa4050118); 41 __raw_writew(__raw_readw(0xa4050118) & ~0x00ff, 0xa4050118);
42 42
43 register_intc_controller(&intc_desc); 43 register_intc_controller(&intc_desc);
44 intc_set_priority(MRSHPC_IRQ0, 0xf - MRSHPC_IRQ0); 44 intc_set_priority(MRSHPC_IRQ0, 0xf - MRSHPC_IRQ0);
diff --git a/arch/sh/boards/mach-se/7721/setup.c b/arch/sh/boards/mach-se/7721/setup.c
index 55af4c36b43..7416ad7ee53 100644
--- a/arch/sh/boards/mach-se/7721/setup.c
+++ b/arch/sh/boards/mach-se/7721/setup.c
@@ -23,15 +23,12 @@ static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
23static struct heartbeat_data heartbeat_data = { 23static struct heartbeat_data heartbeat_data = {
24 .bit_pos = heartbeat_bit_pos, 24 .bit_pos = heartbeat_bit_pos,
25 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), 25 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
26 .regsize = 16,
27}; 26};
28 27
29static struct resource heartbeat_resources[] = { 28static struct resource heartbeat_resource = {
30 [0] = { 29 .start = PA_LED,
31 .start = PA_LED, 30 .end = PA_LED,
32 .end = PA_LED, 31 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
33 .flags = IORESOURCE_MEM,
34 },
35}; 32};
36 33
37static struct platform_device heartbeat_device = { 34static struct platform_device heartbeat_device = {
@@ -40,8 +37,8 @@ static struct platform_device heartbeat_device = {
40 .dev = { 37 .dev = {
41 .platform_data = &heartbeat_data, 38 .platform_data = &heartbeat_data,
42 }, 39 },
43 .num_resources = ARRAY_SIZE(heartbeat_resources), 40 .num_resources = 1,
44 .resource = heartbeat_resources, 41 .resource = &heartbeat_resource,
45}; 42};
46 43
47static struct resource cf_ide_resources[] = { 44static struct resource cf_ide_resources[] = {
@@ -83,10 +80,10 @@ device_initcall(se7721_devices_setup);
83static void __init se7721_setup(char **cmdline_p) 80static void __init se7721_setup(char **cmdline_p)
84{ 81{
85 /* for USB */ 82 /* for USB */
86 ctrl_outw(0x0000, 0xA405010C); /* PGCR */ 83 __raw_writew(0x0000, 0xA405010C); /* PGCR */
87 ctrl_outw(0x0000, 0xA405010E); /* PHCR */ 84 __raw_writew(0x0000, 0xA405010E); /* PHCR */
88 ctrl_outw(0x00AA, 0xA4050118); /* PPCR */ 85 __raw_writew(0x00AA, 0xA4050118); /* PPCR */
89 ctrl_outw(0x0000, 0xA4050124); /* PSELA */ 86 __raw_writew(0x0000, 0xA4050124); /* PSELA */
90} 87}
91 88
92/* 89/*
diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c
index b221b6842b0..61605db04ee 100644
--- a/arch/sh/boards/mach-se/7722/irq.c
+++ b/arch/sh/boards/mach-se/7722/irq.c
@@ -21,13 +21,13 @@ unsigned int se7722_fpga_irq[SE7722_FPGA_IRQ_NR] = { 0, };
21static void disable_se7722_irq(unsigned int irq) 21static void disable_se7722_irq(unsigned int irq)
22{ 22{
23 unsigned int bit = (unsigned int)get_irq_chip_data(irq); 23 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
24 ctrl_outw(ctrl_inw(IRQ01_MASK) | 1 << bit, IRQ01_MASK); 24 __raw_writew(__raw_readw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
25} 25}
26 26
27static void enable_se7722_irq(unsigned int irq) 27static void enable_se7722_irq(unsigned int irq)
28{ 28{
29 unsigned int bit = (unsigned int)get_irq_chip_data(irq); 29 unsigned int bit = (unsigned int)get_irq_chip_data(irq);
30 ctrl_outw(ctrl_inw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK); 30 __raw_writew(__raw_readw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK);
31} 31}
32 32
33static struct irq_chip se7722_irq_chip __read_mostly = { 33static struct irq_chip se7722_irq_chip __read_mostly = {
@@ -39,7 +39,7 @@ static struct irq_chip se7722_irq_chip __read_mostly = {
39 39
40static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc) 40static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
41{ 41{
42 unsigned short intv = ctrl_inw(IRQ01_STS); 42 unsigned short intv = __raw_readw(IRQ01_STS);
43 unsigned int ext_irq = 0; 43 unsigned int ext_irq = 0;
44 44
45 intv &= (1 << SE7722_FPGA_IRQ_NR) - 1; 45 intv &= (1 << SE7722_FPGA_IRQ_NR) - 1;
@@ -59,8 +59,8 @@ void __init init_se7722_IRQ(void)
59{ 59{
60 int i, irq; 60 int i, irq;
61 61
62 ctrl_outw(0, IRQ01_MASK); /* disable all irqs */ 62 __raw_writew(0, IRQ01_MASK); /* disable all irqs */
63 ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */ 63 __raw_writew(0x2000, 0xb03fffec); /* mrshpc irq enable */
64 64
65 for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) { 65 for (i = 0; i < SE7722_FPGA_IRQ_NR; i++) {
66 irq = create_irq(); 66 irq = create_irq();
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
index b1cb9425b60..80a4e571b31 100644
--- a/arch/sh/boards/mach-se/7722/setup.c
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -25,26 +25,17 @@
25#include <cpu/sh7722.h> 25#include <cpu/sh7722.h>
26 26
27/* Heartbeat */ 27/* Heartbeat */
28static struct heartbeat_data heartbeat_data = { 28static struct resource heartbeat_resource = {
29 .regsize = 16, 29 .start = PA_LED,
30}; 30 .end = PA_LED,
31 31 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
32static struct resource heartbeat_resources[] = {
33 [0] = {
34 .start = PA_LED,
35 .end = PA_LED,
36 .flags = IORESOURCE_MEM,
37 },
38}; 32};
39 33
40static struct platform_device heartbeat_device = { 34static struct platform_device heartbeat_device = {
41 .name = "heartbeat", 35 .name = "heartbeat",
42 .id = -1, 36 .id = -1,
43 .dev = { 37 .num_resources = 1,
44 .platform_data = &heartbeat_data, 38 .resource = &heartbeat_resource,
45 },
46 .num_resources = ARRAY_SIZE(heartbeat_resources),
47 .resource = heartbeat_resources,
48}; 39};
49 40
50/* SMC91x */ 41/* SMC91x */
@@ -165,32 +156,32 @@ device_initcall(se7722_devices_setup);
165 156
166static void __init se7722_setup(char **cmdline_p) 157static void __init se7722_setup(char **cmdline_p)
167{ 158{
168 ctrl_outw(0x010D, FPGA_OUT); /* FPGA */ 159 __raw_writew(0x010D, FPGA_OUT); /* FPGA */
169 160
170 ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ 161 __raw_writew(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */
171 ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */ 162 __raw_writew(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */
172 163
173 /* LCDC I/O */ 164 /* LCDC I/O */
174 ctrl_outw(0x0020, PORT_PSELD); 165 __raw_writew(0x0020, PORT_PSELD);
175 166
176 /* SIOF1*/ 167 /* SIOF1*/
177 ctrl_outw(0x0003, PORT_PSELB); 168 __raw_writew(0x0003, PORT_PSELB);
178 ctrl_outw(0xe000, PORT_PSELC); 169 __raw_writew(0xe000, PORT_PSELC);
179 ctrl_outw(0x0000, PORT_PKCR); 170 __raw_writew(0x0000, PORT_PKCR);
180 171
181 /* LCDC */ 172 /* LCDC */
182 ctrl_outw(0x4020, PORT_PHCR); 173 __raw_writew(0x4020, PORT_PHCR);
183 ctrl_outw(0x0000, PORT_PLCR); 174 __raw_writew(0x0000, PORT_PLCR);
184 ctrl_outw(0x0000, PORT_PMCR); 175 __raw_writew(0x0000, PORT_PMCR);
185 ctrl_outw(0x0002, PORT_PRCR); 176 __raw_writew(0x0002, PORT_PRCR);
186 ctrl_outw(0x0000, PORT_PXCR); /* LCDC,CS6A */ 177 __raw_writew(0x0000, PORT_PXCR); /* LCDC,CS6A */
187 178
188 /* KEYSC */ 179 /* KEYSC */
189 ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */ 180 __raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */
190 ctrl_outw(0x0000, PORT_PYCR); 181 __raw_writew(0x0000, PORT_PYCR);
191 ctrl_outw(0x0000, PORT_PZCR); 182 __raw_writew(0x0000, PORT_PZCR);
192 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA); 183 __raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
193 ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC); 184 __raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
194} 185}
195 186
196/* 187/*
diff --git a/arch/sh/boards/mach-se/7724/irq.c b/arch/sh/boards/mach-se/7724/irq.c
index f76cf3b49f2..0942be2daef 100644
--- a/arch/sh/boards/mach-se/7724/irq.c
+++ b/arch/sh/boards/mach-se/7724/irq.c
@@ -72,14 +72,14 @@ static void disable_se7724_irq(unsigned int irq)
72{ 72{
73 struct fpga_irq set = get_fpga_irq(fpga2irq(irq)); 73 struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
74 unsigned int bit = irq - set.base; 74 unsigned int bit = irq - set.base;
75 ctrl_outw(ctrl_inw(set.mraddr) | 0x0001 << bit, set.mraddr); 75 __raw_writew(__raw_readw(set.mraddr) | 0x0001 << bit, set.mraddr);
76} 76}
77 77
78static void enable_se7724_irq(unsigned int irq) 78static void enable_se7724_irq(unsigned int irq)
79{ 79{
80 struct fpga_irq set = get_fpga_irq(fpga2irq(irq)); 80 struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
81 unsigned int bit = irq - set.base; 81 unsigned int bit = irq - set.base;
82 ctrl_outw(ctrl_inw(set.mraddr) & ~(0x0001 << bit), set.mraddr); 82 __raw_writew(__raw_readw(set.mraddr) & ~(0x0001 << bit), set.mraddr);
83} 83}
84 84
85static struct irq_chip se7724_irq_chip __read_mostly = { 85static struct irq_chip se7724_irq_chip __read_mostly = {
@@ -92,19 +92,16 @@ static struct irq_chip se7724_irq_chip __read_mostly = {
92static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc) 92static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
93{ 93{
94 struct fpga_irq set = get_fpga_irq(irq); 94 struct fpga_irq set = get_fpga_irq(irq);
95 unsigned short intv = ctrl_inw(set.sraddr); 95 unsigned short intv = __raw_readw(set.sraddr);
96 struct irq_desc *ext_desc;
97 unsigned int ext_irq = set.base; 96 unsigned int ext_irq = set.base;
98 97
99 intv &= set.mask; 98 intv &= set.mask;
100 99
101 while (intv) { 100 for (; intv; intv >>= 1, ext_irq++) {
102 if (intv & 0x0001) { 101 if (!(intv & 1))
103 ext_desc = irq_desc + ext_irq; 102 continue;
104 handle_level_irq(ext_irq, ext_desc); 103
105 } 104 generic_handle_irq(ext_irq);
106 intv >>= 1;
107 ext_irq++;
108 } 105 }
109} 106}
110 107
@@ -113,20 +110,39 @@ static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
113 */ 110 */
114void __init init_se7724_IRQ(void) 111void __init init_se7724_IRQ(void)
115{ 112{
116 int i; 113 int i, nid = cpu_to_node(boot_cpu_data);
117 114
118 ctrl_outw(0xffff, IRQ0_MR); /* mask all */ 115 __raw_writew(0xffff, IRQ0_MR); /* mask all */
119 ctrl_outw(0xffff, IRQ1_MR); /* mask all */ 116 __raw_writew(0xffff, IRQ1_MR); /* mask all */
120 ctrl_outw(0xffff, IRQ2_MR); /* mask all */ 117 __raw_writew(0xffff, IRQ2_MR); /* mask all */
121 ctrl_outw(0x0000, IRQ0_SR); /* clear irq */ 118 __raw_writew(0x0000, IRQ0_SR); /* clear irq */
122 ctrl_outw(0x0000, IRQ1_SR); /* clear irq */ 119 __raw_writew(0x0000, IRQ1_SR); /* clear irq */
123 ctrl_outw(0x0000, IRQ2_SR); /* clear irq */ 120 __raw_writew(0x0000, IRQ2_SR); /* clear irq */
124 ctrl_outw(0x002a, IRQ_MODE); /* set irq type */ 121 __raw_writew(0x002a, IRQ_MODE); /* set irq type */
125 122
126 for (i = 0; i < SE7724_FPGA_IRQ_NR; i++) 123 for (i = 0; i < SE7724_FPGA_IRQ_NR; i++) {
127 set_irq_chip_and_handler_name(SE7724_FPGA_IRQ_BASE + i, 124 int irq, wanted;
125
126 wanted = SE7724_FPGA_IRQ_BASE + i;
127
128 irq = create_irq_nr(wanted, nid);
129 if (unlikely(irq == 0)) {
130 pr_err("%s: failed hooking irq %d for FPGA\n",
131 __func__, wanted);
132 return;
133 }
134
135 if (unlikely(irq != wanted)) {
136 pr_err("%s: got irq %d but wanted %d, bailing.\n",
137 __func__, irq, wanted);
138 destroy_irq(irq);
139 return;
140 }
141
142 set_irq_chip_and_handler_name(irq,
128 &se7724_irq_chip, 143 &se7724_irq_chip,
129 handle_level_irq, "level"); 144 handle_level_irq, "level");
145 }
130 146
131 set_irq_chained_handler(IRQ0_IRQ, se7724_irq_demux); 147 set_irq_chained_handler(IRQ0_IRQ, se7724_irq_demux);
132 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); 148 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
diff --git a/arch/sh/boards/mach-se/7724/sdram.S b/arch/sh/boards/mach-se/7724/sdram.S
index 9040167d502..6fa4734d09c 100644
--- a/arch/sh/boards/mach-se/7724/sdram.S
+++ b/arch/sh/boards/mach-se/7724/sdram.S
@@ -39,6 +39,10 @@ ENTRY(ms7724se_sdram_leave_start)
39 39
40 /* DBSC: put memory in auto-refresh mode */ 40 /* DBSC: put memory in auto-refresh mode */
41 41
42 mov.l @(SH_SLEEP_MODE, r5), r0
43 tst #SUSP_SH_RSTANDBY, r0
44 bf resume_rstandby
45
42 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */ 46 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
43 WAIT 1 47 WAIT 1
44 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */ 48 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
@@ -49,4 +53,79 @@ ENTRY(ms7724se_sdram_leave_start)
49 rts 53 rts
50 nop 54 nop
51 55
56resume_rstandby:
57
58 /* CPG: setup clocks before restarting external memory */
59
60 ED 0xA4150024, 0x00004000 /* PLLCR */
61
62 mov.l FRQCRA,r0
63 mov.l @r0,r3
64 mov.l KICK,r1
65 or r1, r3
66 mov.l r3, @r0
67
68 mov.l LSTATS,r0
69 mov #1,r1
70WAIT_LSTATS:
71 mov.l @r0,r3
72 tst r1,r3
73 bf WAIT_LSTATS
74
75 /* DBSC: re-initialize and put in auto-refresh */
76
77 ED 0xFD000108, 0x00000181 /* DBPDCNT0 */
78 ED 0xFD000020, 0x015B0002 /* DBCONF */
79 ED 0xFD000030, 0x03071502 /* DBTR0 */
80 ED 0xFD000034, 0x02020102 /* DBTR1 */
81 ED 0xFD000038, 0x01090405 /* DBTR2 */
82 ED 0xFD00003C, 0x00000002 /* DBTR3 */
83 ED 0xFD000008, 0x00000005 /* DBKIND */
84 ED 0xFD000040, 0x00000001 /* DBRFPDN0 */
85 ED 0xFD000040, 0x00000000 /* DBRFPDN0 */
86 ED 0xFD000018, 0x00000001 /* DBCKECNT */
87
88 mov #100,r0
89WAIT_400NS:
90 dt r0
91 bf WAIT_400NS
92
93 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
94 ED 0xFD000060, 0x00020000 /* DBMRCNT (EMR2) */
95 ED 0xFD000060, 0x00030000 /* DBMRCNT (EMR3) */
96 ED 0xFD000060, 0x00010004 /* DBMRCNT (EMR) */
97 ED 0xFD000060, 0x00000532 /* DBMRCNT (MRS) */
98 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
99 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
100 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
101 ED 0xFD000060, 0x00000432 /* DBMRCNT (MRS) */
102 ED 0xFD000060, 0x000103c0 /* DBMRCNT (EMR) */
103 ED 0xFD000060, 0x00010040 /* DBMRCNT (EMR) */
104
105 mov #100,r0
106WAIT_400NS_2:
107 dt r0
108 bf WAIT_400NS_2
109
110 ED 0xFD000010, 0x00000001 /* DBEN */
111 ED 0xFD000044, 0x0000050f /* DBRFPDN1 */
112 ED 0xFD000048, 0x236800e6 /* DBRFPDN2 */
113
114 mov.l DUMMY,r0
115 mov.l @r0, r1 /* force single dummy read */
116
117 ED 0xFD000014, 0x00000002 /* DBCMDCNT (PALL) */
118 ED 0xFD000014, 0x00000004 /* DBCMDCNT (REF) */
119 ED 0xFD000108, 0x00000080 /* DBPDCNT0 */
120 ED 0xFD000040, 0x00010000 /* DBRFPDN0 */
121
122 rts
123 nop
124
125 .balign 4
126DUMMY: .long 0xac400000
127FRQCRA: .long 0xa4150000
128KICK: .long 0x80000000
129LSTATS: .long 0xa4150060
130
52ENTRY(ms7724se_sdram_leave_end) 131ENTRY(ms7724se_sdram_leave_end)
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index 858ecb25d46..66cdbc3c7af 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -53,26 +53,17 @@
53 */ 53 */
54 54
55/* Heartbeat */ 55/* Heartbeat */
56static struct heartbeat_data heartbeat_data = { 56static struct resource heartbeat_resource = {
57 .regsize = 16, 57 .start = PA_LED,
58}; 58 .end = PA_LED,
59 59 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
60static struct resource heartbeat_resources[] = {
61 [0] = {
62 .start = PA_LED,
63 .end = PA_LED,
64 .flags = IORESOURCE_MEM,
65 },
66}; 60};
67 61
68static struct platform_device heartbeat_device = { 62static struct platform_device heartbeat_device = {
69 .name = "heartbeat", 63 .name = "heartbeat",
70 .id = -1, 64 .id = -1,
71 .dev = { 65 .num_resources = 1,
72 .platform_data = &heartbeat_data, 66 .resource = &heartbeat_resource,
73 },
74 .num_resources = ARRAY_SIZE(heartbeat_resources),
75 .resource = heartbeat_resources,
76}; 67};
77 68
78/* LAN91C111 */ 69/* LAN91C111 */
@@ -265,12 +256,12 @@ static struct platform_device ceu1_device = {
265#define FCLKACR 0xa4150008 256#define FCLKACR 0xa4150008
266static void fsimck_init(struct clk *clk) 257static void fsimck_init(struct clk *clk)
267{ 258{
268 u32 status = ctrl_inl(clk->enable_reg); 259 u32 status = __raw_readl(clk->enable_reg);
269 260
270 /* use external clock */ 261 /* use external clock */
271 status &= ~0x000000ff; 262 status &= ~0x000000ff;
272 status |= 0x00000080; 263 status |= 0x00000080;
273 ctrl_outl(status, clk->enable_reg); 264 __raw_writel(status, clk->enable_reg);
274} 265}
275 266
276static struct clk_ops fsimck_clk_ops = { 267static struct clk_ops fsimck_clk_ops = {
@@ -322,7 +313,7 @@ static struct platform_device fsi_device = {
322/* KEYSC in SoC (Needs SW33-2 set to ON) */ 313/* KEYSC in SoC (Needs SW33-2 set to ON) */
323static struct sh_keysc_info keysc_info = { 314static struct sh_keysc_info keysc_info = {
324 .mode = SH_KEYSC_MODE_1, 315 .mode = SH_KEYSC_MODE_1,
325 .scan_timing = 10, 316 .scan_timing = 3,
326 .delay = 50, 317 .delay = 50,
327 .keycodes = { 318 .keycodes = {
328 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, 319 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
@@ -460,7 +451,7 @@ static struct resource sdhi0_cn7_resources[] = {
460 .flags = IORESOURCE_MEM, 451 .flags = IORESOURCE_MEM,
461 }, 452 },
462 [1] = { 453 [1] = {
463 .start = 101, 454 .start = 100,
464 .flags = IORESOURCE_IRQ, 455 .flags = IORESOURCE_IRQ,
465 }, 456 },
466}; 457};
@@ -483,7 +474,7 @@ static struct resource sdhi1_cn8_resources[] = {
483 .flags = IORESOURCE_MEM, 474 .flags = IORESOURCE_MEM,
484 }, 475 },
485 [1] = { 476 [1] = {
486 .start = 24, 477 .start = 23,
487 .flags = IORESOURCE_IRQ, 478 .flags = IORESOURCE_IRQ,
488 }, 479 },
489}; 480};
@@ -498,6 +489,26 @@ static struct platform_device sdhi1_cn8_device = {
498 }, 489 },
499}; 490};
500 491
492/* IrDA */
493static struct resource irda_resources[] = {
494 [0] = {
495 .name = "IrDA",
496 .start = 0xA45D0000,
497 .end = 0xA45D0049,
498 .flags = IORESOURCE_MEM,
499 },
500 [1] = {
501 .start = 20,
502 .flags = IORESOURCE_IRQ,
503 },
504};
505
506static struct platform_device irda_device = {
507 .name = "sh_sir",
508 .num_resources = ARRAY_SIZE(irda_resources),
509 .resource = irda_resources,
510};
511
501static struct platform_device *ms7724se_devices[] __initdata = { 512static struct platform_device *ms7724se_devices[] __initdata = {
502 &heartbeat_device, 513 &heartbeat_device,
503 &smc91x_eth_device, 514 &smc91x_eth_device,
@@ -512,6 +523,7 @@ static struct platform_device *ms7724se_devices[] __initdata = {
512 &fsi_device, 523 &fsi_device,
513 &sdhi0_cn7_device, 524 &sdhi0_cn7_device,
514 &sdhi1_cn8_device, 525 &sdhi1_cn8_device,
526 &irda_device,
515}; 527};
516 528
517/* I2C device */ 529/* I2C device */
@@ -531,7 +543,7 @@ static int __init sh_eth_is_eeprom_ready(void)
531 int t = 10000; 543 int t = 10000;
532 544
533 while (t--) { 545 while (t--) {
534 if (!ctrl_inw(EEPROM_STAT)) 546 if (!__raw_readw(EEPROM_STAT))
535 return 1; 547 return 1;
536 udelay(1); 548 udelay(1);
537 } 549 }
@@ -551,13 +563,13 @@ static void __init sh_eth_init(void)
551 563
552 /* read MAC addr from EEPROM */ 564 /* read MAC addr from EEPROM */
553 for (i = 0 ; i < 3 ; i++) { 565 for (i = 0 ; i < 3 ; i++) {
554 ctrl_outw(0x0, EEPROM_OP); /* read */ 566 __raw_writew(0x0, EEPROM_OP); /* read */
555 ctrl_outw(i*2, EEPROM_ADR); 567 __raw_writew(i*2, EEPROM_ADR);
556 ctrl_outw(0x1, EEPROM_STRT); 568 __raw_writew(0x1, EEPROM_STRT);
557 if (!sh_eth_is_eeprom_ready()) 569 if (!sh_eth_is_eeprom_ready())
558 return; 570 return;
559 571
560 mac = ctrl_inw(EEPROM_DATA); 572 mac = __raw_readw(EEPROM_DATA);
561 sh_eth_plat.mac_addr[i << 1] = mac & 0xff; 573 sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
562 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8; 574 sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
563 } 575 }
@@ -594,28 +606,29 @@ arch_initcall(arch_setup);
594 606
595static int __init devices_setup(void) 607static int __init devices_setup(void)
596{ 608{
597 u16 sw = ctrl_inw(SW4140); /* select camera, monitor */ 609 u16 sw = __raw_readw(SW4140); /* select camera, monitor */
598 struct clk *fsia_clk; 610 struct clk *clk;
599 611
600 /* register board specific self-refresh code */ 612 /* register board specific self-refresh code */
601 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF, 613 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
614 SUSP_SH_RSTANDBY,
602 &ms7724se_sdram_enter_start, 615 &ms7724se_sdram_enter_start,
603 &ms7724se_sdram_enter_end, 616 &ms7724se_sdram_enter_end,
604 &ms7724se_sdram_leave_start, 617 &ms7724se_sdram_leave_start,
605 &ms7724se_sdram_leave_end); 618 &ms7724se_sdram_leave_end);
606 /* Reset Release */ 619 /* Reset Release */
607 ctrl_outw(ctrl_inw(FPGA_OUT) & 620 __raw_writew(__raw_readw(FPGA_OUT) &
608 ~((1 << 1) | /* LAN */ 621 ~((1 << 1) | /* LAN */
609 (1 << 6) | /* VIDEO DAC */ 622 (1 << 6) | /* VIDEO DAC */
610 (1 << 7) | /* AK4643 */ 623 (1 << 7) | /* AK4643 */
624 (1 << 8) | /* IrDA */
611 (1 << 12) | /* USB0 */ 625 (1 << 12) | /* USB0 */
612 (1 << 14)), /* RMII */ 626 (1 << 14)), /* RMII */
613 FPGA_OUT); 627 FPGA_OUT);
614 628
615 /* turn on USB clocks, use external clock */ 629 /* turn on USB clocks, use external clock */
616 ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); 630 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
617 631
618#ifdef CONFIG_PM
619 /* Let LED9 show STATUS2 */ 632 /* Let LED9 show STATUS2 */
620 gpio_request(GPIO_FN_STATUS2, NULL); 633 gpio_request(GPIO_FN_STATUS2, NULL);
621 634
@@ -624,28 +637,12 @@ static int __init devices_setup(void)
624 637
625 /* Lit LED11 show PDSTATUS */ 638 /* Lit LED11 show PDSTATUS */
626 gpio_request(GPIO_FN_PDSTATUS, NULL); 639 gpio_request(GPIO_FN_PDSTATUS, NULL);
627#else
628 /* Lit LED9 */
629 gpio_request(GPIO_PTJ6, NULL);
630 gpio_direction_output(GPIO_PTJ6, 1);
631 gpio_export(GPIO_PTJ6, 0);
632
633 /* Lit LED10 */
634 gpio_request(GPIO_PTJ5, NULL);
635 gpio_direction_output(GPIO_PTJ5, 1);
636 gpio_export(GPIO_PTJ5, 0);
637
638 /* Lit LED11 */
639 gpio_request(GPIO_PTJ7, NULL);
640 gpio_direction_output(GPIO_PTJ7, 1);
641 gpio_export(GPIO_PTJ7, 0);
642#endif
643 640
644 /* enable USB0 port */ 641 /* enable USB0 port */
645 ctrl_outw(0x0600, 0xa40501d4); 642 __raw_writew(0x0600, 0xa40501d4);
646 643
647 /* enable USB1 port */ 644 /* enable USB1 port */
648 ctrl_outw(0x0600, 0xa4050192); 645 __raw_writew(0x0600, 0xa4050192);
649 646
650 /* enable IRQ 0,1,2 */ 647 /* enable IRQ 0,1,2 */
651 gpio_request(GPIO_FN_INTC_IRQ0, NULL); 648 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
@@ -693,7 +690,7 @@ static int __init devices_setup(void)
693 gpio_request(GPIO_FN_LCDVCPWC, NULL); 690 gpio_request(GPIO_FN_LCDVCPWC, NULL);
694 gpio_request(GPIO_FN_LCDRD, NULL); 691 gpio_request(GPIO_FN_LCDRD, NULL);
695 gpio_request(GPIO_FN_LCDLCLK, NULL); 692 gpio_request(GPIO_FN_LCDLCLK, NULL);
696 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA); 693 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
697 694
698 /* enable CEU0 */ 695 /* enable CEU0 */
699 gpio_request(GPIO_FN_VIO0_D15, NULL); 696 gpio_request(GPIO_FN_VIO0_D15, NULL);
@@ -764,13 +761,18 @@ static int __init devices_setup(void)
764 gpio_request(GPIO_FN_CLKAUDIOBO, NULL); 761 gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
765 gpio_request(GPIO_FN_FSIIASD, NULL); 762 gpio_request(GPIO_FN_FSIIASD, NULL);
766 763
764 /* set SPU2 clock to 83.4 MHz */
765 clk = clk_get(NULL, "spu_clk");
766 clk_set_rate(clk, clk_round_rate(clk, 83333333));
767 clk_put(clk);
768
767 /* change parent of FSI A */ 769 /* change parent of FSI A */
768 fsia_clk = clk_get(NULL, "fsia_clk"); 770 clk = clk_get(NULL, "fsia_clk");
769 clk_register(&fsimcka_clk); 771 clk_register(&fsimcka_clk);
770 clk_set_parent(fsia_clk, &fsimcka_clk); 772 clk_set_parent(clk, &fsimcka_clk);
771 clk_set_rate(fsia_clk, 11000); 773 clk_set_rate(clk, 11000);
772 clk_set_rate(&fsimcka_clk, 11000); 774 clk_set_rate(&fsimcka_clk, 11000);
773 clk_put(fsia_clk); 775 clk_put(clk);
774 776
775 /* SDHI0 connected to cn7 */ 777 /* SDHI0 connected to cn7 */
776 gpio_request(GPIO_FN_SDHI0CD, NULL); 778 gpio_request(GPIO_FN_SDHI0CD, NULL);
@@ -792,6 +794,10 @@ static int __init devices_setup(void)
792 gpio_request(GPIO_FN_SDHI1CMD, NULL); 794 gpio_request(GPIO_FN_SDHI1CMD, NULL);
793 gpio_request(GPIO_FN_SDHI1CLK, NULL); 795 gpio_request(GPIO_FN_SDHI1CLK, NULL);
794 796
797 /* enable IrDA */
798 gpio_request(GPIO_FN_IRDA_OUT, NULL);
799 gpio_request(GPIO_FN_IRDA_IN, NULL);
800
795 /* 801 /*
796 * enable SH-Eth 802 * enable SH-Eth
797 * 803 *
diff --git a/arch/sh/boards/mach-se/7780/irq.c b/arch/sh/boards/mach-se/7780/irq.c
index 121744c0871..d5c9edc172a 100644
--- a/arch/sh/boards/mach-se/7780/irq.c
+++ b/arch/sh/boards/mach-se/7780/irq.c
@@ -24,30 +24,30 @@
24void __init init_se7780_IRQ(void) 24void __init init_se7780_IRQ(void)
25{ 25{
26 /* enable all interrupt at FPGA */ 26 /* enable all interrupt at FPGA */
27 ctrl_outw(0, FPGA_INTMSK1); 27 __raw_writew(0, FPGA_INTMSK1);
28 /* mask SM501 interrupt */ 28 /* mask SM501 interrupt */
29 ctrl_outw((ctrl_inw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1); 29 __raw_writew((__raw_readw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1);
30 /* enable all interrupt at FPGA */ 30 /* enable all interrupt at FPGA */
31 ctrl_outw(0, FPGA_INTMSK2); 31 __raw_writew(0, FPGA_INTMSK2);
32 32
33 /* set FPGA INTSEL register */ 33 /* set FPGA INTSEL register */
34 /* FPGA + 0x06 */ 34 /* FPGA + 0x06 */
35 ctrl_outw( ((IRQPIN_SM501 << IRQPOS_SM501) | 35 __raw_writew( ((IRQPIN_SM501 << IRQPOS_SM501) |
36 (IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1); 36 (IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1);
37 37
38 /* FPGA + 0x08 */ 38 /* FPGA + 0x08 */
39 ctrl_outw(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) | 39 __raw_writew(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) |
40 (IRQPIN_EXTINT3 << IRQPOS_EXTINT3) | 40 (IRQPIN_EXTINT3 << IRQPOS_EXTINT3) |
41 (IRQPIN_EXTINT2 << IRQPOS_EXTINT2) | 41 (IRQPIN_EXTINT2 << IRQPOS_EXTINT2) |
42 (IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2); 42 (IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2);
43 43
44 /* FPGA + 0x0A */ 44 /* FPGA + 0x0A */
45 ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3); 45 __raw_writew((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
46 46
47 plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */ 47 plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */
48 48
49 /* ICR1: detect low level(for 2ndcut) */ 49 /* ICR1: detect low level(for 2ndcut) */
50 ctrl_outl(0xAAAA0000, INTC_ICR1); 50 __raw_writel(0xAAAA0000, INTC_ICR1);
51 51
52 /* 52 /*
53 * FPGA PCISEL register initialize 53 * FPGA PCISEL register initialize
@@ -63,6 +63,6 @@ void __init init_se7780_IRQ(void)
63 * INTD || INTD | INTC | -- | INTA 63 * INTD || INTD | INTC | -- | INTA
64 * ------------------------------------- 64 * -------------------------------------
65 */ 65 */
66 ctrl_outw(0x0013, FPGA_PCI_INTSEL1); 66 __raw_writew(0x0013, FPGA_PCI_INTSEL1);
67 ctrl_outw(0xE402, FPGA_PCI_INTSEL2); 67 __raw_writew(0xE402, FPGA_PCI_INTSEL2);
68} 68}
diff --git a/arch/sh/boards/mach-se/7780/setup.c b/arch/sh/boards/mach-se/7780/setup.c
index 1d3a867e94e..6f7c207138e 100644
--- a/arch/sh/boards/mach-se/7780/setup.c
+++ b/arch/sh/boards/mach-se/7780/setup.c
@@ -17,26 +17,17 @@
17#include <asm/heartbeat.h> 17#include <asm/heartbeat.h>
18 18
19/* Heartbeat */ 19/* Heartbeat */
20static struct heartbeat_data heartbeat_data = { 20static struct resource heartbeat_resource = {
21 .regsize = 16, 21 .start = PA_LED,
22}; 22 .end = PA_LED,
23 23 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
24static struct resource heartbeat_resources[] = {
25 [0] = {
26 .start = PA_LED,
27 .end = PA_LED,
28 .flags = IORESOURCE_MEM,
29 },
30}; 24};
31 25
32static struct platform_device heartbeat_device = { 26static struct platform_device heartbeat_device = {
33 .name = "heartbeat", 27 .name = "heartbeat",
34 .id = -1, 28 .id = -1,
35 .dev = { 29 .num_resources = 1,
36 .platform_data = &heartbeat_data, 30 .resource = &heartbeat_resource,
37 },
38 .num_resources = ARRAY_SIZE(heartbeat_resources),
39 .resource = heartbeat_resources,
40}; 31};
41 32
42/* SMC91x */ 33/* SMC91x */
@@ -84,14 +75,14 @@ device_initcall(se7780_devices_setup);
84static void __init se7780_setup(char **cmdline_p) 75static void __init se7780_setup(char **cmdline_p)
85{ 76{
86 /* "SH-Linux" on LED Display */ 77 /* "SH-Linux" on LED Display */
87 ctrl_outw( 'S' , PA_LED_DISP + (DISP_SEL0_ADDR << 1) ); 78 __raw_writew( 'S' , PA_LED_DISP + (DISP_SEL0_ADDR << 1) );
88 ctrl_outw( 'H' , PA_LED_DISP + (DISP_SEL1_ADDR << 1) ); 79 __raw_writew( 'H' , PA_LED_DISP + (DISP_SEL1_ADDR << 1) );
89 ctrl_outw( '-' , PA_LED_DISP + (DISP_SEL2_ADDR << 1) ); 80 __raw_writew( '-' , PA_LED_DISP + (DISP_SEL2_ADDR << 1) );
90 ctrl_outw( 'L' , PA_LED_DISP + (DISP_SEL3_ADDR << 1) ); 81 __raw_writew( 'L' , PA_LED_DISP + (DISP_SEL3_ADDR << 1) );
91 ctrl_outw( 'i' , PA_LED_DISP + (DISP_SEL4_ADDR << 1) ); 82 __raw_writew( 'i' , PA_LED_DISP + (DISP_SEL4_ADDR << 1) );
92 ctrl_outw( 'n' , PA_LED_DISP + (DISP_SEL5_ADDR << 1) ); 83 __raw_writew( 'n' , PA_LED_DISP + (DISP_SEL5_ADDR << 1) );
93 ctrl_outw( 'u' , PA_LED_DISP + (DISP_SEL6_ADDR << 1) ); 84 __raw_writew( 'u' , PA_LED_DISP + (DISP_SEL6_ADDR << 1) );
94 ctrl_outw( 'x' , PA_LED_DISP + (DISP_SEL7_ADDR << 1) ); 85 __raw_writew( 'x' , PA_LED_DISP + (DISP_SEL7_ADDR << 1) );
95 86
96 printk(KERN_INFO "Hitachi UL Solutions Engine 7780SE03 support.\n"); 87 printk(KERN_INFO "Hitachi UL Solutions Engine 7780SE03 support.\n");
97 88
@@ -102,15 +93,15 @@ static void __init se7780_setup(char **cmdline_p)
102 * REQ2/GNT2 -> Serial ATA 93 * REQ2/GNT2 -> Serial ATA
103 * REQ3/GNT3 -> PCI slot 94 * REQ3/GNT3 -> PCI slot
104 */ 95 */
105 ctrl_outw(0x0213, FPGA_REQSEL); 96 __raw_writew(0x0213, FPGA_REQSEL);
106 97
107 /* GPIO setting */ 98 /* GPIO setting */
108 ctrl_outw(0x0000, GPIO_PECR); 99 __raw_writew(0x0000, GPIO_PECR);
109 ctrl_outw(ctrl_inw(GPIO_PHCR)&0xfff3, GPIO_PHCR); 100 __raw_writew(__raw_readw(GPIO_PHCR)&0xfff3, GPIO_PHCR);
110 ctrl_outw(0x0c00, GPIO_PMSELR); 101 __raw_writew(0x0c00, GPIO_PMSELR);
111 102
112 /* iVDR Power ON */ 103 /* iVDR Power ON */
113 ctrl_outw(0x0001, FPGA_IVDRPW); 104 __raw_writew(0x0001, FPGA_IVDRPW);
114} 105}
115 106
116/* 107/*
diff --git a/arch/sh/boards/mach-sh03/rtc.c b/arch/sh/boards/mach-sh03/rtc.c
index a8b9f844ab5..1b200990500 100644
--- a/arch/sh/boards/mach-sh03/rtc.c
+++ b/arch/sh/boards/mach-sh03/rtc.c
@@ -44,15 +44,15 @@ unsigned long get_cmos_time(void)
44 spin_lock(&sh03_rtc_lock); 44 spin_lock(&sh03_rtc_lock);
45 again: 45 again:
46 do { 46 do {
47 sec = (ctrl_inb(RTC_SEC1) & 0xf) + (ctrl_inb(RTC_SEC10) & 0x7) * 10; 47 sec = (__raw_readb(RTC_SEC1) & 0xf) + (__raw_readb(RTC_SEC10) & 0x7) * 10;
48 min = (ctrl_inb(RTC_MIN1) & 0xf) + (ctrl_inb(RTC_MIN10) & 0xf) * 10; 48 min = (__raw_readb(RTC_MIN1) & 0xf) + (__raw_readb(RTC_MIN10) & 0xf) * 10;
49 hour = (ctrl_inb(RTC_HOU1) & 0xf) + (ctrl_inb(RTC_HOU10) & 0xf) * 10; 49 hour = (__raw_readb(RTC_HOU1) & 0xf) + (__raw_readb(RTC_HOU10) & 0xf) * 10;
50 day = (ctrl_inb(RTC_DAY1) & 0xf) + (ctrl_inb(RTC_DAY10) & 0xf) * 10; 50 day = (__raw_readb(RTC_DAY1) & 0xf) + (__raw_readb(RTC_DAY10) & 0xf) * 10;
51 mon = (ctrl_inb(RTC_MON1) & 0xf) + (ctrl_inb(RTC_MON10) & 0xf) * 10; 51 mon = (__raw_readb(RTC_MON1) & 0xf) + (__raw_readb(RTC_MON10) & 0xf) * 10;
52 year = (ctrl_inb(RTC_YEA1) & 0xf) + (ctrl_inb(RTC_YEA10) & 0xf) * 10 52 year = (__raw_readb(RTC_YEA1) & 0xf) + (__raw_readb(RTC_YEA10) & 0xf) * 10
53 + (ctrl_inb(RTC_YEA100 ) & 0xf) * 100 53 + (__raw_readb(RTC_YEA100 ) & 0xf) * 100
54 + (ctrl_inb(RTC_YEA1000) & 0xf) * 1000; 54 + (__raw_readb(RTC_YEA1000) & 0xf) * 1000;
55 } while (sec != (ctrl_inb(RTC_SEC1) & 0xf) + (ctrl_inb(RTC_SEC10) & 0x7) * 10); 55 } while (sec != (__raw_readb(RTC_SEC1) & 0xf) + (__raw_readb(RTC_SEC10) & 0x7) * 10);
56 if (year == 0 || mon < 1 || mon > 12 || day > 31 || day < 1 || 56 if (year == 0 || mon < 1 || mon > 12 || day > 31 || day < 1 ||
57 hour > 23 || min > 59 || sec > 59) { 57 hour > 23 || min > 59 || sec > 59) {
58 printk(KERN_ERR 58 printk(KERN_ERR
@@ -60,16 +60,16 @@ unsigned long get_cmos_time(void)
60 printk("year=%d, mon=%d, day=%d, hour=%d, min=%d, sec=%d\n", 60 printk("year=%d, mon=%d, day=%d, hour=%d, min=%d, sec=%d\n",
61 year, mon, day, hour, min, sec); 61 year, mon, day, hour, min, sec);
62 62
63 ctrl_outb(0, RTC_SEC1); ctrl_outb(0, RTC_SEC10); 63 __raw_writeb(0, RTC_SEC1); __raw_writeb(0, RTC_SEC10);
64 ctrl_outb(0, RTC_MIN1); ctrl_outb(0, RTC_MIN10); 64 __raw_writeb(0, RTC_MIN1); __raw_writeb(0, RTC_MIN10);
65 ctrl_outb(0, RTC_HOU1); ctrl_outb(0, RTC_HOU10); 65 __raw_writeb(0, RTC_HOU1); __raw_writeb(0, RTC_HOU10);
66 ctrl_outb(6, RTC_WEE1); 66 __raw_writeb(6, RTC_WEE1);
67 ctrl_outb(1, RTC_DAY1); ctrl_outb(0, RTC_DAY10); 67 __raw_writeb(1, RTC_DAY1); __raw_writeb(0, RTC_DAY10);
68 ctrl_outb(1, RTC_MON1); ctrl_outb(0, RTC_MON10); 68 __raw_writeb(1, RTC_MON1); __raw_writeb(0, RTC_MON10);
69 ctrl_outb(0, RTC_YEA1); ctrl_outb(0, RTC_YEA10); 69 __raw_writeb(0, RTC_YEA1); __raw_writeb(0, RTC_YEA10);
70 ctrl_outb(0, RTC_YEA100); 70 __raw_writeb(0, RTC_YEA100);
71 ctrl_outb(2, RTC_YEA1000); 71 __raw_writeb(2, RTC_YEA1000);
72 ctrl_outb(0, RTC_CTL); 72 __raw_writeb(0, RTC_CTL);
73 goto again; 73 goto again;
74 } 74 }
75 75
@@ -93,9 +93,9 @@ static int set_rtc_mmss(unsigned long nowtime)
93 /* gets recalled with irq locally disabled */ 93 /* gets recalled with irq locally disabled */
94 spin_lock(&sh03_rtc_lock); 94 spin_lock(&sh03_rtc_lock);
95 for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */ 95 for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */
96 if (!(ctrl_inb(RTC_CTL) & RTC_BUSY)) 96 if (!(__raw_readb(RTC_CTL) & RTC_BUSY))
97 break; 97 break;
98 cmos_minutes = (ctrl_inb(RTC_MIN1) & 0xf) + (ctrl_inb(RTC_MIN10) & 0xf) * 10; 98 cmos_minutes = (__raw_readb(RTC_MIN1) & 0xf) + (__raw_readb(RTC_MIN10) & 0xf) * 10;
99 real_seconds = nowtime % 60; 99 real_seconds = nowtime % 60;
100 real_minutes = nowtime / 60; 100 real_minutes = nowtime / 60;
101 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) 101 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
@@ -103,10 +103,10 @@ static int set_rtc_mmss(unsigned long nowtime)
103 real_minutes %= 60; 103 real_minutes %= 60;
104 104
105 if (abs(real_minutes - cmos_minutes) < 30) { 105 if (abs(real_minutes - cmos_minutes) < 30) {
106 ctrl_outb(real_seconds % 10, RTC_SEC1); 106 __raw_writeb(real_seconds % 10, RTC_SEC1);
107 ctrl_outb(real_seconds / 10, RTC_SEC10); 107 __raw_writeb(real_seconds / 10, RTC_SEC10);
108 ctrl_outb(real_minutes % 10, RTC_MIN1); 108 __raw_writeb(real_minutes % 10, RTC_MIN1);
109 ctrl_outb(real_minutes / 10, RTC_MIN10); 109 __raw_writeb(real_minutes / 10, RTC_MIN10);
110 } else { 110 } else {
111 printk(KERN_WARNING 111 printk(KERN_WARNING
112 "set_rtc_mmss: can't update from %d to %d\n", 112 "set_rtc_mmss: can't update from %d to %d\n",
diff --git a/arch/sh/boards/mach-sh03/setup.c b/arch/sh/boards/mach-sh03/setup.c
index 74cfb4b8b03..af4a0c012a9 100644
--- a/arch/sh/boards/mach-sh03/setup.c
+++ b/arch/sh/boards/mach-sh03/setup.c
@@ -82,7 +82,7 @@ static int __init sh03_devices_setup(void)
82 /* open I/O area window */ 82 /* open I/O area window */
83 paddrbase = virt_to_phys((void *)PA_AREA5_IO); 83 paddrbase = virt_to_phys((void *)PA_AREA5_IO);
84 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16); 84 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
85 cf_ide_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot); 85 cf_ide_base = ioremap_prot(paddrbase, PAGE_SIZE, pgprot_val(prot));
86 if (!cf_ide_base) { 86 if (!cf_ide_base) {
87 printk("allocate_cf_area : can't open CF I/O window!\n"); 87 printk("allocate_cf_area : can't open CF I/O window!\n");
88 return -ENOMEM; 88 return -ENOMEM;
diff --git a/arch/sh/boards/mach-sh7763rdp/irq.c b/arch/sh/boards/mach-sh7763rdp/irq.c
index d8ebfa7d8c7..add698c8f2b 100644
--- a/arch/sh/boards/mach-sh7763rdp/irq.c
+++ b/arch/sh/boards/mach-sh7763rdp/irq.c
@@ -28,18 +28,18 @@
28void __init init_sh7763rdp_IRQ(void) 28void __init init_sh7763rdp_IRQ(void)
29{ 29{
30 /* GPIO enabled */ 30 /* GPIO enabled */
31 ctrl_outl(1 << 25, INTC_INT2MSKCR); 31 __raw_writel(1 << 25, INTC_INT2MSKCR);
32 32
33 /* enable GPIO interrupts */ 33 /* enable GPIO interrupts */
34 ctrl_outl((ctrl_inl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000, 34 __raw_writel((__raw_readl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000,
35 INTC_INT2PRI7); 35 INTC_INT2PRI7);
36 36
37 /* USBH enabled */ 37 /* USBH enabled */
38 ctrl_outl(1 << 17, INTC_INT2MSKCR1); 38 __raw_writel(1 << 17, INTC_INT2MSKCR1);
39 39
40 /* GETHER enabled */ 40 /* GETHER enabled */
41 ctrl_outl(1 << 16, INTC_INT2MSKCR1); 41 __raw_writel(1 << 16, INTC_INT2MSKCR1);
42 42
43 /* DMAC enabled */ 43 /* DMAC enabled */
44 ctrl_outl(1 << 8, INTC_INT2MSKCR); 44 __raw_writel(1 << 8, INTC_INT2MSKCR);
45} 45}
diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c
index 390534a0b35..f64a6918224 100644
--- a/arch/sh/boards/mach-sh7763rdp/setup.c
+++ b/arch/sh/boards/mach-sh7763rdp/setup.c
@@ -158,50 +158,50 @@ device_initcall(sh7763rdp_devices_setup);
158static void __init sh7763rdp_setup(char **cmdline_p) 158static void __init sh7763rdp_setup(char **cmdline_p)
159{ 159{
160 /* Board version check */ 160 /* Board version check */
161 if (ctrl_inw(CPLD_BOARD_ID_ERV_REG) == 0xECB1) 161 if (__raw_readw(CPLD_BOARD_ID_ERV_REG) == 0xECB1)
162 printk(KERN_INFO "RTE Standard Configuration\n"); 162 printk(KERN_INFO "RTE Standard Configuration\n");
163 else 163 else
164 printk(KERN_INFO "RTA Standard Configuration\n"); 164 printk(KERN_INFO "RTA Standard Configuration\n");
165 165
166 /* USB pin select bits (clear bit 5-2 to 0) */ 166 /* USB pin select bits (clear bit 5-2 to 0) */
167 ctrl_outw((ctrl_inw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2); 167 __raw_writew((__raw_readw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2);
168 /* USBH setup port I controls to other (clear bits 4-9 to 0) */ 168 /* USBH setup port I controls to other (clear bits 4-9 to 0) */
169 ctrl_outw(ctrl_inw(PORT_PICR) & 0xFC0F, PORT_PICR); 169 __raw_writew(__raw_readw(PORT_PICR) & 0xFC0F, PORT_PICR);
170 170
171 /* Select USB Host controller */ 171 /* Select USB Host controller */
172 ctrl_outw(0x00, USB_USBHSC); 172 __raw_writew(0x00, USB_USBHSC);
173 173
174 /* For LCD */ 174 /* For LCD */
175 /* set PTJ7-1, bits 15-2 of PJCR to 0 */ 175 /* set PTJ7-1, bits 15-2 of PJCR to 0 */
176 ctrl_outw(ctrl_inw(PORT_PJCR) & 0x0003, PORT_PJCR); 176 __raw_writew(__raw_readw(PORT_PJCR) & 0x0003, PORT_PJCR);
177 /* set PTI5, bits 11-10 of PICR to 0 */ 177 /* set PTI5, bits 11-10 of PICR to 0 */
178 ctrl_outw(ctrl_inw(PORT_PICR) & 0xF3FF, PORT_PICR); 178 __raw_writew(__raw_readw(PORT_PICR) & 0xF3FF, PORT_PICR);
179 ctrl_outw(0, PORT_PKCR); 179 __raw_writew(0, PORT_PKCR);
180 ctrl_outw(0, PORT_PLCR); 180 __raw_writew(0, PORT_PLCR);
181 /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */ 181 /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */
182 ctrl_outw((ctrl_inw(PORT_PSEL2) & 0x00C0), PORT_PSEL2); 182 __raw_writew((__raw_readw(PORT_PSEL2) & 0x00C0), PORT_PSEL2);
183 /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */ 183 /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */
184 ctrl_outw((ctrl_inw(PORT_PSEL3) & 0x0700), PORT_PSEL3); 184 __raw_writew((__raw_readw(PORT_PSEL3) & 0x0700), PORT_PSEL3);
185 185
186 /* For HAC */ 186 /* For HAC */
187 /* bit3-0 0100:HAC & SSI1 enable */ 187 /* bit3-0 0100:HAC & SSI1 enable */
188 ctrl_outw((ctrl_inw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1); 188 __raw_writew((__raw_readw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1);
189 /* bit14 1:SSI_HAC_CLK enable */ 189 /* bit14 1:SSI_HAC_CLK enable */
190 ctrl_outw(ctrl_inw(PORT_PSEL4) | 0x4000, PORT_PSEL4); 190 __raw_writew(__raw_readw(PORT_PSEL4) | 0x4000, PORT_PSEL4);
191 191
192 /* SH-Ether */ 192 /* SH-Ether */
193 ctrl_outw((ctrl_inw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1); 193 __raw_writew((__raw_readw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1);
194 ctrl_outw(0x0, PORT_PFCR); 194 __raw_writew(0x0, PORT_PFCR);
195 ctrl_outw(0x0, PORT_PFCR); 195 __raw_writew(0x0, PORT_PFCR);
196 ctrl_outw(0x0, PORT_PFCR); 196 __raw_writew(0x0, PORT_PFCR);
197 197
198 /* MMC */ 198 /* MMC */
199 /*selects SCIF and MMC other functions */ 199 /*selects SCIF and MMC other functions */
200 ctrl_outw(0x0001, PORT_PSEL0); 200 __raw_writew(0x0001, PORT_PSEL0);
201 /* MMC clock operates */ 201 /* MMC clock operates */
202 ctrl_outl(ctrl_inl(MSTPCR1) & ~0x8, MSTPCR1); 202 __raw_writel(__raw_readl(MSTPCR1) & ~0x8, MSTPCR1);
203 ctrl_outw(ctrl_inw(PORT_PACR) & ~0x3000, PORT_PACR); 203 __raw_writew(__raw_readw(PORT_PACR) & ~0x3000, PORT_PACR);
204 ctrl_outw(ctrl_inw(PORT_PCCR) & ~0xCFC3, PORT_PCCR); 204 __raw_writew(__raw_readw(PORT_PCCR) & ~0xCFC3, PORT_PCCR);
205} 205}
206 206
207static struct sh_machine_vector mv_sh7763rdp __initmv = { 207static struct sh_machine_vector mv_sh7763rdp __initmv = {
diff --git a/arch/sh/boards/mach-snapgear/setup.c b/arch/sh/boards/mach-snapgear/setup.c
index a3277a23cf1..331745dee37 100644
--- a/arch/sh/boards/mach-snapgear/setup.c
+++ b/arch/sh/boards/mach-snapgear/setup.c
@@ -30,7 +30,7 @@
30 30
31static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id) 31static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id)
32{ 32{
33 (void)ctrl_inb(0xb8000000); /* dummy read */ 33 (void)__raw_readb(0xb8000000); /* dummy read */
34 34
35 printk("SnapGear: erase switch interrupt!\n"); 35 printk("SnapGear: erase switch interrupt!\n");
36 36
diff --git a/arch/sh/boards/mach-systemh/irq.c b/arch/sh/boards/mach-systemh/irq.c
index 986a0e71d22..523aea5dc94 100644
--- a/arch/sh/boards/mach-systemh/irq.c
+++ b/arch/sh/boards/mach-systemh/irq.c
@@ -41,13 +41,13 @@ static void disable_systemh_irq(unsigned int irq)
41 unsigned long val, mask = 0x01 << 1; 41 unsigned long val, mask = 0x01 << 1;
42 42
43 /* Clear the "irq"th bit in the mask and set it in the request */ 43 /* Clear the "irq"th bit in the mask and set it in the request */
44 val = ctrl_inl((unsigned long)systemh_irq_mask_register); 44 val = __raw_readl((unsigned long)systemh_irq_mask_register);
45 val &= ~mask; 45 val &= ~mask;
46 ctrl_outl(val, (unsigned long)systemh_irq_mask_register); 46 __raw_writel(val, (unsigned long)systemh_irq_mask_register);
47 47
48 val = ctrl_inl((unsigned long)systemh_irq_request_register); 48 val = __raw_readl((unsigned long)systemh_irq_request_register);
49 val |= mask; 49 val |= mask;
50 ctrl_outl(val, (unsigned long)systemh_irq_request_register); 50 __raw_writel(val, (unsigned long)systemh_irq_request_register);
51 } 51 }
52} 52}
53 53
@@ -57,9 +57,9 @@ static void enable_systemh_irq(unsigned int irq)
57 unsigned long val, mask = 0x01 << 1; 57 unsigned long val, mask = 0x01 << 1;
58 58
59 /* Set "irq"th bit in the mask register */ 59 /* Set "irq"th bit in the mask register */
60 val = ctrl_inl((unsigned long)systemh_irq_mask_register); 60 val = __raw_readl((unsigned long)systemh_irq_mask_register);
61 val |= mask; 61 val |= mask;
62 ctrl_outl(val, (unsigned long)systemh_irq_mask_register); 62 __raw_writel(val, (unsigned long)systemh_irq_mask_register);
63 } 63 }
64} 64}
65 65
diff --git a/arch/sh/boards/mach-titan/Makefile b/arch/sh/boards/mach-titan/Makefile
deleted file mode 100644
index 08d75370006..00000000000
--- a/arch/sh/boards/mach-titan/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
1#
2# Makefile for the Nimble Microsystems TITAN specific parts of the kernel
3#
4
5obj-y := setup.o io.o
diff --git a/arch/sh/boards/mach-titan/io.c b/arch/sh/boards/mach-titan/io.c
deleted file mode 100644
index 0130e9826ac..00000000000
--- a/arch/sh/boards/mach-titan/io.c
+++ /dev/null
@@ -1,108 +0,0 @@
1/*
2 * I/O routines for Titan
3 */
4#include <linux/pci.h>
5#include <asm/machvec.h>
6#include <asm/addrspace.h>
7#include <mach/titan.h>
8#include <asm/io.h>
9
10static inline unsigned int port2adr(unsigned int port)
11{
12 maybebadio((unsigned long)port);
13 return port;
14}
15
16u8 titan_inb(unsigned long port)
17{
18 if (PXSEG(port))
19 return ctrl_inb(port);
20 return ctrl_inw(port2adr(port)) & 0xff;
21}
22
23u8 titan_inb_p(unsigned long port)
24{
25 u8 v;
26
27 if (PXSEG(port))
28 v = ctrl_inb(port);
29 else
30 v = ctrl_inw(port2adr(port)) & 0xff;
31 ctrl_delay();
32 return v;
33}
34
35u16 titan_inw(unsigned long port)
36{
37 if (PXSEG(port))
38 return ctrl_inw(port);
39 else if (port >= 0x2000)
40 return ctrl_inw(port2adr(port));
41 else
42 maybebadio(port);
43 return 0;
44}
45
46u32 titan_inl(unsigned long port)
47{
48 if (PXSEG(port))
49 return ctrl_inl(port);
50 else if (port >= 0x2000)
51 return ctrl_inw(port2adr(port));
52 else
53 maybebadio(port);
54 return 0;
55}
56
57void titan_outb(u8 value, unsigned long port)
58{
59 if (PXSEG(port))
60 ctrl_outb(value, port);
61 else
62 ctrl_outw(value, port2adr(port));
63}
64
65void titan_outb_p(u8 value, unsigned long port)
66{
67 if (PXSEG(port))
68 ctrl_outb(value, port);
69 else
70 ctrl_outw(value, port2adr(port));
71 ctrl_delay();
72}
73
74void titan_outw(u16 value, unsigned long port)
75{
76 if (PXSEG(port))
77 ctrl_outw(value, port);
78 else if (port >= 0x2000)
79 ctrl_outw(value, port2adr(port));
80 else
81 maybebadio(port);
82}
83
84void titan_outl(u32 value, unsigned long port)
85{
86 if (PXSEG(port))
87 ctrl_outl(value, port);
88 else
89 maybebadio(port);
90}
91
92void titan_insl(unsigned long port, void *dst, unsigned long count)
93{
94 maybebadio(port);
95}
96
97void titan_outsl(unsigned long port, const void *src, unsigned long count)
98{
99 maybebadio(port);
100}
101
102void __iomem *titan_ioport_map(unsigned long port, unsigned int size)
103{
104 if (PXSEG(port))
105 return (void __iomem *)port;
106
107 return (void __iomem *)port2adr(port);
108}
diff --git a/arch/sh/boards/mach-x3proto/ilsel.c b/arch/sh/boards/mach-x3proto/ilsel.c
index b5c673c3933..5c9842704c6 100644
--- a/arch/sh/boards/mach-x3proto/ilsel.c
+++ b/arch/sh/boards/mach-x3proto/ilsel.c
@@ -70,10 +70,10 @@ static void __ilsel_enable(ilsel_source_t set, unsigned int bit)
70 pr_debug("%s: bit#%d: addr - 0x%08lx (shift %d, set %d)\n", 70 pr_debug("%s: bit#%d: addr - 0x%08lx (shift %d, set %d)\n",
71 __func__, bit, addr, shift, set); 71 __func__, bit, addr, shift, set);
72 72
73 tmp = ctrl_inw(addr); 73 tmp = __raw_readw(addr);
74 tmp &= ~(0xf << shift); 74 tmp &= ~(0xf << shift);
75 tmp |= set << shift; 75 tmp |= set << shift;
76 ctrl_outw(tmp, addr); 76 __raw_writew(tmp, addr);
77} 77}
78 78
79/** 79/**
@@ -142,9 +142,9 @@ void ilsel_disable(unsigned int irq)
142 142
143 addr = mk_ilsel_addr(irq); 143 addr = mk_ilsel_addr(irq);
144 144
145 tmp = ctrl_inw(addr); 145 tmp = __raw_readw(addr);
146 tmp &= ~(0xf << mk_ilsel_shift(irq)); 146 tmp &= ~(0xf << mk_ilsel_shift(irq));
147 ctrl_outw(tmp, addr); 147 __raw_writew(tmp, addr);
148 148
149 clear_bit(irq, &ilsel_level_map); 149 clear_bit(irq, &ilsel_level_map);
150} 150}
diff --git a/arch/sh/boards/mach-x3proto/setup.c b/arch/sh/boards/mach-x3proto/setup.c
index efe4cb9f8a7..e284592fd42 100644
--- a/arch/sh/boards/mach-x3proto/setup.c
+++ b/arch/sh/boards/mach-x3proto/setup.c
@@ -149,7 +149,7 @@ static void __init x3proto_init_irq(void)
149 plat_irq_setup_pins(IRQ_MODE_IRL3210); 149 plat_irq_setup_pins(IRQ_MODE_IRL3210);
150 150
151 /* Set ICR0.LVLMODE */ 151 /* Set ICR0.LVLMODE */
152 ctrl_outl(ctrl_inl(0xfe410000) | (1 << 21), 0xfe410000); 152 __raw_writel(__raw_readl(0xfe410000) | (1 << 21), 0xfe410000);
153} 153}
154 154
155static struct sh_machine_vector mv_x3proto __initmv = { 155static struct sh_machine_vector mv_x3proto __initmv = {
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-21 00:06:28 -0400