diff options
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts')
-rw-r--r-- | arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts | 487 |
1 files changed, 31 insertions, 456 deletions
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts index 3375c2ab0c3..d34d1271212 100644 --- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts +++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts | |||
@@ -14,494 +14,69 @@ | |||
14 | * option) any later version. | 14 | * option) any later version. |
15 | */ | 15 | */ |
16 | 16 | ||
17 | /dts-v1/; | 17 | /include/ "mpc8572ds.dts" |
18 | |||
18 | / { | 19 | / { |
19 | model = "fsl,MPC8572DS"; | 20 | model = "fsl,MPC8572DS"; |
20 | compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP"; | 21 | compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP"; |
21 | #address-cells = <1>; | ||
22 | #size-cells = <1>; | ||
23 | |||
24 | aliases { | ||
25 | ethernet0 = &enet0; | ||
26 | ethernet1 = &enet1; | ||
27 | serial0 = &serial0; | ||
28 | pci0 = &pci0; | ||
29 | pci1 = &pci1; | ||
30 | }; | ||
31 | 22 | ||
32 | cpus { | 23 | cpus { |
33 | #address-cells = <1>; | ||
34 | #size-cells = <0>; | ||
35 | |||
36 | PowerPC,8572@0 { | 24 | PowerPC,8572@0 { |
37 | device_type = "cpu"; | ||
38 | reg = <0x0>; | ||
39 | d-cache-line-size = <32>; // 32 bytes | ||
40 | i-cache-line-size = <32>; // 32 bytes | ||
41 | d-cache-size = <0x8000>; // L1, 32K | ||
42 | i-cache-size = <0x8000>; // L1, 32K | ||
43 | timebase-frequency = <0>; | ||
44 | bus-frequency = <0>; | ||
45 | clock-frequency = <0>; | ||
46 | next-level-cache = <&L2>; | ||
47 | }; | 25 | }; |
48 | 26 | PowerPC,8572@1 { | |
27 | status = "disabled"; | ||
28 | }; | ||
49 | }; | 29 | }; |
50 | 30 | ||
51 | memory { | 31 | localbus@ffe05000 { |
52 | device_type = "memory"; | 32 | status = "disabled"; |
53 | reg = <0x0 0x0>; // Filled by U-Boot | ||
54 | }; | 33 | }; |
55 | 34 | ||
56 | soc8572@ffe00000 { | 35 | soc8572@ffe00000 { |
57 | #address-cells = <1>; | 36 | serial@4600 { |
58 | #size-cells = <1>; | 37 | status = "disabled"; |
59 | device_type = "soc"; | ||
60 | compatible = "simple-bus"; | ||
61 | ranges = <0x0 0xffe00000 0x100000>; | ||
62 | bus-frequency = <0>; // Filled out by uboot. | ||
63 | |||
64 | ecm-law@0 { | ||
65 | compatible = "fsl,ecm-law"; | ||
66 | reg = <0x0 0x1000>; | ||
67 | fsl,num-laws = <12>; | ||
68 | }; | 38 | }; |
69 | 39 | dma@c300 { | |
70 | ecm@1000 { | 40 | status = "disabled"; |
71 | compatible = "fsl,mpc8572-ecm", "fsl,ecm"; | ||
72 | reg = <0x1000 0x1000>; | ||
73 | interrupts = <17 2>; | ||
74 | interrupt-parent = <&mpic>; | ||
75 | }; | 41 | }; |
76 | 42 | gpio-controller@f000 { | |
77 | memory-controller@2000 { | ||
78 | compatible = "fsl,mpc8572-memory-controller"; | ||
79 | reg = <0x2000 0x1000>; | ||
80 | interrupt-parent = <&mpic>; | ||
81 | interrupts = <18 2>; | ||
82 | }; | 43 | }; |
83 | 44 | l2-cache-controller@20000 { | |
84 | memory-controller@6000 { | ||
85 | compatible = "fsl,mpc8572-memory-controller"; | ||
86 | reg = <0x6000 0x1000>; | ||
87 | interrupt-parent = <&mpic>; | ||
88 | interrupts = <18 2>; | ||
89 | }; | ||
90 | |||
91 | L2: l2-cache-controller@20000 { | ||
92 | compatible = "fsl,mpc8572-l2-cache-controller"; | ||
93 | reg = <0x20000 0x1000>; | ||
94 | cache-line-size = <32>; // 32 bytes | ||
95 | cache-size = <0x80000>; // L2, 512K | 45 | cache-size = <0x80000>; // L2, 512K |
96 | interrupt-parent = <&mpic>; | ||
97 | interrupts = <16 2>; | ||
98 | }; | 46 | }; |
99 | 47 | ethernet@26000 { | |
100 | i2c@3000 { | 48 | status = "disabled"; |
101 | #address-cells = <1>; | ||
102 | #size-cells = <0>; | ||
103 | cell-index = <0>; | ||
104 | compatible = "fsl-i2c"; | ||
105 | reg = <0x3000 0x100>; | ||
106 | interrupts = <43 2>; | ||
107 | interrupt-parent = <&mpic>; | ||
108 | dfsrr; | ||
109 | }; | 49 | }; |
110 | 50 | mdio@26520 { | |
111 | i2c@3100 { | 51 | status = "disabled"; |
112 | #address-cells = <1>; | ||
113 | #size-cells = <0>; | ||
114 | cell-index = <1>; | ||
115 | compatible = "fsl-i2c"; | ||
116 | reg = <0x3100 0x100>; | ||
117 | interrupts = <43 2>; | ||
118 | interrupt-parent = <&mpic>; | ||
119 | dfsrr; | ||
120 | }; | 52 | }; |
121 | 53 | ethernet@27000 { | |
122 | dma@21300 { | 54 | status = "disabled"; |
123 | #address-cells = <1>; | ||
124 | #size-cells = <1>; | ||
125 | compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; | ||
126 | reg = <0x21300 0x4>; | ||
127 | ranges = <0x0 0x21100 0x200>; | ||
128 | cell-index = <0>; | ||
129 | dma-channel@0 { | ||
130 | compatible = "fsl,mpc8572-dma-channel", | ||
131 | "fsl,eloplus-dma-channel"; | ||
132 | reg = <0x0 0x80>; | ||
133 | cell-index = <0>; | ||
134 | interrupt-parent = <&mpic>; | ||
135 | interrupts = <20 2>; | ||
136 | }; | ||
137 | dma-channel@80 { | ||
138 | compatible = "fsl,mpc8572-dma-channel", | ||
139 | "fsl,eloplus-dma-channel"; | ||
140 | reg = <0x80 0x80>; | ||
141 | cell-index = <1>; | ||
142 | interrupt-parent = <&mpic>; | ||
143 | interrupts = <21 2>; | ||
144 | }; | ||
145 | dma-channel@100 { | ||
146 | compatible = "fsl,mpc8572-dma-channel", | ||
147 | "fsl,eloplus-dma-channel"; | ||
148 | reg = <0x100 0x80>; | ||
149 | cell-index = <2>; | ||
150 | interrupt-parent = <&mpic>; | ||
151 | interrupts = <22 2>; | ||
152 | }; | ||
153 | dma-channel@180 { | ||
154 | compatible = "fsl,mpc8572-dma-channel", | ||
155 | "fsl,eloplus-dma-channel"; | ||
156 | reg = <0x180 0x80>; | ||
157 | cell-index = <3>; | ||
158 | interrupt-parent = <&mpic>; | ||
159 | interrupts = <23 2>; | ||
160 | }; | ||
161 | }; | 55 | }; |
162 | 56 | mdio@27520 { | |
163 | enet0: ethernet@24000 { | 57 | status = "disabled"; |
164 | #address-cells = <1>; | ||
165 | #size-cells = <1>; | ||
166 | cell-index = <0>; | ||
167 | device_type = "network"; | ||
168 | model = "eTSEC"; | ||
169 | compatible = "gianfar"; | ||
170 | reg = <0x24000 0x1000>; | ||
171 | ranges = <0x0 0x24000 0x1000>; | ||
172 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
173 | interrupts = <29 2 30 2 34 2>; | ||
174 | interrupt-parent = <&mpic>; | ||
175 | phy-handle = <&phy0>; | ||
176 | phy-connection-type = "rgmii-id"; | ||
177 | |||
178 | mdio@520 { | ||
179 | #address-cells = <1>; | ||
180 | #size-cells = <0>; | ||
181 | compatible = "fsl,gianfar-mdio"; | ||
182 | reg = <0x520 0x20>; | ||
183 | |||
184 | phy0: ethernet-phy@0 { | ||
185 | interrupt-parent = <&mpic>; | ||
186 | interrupts = <10 1>; | ||
187 | reg = <0x0>; | ||
188 | }; | ||
189 | phy1: ethernet-phy@1 { | ||
190 | interrupt-parent = <&mpic>; | ||
191 | interrupts = <10 1>; | ||
192 | reg = <0x1>; | ||
193 | }; | ||
194 | }; | ||
195 | }; | 58 | }; |
196 | 59 | pic@40000 { | |
197 | enet1: ethernet@25000 { | 60 | protected-sources = < |
198 | cell-index = <1>; | 61 | 31 32 33 37 38 39 /* enet2 enet3 */ |
199 | device_type = "network"; | 62 | 76 77 78 79 26 42 /* dma2 pci2 serial*/ |
200 | model = "eTSEC"; | 63 | 0xe4 0xe5 0xe6 0xe7 /* msi */ |
201 | compatible = "gianfar"; | 64 | >; |
202 | reg = <0x25000 0x1000>; | ||
203 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
204 | interrupts = <35 2 36 2 40 2>; | ||
205 | interrupt-parent = <&mpic>; | ||
206 | phy-handle = <&phy1>; | ||
207 | phy-connection-type = "rgmii-id"; | ||
208 | }; | ||
209 | |||
210 | serial0: serial@4500 { | ||
211 | cell-index = <0>; | ||
212 | device_type = "serial"; | ||
213 | compatible = "ns16550"; | ||
214 | reg = <0x4500 0x100>; | ||
215 | clock-frequency = <0>; | ||
216 | }; | 65 | }; |
217 | 66 | ||
218 | msi@41600 { | 67 | msi@41600 { |
219 | compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; | ||
220 | reg = <0x41600 0x80>; | ||
221 | msi-available-ranges = <0 0x80>; | 68 | msi-available-ranges = <0 0x80>; |
222 | interrupts = < | 69 | interrupts = < |
223 | 0xe0 0 | 70 | 0xe0 0 |
224 | 0xe1 0 | 71 | 0xe1 0 |
225 | 0xe2 0 | 72 | 0xe2 0 |
226 | 0xe3 0>; | 73 | 0xe3 0>; |
227 | interrupt-parent = <&mpic>; | ||
228 | }; | ||
229 | |||
230 | global-utilities@e0000 { //global utilities block | ||
231 | compatible = "fsl,mpc8572-guts"; | ||
232 | reg = <0xe0000 0x1000>; | ||
233 | fsl,has-rstcr; | ||
234 | }; | ||
235 | |||
236 | crypto@30000 { | ||
237 | compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", | ||
238 | "fsl,sec2.1", "fsl,sec2.0"; | ||
239 | reg = <0x30000 0x10000>; | ||
240 | interrupts = <45 2 58 2>; | ||
241 | interrupt-parent = <&mpic>; | ||
242 | fsl,num-channels = <4>; | ||
243 | fsl,channel-fifo-len = <24>; | ||
244 | fsl,exec-units-mask = <0x9fe>; | ||
245 | fsl,descriptor-types-mask = <0x3ab0ebf>; | ||
246 | }; | ||
247 | |||
248 | mpic: pic@40000 { | ||
249 | interrupt-controller; | ||
250 | #address-cells = <0>; | ||
251 | #interrupt-cells = <2>; | ||
252 | reg = <0x40000 0x40000>; | ||
253 | compatible = "chrp,open-pic"; | ||
254 | device_type = "open-pic"; | ||
255 | protected-sources = < | ||
256 | 31 32 33 37 38 39 /* enet2 enet3 */ | ||
257 | 76 77 78 79 26 42 /* dma2 pci2 serial*/ | ||
258 | 0xe4 0xe5 0xe6 0xe7 /* msi */ | ||
259 | >; | ||
260 | }; | 74 | }; |
261 | }; | 75 | timer@42100 { |
262 | 76 | status = "disabled"; | |
263 | pci0: pcie@ffe08000 { | ||
264 | compatible = "fsl,mpc8548-pcie"; | ||
265 | device_type = "pci"; | ||
266 | #interrupt-cells = <1>; | ||
267 | #size-cells = <2>; | ||
268 | #address-cells = <3>; | ||
269 | reg = <0xffe08000 0x1000>; | ||
270 | bus-range = <0 255>; | ||
271 | ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 | ||
272 | 0x1000000 0x0 0x0 0xffc00000 0x0 0x10000>; | ||
273 | clock-frequency = <33333333>; | ||
274 | interrupt-parent = <&mpic>; | ||
275 | interrupts = <24 2>; | ||
276 | interrupt-map-mask = <0xff00 0x0 0x0 0x7>; | ||
277 | interrupt-map = < | ||
278 | /* IDSEL 0x11 func 0 - PCI slot 1 */ | ||
279 | 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
280 | 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
281 | 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 | ||
282 | 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
283 | |||
284 | /* IDSEL 0x11 func 1 - PCI slot 1 */ | ||
285 | 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
286 | 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
287 | 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1 | ||
288 | 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
289 | |||
290 | /* IDSEL 0x11 func 2 - PCI slot 1 */ | ||
291 | 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
292 | 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
293 | 0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1 | ||
294 | 0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
295 | |||
296 | /* IDSEL 0x11 func 3 - PCI slot 1 */ | ||
297 | 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
298 | 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
299 | 0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1 | ||
300 | 0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
301 | |||
302 | /* IDSEL 0x11 func 4 - PCI slot 1 */ | ||
303 | 0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
304 | 0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
305 | 0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1 | ||
306 | 0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
307 | |||
308 | /* IDSEL 0x11 func 5 - PCI slot 1 */ | ||
309 | 0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
310 | 0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
311 | 0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1 | ||
312 | 0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
313 | |||
314 | /* IDSEL 0x11 func 6 - PCI slot 1 */ | ||
315 | 0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
316 | 0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
317 | 0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1 | ||
318 | 0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
319 | |||
320 | /* IDSEL 0x11 func 7 - PCI slot 1 */ | ||
321 | 0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
322 | 0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
323 | 0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1 | ||
324 | 0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
325 | |||
326 | /* IDSEL 0x12 func 0 - PCI slot 2 */ | ||
327 | 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
328 | 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 | ||
329 | 0x9000 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
330 | 0x9000 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
331 | |||
332 | /* IDSEL 0x12 func 1 - PCI slot 2 */ | ||
333 | 0x9100 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
334 | 0x9100 0x0 0x0 0x2 &mpic 0x4 0x1 | ||
335 | 0x9100 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
336 | 0x9100 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
337 | |||
338 | /* IDSEL 0x12 func 2 - PCI slot 2 */ | ||
339 | 0x9200 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
340 | 0x9200 0x0 0x0 0x2 &mpic 0x4 0x1 | ||
341 | 0x9200 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
342 | 0x9200 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
343 | |||
344 | /* IDSEL 0x12 func 3 - PCI slot 2 */ | ||
345 | 0x9300 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
346 | 0x9300 0x0 0x0 0x2 &mpic 0x4 0x1 | ||
347 | 0x9300 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
348 | 0x9300 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
349 | |||
350 | /* IDSEL 0x12 func 4 - PCI slot 2 */ | ||
351 | 0x9400 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
352 | 0x9400 0x0 0x0 0x2 &mpic 0x4 0x1 | ||
353 | 0x9400 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
354 | 0x9400 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
355 | |||
356 | /* IDSEL 0x12 func 5 - PCI slot 2 */ | ||
357 | 0x9500 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
358 | 0x9500 0x0 0x0 0x2 &mpic 0x4 0x1 | ||
359 | 0x9500 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
360 | 0x9500 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
361 | |||
362 | /* IDSEL 0x12 func 6 - PCI slot 2 */ | ||
363 | 0x9600 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
364 | 0x9600 0x0 0x0 0x2 &mpic 0x4 0x1 | ||
365 | 0x9600 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
366 | 0x9600 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
367 | |||
368 | /* IDSEL 0x12 func 7 - PCI slot 2 */ | ||
369 | 0x9700 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
370 | 0x9700 0x0 0x0 0x2 &mpic 0x4 0x1 | ||
371 | 0x9700 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
372 | 0x9700 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
373 | |||
374 | // IDSEL 0x1c USB | ||
375 | 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2 | ||
376 | 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2 | ||
377 | 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2 | ||
378 | 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2 | ||
379 | |||
380 | // IDSEL 0x1d Audio | ||
381 | 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2 | ||
382 | |||
383 | // IDSEL 0x1e Legacy | ||
384 | 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2 | ||
385 | 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2 | ||
386 | |||
387 | // IDSEL 0x1f IDE/SATA | ||
388 | 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2 | ||
389 | 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2 | ||
390 | |||
391 | >; | ||
392 | |||
393 | pcie@0 { | ||
394 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
395 | #size-cells = <2>; | ||
396 | #address-cells = <3>; | ||
397 | device_type = "pci"; | ||
398 | ranges = <0x2000000 0x0 0x80000000 | ||
399 | 0x2000000 0x0 0x80000000 | ||
400 | 0x0 0x20000000 | ||
401 | |||
402 | 0x1000000 0x0 0x0 | ||
403 | 0x1000000 0x0 0x0 | ||
404 | 0x0 0x10000>; | ||
405 | uli1575@0 { | ||
406 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
407 | #size-cells = <2>; | ||
408 | #address-cells = <3>; | ||
409 | ranges = <0x2000000 0x0 0x80000000 | ||
410 | 0x2000000 0x0 0x80000000 | ||
411 | 0x0 0x20000000 | ||
412 | |||
413 | 0x1000000 0x0 0x0 | ||
414 | 0x1000000 0x0 0x0 | ||
415 | 0x0 0x10000>; | ||
416 | isa@1e { | ||
417 | device_type = "isa"; | ||
418 | #interrupt-cells = <2>; | ||
419 | #size-cells = <1>; | ||
420 | #address-cells = <2>; | ||
421 | reg = <0xf000 0x0 0x0 0x0 0x0>; | ||
422 | ranges = <0x1 0x0 0x1000000 0x0 0x0 | ||
423 | 0x1000>; | ||
424 | interrupt-parent = <&i8259>; | ||
425 | |||
426 | i8259: interrupt-controller@20 { | ||
427 | reg = <0x1 0x20 0x2 | ||
428 | 0x1 0xa0 0x2 | ||
429 | 0x1 0x4d0 0x2>; | ||
430 | interrupt-controller; | ||
431 | device_type = "interrupt-controller"; | ||
432 | #address-cells = <0>; | ||
433 | #interrupt-cells = <2>; | ||
434 | compatible = "chrp,iic"; | ||
435 | interrupts = <9 2>; | ||
436 | interrupt-parent = <&mpic>; | ||
437 | }; | ||
438 | |||
439 | i8042@60 { | ||
440 | #size-cells = <0>; | ||
441 | #address-cells = <1>; | ||
442 | reg = <0x1 0x60 0x1 0x1 0x64 0x1>; | ||
443 | interrupts = <1 3 12 3>; | ||
444 | interrupt-parent = | ||
445 | <&i8259>; | ||
446 | |||
447 | keyboard@0 { | ||
448 | reg = <0x0>; | ||
449 | compatible = "pnpPNP,303"; | ||
450 | }; | ||
451 | |||
452 | mouse@1 { | ||
453 | reg = <0x1>; | ||
454 | compatible = "pnpPNP,f03"; | ||
455 | }; | ||
456 | }; | ||
457 | |||
458 | rtc@70 { | ||
459 | compatible = "pnpPNP,b00"; | ||
460 | reg = <0x1 0x70 0x2>; | ||
461 | }; | ||
462 | |||
463 | gpio@400 { | ||
464 | reg = <0x1 0x400 0x80>; | ||
465 | }; | ||
466 | }; | ||
467 | }; | ||
468 | }; | 77 | }; |
469 | |||
470 | }; | 78 | }; |
471 | 79 | pcie@ffe0a000 { | |
472 | pci1: pcie@ffe09000 { | 80 | status = "disabled"; |
473 | compatible = "fsl,mpc8548-pcie"; | ||
474 | device_type = "pci"; | ||
475 | #interrupt-cells = <1>; | ||
476 | #size-cells = <2>; | ||
477 | #address-cells = <3>; | ||
478 | reg = <0xffe09000 0x1000>; | ||
479 | bus-range = <0 255>; | ||
480 | ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 | ||
481 | 0x1000000 0x0 0x0 0xffc10000 0x0 0x10000>; | ||
482 | clock-frequency = <33333333>; | ||
483 | interrupt-parent = <&mpic>; | ||
484 | interrupts = <25 2>; | ||
485 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
486 | interrupt-map = < | ||
487 | /* IDSEL 0x0 */ | ||
488 | 0000 0x0 0x0 0x1 &mpic 0x4 0x1 | ||
489 | 0000 0x0 0x0 0x2 &mpic 0x5 0x1 | ||
490 | 0000 0x0 0x0 0x3 &mpic 0x6 0x1 | ||
491 | 0000 0x0 0x0 0x4 &mpic 0x7 0x1 | ||
492 | >; | ||
493 | pcie@0 { | ||
494 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
495 | #size-cells = <2>; | ||
496 | #address-cells = <3>; | ||
497 | device_type = "pci"; | ||
498 | ranges = <0x2000000 0x0 0xa0000000 | ||
499 | 0x2000000 0x0 0xa0000000 | ||
500 | 0x0 0x20000000 | ||
501 | |||
502 | 0x1000000 0x0 0x0 | ||
503 | 0x1000000 0x0 0x0 | ||
504 | 0x0 0x10000>; | ||
505 | }; | ||
506 | }; | 81 | }; |
507 | }; | 82 | }; |