20 files changed, 540 insertions, 91 deletions

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index a9264843824..62b9677c39a 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -94,15 +94,8 @@ config BCM47XX
         select DMA_NONCOHERENT
         select HW_HAS_PCI
         select IRQ_CPU
-        select SYS_HAS_CPU_MIPS32_R1
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_LITTLE_ENDIAN
-        select SSB
-        select SSB_DRIVER_MIPS
-        select SSB_DRIVER_EXTIF
-        select SSB_EMBEDDED
-        select SSB_B43_PCI_BRIDGE if PCI
-        select SSB_PCICORE_HOSTMODE if PCI
         select GENERIC_GPIO
         select SYS_HAS_EARLY_PRINTK
         select CFE
@@ -794,6 +787,7 @@ endchoice
 
 source "arch/mips/alchemy/Kconfig"
 source "arch/mips/ath79/Kconfig"
+source "arch/mips/bcm47xx/Kconfig"
 source "arch/mips/bcm63xx/Kconfig"
 source "arch/mips/jazz/Kconfig"
 source "arch/mips/jz4740/Kconfig"
diff --git a/arch/mips/alchemy/devboards/db1200/platform.c b/arch/mips/alchemy/devboards/db1200/platform.c
index aae08c1e876..c61867c93c4 100644
--- a/arch/mips/alchemy/devboards/db1200/platform.c
+++ b/arch/mips/alchemy/devboards/db1200/platform.c
@@ -489,6 +489,7 @@ static struct resource au1200_psc1_res[] = {
         },
 };
 
+/* AC97 or I2S device */
 static struct platform_device db1200_audio_dev = {
         /* name assigned later based on switch setting */
         .id             = 1,    /* PSC ID */
@@ -496,11 +497,22 @@ static struct platform_device db1200_audio_dev = {
         .resource       = au1200_psc1_res,
 };
 
+/* DB1200 ASoC card device */
+static struct platform_device db1200_sound_dev = {
+        /* name assigned later based on switch setting */
+        .id             = 1,    /* PSC ID */
+};
+
 static struct platform_device db1200_stac_dev = {
         .name           = "ac97-codec",
         .id             = 1,    /* on PSC1 */
 };
 
+static struct platform_device db1200_audiodma_dev = {
+        .name           = "au1xpsc-pcm",
+        .id             = 1,    /* PSC ID */
+};
+
 static struct platform_device *db1200_devs[] __initdata = {
         NULL,           /* PSC0, selected by S6.8 */
         &db1200_ide_dev,
@@ -509,8 +521,10 @@ static struct platform_device *db1200_devs[] __initdata = {
         &db1200_eth_dev,
         &db1200_rtc_dev,
         &db1200_nand_dev,
+        &db1200_audiodma_dev,
         &db1200_audio_dev,
         &db1200_stac_dev,
+        &db1200_sound_dev,
 };
 
 static int __init db1200_dev_init(void)
@@ -570,10 +584,12 @@ static int __init db1200_dev_init(void)
         if (sw == BCSR_SWITCHES_DIP_8) {
                 bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_PSC1MUX);
                 db1200_audio_dev.name = "au1xpsc_i2s";
+                db1200_sound_dev.name = "db1200-i2s";
                 printk(KERN_INFO " S6.7 ON : PSC1 mode I2S\n");
         } else {
                 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC1MUX, 0);
                 db1200_audio_dev.name = "au1xpsc_ac97";
+                db1200_sound_dev.name = "db1200-ac97";
                 printk(KERN_INFO " S6.7 OFF: PSC1 mode AC97\n");
         }
 
diff --git a/arch/mips/alchemy/devboards/db1x00/platform.c b/arch/mips/alchemy/devboards/db1x00/platform.c
index 8704865306a..9e6b3d442ac 100644
--- a/arch/mips/alchemy/devboards/db1x00/platform.c
+++ b/arch/mips/alchemy/devboards/db1x00/platform.c
@@ -19,10 +19,12 @@
  */
 
 #include <linux/init.h>
+#include <linux/interrupt.h>
 #include <linux/dma-mapping.h>
 #include <linux/platform_device.h>
 
 #include <asm/mach-au1x00/au1000.h>
+#include <asm/mach-au1x00/au1000_dma.h>
 #include <asm/mach-db1x00/bcsr.h>
 #include "../platform.h"
 
@@ -237,6 +239,45 @@ static struct platform_device au1100_lcd_device = {
 };
 #endif
 
+static struct resource alchemy_ac97c_res[] = {
+        [0] = {
+                .start  = AU1000_AC97_PHYS_ADDR,
+                .end    = AU1000_AC97_PHYS_ADDR + 0xfff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = DMA_ID_AC97C_TX,
+                .end    = DMA_ID_AC97C_TX,
+                .flags  = IORESOURCE_DMA,
+        },
+        [2] = {
+                .start  = DMA_ID_AC97C_RX,
+                .end    = DMA_ID_AC97C_RX,
+                .flags  = IORESOURCE_DMA,
+        },
+};
+
+static struct platform_device alchemy_ac97c_dev = {
+        .name           = "alchemy-ac97c",
+        .id             = -1,
+        .resource       = alchemy_ac97c_res,
+        .num_resources  = ARRAY_SIZE(alchemy_ac97c_res),
+};
+
+static struct platform_device alchemy_ac97c_dma_dev = {
+        .name           = "alchemy-pcm-dma",
+        .id             = 0,
+};
+
+static struct platform_device db1x00_codec_dev = {
+        .name           = "ac97-codec",
+        .id             = -1,
+};
+
+static struct platform_device db1x00_audio_dev = {
+        .name           = "db1000-audio",
+};
+
 static int __init db1xxx_dev_init(void)
 {
 #ifdef DB1XXX_HAS_PCMCIA
@@ -264,6 +305,12 @@ static int __init db1xxx_dev_init(void)
         platform_device_register(&au1100_lcd_device);
 #endif
         db1x_register_norflash(BOARD_FLASH_SIZE, BOARD_FLASH_WIDTH, F_SWAPPED);
+
+        platform_device_register(&db1x00_codec_dev);
+        platform_device_register(&alchemy_ac97c_dma_dev);
+        platform_device_register(&alchemy_ac97c_dev);
+        platform_device_register(&db1x00_audio_dev);
+
         return 0;
 }
 device_initcall(db1xxx_dev_init);
diff --git a/arch/mips/bcm47xx/Kconfig b/arch/mips/bcm47xx/Kconfig
new file mode 100644
index 00000000000..6210b8d8410
--- /dev/null
+++ b/arch/mips/bcm47xx/Kconfig
@@ -0,0 +1,31 @@
+if BCM47XX
+
+config BCM47XX_SSB
+        bool "SSB Support for Broadcom BCM47XX"
+        select SYS_HAS_CPU_MIPS32_R1
+        select SSB
+        select SSB_DRIVER_MIPS
+        select SSB_DRIVER_EXTIF
+        select SSB_EMBEDDED
+        select SSB_B43_PCI_BRIDGE if PCI
+        select SSB_PCICORE_HOSTMODE if PCI
+        default y
+        help
+         Add support for old Broadcom BCM47xx boards with Sonics Silicon Backplane support.
+
+         This will generate an image with support for SSB and MIPS32 R1 instruction set.
+
+config BCM47XX_BCMA
+        bool "BCMA Support for Broadcom BCM47XX"
+        select SYS_HAS_CPU_MIPS32_R2
+        select BCMA
+        select BCMA_HOST_SOC
+        select BCMA_DRIVER_MIPS
+        select BCMA_DRIVER_PCI_HOSTMODE if PCI
+        default y
+        help
+         Add support for new Broadcom BCM47xx boards with Broadcom specific Advanced Microcontroller Bus.
+
+         This will generate an image with support for BCMA and MIPS32 R2 instruction set.
+
+endif
diff --git a/arch/mips/bcm47xx/Makefile b/arch/mips/bcm47xx/Makefile
index 7465e8a72d9..4add17349ff 100644
--- a/arch/mips/bcm47xx/Makefile
+++ b/arch/mips/bcm47xx/Makefile
@@ -3,4 +3,5 @@
 # under Linux.
 #
 
-obj-y := gpio.o irq.o nvram.o prom.o serial.o setup.o time.o wgt634u.o
+obj-y                           += gpio.o irq.o nvram.o prom.o serial.o setup.o time.o
+obj-$(CONFIG_BCM47XX_SSB)       += wgt634u.o
diff --git a/arch/mips/bcm47xx/gpio.c b/arch/mips/bcm47xx/gpio.c
index e4a5ee9c972..57b425fd4d4 100644
--- a/arch/mips/bcm47xx/gpio.c
+++ b/arch/mips/bcm47xx/gpio.c
@@ -20,42 +20,82 @@ static DECLARE_BITMAP(gpio_in_use, BCM47XX_EXTIF_GPIO_LINES);
 
 int gpio_request(unsigned gpio, const char *tag)
 {
-        if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&
-            ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
-                return -EINVAL;
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) &&
+                    ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
+                        return -EINVAL;
 
-        if (ssb_extif_available(&ssb_bcm47xx.extif) &&
-            ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
-                return -EINVAL;
+                if (ssb_extif_available(&bcm47xx_bus.ssb.extif) &&
+                    ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
+                        return -EINVAL;
 
-        if (test_and_set_bit(gpio, gpio_in_use))
-                return -EBUSY;
+                if (test_and_set_bit(gpio, gpio_in_use))
+                        return -EBUSY;
 
-        return 0;
+                return 0;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                if (gpio >= BCM47XX_CHIPCO_GPIO_LINES)
+                        return -EINVAL;
+
+                if (test_and_set_bit(gpio, gpio_in_use))
+                        return -EBUSY;
+
+                return 0;
+#endif
+        }
+        return -EINVAL;
 }
 EXPORT_SYMBOL(gpio_request);
 
 void gpio_free(unsigned gpio)
 {
-        if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&
-            ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
-                return;
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) &&
+                    ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
+                        return;
+
+                if (ssb_extif_available(&bcm47xx_bus.ssb.extif) &&
+                    ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
+                        return;
 
-        if (ssb_extif_available(&ssb_bcm47xx.extif) &&
-            ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
+                clear_bit(gpio, gpio_in_use);
                 return;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                if (gpio >= BCM47XX_CHIPCO_GPIO_LINES)
+                        return;
 
-        clear_bit(gpio, gpio_in_use);
+                clear_bit(gpio, gpio_in_use);
+                return;
+#endif
+        }
 }
 EXPORT_SYMBOL(gpio_free);
 
 int gpio_to_irq(unsigned gpio)
 {
-        if (ssb_chipco_available(&ssb_bcm47xx.chipco))
-                return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2;
-        else if (ssb_extif_available(&ssb_bcm47xx.extif))
-                return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2;
-        else
-                return -EINVAL;
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco))
+                        return ssb_mips_irq(bcm47xx_bus.ssb.chipco.dev) + 2;
+                else if (ssb_extif_available(&bcm47xx_bus.ssb.extif))
+                        return ssb_mips_irq(bcm47xx_bus.ssb.extif.dev) + 2;
+                else
+                        return -EINVAL;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                return bcma_core_mips_irq(bcm47xx_bus.bcma.bus.drv_cc.core) + 2;
+#endif
+        }
+        return -EINVAL;
 }
 EXPORT_SYMBOL_GPL(gpio_to_irq);
diff --git a/arch/mips/bcm47xx/irq.c b/arch/mips/bcm47xx/irq.c
index 325757acd02..8cf3833b2d2 100644
--- a/arch/mips/bcm47xx/irq.c
+++ b/arch/mips/bcm47xx/irq.c
@@ -26,6 +26,7 @@
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <asm/irq_cpu.h>
+#include <bcm47xx.h>
 
 void plat_irq_dispatch(void)
 {
@@ -51,5 +52,16 @@ void plat_irq_dispatch(void)
 
 void __init arch_init_irq(void)
 {
+#ifdef CONFIG_BCM47XX_BCMA
+        if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) {
+                bcma_write32(bcm47xx_bus.bcma.bus.drv_mips.core,
+                             BCMA_MIPS_MIPS74K_INTMASK(5), 1 << 31);
+                /*
+                 * the kernel reads the timer irq from some register and thinks
+                 * it's #5, but we offset it by 2 and route to #7
+                 */
+                cp0_compare_irq = 7;
+        }
+#endif
         mips_cpu_irq_init();
 }
diff --git a/arch/mips/bcm47xx/nvram.c b/arch/mips/bcm47xx/nvram.c
index 54db815bc86..a84e3bb7387 100644
--- a/arch/mips/bcm47xx/nvram.c
+++ b/arch/mips/bcm47xx/nvram.c
@@ -26,14 +26,35 @@ static char nvram_buf[NVRAM_SPACE];
 /* Probe for NVRAM header */
 static void early_nvram_init(void)
 {
-        struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore;
+#ifdef CONFIG_BCM47XX_SSB
+        struct ssb_mipscore *mcore_ssb;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        struct bcma_drv_cc *bcma_cc;
+#endif
         struct nvram_header *header;
         int i;
-        u32 base, lim, off;
+        u32 base = 0;
+        u32 lim = 0;
+        u32 off;
         u32 *src, *dst;
 
-        base = mcore->flash_window;
-        lim = mcore->flash_window_size;
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                mcore_ssb = &bcm47xx_bus.ssb.mipscore;
+                base = mcore_ssb->flash_window;
+                lim = mcore_ssb->flash_window_size;
+                break;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                bcma_cc = &bcm47xx_bus.bcma.bus.drv_cc;
+                base = bcma_cc->pflash.window;
+                lim = bcma_cc->pflash.window_size;
+                break;
+#endif
+        }
 
         off = FLASH_MIN;
         while (off <= lim) {
diff --git a/arch/mips/bcm47xx/serial.c b/arch/mips/bcm47xx/serial.c
index 59c11afdb2a..57981e4fe2b 100644
--- a/arch/mips/bcm47xx/serial.c
+++ b/arch/mips/bcm47xx/serial.c
@@ -23,10 +23,11 @@ static struct platform_device uart8250_device = {
         },
 };
 
-static int __init uart8250_init(void)
+#ifdef CONFIG_BCM47XX_SSB
+static int __init uart8250_init_ssb(void)
 {
         int i;
-        struct ssb_mipscore *mcore = &(ssb_bcm47xx.mipscore);
+        struct ssb_mipscore *mcore = &(bcm47xx_bus.ssb.mipscore);
 
         memset(&uart8250_data, 0,  sizeof(uart8250_data));
 
@@ -44,6 +45,47 @@ static int __init uart8250_init(void)
         }
         return platform_device_register(&uart8250_device);
 }
+#endif
+
+#ifdef CONFIG_BCM47XX_BCMA
+static int __init uart8250_init_bcma(void)
+{
+        int i;
+        struct bcma_drv_cc *cc = &(bcm47xx_bus.bcma.bus.drv_cc);
+
+        memset(&uart8250_data, 0,  sizeof(uart8250_data));
+
+        for (i = 0; i < cc->nr_serial_ports; i++) {
+                struct plat_serial8250_port *p = &(uart8250_data[i]);
+                struct bcma_serial_port *bcma_port;
+                bcma_port = &(cc->serial_ports[i]);
+
+                p->mapbase = (unsigned int) bcma_port->regs;
+                p->membase = (void *) bcma_port->regs;
+                p->irq = bcma_port->irq + 2;
+                p->uartclk = bcma_port->baud_base;
+                p->regshift = bcma_port->reg_shift;
+                p->iotype = UPIO_MEM;
+                p->flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
+        }
+        return platform_device_register(&uart8250_device);
+}
+#endif
+
+static int __init uart8250_init(void)
+{
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                return uart8250_init_ssb();
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                return uart8250_init_bcma();
+#endif
+        }
+        return -EINVAL;
+}
 
 module_init(uart8250_init);
 
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index cfae81571de..17c3d14d7c4 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -29,21 +29,36 @@
 #include <linux/types.h>
 #include <linux/ssb/ssb.h>
 #include <linux/ssb/ssb_embedded.h>
+#include <linux/bcma/bcma_soc.h>
 #include <asm/bootinfo.h>
 #include <asm/reboot.h>
 #include <asm/time.h>
 #include <bcm47xx.h>
 #include <asm/mach-bcm47xx/nvram.h>
 
-struct ssb_bus ssb_bcm47xx;
-EXPORT_SYMBOL(ssb_bcm47xx);
+union bcm47xx_bus bcm47xx_bus;
+EXPORT_SYMBOL(bcm47xx_bus);
+
+enum bcm47xx_bus_type bcm47xx_bus_type;
+EXPORT_SYMBOL(bcm47xx_bus_type);
 
 static void bcm47xx_machine_restart(char *command)
 {
         printk(KERN_ALERT "Please stand by while rebooting the system...\n");
         local_irq_disable();
         /* Set the watchdog timer to reset immediately */
-        ssb_watchdog_timer_set(&ssb_bcm47xx, 1);
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);
+                break;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1);
+                break;
+#endif
+        }
         while (1)
                 cpu_relax();
 }
@@ -52,11 +67,23 @@ static void bcm47xx_machine_halt(void)
 {
         /* Disable interrupts and watchdog and spin forever */
         local_irq_disable();
-        ssb_watchdog_timer_set(&ssb_bcm47xx, 0);
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0);
+                break;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 0);
+                break;
+#endif
+        }
         while (1)
                 cpu_relax();
 }
 
+#ifdef CONFIG_BCM47XX_SSB
 #define READ_FROM_NVRAM(_outvar, name, buf) \
         if (nvram_getprefix(prefix, name, buf, sizeof(buf)) >= 0)\
                 sprom->_outvar = simple_strtoul(buf, NULL, 0);
@@ -247,7 +274,7 @@ static int bcm47xx_get_invariants(struct ssb_bus *bus,
         return 0;
 }
 
-void __init plat_mem_setup(void)
+static void __init bcm47xx_register_ssb(void)
 {
         int err;
         char buf[100];
@@ -258,12 +285,12 @@ void __init plat_mem_setup(void)
                 printk(KERN_WARNING "bcm47xx: someone else already registered"
                         " a ssb SPROM callback handler (err %d)\n", err);
 
-        err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE,
+        err = ssb_bus_ssbbus_register(&(bcm47xx_bus.ssb), SSB_ENUM_BASE,
                                       bcm47xx_get_invariants);
         if (err)
                 panic("Failed to initialize SSB bus (err %d)\n", err);
 
-        mcore = &ssb_bcm47xx.mipscore;
+        mcore = &bcm47xx_bus.ssb.mipscore;
         if (nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
                 if (strstr(buf, "console=ttyS1")) {
                         struct ssb_serial_port port;
@@ -276,8 +303,57 @@ void __init plat_mem_setup(void)
                         memcpy(&mcore->serial_ports[1], &port, sizeof(port));
                 }
         }
+}
+#endif
+
+#ifdef CONFIG_BCM47XX_BCMA
+static void __init bcm47xx_register_bcma(void)
+{
+        int err;
+
+        err = bcma_host_soc_register(&bcm47xx_bus.bcma);
+        if (err)
+                panic("Failed to initialize BCMA bus (err %d)\n", err);
+}
+#endif
+
+void __init plat_mem_setup(void)
+{
+        struct cpuinfo_mips *c = &current_cpu_data;
+
+        if (c->cputype == CPU_74K) {
+                printk(KERN_INFO "bcm47xx: using bcma bus\n");
+#ifdef CONFIG_BCM47XX_BCMA
+                bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA;
+                bcm47xx_register_bcma();
+#endif
+        } else {
+                printk(KERN_INFO "bcm47xx: using ssb bus\n");
+#ifdef CONFIG_BCM47XX_SSB
+                bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB;
+                bcm47xx_register_ssb();
+#endif
+        }
 
         _machine_restart = bcm47xx_machine_restart;
         _machine_halt = bcm47xx_machine_halt;
         pm_power_off = bcm47xx_machine_halt;
 }
+
+static int __init bcm47xx_register_bus_complete(void)
+{
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                /* Nothing to do */
+                break;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                bcma_bus_register(&bcm47xx_bus.bcma.bus);
+                break;
+#endif
+        }
+        return 0;
+}
+device_initcall(bcm47xx_register_bus_complete);
diff --git a/arch/mips/bcm47xx/time.c b/arch/mips/bcm47xx/time.c
index 0c6f47b3fd9..536374dcba7 100644
--- a/arch/mips/bcm47xx/time.c
+++ b/arch/mips/bcm47xx/time.c
@@ -30,7 +30,7 @@
 
 void __init plat_time_init(void)
 {
-        unsigned long hz;
+        unsigned long hz = 0;
 
         /*
          * Use deterministic values for initial counter interrupt
@@ -39,7 +39,19 @@ void __init plat_time_init(void)
         write_c0_count(0);
         write_c0_compare(0xffff);
 
-        hz = ssb_cpu_clock(&ssb_bcm47xx.mipscore) / 2;
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2;
+                break;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                hz = bcma_cpu_clock(&bcm47xx_bus.bcma.bus.drv_mips) / 2;
+                break;
+#endif
+        }
+
         if (!hz)
                 hz = 100000000;
 
diff --git a/arch/mips/bcm47xx/wgt634u.c b/arch/mips/bcm47xx/wgt634u.c
index 74d06965326..e9f9ec8d443 100644
--- a/arch/mips/bcm47xx/wgt634u.c
+++ b/arch/mips/bcm47xx/wgt634u.c
@@ -108,7 +108,7 @@ static irqreturn_t gpio_interrupt(int irq, void *ignored)
 
         /* Interrupts are shared, check if the current one is
            a GPIO interrupt. */
-        if (!ssb_chipco_irq_status(&ssb_bcm47xx.chipco,
+        if (!ssb_chipco_irq_status(&bcm47xx_bus.ssb.chipco,
                                    SSB_CHIPCO_IRQ_GPIO))
                 return IRQ_NONE;
 
@@ -132,22 +132,26 @@ static int __init wgt634u_init(void)
          * machine. Use the MAC address as an heuristic. Netgear Inc. has
          * been allocated ranges 00:09:5b:xx:xx:xx and 00:0f:b5:xx:xx:xx.
          */
+        u8 *et0mac;
 
-        u8 *et0mac = ssb_bcm47xx.sprom.et0mac;
+        if (bcm47xx_bus_type != BCM47XX_BUS_TYPE_SSB)
+                return -ENODEV;
+
+        et0mac = bcm47xx_bus.ssb.sprom.et0mac;
 
         if (et0mac[0] == 0x00 &&
             ((et0mac[1] == 0x09 && et0mac[2] == 0x5b) ||
              (et0mac[1] == 0x0f && et0mac[2] == 0xb5))) {
-                struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore;
+                struct ssb_mipscore *mcore = &bcm47xx_bus.ssb.mipscore;
 
                 printk(KERN_INFO "WGT634U machine detected.\n");
 
                 if (!request_irq(gpio_to_irq(WGT634U_GPIO_RESET),
                                  gpio_interrupt, IRQF_SHARED,
-                                 "WGT634U GPIO", &ssb_bcm47xx.chipco)) {
+                                 "WGT634U GPIO", &bcm47xx_bus.ssb.chipco)) {
                         gpio_direction_input(WGT634U_GPIO_RESET);
                         gpio_intmask(WGT634U_GPIO_RESET, 1);
-                        ssb_chipco_irq_mask(&ssb_bcm47xx.chipco,
+                        ssb_chipco_irq_mask(&bcm47xx_bus.ssb.chipco,
                                             SSB_CHIPCO_IRQ_GPIO,
                                             SSB_CHIPCO_IRQ_GPIO);
                 }
diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
index dbc51065df5..b77df0366ee 100644
--- a/arch/mips/include/asm/compat.h
+++ b/arch/mips/include/asm/compat.h
@@ -111,7 +111,8 @@ struct compat_statfs {
         int             f_bavail;
         compat_fsid_t   f_fsid;
         int             f_namelen;
-        int             f_spare[6];
+        int             f_flags;
+        int             f_spare[5];
 };
 
 #define COMPAT_RLIM_INFINITY    0x7fffffffUL
diff --git a/arch/mips/include/asm/lasat/lasat.h b/arch/mips/include/asm/lasat/lasat.h
index a1ada1c27c1..e8ff70f80e1 100644
--- a/arch/mips/include/asm/lasat/lasat.h
+++ b/arch/mips/include/asm/lasat/lasat.h
@@ -41,10 +41,8 @@ enum lasat_mtdparts {
 
 /*
  * The format of the data record in the EEPROM.
- * See Documentation/LASAT/eeprom.txt for a detailed description
- * of the fields in this struct, and the LASAT Hardware Configuration
- * field specification for a detailed description of the config
- * field.
+ * See the LASAT Hardware Configuration field specification for a detailed
+ * description of the config field.
  */
 #include <linux/types.h>
 
diff --git a/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h b/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h
index 8e2fa674be4..4e3f3bc26c6 100644
--- a/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h
+++ b/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h
@@ -368,19 +368,6 @@ typedef struct	psc_spi {
 #define PSC_SPITXRX_LC          (1 << 29)
 #define PSC_SPITXRX_SR          (1 << 28)
 
-/* PSC in SMBus (I2C) Mode. */
-typedef struct  psc_smb {
-        u32     psc_sel;
-        u32     psc_ctrl;
-        u32     psc_smbcfg;
-        u32     psc_smbmsk;
-        u32     psc_smbpcr;
-        u32     psc_smbstat;
-        u32     psc_smbevnt;
-        u32     psc_smbtxrx;
-        u32     psc_smbtmr;
-} psc_smb_t;
-
 /* SMBus Config Register. */
 #define PSC_SMBCFG_RT_MASK      (3 << 30)
 #define PSC_SMBCFG_RT_FIFO1     (0 << 30)
diff --git a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
index d008f47a28b..de95e0723e2 100644
--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
+++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx.h
@@ -19,7 +19,29 @@
 #ifndef __ASM_BCM47XX_H
 #define __ASM_BCM47XX_H
 
-/* SSB bus */
-extern struct ssb_bus ssb_bcm47xx;
+#include <linux/ssb/ssb.h>
+#include <linux/bcma/bcma.h>
+#include <linux/bcma/bcma_soc.h>
+
+enum bcm47xx_bus_type {
+#ifdef CONFIG_BCM47XX_SSB
+        BCM47XX_BUS_TYPE_SSB,
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        BCM47XX_BUS_TYPE_BCMA,
+#endif
+};
+
+union bcm47xx_bus {
+#ifdef CONFIG_BCM47XX_SSB
+        struct ssb_bus ssb;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        struct bcma_soc bcma;
+#endif
+};
+
+extern union bcm47xx_bus bcm47xx_bus;
+extern enum bcm47xx_bus_type bcm47xx_bus_type;
 
 #endif /* __ASM_BCM47XX_H */
diff --git a/arch/mips/include/asm/mach-bcm47xx/gpio.h b/arch/mips/include/asm/mach-bcm47xx/gpio.h
index 98504142124..76961cabeed 100644
--- a/arch/mips/include/asm/mach-bcm47xx/gpio.h
+++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h
@@ -10,6 +10,7 @@
 #define __BCM47XX_GPIO_H
 
 #include <linux/ssb/ssb_embedded.h>
+#include <linux/bcma/bcma.h>
 #include <asm/mach-bcm47xx/bcm47xx.h>
 
 #define BCM47XX_EXTIF_GPIO_LINES        5
@@ -21,41 +22,118 @@ extern int gpio_to_irq(unsigned gpio);
 
 static inline int gpio_get_value(unsigned gpio)
 {
-        return ssb_gpio_in(&ssb_bcm47xx, 1 << gpio);
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                return ssb_gpio_in(&bcm47xx_bus.ssb, 1 << gpio);
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                return bcma_chipco_gpio_in(&bcm47xx_bus.bcma.bus.drv_cc,
+                                           1 << gpio);
+#endif
+        }
+        return -EINVAL;
 }
 
 static inline void gpio_set_value(unsigned gpio, int value)
 {
-        ssb_gpio_out(&ssb_bcm47xx, 1 << gpio, value ? 1 << gpio : 0);
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio,
+                             value ? 1 << gpio : 0);
+                return;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                bcma_chipco_gpio_out(&bcm47xx_bus.bcma.bus.drv_cc, 1 << gpio,
+                                     value ? 1 << gpio : 0);
+                return;
+#endif
+        }
 }
 
 static inline int gpio_direction_input(unsigned gpio)
 {
-        ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 0);
-        return 0;
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 0);
+                return 0;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                bcma_chipco_gpio_outen(&bcm47xx_bus.bcma.bus.drv_cc, 1 << gpio,
+                                       0);
+                return 0;
+#endif
+        }
+        return -EINVAL;
 }
 
 static inline int gpio_direction_output(unsigned gpio, int value)
 {
-        /* first set the gpio out value */
-        ssb_gpio_out(&ssb_bcm47xx, 1 << gpio, value ? 1 << gpio : 0);
-        /* then set the gpio mode */
-        ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 1 << gpio);
-        return 0;
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                /* first set the gpio out value */
+                ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio,
+                             value ? 1 << gpio : 0);
+                /* then set the gpio mode */
+                ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 1 << gpio);
+                return 0;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                /* first set the gpio out value */
+                bcma_chipco_gpio_out(&bcm47xx_bus.bcma.bus.drv_cc, 1 << gpio,
+                                     value ? 1 << gpio : 0);
+                /* then set the gpio mode */
+                bcma_chipco_gpio_outen(&bcm47xx_bus.bcma.bus.drv_cc, 1 << gpio,
+                                       1 << gpio);
+                return 0;
+#endif
+        }
+        return -EINVAL;
 }
 
 static inline int gpio_intmask(unsigned gpio, int value)
 {
-        ssb_gpio_intmask(&ssb_bcm47xx, 1 << gpio,
-                         value ? 1 << gpio : 0);
-        return 0;
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                ssb_gpio_intmask(&bcm47xx_bus.ssb, 1 << gpio,
+                                 value ? 1 << gpio : 0);
+                return 0;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                bcma_chipco_gpio_intmask(&bcm47xx_bus.bcma.bus.drv_cc,
+                                         1 << gpio, value ? 1 << gpio : 0);
+                return 0;
+#endif
+        }
+        return -EINVAL;
 }
 
 static inline int gpio_polarity(unsigned gpio, int value)
 {
-        ssb_gpio_polarity(&ssb_bcm47xx, 1 << gpio,
-                          value ? 1 << gpio : 0);
-        return 0;
+        switch (bcm47xx_bus_type) {
+#ifdef CONFIG_BCM47XX_SSB
+        case BCM47XX_BUS_TYPE_SSB:
+                ssb_gpio_polarity(&bcm47xx_bus.ssb, 1 << gpio,
+                                  value ? 1 << gpio : 0);
+                return 0;
+#endif
+#ifdef CONFIG_BCM47XX_BCMA
+        case BCM47XX_BUS_TYPE_BCMA:
+                bcma_chipco_gpio_polarity(&bcm47xx_bus.bcma.bus.drv_cc,
+                                          1 << gpio, value ? 1 << gpio : 0);
+                return 0;
+#endif
+        }
+        return -EINVAL;
 }
 
 
diff --git a/arch/mips/pci/pci-bcm47xx.c b/arch/mips/pci/pci-bcm47xx.c
index 455f8e50a00..400535a955d 100644
--- a/arch/mips/pci/pci-bcm47xx.c
+++ b/arch/mips/pci/pci-bcm47xx.c
@@ -25,6 +25,7 @@
 #include <linux/types.h>
 #include <linux/pci.h>
 #include <linux/ssb/ssb.h>
+#include <bcm47xx.h>
 
 int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
@@ -33,9 +34,13 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 
 int pcibios_plat_dev_init(struct pci_dev *dev)
 {
+#ifdef CONFIG_BCM47XX_SSB
         int res;
         u8 slot, pin;
 
+        if (bcm47xx_bus_type !=  BCM47XX_BUS_TYPE_SSB)
+                return 0;
+
         res = ssb_pcibios_plat_dev_init(dev);
         if (res < 0) {
                 printk(KERN_ALERT "PCI: Failed to init device %s\n",
@@ -55,5 +60,6 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
         }
 
         dev->irq = res;
+#endif
         return 0;
 }
diff --git a/arch/mips/pmc-sierra/msp71xx/msp_serial.c b/arch/mips/pmc-sierra/msp71xx/msp_serial.c
index f7261628d8a..a1c7c7da233 100644
--- a/arch/mips/pmc-sierra/msp71xx/msp_serial.c
+++ b/arch/mips/pmc-sierra/msp71xx/msp_serial.c
@@ -27,6 +27,7 @@
 #include <linux/serial.h>
 #include <linux/serial_core.h>
 #include <linux/serial_reg.h>
+#include <linux/slab.h>
 
 #include <asm/bootinfo.h>
 #include <asm/io.h>
@@ -38,6 +39,55 @@
 #include <msp_int.h>
 #include <msp_regs.h>
 
+struct msp_uart_data {
+        int     last_lcr;
+};
+
+static void msp_serial_out(struct uart_port *p, int offset, int value)
+{
+        struct msp_uart_data *d = p->private_data;
+
+        if (offset == UART_LCR)
+                d->last_lcr = value;
+
+        offset <<= p->regshift;
+        writeb(value, p->membase + offset);
+}
+
+static unsigned int msp_serial_in(struct uart_port *p, int offset)
+{
+        offset <<= p->regshift;
+
+        return readb(p->membase + offset);
+}
+
+static int msp_serial_handle_irq(struct uart_port *p)
+{
+        struct msp_uart_data *d = p->private_data;
+        unsigned int iir = readb(p->membase + (UART_IIR << p->regshift));
+
+        if (serial8250_handle_irq(p, iir)) {
+                return 1;
+        } else if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
+                /*
+                 * The DesignWare APB UART has an Busy Detect (0x07) interrupt
+                 * meaning an LCR write attempt occurred while the UART was
+                 * busy. The interrupt must be cleared by reading the UART
+                 * status register (USR) and the LCR re-written.
+                 *
+                 * Note: MSP reserves 0x20 bytes of address space for the UART
+                 * and the USR is mapped in a separate block at an offset of
+                 * 0xc0 from the start of the UART.
+                 */
+                (void)readb(p->membase + 0xc0);
+                writeb(d->last_lcr, p->membase + (UART_LCR << p->regshift));
+
+                return 1;
+        }
+
+        return 0;
+}
+
 void __init msp_serial_setup(void)
 {
         char    *s;
@@ -59,13 +109,22 @@ void __init msp_serial_setup(void)
         up.irq          = MSP_INT_UART0;
         up.uartclk      = uartclk;
         up.regshift     = 2;
-        up.iotype       = UPIO_DWAPB; /* UPIO_MEM like */
+        up.iotype       = UPIO_MEM;
         up.flags        = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
         up.type         = PORT_16550A;
         up.line         = 0;
-        up.private_data         = (void*)UART0_STATUS_REG;
-        if (early_serial_setup(&up))
-                printk(KERN_ERR "Early serial init of port 0 failed\n");
+        up.serial_out   = msp_serial_out;
+        up.serial_in    = msp_serial_in;
+        up.handle_irq   = msp_serial_handle_irq;
+        up.private_data = kzalloc(sizeof(struct msp_uart_data), GFP_KERNEL);
+        if (!up.private_data) {
+                pr_err("failed to allocate uart private data\n");
+                return;
+        }
+        if (early_serial_setup(&up)) {
+                kfree(up.private_data);
+                pr_err("Early serial init of port 0 failed\n");
+        }
 
         /* Initialize the second serial port, if one exists */
         switch (mips_machtype) {
@@ -88,6 +147,8 @@ void __init msp_serial_setup(void)
         up.irq          = MSP_INT_UART1;
         up.line         = 1;
         up.private_data         = (void*)UART1_STATUS_REG;
-        if (early_serial_setup(&up))
-                printk(KERN_ERR "Early serial init of port 1 failed\n");
+        if (early_serial_setup(&up)) {
+                kfree(up.private_data);
+                pr_err("Early serial init of port 1 failed\n");
+        }
 }
diff --git a/arch/mips/txx9/generic/setup_tx4939.c b/arch/mips/txx9/generic/setup_tx4939.c
index e9f95dcde37..ba3cec3155d 100644
--- a/arch/mips/txx9/generic/setup_tx4939.c
+++ b/arch/mips/txx9/generic/setup_tx4939.c
@@ -321,7 +321,7 @@ void __init tx4939_sio_init(unsigned int sclk, unsigned int cts_mask)
 static u32 tx4939_get_eth_speed(struct net_device *dev)
 {
         struct ethtool_cmd cmd;
-        if (dev_ethtool_get_settings(dev, &cmd))
+        if (__ethtool_get_settings(dev, &cmd))
                 return 100;     /* default 100Mbps */
 
         return ethtool_cmd_speed(&cmd);